Storage device

The integration of a check bit generation and error correction system with oxide semiconductor transistors in silicon-based flip-flop circuits addresses soft errors and power consumption issues, resulting in a reliable, compact, and efficient semiconductor device.

WO2025163443A1 Publication Date: 2025-08-07SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
PCT/IB2025/050746
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-31
Filing Date
2025-01-24
Publication Date
2025-08-07

AI Technical Summary

Technical Problem

Existing semiconductor devices using silicon transistors are susceptible to soft errors, particularly in radiation environments, leading to data inversion and reduced reliability, and they consume high power and occupy large circuit scales.

Method used

A storage device incorporating a check bit generation unit, memory unit, and error detection and correction unit, utilizing flip-flop circuits with silicon transistors and holding circuits with oxide semiconductor transistors, which have lower off-state currents and are less affected by radiation, enabling error correction and power gating.

Benefits of technology

The solution provides a highly reliable, miniaturized, and low-power semiconductor device with increased operation speed, capable of correcting errors and maintaining data integrity in radiation environments.

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Abstract

The present invention provides a novel storage device. A test bit generation unit has the function of generating a test sequence from an information sequence. A storage unit has the function of storing, in a flip-flop circuit, a codeword that is constituted by the information sequence and the test sequence, and outputting the codeword as a received word. An error detection correction unit has the function of outputting an error vector which indicates the position of an error in the received word and a decoded word in which the error in the received word has been corrected. The storage unit has the function of storing the decoded word in the flip-flop circuit in accordance with the error vector, the function of writing the decoded word to a holding circuit, and the function of writing back, to the flip-flop circuit, the decoded word written in the holding circuit. The flip-flop circuit has a first transistor. The holding circuit has a second transistor. The off current of the second transistor is smaller than the off current of the first transistor.
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