Laminate structure and method for manufacturing laminate structure
A layered structure with decreasing oxygen concentration in semiconductor films addresses the challenge of achieving high crystallinity and flatness on amorphous substrates, enabling the production of semiconductor devices with improved characteristics.
Patent Information
- Application Number
- PCT/JP2025/000024
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-29
- Filing Date
- 2025-01-06
- Publication Date
- 2025-08-07
AI Technical Summary
Existing methods for fabricating Group 13 metal nitride thin films on substrates face challenges in achieving high crystallinity and flatness, particularly when using amorphous glass or plastic substrates, which are prone to deformation during high-temperature processes.
A layered structure is developed with a semiconductor film composed of three layers, where the bulk oxygen concentration decreases continuously or stepwise from the substrate, using sputtering and other methods to control oxygen concentration, ensuring high crystallinity and flatness, even on low-melting-point substrates.
The method enables the formation of semiconductor films with high crystallinity and surface flatness, allowing for the fabrication of semiconductor devices with precise and controlled characteristics, such as light-emitting diodes and transistors, without substrate deformation.
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Figure JP2025000024_07082025_PF_FP_ABST
Abstract
Description
LAMINATE STRUCTURE AND METHOD FOR MANUFACTURING LAMINATE STRUCTURE
[0001] One embodiment of the present invention relates to a layered structure containing a Group 13 metal nitride and a method for producing the same.
[0002] In recent years, semiconductors containing Group 13 metal nitrides, such as gallium nitride (GaN) and indium nitride (InN), have been applied to various semiconductor devices, including light-emitting diodes. Thin films containing Group 13 metal nitrides are typically fabricated on single-crystal substrates, such as silicon, sapphire, or silicon carbide, by metalorganic chemical vapor deposition (MOCVD). Recently, it has been discovered that thin films of Group 13 metal nitrides with relatively high crystallinity can be fabricated by sputtering (see, for example, Patent Document 1).
[0003] International Publication No. 2022 / 259918
[0004] An object of one embodiment of the present invention is to provide a novel layered structure containing a Group 13 metal nitride and a method for manufacturing the same. Alternatively, an object of one embodiment of the present invention is to provide a layered structure containing a Group 13 metal nitride and having high crystallinity and flatness, and a method for manufacturing the same.
[0005] One embodiment of the present invention is a layered structure comprising a substrate and a semiconductor film overlying the substrate, the semiconductor film comprising a group 13 metal nitride, wherein the bulk oxygen concentration in the semiconductor film decreases continuously or stepwise with increasing distance from the substrate.
[0006] One embodiment of the present invention is a method for fabricating a layered structure, comprising forming a semiconductor film containing a Group 13 metal nitride on a substrate, the semiconductor film being formed such that the bulk oxygen concentration decreases continuously or stepwise with increasing distance from the substrate.
[0007] One embodiment of the present invention is a semiconductor device including the above-described stacked structure.
[0008] 1 is a schematic end view of a laminated structure according to one embodiment of the present invention. 2 is a schematic end view of a laminated structure according to one embodiment of the present invention. 3 is a schematic end view of a laminated structure according to one embodiment of the present invention. 4 is a schematic end view of a laminated structure according to one embodiment of the present invention. 5 is a schematic end view of a light-emitting diode manufactured using a laminated structure according to one embodiment of the present invention. 6 is a schematic end view of a light-emitting diode manufactured using a laminated structure according to one embodiment of the present invention. 7 is a schematic end view of a transistor manufactured using a laminated structure according to one embodiment of the present invention. 8 is a schematic end view of a transistor manufactured using a laminated structure according to one embodiment of the present invention.
[0009] Hereinafter, various embodiments of the present invention will be described with reference to the drawings, etc. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and should not be construed as being limited to the description of the embodiments exemplified below.
[0010] In order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In this specification and each drawing, elements having the same function as those described in the previous drawings may be given the same reference numerals, and duplicated explanations may be omitted. This reference numeral is used to collectively represent multiple identical or similar structures, and when these are individually represented, a hyphen and a natural number are added after the reference numeral.
[0011] In this specification and claims, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.
[0012] In this specification and claims, the expression "a structure exposed from another structure" means a state in which a part of a structure is not covered by another structure, and includes a state in which the part not covered by another structure is covered by yet another structure. The state expressed by this expression also includes a state in which a structure is not in contact with another structure.
[0013] First Embodiment In this embodiment, a laminated structure according to one embodiment of the present invention and a method for manufacturing the same will be described.
[0014] 1. LAMINATE STRUCTURE (1) OVERALL STRUCTURE A schematic end view of a laminated structure 100 according to one embodiment of the present invention is shown in FIG. 1 . The laminated structure 100 includes a substrate 102 and a semiconductor film 104 containing a Group 13 metal nitride located on the substrate 102. The substrate 102 and the semiconductor film 104 may be in direct contact with each other, or the laminated structure 100 may optionally include a buffer layer 106 between the substrate 102 and the semiconductor film 104 ( FIG. 2 ). Various patterned semiconductor films, insulating films, and conductive films can be formed on the laminated structure 100, thereby enabling the construction of various semiconductor devices. Therefore, the laminated structure 100 also functions as a functional substrate for providing semiconductor devices.
[0015] (2) Substrate The substrate 102 may be a single-crystal substrate or an amorphous substrate. For example, a single-crystal or polycrystalline silicon substrate, a sapphire substrate, a quartz substrate, a glass substrate, or a plastic substrate may be used as the substrate 102. For example, a large rectangular amorphous glass substrate, also known as mother glass, may be used as the substrate 102. Specifically, a glass substrate measuring 2160 mm x 2460 mm, called eighth-generation mother glass, a glass substrate measuring 2400 mm x 2800 mm, called ninth-generation mother glass, a glass substrate measuring 2880 mm x 3130 mm, called tenth-generation mother glass, or even larger glass substrates may be used. Examples of materials used in plastic substrates include polymers such as polyimide, polyamide, and polycarbonate. The substrate 102 may be flexible.
[0016] (3) Buffer Layer The buffer layer 106 improves the adhesion between the substrate 102 and the semiconductor film 104, thereby preventing deformation (warping) of the substrate 102 during the formation of the semiconductor film 104 or various semiconductor films, insulating films, and conductive films provided on the semiconductor film 104, and also contributes to promoting crystallization of the semiconductor film 104. Therefore, the crystallinity of not only the semiconductor film 104 but also various films provided thereon can be improved.
[0017] Specifically, the buffer layer 106 may include an insulating or conductive material having a hexagonal close-packed structure, a face-centered cubic structure, or a structure equivalent thereto. Here, a hexagonal close-packed structure or a structure equivalent thereto includes a crystal structure in which the c-axis is not perpendicular to the a-axis and the b-axis. Therefore, in this structure, the buffer layer 106 is oriented in the (0001) direction, i.e., the c-axis direction, relative to the substrate 102. Furthermore, a buffer layer 106 having a face-centered cubic structure or a structure equivalent thereto is oriented in the (111) direction relative to the substrate 102. Therefore, the c-axis of the buffer layer 106 is oriented perpendicular or approximately perpendicular to the surface on which the buffer layer 106 is provided. Forming a functional layer containing a compound semiconductor on the buffer layer 106 promotes crystal growth in the c-axis direction of the semiconductor film 104, improving crystallinity.
[0018] Such a buffer layer 106 may include metal nitrides such as aluminum indium nitride, aluminum nitride, potassium aluminum nitride, aluminum nitride, aluminum oxynitride, titanium nitride, and gallium nitride; metal oxides such as zinc oxide, lithium niobate (LiNbO), BiLaTiO, SrFeO, BiFeO, BaFeO, ZnFeO, and PMnN-PZT; silicon; germanium; or basic calcium phosphate (biological apatite). Using such materials allows for the formation of an insulating buffer layer 106. In particular, using aluminum indium nitride can reduce the lattice constant mismatch between the buffer layer 106 and the semiconductor film 104 in contact with it, thereby promoting more effective c-axis orientation of the semiconductor film 104. Alternatively, the buffer layer 106 may include metals such as titanium, aluminum, silver, nickel, copper, strontium, rhodium, palladium, iridium, platinum, and gold. When the buffer layer 106 contains a metal, the buffer layer 106 has conductivity and functions as wiring, so that the buffer layer 106 can also be used as wiring.
[0019] (4) Semiconductor Film As described above, the semiconductor film 104 contains a Group 13 metal nitride. The semiconductor film 104 may be composed of a Group 13 metal nitride. The Group 13 metal is selected from gallium, indium, and aluminum. Therefore, examples of the Group 13 metal nitride include gallium nitride-based compound semiconductors such as gallium nitride, indium nitride, aluminum gallium nitride, and indium gallium nitride. The semiconductor film 104 may further contain dopants such as silicon, germanium, magnesium, zinc, cadmium, and beryllium.
[0020] Here, the oxygen bulk concentration in the semiconductor film 104 decreases as the distance from the substrate 102 increases. The oxygen bulk concentration may decrease continuously or stepwise. Controlling the oxygen bulk concentration in this manner improves the crystallinity and flatness of the semiconductor film 104. More specifically, the semiconductor film 104 can be composed of three layers. That is, as shown in FIG. 3 , the semiconductor film 104 is composed of a first layer 104a in contact with the substrate 102 or the buffer layer 106, a second layer 104b located on the first layer 104a, and a third layer 104c located on the second layer 104b. The oxygen bulk concentration decreases in the order of the first layer 104a, the second layer 104b, and the third layer 104c.
[0021] The first layer 104a contains or is composed of a Group 13 metal nitride and has a thickness of 10 nm to 50 nm. The first layer 104a contains crystals of a Group 13 metal nitride and is oriented in the c-axis direction with respect to the surface of the substrate 102. The first layer 104a grows from the surface of the substrate 102 or the buffer layer 106 and exhibits a columnar shape. The first layer 104a functions as a so-called seed crystal to promote the crystal growth of the second layer 104b. The first layer 104a may be distributed in an island shape on the substrate 102.
[0022] The second layer 104b also contains or is composed of a Group 13 metal nitride. The second layer 104b is formed by crystal growth of the Group 13 metal nitride mainly from a portion of the surface of the first layer 104a, partially covering the first layer 104a. More specifically, the second layer 104b is formed by using the first layer 104a as a seed crystal and growing the Group 13 metal nitride three-dimensionally (i.e., in the normal direction of the substrate 102 and a direction perpendicular thereto) from the surface. The thickness of the second layer 104b is greater than that of the first layer 104a, for example, 300 nm or more and 500 nm or less. The bulk concentration of oxygen in the second layer 104b is lower than that in the first layer 104a. For example, the bulk concentration of oxygen in the first layer 104a is 1×10 19 atoms / cm 3 1x10 or more 20 atoms / cm 3or less, whereas the bulk concentration of oxygen in the second layer 104b is 1×10 18 atoms / cm 3 1x10 or more 19 atoms / cm 3 As described above, the crystal growth of the group 13 metal nitride occurs using the first layer 104a as a seed crystal. In addition, since the bulk concentration of oxygen is low, there are few crystal defects. Therefore, the second layer 104b exhibits high crystallinity.
[0023] The third layer 104c also contains or is composed of a Group 13 metal nitride. The third layer 104c is formed by two-dimensional crystal growth of a compound semiconductor from the surface of the second layer 104b. That is, the third layer 104c is formed by crystal growth of the compound semiconductor in the normal direction of the substrate 102 and in a direction perpendicular thereto, but the crystal growth rate of the latter is faster than that of the former. Therefore, the third layer 104c absorbs the irregularities caused by the first layer 104a and the second layer 104b and is formed as a layer with a high surface flatness. The thickness of the semiconductor film 104, i.e., the distance from the interface between the substrate 102 and the semiconductor film 104 (or the interface between the substrate 102 and the buffer layer 106, if provided) to the top surface of the third layer 104c, is, for example, 1 μm or more and 3 μm or less. The bulk concentration of oxygen in the third layer 104c is lower than that in the second layer 104b, e.g., 1×10 17 atoms / cm 3 1x10 or more 18 atoms / cm 3 The oxygen concentration at the surface of the third layer 104c is 1×10 17 atoms / cm 3 It is preferable that the third layer 104c has an arithmetic mean surface roughness of 0.5 nm or more and 2 nm or less. Therefore, the third layer 104c has very few crystal defects caused by oxygen. Since there are few oxygen defects, particularly near the surface, the third layer 104c has high crystallinity and surface flatness. For example, the arithmetic mean surface roughness of the surface of the third layer 104c is 0.5 nm or more and 2 nm or less. The bulk oxygen concentration and the surface oxygen concentration described above can be estimated by secondary ion mass spectrometry (SIMS). The arithmetic mean surface roughness can be obtained using an atomic force microscope (AFM) or the like.
[0024] The high flatness of the third layer 104c also improves the flatness of various films formed thereon. This contributes to improving the characteristics of semiconductor devices fabricated using the stacked structure 100. For example, when forming a light-emitting diode using the stacked structure 100, a quantum well structure having an alternating stack of ultra-thin films with a thickness of about several nanometers may be formed to form the light-emitting layer. In this case, by using the stacked structure 100, the ultra-thin film can be formed on a flat surface with minimal surface irregularities. Therefore, it is possible to manufacture a light-emitting diode having a quantum well structure with a highly controlled structure, and as a result, a light-emitting diode with precisely controlled characteristics can be provided.
[0025] 2. Method for Fabricating the Stacked Structure A method for fabricating the stacked structure 100 will be described below. As described above, the stacked structure 100 has a three-layer structure composed of a first layer 104a, a second layer 104b, and a third layer 104c. The bulk oxygen concentration of the semiconductor film 104 decreases in the order of the first layer 104a, the second layer 104b, and the third layer 104c, i.e., as the distance from the substrate 102 increases. In other words, the semiconductor film 104 is formed so that the bulk oxygen concentration decreases as the distance from the substrate 102 increases. As described below, by forming the semiconductor film 104 in three stages, the bulk oxygen concentration can be controlled as described above, and a semiconductor film 104 with high surface flatness and crystallinity can be formed.
[0026] (1) Formation of the First Layer In the first step, which is the initial step, the first layer 104a is formed ( FIG. 4 ). The first layer 104a is formed on the substrate 102 or the buffer layer 106 by sputtering. Specifically, a sputtering target containing a Group 13 metal (a zero-valent Group 13 metal), a sputtering target containing a Group 13 metal nitride, or a sputtering target containing a Group 13 metal nitride and a dopant is used, and nitrogen gas is used as the sputtering gas. -1The first layer 104a can be formed by sputtering at a pressure of 1 Pa or more and 1 Pa or less. The first layer 104a may be formed in an island shape on the substrate 102, that is, so that the substrate 102 is exposed between adjacent seed crystals. The temperature at this time can be selected from the range of 500°C or more and 600°C or less, for example. Therefore, even if a glass substrate with a relatively low melting point and strain point is used as the substrate 102, the first layer 104a can be formed on the substrate 102 without deformation.
[0027] (2) Formation of the Second Layer In the second step following the first step, the second layer 104b is formed (FIG. 4). As described above, the second layer 104b is formed by three-dimensional growth using the first layer 104a as a seed crystal. The second layer 104b can be formed by sputtering, MOCVD, or molecular beam epitaxy (MBE). However, because MOCVD requires high-temperature deposition, sputtering or MBE is preferable when using a glass or plastic substrate as the substrate 102.
[0028] When the second layer 104b is formed by sputtering, the process can be similar to that for the first layer 104a. However, to form the second layer 104b with a lower bulk oxygen concentration, sputtering is performed so that the oxygen concentration in the sputtering gas is lower than that in the first layer 104a. That is, sputtering is performed under conditions in which the oxygen partial pressure in the atmosphere during the formation of the second layer 104b is lower than that during the formation of the first layer 104a. For example, a sputtering gas with a lower oxygen concentration than the sputtering gas used during the formation of the first layer 104a may be used during the formation of the second layer 104b. Alternatively, a reducing gas such as hydrogen gas may be mixed into the sputtering gas to reduce the oxygen concentration in the sputtering gas. This causes a reaction between the reducing gas and oxygen during sputtering, thereby reducing the oxygen concentration and partial pressure in the sputtering gas. If a reducing gas is included in the sputtering gas during the first stage of sputtering, the concentration is lower than that during the second stage.
[0029] Alternatively, the oxygen concentration in the sputtering target may be controlled. That is, a sputtering target having a lower oxygen concentration may be used to form the second layer 104b than the sputtering target used to form the first layer 104a. This reduces the amount of oxygen or compounds containing oxygen that are displaced from the sputtering target, allowing the second layer 104b to have a lower bulk oxygen concentration than the first layer 104a.
[0030] When the MBE method is applied, for example, 1×10 -8 Pa or more 1×10 -4 In an ultra-high vacuum of 100 Pa or less, a crucible filled with a Group 13 metal nitride, which is the material constituting the semiconductor film 104, is heated, and the resulting molecular beam is irradiated onto the substrate 102 on which the first layer 104a has been formed. The film formation temperature at this time is, for example, 700°C or higher and 800°C or lower. Compared with the sputtering method used to form the first layer 104a, the pressure of the atmosphere used to form the second layer 104b by MBE is very low. Therefore, it is possible to significantly reduce the partial pressure of oxygen in the atmosphere used to form the second layer 104b compared to that used to form the first layer 104a.
[0031] When a substrate with high heat resistance, such as a silicon substrate, a sapphire substrate, or a silicon carbide substrate, is used as the substrate 102, the second layer 104b may be formed by MOCVD. The MOCVD method uses an organometallic compound containing a Group 13 metal such as trimethylgallium, trimethylindium, or trimethylaluminum as a reactive gas, ammonia gas as a nitrogen source, and hydrogen gas and ammonium gas as carrier gases, and is performed at a pressure of 1×10 or higher than atmospheric pressure. 5 The substrate 102 on which the first layer 104a has been formed may be treated at a temperature of 800°C to 1100°C under a pressure of 100 Pa or less. Active species generated by thermal decomposition of the reactive gas and the nitrogen source are deposited on the first layer 104a, causing epitaxial crystal growth of a Group 13 metal nitride, resulting in the formation of the second layer 104b. In the MOCVD method, the partial pressure of hydrogen gas is relatively high, e.g., 2×10 4 Pa or more 5×10 4Pa or less. Therefore, oxygen mixed in the film formation atmosphere can be effectively trapped. As a result, in the second stage, film formation can be performed in a film formation atmosphere with a lower oxygen partial pressure than in the first stage, and the second layer 104b can be formed with a lower oxygen bulk concentration than the first layer 104a.
[0032] (3) Formation of the Third Layer In the third step following the second step, the third layer 104c is formed (FIG. 4). As described above, the third layer 104c is formed by two-dimensionally growing a Group 13 metal nitride on the second layer 104b. Like the second layer 104b, the third layer 104c can also be formed by sputtering, MOCVD, or MBE. However, when a glass substrate or a plastic substrate is used as the substrate 102, it is preferable to use sputtering or MBE.
[0033] The third layer 104c can be formed in the same manner as the second layer 104b, and therefore detailed description thereof will be omitted. However, the third layer 104c is formed under conditions in which the partial pressure of oxygen in the atmosphere during formation is lower than that during formation of the second layer 104b. Therefore, when using a sputtering method, the sputtering is performed so that the oxygen concentration in the sputtering gas is lower than that during formation of the second layer 104b in order to lower the bulk oxygen concentration compared to that during formation of the second layer 104b. For example, a sputtering gas having a lower oxygen concentration than the sputtering gas used during formation of the second layer 104b may be used during formation of the third layer 104c. Alternatively, the concentration of the reducing gas in the sputtering gas during formation of the third layer 104c may be set higher than that during formation of the second layer 104b. Alternatively, a sputtering target having a lower oxygen concentration than the sputtering target used to form the second layer 104b may be used to form the third layer 104c.
[0034] When the MBE method is used, the third layer 104c may be formed at a pressure lower than that used to form the second layer 104b, thereby making it possible to reduce the partial pressure of oxygen in the atmosphere used to form the third layer 104c compared to that used to form the second layer 104b.
[0035] When the third layer 104c is formed by the MOCVD method, the hydrogen gas concentration in the reactive gas during the formation of the third layer 104c is set to be higher than that during the formation of the second layer 104b, whereby the third layer 104c having a lower bulk oxygen concentration can be formed.
[0036] In the case where the buffer layer 106 is provided, the buffer layer 106 may be formed by a sputtering method, a CVD method, or the like as appropriate.
[0037] As described above, the semiconductor film 104 is formed so that the oxygen partial pressure in the film-forming atmosphere decreases as the film grows, and therefore, the semiconductor film 104 can be formed on the substrate 102 or the buffer layer 106, in which the oxygen bulk concentration decreases with increasing distance from the substrate 102. Therefore, the semiconductor film 104 can be formed with high crystallinity and a highly flat uppermost layer.
[0038] Second Embodiment The stacked structure 100 described in the first embodiment can be applied to various semiconductor devices. In this embodiment, a light-emitting diode and a transistor will be described as semiconductor devices fabricated using the stacked structure 100. Descriptions of configurations that are the same as or similar to those described in the first embodiment may be omitted.
[0039] 1. Light-Emitting Diode FIG. 5 shows a schematic end view of an example of a light-emitting diode 120 fabricated using the stacked structure 100. The light-emitting diode 120 includes a substrate 122 and an undoped gallium nitride layer (hereinafter, referred to as a uGaN layer) 124 on the substrate 122. The light-emitting diode 120 further includes a stacked structure on the uGaN layer 124, including an n-type cladding layer 130, a p-type cladding layer 134, and a light-emitting layer 132 sandwiched between the n-type cladding layer 130 and the p-type cladding layer 134. The light-emitting diode 120 further includes an anode 136 and a cathode 138 provided on the p-type cladding layer 134 and the n-type cladding layer 130, respectively. The light-emitting diode 120 may further include an optional protective film 140 on the anode 136 and the cathode 138. By applying the method for fabricating the semiconductor film 104 described in the first embodiment, a uGaN layer 124 with high crystallinity and flatness can be formed on the substrate 122.
[0040] The n-type cladding layer 130, the light-emitting layer 132, and the p-type cladding layer 134 are configured to emit visible light by recombination of holes and electrons injected from the anode 136 and the cathode 138, respectively. For example, the n-type cladding layer 130 can be configured to contain gallium nitride and a dopant that imparts n-type conductivity, such as silicon or germanium. On the other hand, the p-type cladding layer 134 can be configured to contain gallium nitride and a dopant that imparts p-type conductivity, such as magnesium, zinc, cadmium, or beryllium. The n-type cladding layer 130 and the p-type cladding layer 134 may each have a single-layer structure or a multilayer structure composed of multiple layers with different compositions.
[0041] The light-emitting layer 132 may have, for example, a single layer structure of indium gallium nitride, or may have a quantum well structure as shown in Fig. 5. A quantum well structure is a structure in which a plurality of thin films having different bandgaps and extremely small thicknesses of about 1 to 5 nm are alternately stacked, and examples thereof include an alternating stack of indium gallium nitride and gallium nitride, an alternating stack of indium gallium arsenide phosphide (GaInAsP) and indium phosphide (InP), and an alternating stack of aluminum indium arsenide (AlInAs) and indium gallium arsenide (InGaAs).
[0042] The anode 136 and the cathode 138 inject holes and electrons into the p-type cladding layer 134 and the n-type cladding layer 130, respectively. The anode 136 can be made of, for example, a metal such as palladium, nickel, or gold, a laminated metal or alloy thereof, or a thin film of a conductive oxide that transmits visible light, such as indium-tin mixed oxide (ITO) or indium-zinc mixed oxide (IZO). The cathode 138 can be made of a metal such as aluminum, titanium, gold, silver, chromium, or indium, or a laminated film of these or an alloy thereof. Both the anode 136 and the cathode 138 can have a single-layer structure or can be a laminate of multiple films having different compositions.
[0043] The substrate 122 corresponds to the substrate 102 of the first embodiment and is selected from high-melting-point substrates such as a quartz substrate, a single-crystal silicon substrate, a single-crystal sapphire substrate, and a silicon carbide substrate. However, the substrate 122 may also be an amorphous glass substrate, including alkali-free glass. In this case, as shown in FIG. 6 , a buffer layer 106 is provided on the substrate 122, and a uGaN layer 124 is formed thereon. It is also preferable to provide an overcoat 128 and an undercoat 126 between the substrate 122 and the buffer layer 106 and / or below the substrate 122, respectively.
[0044] The buffer layer 106 improves the adhesion between the substrate 122 and the uGaN layer 124, thereby preventing deformation (warping) of the substrate 122 under high-temperature conditions during the manufacture of the light-emitting diode 120. Furthermore, the buffer layer 106 contributes to promoting crystallization in the c-axis direction of the uGaN layer 124 formed thereon. As described above, the method for fabricating the semiconductor film 104 described in the first embodiment can be applied to the uGaN layer 124. Therefore, even when an amorphous glass substrate is used as the substrate 122, the buffer layer 106 promotes the growth of the seed crystal in the c-axis direction, allowing the formation of the first layer 104a with a uniform crystal growth direction. This improves the crystallinity of the entire uGaN layer 124, including the first layer 104a, as well as of each layer formed thereon. This makes it possible to provide a light-emitting diode 120 with excellent characteristics.
[0045] The overcoat 128 is provided on the substrate 122 so as to contact the substrate 122. The overcoat 128 prevents the diffusion of impurities, such as alkali metal ions, contained in the substrate 122. The overcoat 128 may be a single film or a laminate of multiple films containing a silicon-containing inorganic compound, such as silicon oxide or silicon nitride. The undercoat 126 suppresses the desorption of water and other impurities from the substrate 122 under high-temperature conditions during the manufacture of the light-emitting diode 120, prevents the incorporation of oxygen-containing impurities into the uGaN layer 124, n-type cladding layer 130, light-emitting layer 132, p-type cladding layer 134, and the like, and prevents warping of the substrate 122 due to differences in the thermal expansion coefficients between the substrate 122 and the uGaN layer 124. A film containing aluminum nitride, a film containing aluminum oxide, or a laminate of these films may be used as the undercoat 126.
[0046] The protective film 140 is configured to prevent impurities such as oxygen and water from entering the light-emitting diode 120, and is composed of one or more films containing a silicon-containing inorganic compound such as silicon oxide or silicon nitride. Openings are provided in the protective film 140 to expose the anode 136 and the cathode 138, and wiring (not shown) is electrically connected to the anode 136 and the cathode 138 using these openings.
[0047] Each of the layers constituting the above-described light-emitting diode 120 can also be formed by a sputtering method. Therefore, high-temperature film formation required for epitaxial growth using a method such as MOCVD is not required, and even if a substrate 122 containing amorphous glass is used, the light-emitting diode 120 can be formed without deformation or damage to the substrate 122.
[0048] 2. Transistor FIG. 7 shows a schematic end view of an example of a transistor 150 fabricated using the stacked layer structure 100. The transistor 150 shown in FIG. 7 is a high-electron-mobility field-effect transistor and includes a substrate 152 corresponding to the substrate 102, a buffer layer 106 on the substrate 152, and an active layer (also referred to as an electron transit layer) 160. The transistor 150 further includes an electron supply layer 162 on the active layer 160, a gate electrode 168 located on the active layer 160 and electrically connected to the active layer 160 and the electron supply layer 162, and a pair of terminals (a first terminal 164 and a second terminal 166). The first terminal 164 and the second terminal 166 may be in contact with the active layer 160, or, as shown in FIG. 7, may be in contact with the active layer 160 via the electron supply layer 162. The transistor 150 further includes an overcoat 154 and an undercoat 156. These configurations will be described below, but the configurations of the substrate 152, overcoat 154, undercoat 156, and buffer layer 106 will not be described because they are the same as the corresponding configurations of the above-described light-emitting diode 120. Furthermore, when a high-melting-point single crystal substrate is used as the substrate 122, the overcoat 154, undercoat 156, buffer layer 106, etc. may not be provided.
[0049] The stack of the active layer 160 and the electron supply layer 162 forms a source / drain current path when the transistor 150 is driven. The active layer 160 and the electron supply layer 162 contain a Group 13 metal element and a Group 15 element. For example, the active layer 160 and the electron supply layer 162 may each contain a gallium nitride or gallium arsenide-based compound semiconductor. As an example, the active layer 160 may be configured to contain undoped gallium nitride, and the electron supply layer 162 may be configured to include a first electron supply layer 162-1 containing undoped aluminum gallium nitride, a second electron supply layer 162-2 containing undoped gallium nitride, and a third electron supply layer 162-3 containing p-type indium gallium nitride. The active layer 160 may be formed by applying the method for forming the semiconductor film 104 described in the first embodiment.
[0050] The first terminal 164, the second terminal 166, and the gate electrode 168 contain a metal such as aluminum, gold, silver, tantalum, molybdenum, titanium, or copper, or an alloy containing one or more of the above metals. Although not shown, a gate insulating film may be provided as an optional configuration between the electron supply layer 162 and the gate electrode 168. The gate insulating film may contain, for example, a silicon-containing inorganic compound such as silicon oxide or silicon nitride, or a so-called high-k material such as hafnium silicate, zirconium silicate, hafnium oxide, or zirconium oxide. These configurations may also be formed by vacuum evaporation, electron beam evaporation, CVD, or sputtering.
[0051] In addition to the active layer 160, the electron supply layer 162 and the like can also be formed using a sputtering method. Therefore, the high temperature film formation required for epitaxial growth using the MOCVD method is not required, and even when a substrate 152 containing amorphous glass is used, these layers can be formed without deformation or damage to the substrate 152. Furthermore, even when an amorphous substrate is used as the substrate 152, the buffer layer 106 promotes the growth of the seed crystal in the c-axis direction, allowing the active layer 160 to be formed with a uniform crystal growth direction. Therefore, the crystallinity of the entire active layer 160 including the first layer 104a, as well as the electron supply layer 162 formed thereon, can be improved. This makes it possible to provide a transistor 150 with excellent characteristics.
[0052] The transistor fabricated using the stacked structure 100 is not limited to the transistor 150 having the structure shown in FIG. 7 . For example, the active layer 160 may have a two-layer structure, as in the transistor 180 shown in FIG. 8 . In this case, the active layer 160 may be composed of, for example, a first active layer 160-1 containing undoped gallium nitride and a second active layer 160-2 containing undoped aluminum gallium nitride. The first active layer 160-1 is formed by the method for fabricating the semiconductor film 104 described in the first embodiment. There are no restrictions on the configuration of the electron supply layer 162. For example, the electron supply layer 162 may be composed of a stack of a first electron supply layer 162-1 containing undoped gallium nitride, a second electron supply layer 162-2 containing n-type gallium nitride, and a third electron supply layer 162-3 containing undoped gallium nitride. A gate insulating film 170 is provided between the active layer 160 and the gate electrode 168. The gate insulating film 170 may be configured to contain the silicon-containing inorganic compound and high-k material described above in addition to aluminum oxide.
[0053] In the transistor 180, not only the buffer layer 106, gate insulating film 170, gate electrode 168, first terminal 164, and second terminal 166, but also the extremely thin active layer 160, which determines the characteristics of the transistor 180, can be formed by sputtering. As described above, the first active layer 160-1 provided on the substrate 152 is formed using a film formation method according to one embodiment of the present invention, and therefore has a highly flat upper surface. This improves the flatness of each layer formed on the first active layer 160-1, thereby enabling precise control of the structure of each layer. This contributes to the mass production of transistors 180 with highly controlled characteristics.
[0054] The above-described embodiments of the present invention can be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design of a display device of each embodiment, or adds or omits processes or modifies conditions, such a display device is included in the scope of the present invention as long as it includes the gist of the present invention.
[0055] Even if there are other effects and advantages different from those brought about by the aspects of each of the above-mentioned embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention.
[0056] 100: stacked structure, 102: substrate, 104: semiconductor film, 104a: first layer, 104b: second layer, 104c: third layer, 106: buffer layer, 120: light-emitting diode, 122: substrate, 124: uGaN layer, 126: undercoat, 128: overcoat, 130: n-type cladding layer, 132: light-emitting layer, 134: p-type cladding layer, 136: anode, 138: cathode, 140: protective film, 150: Transistor, 152: substrate, 154: overcoat, 156: undercoat, 160: active layer, 160-1: first active layer, 160-2: second active layer, 162: electron supply layer, 162-1: first electron supply layer, 162-2: second electron supply layer, 162-3: third electron supply layer, 164: first terminal, 166: second terminal, 168: gate electrode, 170: gate insulating film, 180: transistor
Claims
1. A layered structure comprising: a substrate; and a semiconductor film located on the substrate and including a group 13 metal nitride, wherein the bulk oxygen concentration in the semiconductor film decreases continuously or stepwise with increasing distance from the substrate.
2. The stacked structure according to claim 1, wherein the semiconductor film comprises: a first layer having columnar crystals containing the Group 13 metal nitride and having a thickness of 10 nm or more and 50 nm or less; a second layer located on the first layer, containing the Group 13 metal nitride and having a thickness of 300 nm or more and 500 nm or less; and a third layer located on the second layer, also containing the Group 13 metal nitride, wherein the thickness of the semiconductor film is 1 μm or more and 3 μm or less.
3. The laminated structure according to claim 2, wherein the bulk oxygen concentration decreases in the order of the first layer, the second layer, and the third layer.
4. The laminated structure according to claim 2, wherein the columnar crystals are c-axis oriented relative to the surface of the substrate.
5. The laminated structure according to claim 2, wherein the arithmetic mean surface roughness of the surface of the third layer is 0.5 nm or more and 2 nm or less.
6. The oxygen bulk concentration of the first layer is 1×10 19 atoms / cm 3 1x10 or more 20 atoms / cm 3 the oxygen bulk concentration in the second layer is less than or equal to 1×10 18 atoms / cm 3 1x10 or more 19 atoms / cm 3 the oxygen bulk concentration of the third layer is less than or equal to 1×10 17 atoms / cm 3 1x10 or more 18 atoms / cm 3 The laminate structure according to claim 2, wherein:
7. The oxygen concentration at the surface of the third layer is 1 x 10 17 atoms / cm 3 The laminate structure according to claim 6, wherein:
8. The laminated structure of claim 7, wherein the bulk oxygen concentration and the oxygen concentration at the surface of the third layer are estimated by secondary ion mass spectrometry.
9. The laminated structure of claim 1, wherein the substrate is selected from a glass substrate, a quartz substrate, a single crystal silicon substrate, a sapphire substrate, and a silicon carbide substrate.
10. The layered structure of claim 1, wherein the Group 13 metal nitride is selected from gallium nitride and indium nitride.
11. A method for making a layered structure, comprising forming a semiconductor film on a substrate, the semiconductor film comprising a group 13 metal nitride, the forming of the semiconductor film being performed such that the bulk oxygen concentration decreases continuously or stepwise with increasing distance from the substrate.
12. The method according to claim 11, wherein the formation of the semiconductor film is carried out so that the oxygen partial pressure in the film-forming atmosphere decreases as the semiconductor film grows.
13. The method of claim 11, wherein the formation of the semiconductor film includes: forming a first layer containing the Group 13 metal nitride and having a thickness of 10 nm or more and 50 nm or less on the substrate by a sputtering method; forming a second layer containing the Group 13 metal nitride and having a thickness of 300 nm or more and 500 nm or less on the first layer; and forming a third layer containing the Group 13 metal nitride on the second layer, wherein the thickness of the semiconductor film is 1 μm or more and 3 μm or less.
14. The method of claim 13, wherein the second layer and the third layer are formed by sputtering, and the oxygen partial pressure in the film formation atmosphere during the formation of the second layer is lower than that during the formation of the first layer and higher than that during the formation of the third layer.
15. The method of claim 13, wherein the second layer and the third layer are formed by sputtering, and the hydrogen partial pressure in the film formation atmosphere during the formation of the second layer is higher than that during the formation of the first layer and lower than that during the formation of the third layer.
16. The manufacturing method according to claim 13, wherein the second layer and the third layer are formed by a sputtering method, and the oxygen concentrations in the sputtering targets used in the formation of the first layer, the second layer, and the third layer decrease in this order.
17. The method of claim 13, wherein the second layer and the third layer are formed by metal organic chemical vapor deposition or molecular beam epitaxy, and the oxygen partial pressure in the film formation atmosphere during the formation of the second layer is lower than that during the formation of the first layer and higher than that during the formation of the third layer.
18. The method of claim 11, wherein the Group 13 metal nitride is selected from gallium nitride and indium nitride.
19. The method of claim 11, further comprising forming a buffer layer on the substrate before forming the semiconductor film, the buffer layer comprising at least one of aluminum nitride, indium aluminum nitride, aluminum gallium nitride, aluminum oxide, aluminum oxynitride, titanium nitride, titanium, aluminum, silver, nickel, and copper.
20. The method of claim 11, wherein the substrate is selected from a glass substrate, a quartz substrate, a single crystal silicon substrate, a sapphire substrate, and a silicon carbide substrate.
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