PWM signal generation method, PWM signal generation circuit, and electronic device

Abstract

The embodiments of the present application relate to the technical field of electronics. Provided are a PWM signal generation method, a PWM signal generation circuit, and an electronic device, which are used for adjusting the display effect of an electronic device. The PWM signal generation method comprises: receiving grayscale data; and on the basis of the grayscale data, generating a PWM signal, wherein within one image frame, the PWM signal comprises at least one valid pulse period and at least one invalid pulse period, and bits corresponding to the at least one valid pulse period and the at least one invalid pulse period are arranged in a disordered manner. Under the condition of an unchanged total duty cycle, a continuous valid pulse period can be divided into a plurality of valid pulse sub-periods by means of disordered arrangement, and the plurality of valid pulse sub-periods are uniformly distributed within the entire image frame. In this way, the display effect of an electronic device is equivalent to improving the refresh rate of the electronic device, so that problems such as unstable flickering of the electronic device and visual fatigue can be mitigated, and especially, the improvement effect of low-grayscale flickering is more obvious.

Description

PWM signal generation method, PWM signal generation circuit and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on February 21, 2024, with application number 202410194667.3 and invention name “PWM signal generation method, PWM signal generation circuit and electronic device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to a PWM signal generating method, a PWM signal generating circuit, and an electronic device. Background Art

[0003] Micro light emitting diodes (micro LEDs) are widely used in the display field due to their advantages such as small size, long life and low power consumption.

[0004] Currently, the use of pulse width modulation (PWM) signals to dim micro organic light emitting diodes (Micro LEDs) is gaining increasing popularity. When driving Micro LEDs with traditional PWM signals in low grayscale scenarios, the light briefly lights up in the early stages of an image frame and then turns off for a long time in the latter stages, resulting in unstable display flicker and visual fatigue. Summary of the Invention

[0005] The embodiments of the present application provide a PWM signal generating method, a PWM signal generating circuit, and an electronic device for adjusting the display effect of an electronic device and improving the user experience.

[0006] To achieve the above objectives, this application adopts the following technical solutions:

[0007] In a first aspect of an embodiment of the present application, a pulse width modulation (PWM) signal generation method is provided, which is applied to an electronic device. The method includes: receiving grayscale data; generating a PWM signal based on the grayscale data; within an image frame, the PWM signal includes at least one valid pulse period and at least one invalid pulse period, and the bits corresponding to the at least one valid pulse period and the at least one invalid pulse period are arranged in a random order.

[0008] The PWM signal generation method provided in the embodiment of the present application generates a PWM signal in which the bits corresponding to the valid pulse period and the invalid pulse period are arranged in a random order. Therefore, while the total duty cycle of the PWM signal remains unchanged, the continuous valid pulse period can be interrupted by the invalid pulse period into multiple sub-valid pulse periods through random arrangement, and the multiple sub-valid pulse periods are relatively evenly distributed throughout the image frame. In this way, when the PWM signal is applied to an electronic device, the display effect of the electronic device is equivalent to increasing the refresh rate of the electronic device, thereby improving problems such as flickering instability and visual fatigue of the electronic device, and the improvement effect is particularly obvious for low-grayscale flicker.

[0009] In one possible implementation, generating a PWM signal based on grayscale data includes: sequentially generating multiple sub-frame PWM signals based on the grayscale data; the bits corresponding to the multiple sub-frame PWM signals are arranged in a random order; the multiple sub-frame PWM signals include at least one valid sub-frame PWM signal and at least one invalid sub-frame PWM signal, the valid sub-frame PWM signal including a sub-valid pulse period; forming a PWM signal based on the multiple sub-frame PWM signals; and the multiple sub-valid pulse periods forming an valid pulse period. By changing the driving timing of the sub-frame PWM signals, the PWM signal timing is improved. This method has a simple principle and is easy to implement.

[0010] In one possible implementation, the first or last period of the PWM signal is an inactive pulse period. This way, the active pulse periods of two adjacent frames of the PWM signal are still spaced apart, preventing them from being "connected end to end," thus improving the display flicker reduction effect.

[0011] In a possible implementation, the first or last sub-frame PWM signal is an invalid sub-frame PWM signal, which makes it easier to set the interval between the valid pulse periods of two adjacent frames of the PWM signal.

[0012] In one possible implementation, in the first state, the PWM signal includes multiple valid pulse periods, with at least one group of adjacent valid pulse periods separated by an invalid pulse period. This allows adjacent valid pulse periods to be separated, thereby reducing the number of valid pulse periods in the PWM signal and the time intervals between adjacent valid pulse periods. This reduces the light-emitting interval of the light-emitting device and alleviates issues such as display flicker and visual fatigue.

[0013] In one possible implementation, in the first state, the multiple sub-frame PWM signals include at least two valid sub-frame PWM signals, and at least one invalid sub-frame PWM signal is interspersed between at least one group of adjacent valid sub-frame PWM signals. The interspersed invalid sub-frame PWM signals between adjacent valid sub-frame PWM signals can separate adjacent valid sub-pulse periods, thereby increasing the number of valid pulse periods in the combined PWM signal and reducing the time interval between adjacent valid pulse periods. This reduces the light-emitting interval of the light-emitting device and alleviates display flicker and visual fatigue.

[0014] In one possible implementation, among the multiple sub-frame PWM signals generated sequentially, the bits corresponding to the odd-numbered sub-frame PWM signals are arranged in increasing order, while the bits corresponding to the even-numbered sub-frame PWM signals are arranged in decreasing order. This allows adjacent effective sub-pulse periods to be more evenly dispersed, effectively alleviating display flicker and visual fatigue.

[0015] In one possible implementation, the grayscale data has an accuracy of n bits, the bit corresponding to the first subframe PWM signal is 0, the bit corresponding to the second subframe PWM signal is (n-1), the bit corresponding to the penultimate subframe PWM signal is (n / 2-1), and the bit corresponding to the last subframe PWM signal is n / 2. This is a specific example.

[0016] In one possible implementation, the grayscale represented by the grayscale data is less than or equal to half of the maximum grayscale supported by the electronic device, which has a more significant effect on improving display flicker and visual fatigue problems at low grayscales.

[0017] A second aspect of the present application provides a PWM signal generation circuit for use in an electronic device. The PWM signal generation circuit is configured to receive grayscale data and generate a pulse-width modulated (PWM) signal based on the grayscale data. Within an image frame, the PWM signal includes at least one active pulse period and at least one inactive pulse period, with the bits corresponding to the at least one active pulse period and the at least one inactive pulse period being arranged in a random order. The PWM signal is used to drive a pixel circuit to emit light.

[0018] The PWM signal generation method provided in the embodiment of the present application generates a PWM signal in which the bits corresponding to the valid pulse period and the invalid pulse period are arranged in a random order. Therefore, while the total duty cycle of the PWM signal remains unchanged, the continuous valid pulse period can be interrupted by the invalid pulse period into multiple sub-valid pulse periods through random arrangement, and the multiple sub-valid pulse periods are relatively evenly distributed throughout the image frame. In this way, when the PWM signal is applied to an electronic device, the display effect of the electronic device is equivalent to increasing the refresh rate of the electronic device, thereby improving problems such as flickering instability and visual fatigue of the electronic device, and the improvement effect is particularly obvious for low-grayscale flicker.

[0019] In one possible implementation, the PWM signal generating circuit is specifically used to: generate multiple sub-frame PWM signals in sequence according to grayscale data; the bits corresponding to the multiple sub-frame PWM signals are arranged in a random order; the multiple sub-frame PWM signals include at least one valid sub-frame PWM signal and at least one invalid sub-frame PWM signal; the valid sub-frame PWM signal includes a sub-valid pulse period; a PWM signal is formed according to the multiple sub-frame PWM signals; and the multiple sub-valid pulse periods constitute an effective pulse period.

[0020] In a possible implementation, the first period or the last period of the PWM signal is an invalid pulse period.

[0021] In a possible implementation, the first or last sub-frame PWM signal is an invalid sub-frame PWM signal.

[0022] In a possible implementation, in the first state, the PWM signal includes a plurality of valid pulse periods, and at least one group of adjacent valid pulse periods is separated by an invalid pulse period.

[0023] In a possible implementation, in the first state, the multiple sub-frame PWM signals include at least two valid sub-frame PWM signals, and at least one invalid sub-frame PWM signal is interspersed between at least one group of adjacent valid sub-frame PWM signals.

[0024] In a possible implementation, when multiple sub-frame PWM signals are sequentially generated, bits corresponding to sub-frame PWM signals at odd positions are arranged in increasing order, and bits corresponding to sub-frame PWM signals at even positions are arranged in decreasing order.

[0025] In a possible implementation, the display grayscale represented by the grayscale data is less than or equal to half of a maximum display grayscale supported by the electronic device.

[0026] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising a pixel circuit; the pixel circuit is configured to emit light under the drive of a PWM signal; the PWM signal is generated by the PWM signal generating method of any one of the first aspects; or, the PWM signal is generated by the PWM signal generating circuit of any one of the second aspects.

[0027] The electronic device provided in the third aspect of the embodiment of the present application includes the PWM signal generating method of the first aspect or the PWM signal generating circuit of the second aspect, and its beneficial effects are the same as those described above and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] FIG1 is a schematic diagram of an electronic device according to an embodiment of the present application;

[0029] FIG2 is a schematic diagram of a topological structure of a pixel circuit provided in an embodiment of the present application;

[0030] FIG3 is a schematic diagram showing the corresponding relationship between the duty cycle of a PWM signal and the grayscale according to an embodiment of the present application;

[0031] FIG4A is a timing diagram of a PWM signal provided in an embodiment of the present application;

[0032] FIG4B is a timing diagram of a PWM signal provided in an embodiment of the present application;

[0033] FIG5 is a flow chart of a PWM signal generating method provided in an embodiment of the present application;

[0034] FIG6A is a timing diagram of a PWM signal provided in an embodiment of the present application;

[0035] FIG6B is a timing diagram of a PWM signal provided in an embodiment of the present application;

[0036] FIG7 is a topological diagram of a PWM signal generating circuit and a pixel circuit provided in an embodiment of the present application;

[0037] FIG8 is a flowchart of a PWM signal generating circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0039] Hereinafter, the terms "second," "first," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature qualified as "second," "first," etc., may explicitly or implicitly include one or more of such features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0040] In addition, in the embodiments of the present application, directional terms such as "up", "down", "left", and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative descriptions and clarifications, and may change accordingly according to changes in the orientation of the components in the drawings.

[0041] In the embodiments of this application, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, "connection" can mean fixed connection, detachable connection, or integration; it can mean direct connection or indirect connection through an intermediate medium. In addition, the term "coupling" can mean direct electrical connection or indirect electrical connection through an intermediate medium. The term "contact" can mean direct contact or indirect contact through an intermediate medium.

[0042] In the embodiments of the present application, "and / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, and B exists alone. A and B can be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0043] The present application provides an electronic device that has a sensing function for a pressed object. For example, the device can detect fingerprints, palm prints, or handprints. The electronic device is, for example, a consumer electronic product, a home electronic product, or an in-vehicle electronic product with a biometric detection function. Among them, consumer electronic products include mobile phones, tablet computers, laptop computers, e-readers, personal computers (PCs), personal digital assistants (PDAs), desktop displays, smart wearable products (for example, smart watches, smart bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, etc. Home electronic products include smart door locks, televisions, remote controls, refrigerators, rechargeable small household appliances (for example, soymilk machines, sweeping robots), etc. In-vehicle electronic products include in-vehicle navigation systems, in-vehicle high-density digital video discs (DVDs), etc. Among them, the electronic device can be an electronic device with a display function or an electronic device without a display function, and the present application does not limit this.

[0044] The following description will be given by taking a mobile phone as an example of an electronic device.

[0045] FIG1 is a schematic diagram of an electronic device according to an embodiment of the present application.

[0046] As shown in FIG1 , electronic device 1 includes a display screen 10. Display screen 10 may be, for example, a self-luminous display screen such as a micro organic light emitting diode (Micro LED) display screen. Of course, the present embodiment does not limit the type of display screen 10; the above examples are merely illustrative.

[0047] In addition, those skilled in the art will understand that the structure of the electronic device 1 shown in the above drawings does not constitute a limitation of the electronic device 1. The electronic device 1 may include more or fewer components than shown, or may combine certain components, or have different component arrangements. For example, the electronic device 1 also includes a middle frame, a rear case, printed circuit boards (PCBs), a battery, a camera, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a wireless fidelity (WiFi) module, a power supply, a Bluetooth module, and other components, which are not described in detail here.

[0048] For any of the above-mentioned display screens 10, the display screen 10 includes an effective display area (active area, AA) and a non-display area BB located around the effective display area AA. The effective display area AA is used to display images, and the effective display area AA includes a plurality of sub-pixels (sub pixels, SP). For example, the plurality of sub-pixels SP are arranged in a matrix form into multiple rows and columns. For example, the sub-pixels SP arranged in a row along the horizontal direction X are called a row of sub-pixels SP, and the sub-pixels SP arranged in a row along the vertical direction Y are called a column of sub-pixels SP. A pixel circuit is provided in each sub-pixel SP, and the effective display area AA of the display screen 10 is provided with a plurality of pixel circuits, and the plurality of pixel circuits are arranged into multiple rows and columns. The horizontal direction X in the embodiment of the present application refers to the direction intersecting with the data line in the display screen 10, and the vertical direction Y refers to the direction parallel to the data line in the display screen 10. The data line is a signal line for transmitting data voltage to the pixel circuit in the display screen 10.

[0049] A pixel circuit generally includes a driving circuit composed of a plurality of transistors and a light-emitting device. The driving circuit generates a driving current to drive the light-emitting device to emit light, thereby realizing the light emission of the pixel circuit.

[0050] Micro LEDs are small and consume little power, making display screen 10 lightweight, thin, and compact. Micro LEDs also outperform organic light-emitting diodes (OLEDs) in terms of luminous efficiency and product lifespan, and can operate in harsh environments ranging from -20°C to 100°C. Consequently, they are widely used in the display field. For example, the light-emitting device in the pixel circuit is a Micro LED.

[0051] FIG2 is a schematic diagram of a topological structure of a pixel circuit provided in an embodiment of the present application.

[0052] In some embodiments, as shown in FIG. 2 , the pixel circuit 11 includes a current source 111 , a gate switch 112 , and a light-emitting device 113 . The current source 111 is connected to the light-emitting device 113 via the gate switch 112 .

[0053] The gate switch 112 is turned on or off under the control of a gate signal, such as a pulse width modulation (PWM) signal. The output of the current source 111 can be controlled by a bias signal (Vbias). The gate signal is used to select the output of the current source 111 (equivalent to selecting the sub-pixels SP in the display screen 10). The bias signal is used to control the output power of the current source 111, thereby controlling the light emission of the corresponding light-emitting device 113.

[0054] For example, the gate switch 112 includes a transistor T, a gate g of the transistor T for receiving a PWM signal, a source s of the transistor T coupled to one end of the current source 111, a drain d of the transistor T coupled to the cathode of the light-emitting device 113, and an anode of the light-emitting device 113 coupled to the power supply terminal VDD. The other end of the current source 111 is coupled to the ground terminal VEE.

[0055] The above description uses the common anode connection method of the light-emitting device 113 as an example, and the transistor T is an N-type transistor. When a P-type transistor is used, the light-emitting device 113 needs to be connected using a common cathode method. Figure 2 is only an example of a pixel circuit 11. Those skilled in the art can also replace the pixel circuit shown in Figure 2 with other pixel circuits.

[0056] The light emitting device 113 includes, for example, a Micro LED, and the light emitting device 113 can emit light visible to the human eye, such as red light, green light, blue light, or yellow light.

[0057] FIG3 is a schematic diagram showing the corresponding relationship between the duty cycle of a PWM signal and the grayscale provided in an embodiment of the present application.

[0058] When using a grayscale conversion PWM signal to drive Micro LEDs, as shown in Figure 3, the example PWM signal is at a high level, which is a valid pulse, and the Micro LED emits light due to the conduction current. When the PWM signal is at a low level, it is an invalid pulse, and the Micro LED turns off because the current is turned off. Taking the electronic device with a frame rate of 60Hz and a display grayscale accuracy of 8 bits as an example, the duty cycle of the PWM signal can be used to indicate the size of the displayed grayscale. A duty cycle of 100% indicates a displayed grayscale of 255, a duty cycle of 50% indicates a displayed grayscale of 127, a duty cycle of 25% indicates a displayed grayscale of 63, and a duty cycle of 0% indicates a displayed grayscale of 0.

[0059] When displaying low grayscale, the PWM signal is a short high-level active pulse at the beginning, followed by a long low-level inactive pulse. This results in a short bright period at the beginning of each frame and a long off period at the end. This leads to flickering and unstable display when the frame rate is low, and visual fatigue caused by low-frequency pupil dilation.

[0060] 4A and 4B are timing diagrams of a PWM signal provided in an embodiment of the present application.

[0061] In some embodiments, taking the grayscale accuracy of 4 bits as an example, the grayscale can be converted into multiple sub-frame PWM signals, and the bits corresponding to the multiple sub-frame PWM signals are arranged in order from low to high. The multiple sub-frame PWM signals include valid sub-frame PWM signals and invalid sub-frame PWM signals. The bit width of the sub-valid pulse period in the valid sub-frame PWM signal is 2 n, n is a bit, the invalid sub-frame PWM signal is a continuous invalid pulse. The valid pulse periods of all valid sub-frame PWM signals are aggregated into the valid pulse period of the PWM signal.

[0062] As shown in FIG4A , for example, the frame rate of the electronic device is 60 Hz, the display grayscale accuracy is 4 bits, the display grayscale is 11, and the maximum display grayscale is 15. The sub-frame PWM signals of bit 0, bit 1, and bit 3 are valid sub-frame PWM signals, and the sub-frame PWM signal of bit 2 is an invalid sub-frame PWM signal. The sub-frame PWM signals of bit 0, bit 1, bit 2, and bit 3 are output in sequence. The bit width of the sub-valid pulse period of the sub-frame PWM signal of bit 0 is 1, the bit width of the sub-valid pulse period of the sub-frame PWM signal of bit 1 is 2, and the bit width of the sub-valid pulse period of the sub-frame PWM signal of bit 3 is 8. The bit width of the valid pulse period of the finally converged PWM signal is 11, and the duty cycle is 11 / 15.

[0063] As shown in FIG4B , for example, the frame rate of the electronic device is 60 Hz, the display grayscale accuracy is 4 bits, the display grayscale is 3, and the maximum display grayscale is 15. The sub-frame PWM signals of bit 0 and bit 1 are valid sub-frame PWM signals, and the sub-frame PWM signals of bit 2 and bit 3 are invalid sub-frame PWM signals. The sub-frame PWM signals of bit 0, bit 1, bit 2, and bit 3 are output in sequence. The bit width of the sub-valid pulse period of the sub-frame PWM signal of bit 0 is 1, and the bit width of the sub-valid pulse period of the sub-frame PWM signal of bit 1 is 2. The bit width of the valid pulse period of the finally converged PWM signal is 3, and the duty cycle is 3 / 15.

[0064] At low grayscales (e.g., grayscale 3 in Figure 4B), the PWM signal consists of a short high-level active pulse followed by a long low-level inactive pulse. This results in a short onset (e.g., 20% of a frame) followed by a long off-set (e.g., 80% of a frame) in each frame. This causes flickering and visual fatigue when the frame rate is low.

[0065] The embodiment of the present application provides a PWM signal generation method for improving the problems of display flickering and visual fatigue, thereby improving user experience.

[0066] FIG5 is a flow chart of a PWM signal generating method provided in an embodiment of the present application.

[0067] The present invention provides a method for generating a PWM signal. The PWM signal can be provided by a PWM signal generating circuit provided in the present invention. As shown in FIG5 , the PWM signal generating method includes:

[0068] S10: Receive grayscale data.

[0069] 6A and 6B are timing diagrams of a PWM signal provided in an embodiment of the present application.

[0070] The embodiment of the present application does not limit the grayscale accuracy of the grayscale data. For example, the grayscale accuracy is 4 bits, 8 bits, 10 bits, etc. The illustration in the embodiment of the present application is only an exemplary description and does not limit the application of the embodiment of the present application.

[0071] For example, as shown in FIG6A , the grayscale accuracy of the grayscale data is 4 bits. Alternatively, for example, as shown in FIG6B , the grayscale accuracy of the grayscale data is 8 bits.

[0072] The display grayscale represented by the grayscale data received in step S10 may be a high grayscale. For example, the display grayscale represented by the grayscale data may be greater than one-third of the maximum display grayscale supported by the electronic device. Alternatively, for example, the display grayscale represented by the grayscale data may be greater than half of the maximum display grayscale supported by the electronic device. Alternatively, for example, the display grayscale represented by the grayscale data may be greater than two-thirds of the maximum display grayscale supported by the electronic device.

[0073] The display grayscale represented by the grayscale data received in step S10 may also be a low grayscale. For example, the display grayscale represented by the grayscale data may be greater than 1 and less than or equal to two-thirds of the maximum display grayscale supported by the electronic device. Alternatively, for example, the display grayscale represented by the grayscale data may be greater than 1 and less than or equal to half of the maximum display grayscale supported by the electronic device. Alternatively, for example, the display grayscale represented by the grayscale data may be greater than 1 and less than or equal to one-third of the maximum display grayscale supported by the electronic device.

[0074] Of course, the display grayscale represented by the grayscale data received in step S10 may also be equal to 0 or the maximum grayscale supported by the electronic device.

[0075] In some embodiments, the present invention can perform the following step S20 for both received high grayscale data and low grayscale data, and can perform any method known in the art to generate a PWM signal for received zero grayscale data and maximum grayscale data. Of course, the following step S20 can also be performed for received zero grayscale data and maximum grayscale data.

[0076] In other embodiments, the present invention only performs the following step S20 on the received low grayscale data, and any method in the art can be performed on the received high grayscale data, 0 grayscale data and maximum grayscale data to generate a PWM signal.

[0077] FIG7 is a topological diagram of a PWM signal generating circuit and a pixel circuit provided in an embodiment of the present application.

[0078] The present application also provides a PWM signal generating circuit, as shown in FIG7 . The PWM signal generating circuit is coupled to the control terminal of the gate switch 112 in the pixel circuit (e.g., the gate g of the transistor T). The PWM signal generating circuit is configured to provide a PWM signal to the control terminal of the gate switch 112. The PWM signal generating circuit, the gate switch 112 in the pixel circuit, and the current source 111 can be integrated into the same chip, for example.

[0079] For example, the PWM signal generating circuit receives the grayscale data.

[0080] S20. As shown in FIG6A and FIG6B , a PWM signal is generated according to the grayscale data; within an image frame, the PWM signal includes at least one valid pulse period and at least one invalid pulse period, and the bits corresponding to the at least one valid pulse period and the at least one invalid pulse period are arranged in a random order.

[0081] For example, a PWM signal generating circuit generates a PWM signal according to grayscale data.

[0082] For example, as shown in FIG6A, the grayscale data represents a grayscale accuracy of 4 bits and a displayed grayscale of 3. In the related art, the bits corresponding to the valid pulse period and the invalid pulse period in the PWM signal output are arranged in sequence, and the PWM signal is a period of 2 0 +2 1 A wide effective pulse, followed by a period of 2 2 +2 3 However, the bits corresponding to the valid pulse period and the invalid pulse period in the PWM signal output in this application are arranged in a disordered order. For example, the PWM signal is a period of 2 0 Wide effective pulse, a period of 2 2 Wide invalid pulse, a period of 2 1 Wide effective pulse, a period of 2 3 Wide invalid pulse.

[0083] As shown in FIG6B , the grayscale data indicates that the grayscale accuracy is 8 bits and the displayed grayscale is 7. In the related art, the bits corresponding to the valid pulse period and the invalid pulse period in the PWM signal output are arranged in sequence. The PWM signal is a period of 2 0 +2 1 +2 2 A wide effective pulse, followed by a period of 2 3 +2 4 +2 5 +2 6 +2 7However, the bits corresponding to the valid pulse period and the invalid pulse period in the PWM signal output in this application are arranged in a disordered order. For example, the PWM signal is a period of 2 0 Wide effective pulse, a period of 2 7 Wide invalid pulse, a period of 2 1 Wide effective pulse, a period of 2 6 Wide invalid pulse, a period of 2 2 Wide effective pulse, a period of 2 5 +2 3 +2 4 Wide invalid pulse.

[0084] In the embodiments of the present application, the effective pulse period is not fixedly defined as a high-level pulse period or a low-level pulse period. The effective pulse period refers to the pulse period that can control the transistor T to turn on, and the ineffective pulse period refers to the pulse period that can control the transistor T to turn off. For example, if transistor T is an N-type transistor, then the high-level pulse period in the PWM signal is the effective pulse period in the embodiments of the present application, and the low-level pulse period is the ineffective pulse period in the embodiments of the present application. Alternatively, for example, if transistor T is a P-type transistor, then the low-level pulse period in the PWM signal is the effective pulse period in the embodiments of the present application, and the high-level pulse period is the ineffective pulse period in the embodiments of the present application.

[0085] Taking the example of a PWM signal including two valid pulse periods within an image frame, the timing of the PWM signal can be in the order of valid pulse period-invalid pulse period-valid pulse period-invalid pulse period, or invalid pulse period-valid pulse period-invalid pulse period-valid pulse period, or valid pulse period-invalid pulse period-valid pulse period, and the embodiments of the present application do not limit this. When the PWM signal includes more than two valid pulse periods within an image frame, the multiple valid pulse periods can be arranged at intervals within the interval of an image frame. In this way, the light-emitting device 113 emits light intermittently multiple times within an image frame, and there will be no situation where the light is continuously emitted for a period of time and then does not emit light for a long time.

[0086] For the highest grayscale data (e.g., 15 grayscales for 4-bit, 255 grayscales for 8-bit, 1023 grayscales for 10-bit), the PWM signal generated based on the grayscale data includes an effective pulse period, which occupies the entire image frame period, that is, the duty cycle of the PWM signal is 100%.

[0087] For the lowest grayscale (grayscale 0) data, the PWM signal generated according to the grayscale data includes an invalid pulse period, which occupies the entire image frame period, that is, the duty cycle of the PWM signal is 0.

[0088] The PWM signal generation method provided in the embodiment of the present application generates a PWM signal in which the bits corresponding to the valid pulse period and the invalid pulse period are arranged in a random order. Therefore, while the total duty cycle of the PWM signal remains unchanged, the continuous valid pulse period can be interrupted by the invalid pulse period into multiple sub-valid pulse periods through random arrangement, and the multiple sub-valid pulse periods are relatively evenly distributed throughout the image frame. In this way, when the PWM signal is applied to an electronic device, the display effect of the electronic device is equivalent to increasing the refresh rate of the electronic device, thereby improving problems such as flickering instability and visual fatigue of the electronic device, and the improvement effect is particularly obvious for low-grayscale flicker.

[0089] In some embodiments, the following steps S21 and S22 may be performed for all grayscale data, except that the timing of the PWM signal ultimately outputted after step S22 is different.

[0090] For example, for the highest grayscale data, after executing the following steps S21 and S22, the synthesized PWM signal is a PWM signal including one valid pulse period and a duty cycle of 100%. For the lowest grayscale data, after executing the following steps S21 and S22, the synthesized PWM signal is a PWM signal including zero valid pulse periods and a duty cycle of 0. For low grayscale data, after executing the following steps S21 and S22, the synthesized PWM signal is a PWM signal including one or more valid pulse periods. For high grayscale data, after executing the following steps S21 and S22, the synthesized PWM signal is a PWM signal including one or more valid pulse periods.

[0091] In some embodiments, the PWM signal generating circuit is specifically used to generate multiple sub-frame PWM signals in sequence according to grayscale data, and the bits corresponding to the multiple sub-frame PWM signals are arranged in a random order. The PWM signal generating circuit is also used to form a PWM signal according to the multiple sub-frame PWM signals.

[0092] FIG8 is a flowchart of a PWM signal generating circuit provided in an embodiment of the present application.

[0093] In some embodiments, as shown in FIG8 , step S20 includes:

[0094] S21 . As shown in FIG. 6A and FIG. 6B , a plurality of sub-frame PWM signals are sequentially generated according to the grayscale data. The bits corresponding to the plurality of sub-frame PWM signals are arranged in a random order.

[0095] The number of sub-frame PWM signals is related to the grayscale accuracy of the grayscale data. For example, in FIG6A , the grayscale accuracy is 4 bits, and the number of sub-frame PWM signals is 4. In FIG6B , the grayscale accuracy is 8 bits, and the number of sub-frame PWM signals is 8. When the grayscale accuracy is 10 bits, the number of sub-frame PWM signals is 10.

[0096] The multiple sub-frame PWM signals include at least one valid sub-frame PWM signal and at least one invalid sub-frame PWM signal. Each valid sub-frame PWM signal includes a sub-valid pulse period. Within an image frame, the valid sub-frame PWM signal, except for the sub-valid pulse period, is an invalid pulse period. Within an image frame, when the multiple sub-frame PWM signals include at least two valid sub-frame PWM signals, the sub-valid pulse periods of the at least two valid sub-frame PWM signals do not overlap. For example, the sub-frame PWM signal corresponding to bit 0 and the sub-frame PWM signal corresponding to bit 1 in FIG. 6A each include a sub-valid pulse period, and the sub-valid pulse periods included in the two do not overlap. The invalid sub-frame PWM signals are all invalid pulses throughout the entire image frame. For example, the sub-frame PWM signal corresponding to bit 3 and the sub-frame PWM signal corresponding to bit 2 in FIG. 6A are all continuously invalid pulses throughout the entire image frame.

[0097] Of course, according to the different display grayscales represented by the grayscale data, the number of valid sub-frame PWM signals and invalid sub-frame PWM signals in the multiple sub-frame PWM signals is different, and the corresponding bits are also different.

[0098] Please continue to refer to Figures 6A and 6B. The bits corresponding to the multiple sub-frame PWM signals generated by the PWM signal generating circuit are arranged in a random order. The driving order of the multiple sub-frame PWM signals generated by the PWM signal generating circuit is random driving, and is no longer arranged in the order of bit 0 to bit n.

[0099] In this way, the valid sub-frame PWM signals with low bits can be separated by the invalid sub-frame PWM signals with high bits, and the sub-valid pulse periods included in multiple valid sub-frame PWM signals do not overlap. Therefore, the final synthesized PWM signal no longer includes only one continuous valid pulse period, but will include multiple discontinuous valid pulse periods. Taking Figure 6A as an example, the sub-valid pulse period in the sub-frame PWM signal with bit 0 can control the light-emitting device 113 to display in the first half of a frame, and the sub-valid pulse period in the sub-frame PWM signal with bit 1 can control the light-emitting device 113 to display in the second half of a frame. In this way, the display brightness can be basically evenly divided into the front and back stages (the refresh rate is equivalent to nearly 1 times), which can significantly reduce or even eliminate problems such as low-grayscale flicker and visual fatigue.

[0100] In some embodiments, in the first state, the PWM signal includes a plurality of valid pulse periods, and at least one group of adjacent valid pulse periods is separated by an invalid pulse period.

[0101] For example, as shown in FIG6A , in the first state, the multiple sub-frame PWM signals include at least two valid sub-frame PWM signals, and at least one invalid sub-frame PWM signal is interspersed between at least one group of adjacent valid sub-frame PWM signals. FIG6A illustrates an example in which the multiple sub-frame PWM signals include two valid sub-frame PWM signals (a group of adjacent valid sub-frame PWM signals) with one invalid sub-frame PWM signal interspersed between the two valid sub-frame PWM signals, but this does not constitute a limitation on the embodiments of the present application.

[0102] Of course, at least one invalid sub-frame PWM signal may be scattered between any adjacent valid sub-frame PWM signals, or at least one invalid sub-frame PWM signal may be scattered between some adjacent valid sub-frame PWM signals, as long as there is at least one invalid sub-frame PWM signal scattered between a group of adjacent valid sub-frame PWM signals.

[0103] Invalid sub-frame PWM signals are scattered between adjacent valid sub-frame PWM signals, which can separate adjacent sub-valid pulse periods, thereby increasing the number of valid pulse periods in the synthesized PWM signal and reducing the time interval between adjacent valid pulse periods, thereby reducing the light-emitting interval of the light-emitting device 113 and improving the problems of display flicker and visual fatigue.

[0104] In some embodiments, as shown in FIG6B , among the multiple sub-frame PWM signals generated sequentially, the bits corresponding to the sub-frame PWM signals at odd positions are arranged in increasing order, and the bits corresponding to the sub-frame PWM signals at even positions are arranged in decreasing order.

[0105] For example, the accuracy of the grayscale data is n bits, the bit corresponding to the first subframe PWM signal is 0, the bit corresponding to the second subframe PWM signal is (n-1), the bit corresponding to the third subframe PWM signal is 1, the bit corresponding to the fourth subframe PWM signal is (n-2), the bit corresponding to the fifth subframe PWM signal is 2, and the bit corresponding to the sixth subframe PWM signal is (n-3). According to this rule, the bit corresponding to the second-to-last subframe PWM signal is (n / 2-1), and the bit corresponding to the last subframe PWM signal is n / 2.

[0106] For example, the bits in bold in Figure 6B are odd-numbered bits (bits 1, 3, 5, and 7), and the bits corresponding to the odd-numbered bits are bit 0, bit 1, bit 2, and bit 3, respectively. The bits in non-bold font are even-numbered bits (bits 2, 4, 6, and 8), and the bits corresponding to the even-numbered bits are bit 7, bit 6, bit 5, and bit 4, respectively.

[0107] FIG6B illustrates an example in which the sub-frame PWM signals corresponding to bit 7, bit 6, bit 5, and bit 4 are all invalid sub-frame PWM signals. However, this does not constitute a limitation on the embodiments of the present application. The aforementioned bits may also include one or more valid sub-frame PWM signals.

[0108] In this way, adjacent effective sub-pulse periods can be dispersed more evenly, which has a better effect on improving display flicker and visual fatigue problems.

[0109] Of course, the random arrangement of the bits corresponding to the multiple sub-frame PWM signals illustrated in the embodiments of the present application is merely illustrative, and the bits can be arranged in any pseudo-random manner. For electronic devices, the arrangement of the bits corresponding to the multiple sub-frame PWM signals in different image frames can be fixed or dynamically variable, and the embodiments of the present application do not impose any additional restrictions on this.

[0110] S22 , forming a PWM signal according to the multiple sub-frame PWM signals; the sub-valid pulse periods in the multiple valid sub-frame PWM signals constitute the valid pulse period of the PWM signal, and the remaining periods are invalid pulse periods of the PWM signal.

[0111] Alternatively, the active pulse period of a PWM signal is the union of the active sub-pulse periods in multiple sub-frame PWM signals, i.e., each active sub-pulse period is an active pulse period of the PWM signal. The inactive pulse period of a PWM signal is the intersection of the inactive sub-pulse periods in multiple sub-frame PWM signals.

[0112] In some embodiments, as shown in FIG6B , the last period of the PWM signal is an inactive pulse period.

[0113] For example, the last sub-frame PWM signal is an invalid sub-frame PWM signal.

[0114] In this way, the effective pulse periods of two adjacent frames of the PWM signal are still set at intervals, and there will be no "end-to-end connection" situation, which improves the improvement effect on display flicker.

[0115] In other embodiments, among the multiple sub-frame PWM signals generated sequentially, the bits corresponding to the sub-frame PWM signals at odd positions are arranged in decreasing order, and the bits corresponding to the sub-frame PWM signals at even positions are arranged in increasing order.

[0116] For example, the bits corresponding to the odd bits (bits 1, 3, 5, and 7) are bit 7, bit 6, bit 5, and bit 4, respectively. The bits corresponding to the even bits (bits 2, 4, 6, and 8) are bit 0, bit 1, bit 2, and bit 3, respectively.

[0117] In some embodiments, the first period of the PWM signal is an inactive pulse period.

[0118] For example, the first sub-frame PWM signal is an invalid sub-frame PWM signal.

[0119] In this way, the effective pulse periods of two adjacent frames of the PWM signal are still set at intervals, and there will be no "end-to-end connection" situation, which improves the improvement effect on display flicker.

[0120] An electronic device provided in an embodiment of the present application includes a pixel circuit configured to emit light under the drive of a PWM signal. The PWM signal is generated by any of the above-mentioned PWM signal generation methods; or, alternatively, the PWM signal is generated by the PWM signal generation circuit shown in FIG. 7 .

[0121] The above are only specific embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any changes or replacements within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A method for generating a pulse width modulation (PWM) signal, characterized in that: Applied to electronic equipment, the method includes: Receive grayscale data; A PWM signal is generated according to the grayscale data; within an image frame, the PWM signal includes at least one valid pulse period and at least one invalid pulse period, and the bits corresponding to the at least one valid pulse period and the at least one invalid pulse period are arranged in a disordered order.

2. The method according to claim 1, characterized in that The first period or the last period of the PWM signal is the invalid pulse period.

3. The method according to claim 1 or 2, characterized in that In the first state, the PWM signal includes a plurality of valid pulse periods, and at least one group of adjacent valid pulse periods is separated by an invalid pulse period.

4. The method according to any one of claims 1 to 3, characterized in that Generating a PWM signal according to grayscale data includes: Generate multiple sub-frame PWM signals in sequence according to the grayscale data; the bits corresponding to the multiple sub-frame PWM signals are arranged in a random order; the multiple sub-frame PWM signals include at least one valid sub-frame PWM signal and at least one invalid sub-frame PWM signal, and the valid sub-frame PWM signal includes a sub-valid pulse period; The PWM signal is formed according to the plurality of sub-frame PWM signals; and the plurality of sub-effective pulse periods constitute the effective pulse period.

5. The method according to claim 4, characterized in that The first or last sub-frame PWM signal is the invalid sub-frame PWM signal.

6. The method according to claim 4 or 5, characterized in that In the first state, the plurality of sub-frame PWM signals include at least two valid sub-frame PWM signals, and at least one invalid sub-frame PWM signal is interspersed between at least one group of adjacent valid sub-frame PWM signals.

7. The method according to any one of claims 4 to 6, characterized in that: Among the multiple sub-frame PWM signals generated sequentially, the bits corresponding to the sub-frame PWM signals at odd positions are arranged in increasing order, and the bits corresponding to the sub-frame PWM signals at even positions are arranged in decreasing order.

8. The method according to claim 7, characterized in that The precision of the grayscale data is n bits, the bit corresponding to the first sub-frame PWM signal is 0, the bit corresponding to the second sub-frame PWM signal is (n-1), the bit corresponding to the second-to-last sub-frame PWM signal is (n / 2-1), and the bit corresponding to the last sub-frame PWM signal is n / 2.

9. The method according to any one of claims 1 to 8, characterized in that The display grayscale represented by the grayscale data is less than or equal to half of a maximum display grayscale supported by the electronic device.

10. A pulse width modulation (PWM) signal generating circuit, characterized in that: Used in electronic equipment; The PWM signal generating circuit is used to receive grayscale data and generate a pulse width modulation (PWM) signal based on the grayscale data; within an image frame, the PWM signal includes at least one valid pulse period and at least one invalid pulse period, and the bits corresponding to the at least one valid pulse period and the at least one invalid pulse period are arranged in a random order; the PWM signal is used to drive the pixel circuit to emit light.

11. The PWM signal generating circuit according to claim 10, wherein: The first period or the last period of the PWM signal is the invalid pulse period.

12. The PWM signal generating circuit according to claim 10 or 11, characterized in that: In the first state, the PWM signal includes a plurality of valid pulse periods, and at least one group of adjacent valid pulse periods is separated by an invalid pulse period.

13. The PWM signal generating circuit according to any one of claims 10 to 12, characterized in that: The PWM signal generating circuit is specifically used for: Generate multiple sub-frame PWM signals in sequence according to the grayscale data; the bits corresponding to the multiple sub-frame PWM signals are arranged in a random order; the multiple sub-frame PWM signals include at least one valid sub-frame PWM signal and at least one invalid sub-frame PWM signal; the valid sub-frame PWM signal includes a sub-valid pulse period; The PWM signal is formed according to the plurality of sub-frame PWM signals; and the plurality of sub-effective pulse periods constitute the effective pulse period.

14. The PWM signal generating circuit according to claim 13, wherein: The first or last sub-frame PWM signal is the invalid sub-frame PWM signal.

15. The PWM signal generating circuit according to claim 13 or 14, characterized in that: In the first state, the plurality of sub-frame PWM signals include at least two valid sub-frame PWM signals, and at least one invalid sub-frame PWM signal is interspersed between at least one group of adjacent valid sub-frame PWM signals.

16. The PWM signal generating circuit according to any one of claims 13 to 15, characterized in that: Among the multiple sub-frame PWM signals generated sequentially, the bits corresponding to the sub-frame PWM signals at odd positions are arranged in increasing order, and the bits corresponding to the sub-frame PWM signals at even positions are arranged in decreasing order.

17. The PWM signal generating circuit according to any one of claims 10 to 16, characterized in that: The display grayscale represented by the grayscale data is less than or equal to half of a maximum display grayscale supported by the electronic device.

18. An electronic device, characterized in that: comprising a pixel circuit; the pixel circuit being configured to emit light under the drive of the PWM signal; The PWM signal is generated by the PWM signal generating method according to any one of claims 1 to 9; or, The PWM signal is generated by the PWM signal generating circuit according to any one of claims 10 to 17.

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