Film capacitor, metallized film, and method for producing metallized film

The film capacitor design with insulating margins and stacked metal oxide and metal layers addresses the issue of reduced capacitance by preventing leakage current, ensuring effective capacitance retention.

WO2025177793A1PCT designated stage Publication Date: 2025-08-28PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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Patent Information

Application Number
PCT/JP2025/002868
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-20
Filing Date
2025-01-29
Publication Date
2025-08-28

AI Technical Summary

Technical Problem

The formation of vapor-deposited metal electrodes near metallikon electrodes in film capacitors can lead to reduced capacitance due to leakage current flow, which is not addressed by existing technologies.

Method used

The design of film capacitors with metallized films includes insulating margins and specific electrode arrangements, where electrodes are positioned only on dielectric film surfaces without overlapping insulating margins, and the electrodes are composed of stacked metal oxide and metal layers, preventing leakage current to unconnected electrodes.

Benefits of technology

This design effectively suppresses the decrease in capacitance by preventing leakage current, thereby maintaining optimal performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

This film capacitor includes a capacitor body, a first end surface electrode, and a second end surface electrode. A first metallized film includes a first dielectric film and a first electrode. The first dielectric film includes a first surface and a second surface. The first surface includes a first insulation margin. The first electrode includes a first metal oxide layer and a first metal layer. The first metal oxide layer and the first metal layer are laminated in this order from the first surface. The second metallized film includes a second dielectric film and a second electrode. The second dielectric film includes a third surface and a fourth surface. The third surface includes a second insulation margin. The second electrode includes a second metal oxide layer and a second metal layer. The second metal oxide layer and the second metal layer are laminated in this order from the third surface. The second surface of the first dielectric film and the third surface of the second dielectric film face each other.
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Description

Film capacitor, metallized film, and method for manufacturing metallized film

[0001] The present disclosure relates generally to film capacitors, metallized films, and methods for manufacturing metallized films, and more particularly to film capacitors that utilize a film as a dielectric, metallized films, and methods for manufacturing metallized films.

[0002] Patent Document 1 discloses a metallized film capacitor. This metallized film capacitor comprises a pair of metallized films, each having a dielectric film and a vapor-deposited metal electrode formed thereon, which are wound or laminated together so that the vapor-deposited metal electrodes formed on the pair of metallized films face each other across the dielectric film, and a pair of metallikon electrodes formed on both end surfaces of the element. At least one of the vapor-deposited metal electrodes of the pair of metallized films is primarily composed of aluminum and has an oxide layer formed on the bonding surface with the dielectric film and a magnesium-containing layer formed on the oxide layer, with the atomic concentration of magnesium being greatest in the magnesium-containing layer.

[0003] JP 2013-65747 A

[0004] A film capacitor according to one aspect of the present disclosure includes a capacitor body including a first metallized film and a second metallized film, a first end electrode disposed on one end surface of the capacitor body, and a second end electrode disposed on the other end surface of the capacitor body. The first metallized film and the second metallized film are wound or alternately stacked. The first metallized film includes a first dielectric film and a first electrode connected to the first end electrode. The first dielectric film has a first surface on which the first electrode is disposed and a second surface opposite the first surface. The first surface has a first electrode arrangement portion on which the first electrode is disposed and a first insulating margin adjacent to the first electrode arrangement portion and located at an end of the first dielectric film closer to the second end electrode. The first electrode includes a first metal oxide layer and a first metal layer, and the first metal oxide layer and the first metal layer are stacked in this order from the first surface. The second metallized film includes a second dielectric film and a second electrode connected to the second end surface electrode. The second dielectric film has a third surface on which the second electrode is disposed and a fourth surface opposite the third surface. The third surface includes a second electrode arrangement portion on which the second electrode is disposed and a second insulating margin adjacent to the second electrode arrangement portion and located at an end of the second dielectric film closer to the first end surface electrode. The second electrode includes a second metal oxide layer and a second metal layer, and the second metal oxide layer and the second metal layer are stacked in this order from the third surface. The second surface of the first dielectric film and the third surface of the second dielectric film face each other.

[0005] A metallized film according to one aspect of the present disclosure includes a dielectric film and an electrode. The surface of the dielectric film on which the electrode is disposed has an electrode placement section where the electrode is disposed and an insulating margin adjacent to the electrode placement section and located at one end in the width direction. The electrode includes a metal oxide layer and a metal layer, and the metal oxide layer and the metal layer are stacked in this order from the surface of the dielectric film on which the electrode is disposed.

[0006] A method for manufacturing a metallized film according to one aspect of the present disclosure is a method for manufacturing the metallized film, comprising: a first masking step of applying oil to one end in the width direction of the surface of the dielectric film on which the metal oxide layer is to be placed before the metal oxide layer is placed on the dielectric film; and a second masking step of applying the oil to one end before the metal layer is placed on the metal oxide layer.

[0007] According to the present disclosure, it is possible to provide a film capacitor, a metallized film, and a method for manufacturing a metallized film that can suppress a decrease in capacitance.

[0008] Fig. 1 is a schematic cross-sectional view showing a film capacitor according to an embodiment of the present disclosure. Fig. 2 is an explanatory view showing a film capacitor according to an embodiment of the present disclosure. Fig. 3A is a schematic view showing steps of a method for manufacturing a metallized film according to an embodiment of the present disclosure. Fig. 3B is a schematic view showing steps of a method for manufacturing a metallized film according to an embodiment of the present disclosure.

[0009] When forming a vapor-deposited metal electrode on a metallized film, it is often formed over the entire surface of one side of the dielectric film for ease of formation. However, if a vapor-deposited metal electrode on a metallized film is also formed near a metallikon electrode located on the opposite side of the metallikon electrode to which it is connected, a small amount of current may flow from the vapor-deposited metal electrode to the metallikon electrode located on the opposite side. This can result in a problem of reduced capacitance of the metallized film capacitor.

[0010] The present disclosure provides a film capacitor, a metallized film, and a method for manufacturing a metallized film that can suppress a decrease in capacitance.

[0011] 1. Overview The film capacitor 100 of the present disclosure will be described below. Each figure is a schematic diagram, and the size and thickness ratios of each component in each figure do not necessarily reflect the actual dimensional ratios. Furthermore, the arrows indicating each direction in each figure are not intended to define the direction of the film capacitor 100 during use; they are merely depicted to facilitate understanding of the description and have no substance. The first direction D1, second direction D2, and third direction D3 are mutually orthogonal. The first direction D1 is the short-side direction (width direction) of the dielectric film 4 and is sometimes referred to as the "left-right direction." The second direction D2 is the longitudinal direction of the dielectric film 4 and is sometimes referred to as the "front-back direction." The third direction D3 is the thickness direction of the dielectric film 4 and is sometimes referred to as the "up-down direction." A view in the third direction D3 is referred to as a planar view.

[0012] The film capacitor 100 of the present disclosure includes a capacitor body 1 formed by stacking two metallized films 3 and two end electrodes 2 formed on each of both end surfaces of the capacitor body 1. The metallized film 3 includes a dielectric film 4 and an electrode 5. Each of the electrodes 5 on the two metallized films 3 is connected to a different end electrode 2. The surface 8 of the dielectric film 4 on which the electrode 5 is disposed has an electrode placement section 10 where the electrode 5 is disposed and an insulating margin 9 adjacent to the electrode placement section 10 at one end in the width direction. The electrode 5 includes a metal oxide layer 6 and a metal layer 7, and the metal oxide layer 6 and the metal layer 7 are stacked in this order from the surface 8 of the dielectric film 4 on which the electrode 5 is disposed. In other words, the electrode 5 is not disposed on the insulating margin 9, and therefore the metal oxide layer 6 and the metal layer 7 are not disposed on the insulating margin 9. This prevents leakage current from the metal oxide layer 6 and the metal layer 7 to the end electrode 2 that is not connected to the electrode 5 including the metal oxide layer 6 and the metal layer 7. As a result, the decrease in capacitance of the film capacitor 100 can be suppressed.

[0013] 2. Details (1) Embodiment (1.1) Film Capacitor A film capacitor 100 according to this embodiment will be described. FIG. 1 is an explanatory diagram showing the film capacitor 100 according to this embodiment. Note that, to facilitate understanding of the following description, FIG. 1 illustrates two metallized films 3 (a first metallized film 31 and a second metallized film 32) that are not wound but are stacked with a shift in the second direction D2. The film capacitor 100 according to this embodiment includes a capacitor body 1, a first end surface electrode 21, and a second end surface electrode 22.

[0014] <Capacitor Body> In this embodiment, capacitor body 1 includes first metallized film 31 and second metallized film 32. For example, in the case of wound-type film capacitor 100, capacitor body 1 includes first metallized film 31 and second metallized film 32 that are stacked and wound. In the case of stacked-type film capacitor 100, capacitor body 1 includes first metallized film 31 and second metallized film 32 that are alternately stacked.

[0015] First metallized film 31 has a certain width in first direction D1, extends in second direction D2, and has a thickness in third direction D3. First metallized film 31 includes first dielectric film 41 and first electrode 51.

[0016] (First Dielectric Film) The first dielectric film 41 is a film made of a dielectric material. The dielectric material may include at least one material selected from the group consisting of polypropylene (PP), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polycarbonate (PC), and polystyrene (PS). The first dielectric film 41 has a constant width in a first direction D1, extends in a second direction D2, and has a constant thickness in a third direction D3. The first dielectric film 41 has a first surface 81 and a second surface 82. The first surface 81 is the upper surface. The second surface 82 is the surface opposite to the first surface 81. In other words, the second surface 82 is the lower surface. The thickness of the first dielectric film 41 is the distance between the first surface 81 and the second surface 82, and is not particularly limited, but is, for example, 1.0 μm or more and 10.0 μm or less.

[0017] The first dielectric film 41 has a first insulating margin 91 and a first electrode arrangement portion 101. More specifically, the first surface 81 of the first dielectric film 41 has the first electrode arrangement portion 101 in which the first electrode 51 is arranged, and a first insulating margin 91 adjacent to the first electrode arrangement portion 101 and located at the end of the first dielectric film 41 closer to the second end surface electrode 22.

[0018] The first insulating margin 91 is a narrow strip-shaped portion (see FIGS. 1 and 2). That is, the first insulating margin 91 has a width in the first direction D1 and extends in the second direction D2. The width of the first insulating margin 91 in the first direction D1 is, for example, not less than 0.4 μm and not more than 4.0 μm.

[0019] The first electrode arrangement portion 101 is a strip-shaped portion having a width greater than that of the first insulating margin 91 (see FIGS. 1 and 2). That is, the first electrode arrangement portion 101 is a portion that has a width in the first direction D1 and extends in the second direction D2. In this embodiment, the first electrode arrangement portion 101 is formed so as to include an end portion opposite to the end portion where the first insulating margin 91 is formed.

[0020] (First Electrode) The thickness of the first electrode 51 is not particularly limited, but is, for example, 6 nm to 150 nm. The first electrode 51 is connected to the first end surface electrode 21. In other words, the first electrode 51 and the first end surface electrode 21 are electrically connected.

[0021] The first electrode 51 is disposed on the first surface 81 of the first dielectric film 41. More specifically, the first electrode 51 is disposed in a first electrode arrangement portion 101 of the first surface 81. In other words, the first electrode 51 is not present in the first insulating margin 91. In this manner, the first electrode 51 is disposed in a location on the first surface 81 of the first dielectric film 41 excluding the first insulating margin 91. This makes it possible to suppress the occurrence of leakage current from the first electrode 51 to the second end surface electrode 22 that is not connected to the first electrode 51.

[0022] The first electrode 51 includes a first metal oxide layer 61 and a first metal layer 71. The first metal oxide layer 61 and the first metal layer 71 are stacked in ascending order of proximity to the first surface 81 of the first dielectric film 41. In other words, the first dielectric film 41, the first metal oxide layer 61, and the first metal layer 71 are stacked in this order from bottom to top in the third direction D3. As described above, the first electrode 51 is not present in the first insulating margin 91. Therefore, the first metal oxide layer 61 and the first metal layer 71 are not present in the first insulating margin 91. This suppresses leakage current from the first metal oxide layer 61 and the first metal layer 71 to the second end electrode 22 that is not connected to the first electrode 51 including the first metal oxide layer 61 and the first metal layer 71.

[0023] The first metal oxide layer 61 contains at least one oxide selected from the group consisting of, for example, aluminum (Al), silicon (Si), zirconium (Zr), titanium (Ti), barium (Ba), calcium (Ca), copper (Cu), etc. Among these, aluminum oxide (Al 2 O 3 The thickness of the first metal oxide layer 61 is not particularly limited, but is, for example, 3 nm or more and 50 nm or less.

[0024] In this embodiment, the first metal oxide layer 61 is disposed so as to be in direct contact with the first dielectric film 41. The first metal oxide layer 61 is disposed on the first electrode arrangement portion 101 of the first dielectric film 41, and in this embodiment, the first metal oxide layer 61 is disposed so as to cover the entire first electrode arrangement portion 101. The shape of the first metal oxide layer 61 is not particularly limited, but in this embodiment, it has a solid surface shape (a shape that is continuous in a plane).

[0025] The first metal layer 71 contains at least one selected from the group consisting of, for example, aluminum (Al), gold (Au), magnesium (Mg), zinc (Zn), tin (Sn), nickel (Ni), chromium (Cr), iron (Fe), copper (Cu), titanium (Ti), etc. The thickness of the first metal layer 71 is not particularly limited, but is, for example, 3 nm or more and 100 nm or less.

[0026] In this embodiment, the first metal layer 71 is disposed so as to be in direct contact with the first metal oxide layer 61. The first metal layer 71 does not have to be disposed on the first metal oxide layer 61 so as to cover the entire first metal oxide layer 61. In this embodiment, the first metal layer 71 is divided into multiple regions (see FIG. 2 ). The first metal layer 71 includes a first divided metal layer 73 and a first non-divided metal layer 74. The first divided metal layer 73 occupies approximately half of one side (left side) of the first surface 81 in the first direction D1. The first divided metal layer 73 is located between the first insulating margin 91 and the first non-divided metal layer 74 in the first direction D1. Furthermore, the first divided metal layer 73 is divided into multiple first small metal layers 731. That is, the first divided metal layer 73 includes multiple first small metal layers 731. The multiple first small metal layers 731 are aligned in the first direction D1 and the second direction D2. In this embodiment, four first small metal layers 731 are arranged in the first direction D1, but the number of the first small metal layers 731 is not particularly limited and can be changed as appropriate. Also, in this embodiment, the shape of each first small metal layer 731 in plan view is quadrilateral, but this shape in plan view is not particularly limited and can be changed as appropriate.

[0027] The first non-divided metal layer 74 occupies approximately half of the other side (right side) in the first direction D1 of the first surface 81. In this embodiment, the first non-divided metal layer 74 has a solid shape (a planar continuous shape) extending in the second direction D2, for example.

[0028] The first metal layer 71 may also have a first fuse 75 (see FIG. 2). The first fuse 75 is a portion that melts to interrupt the circuit when an excessive current flows. In this embodiment, the first fuse 75 may connect two first small metal layers 731 adjacent to each other in the first direction D1, and may connect two first small metal layers 731 adjacent to each other in the first direction D1 to the first non-split metal layer 74.

[0029] <<Second Metallized Film>> The second metallized film 32 has a certain width in the first direction D1, extends in the second direction D2, and has a thickness in the third direction D3. The width and thickness of the second metallized film 32 may be the same as or different from those of the first metallized film 31, but in this embodiment, they are approximately equal to the width and thickness of the first metallized film 31. The second metallized film 32 includes a second dielectric film 42 and a second electrode 52.

[0030] (Second Dielectric Film) The second dielectric film 42 has a constant width in the first direction D1, extends in the second direction D2, and has a thickness in the third direction D3. The width and thickness of the second dielectric film 42 may be the same as or different from those of the first dielectric film 41, but in this embodiment, they are approximately equal to the width and thickness of the first dielectric film 41. The second dielectric film 42 can be made using any of the materials listed as the dielectrics that make up the first dielectric film 41. Note that the dielectrics that make up the first dielectric film 41 and the dielectrics that make up the second dielectric film 42 may be the same or different, but in this embodiment, the same dielectric is used.

[0031] The second dielectric film 42 has a third surface 83 and a fourth surface 84. The third surface 83 is the upper surface. The third surface 83 faces the first metallized film 31. More specifically, the third surface 83 of the second dielectric film 42 faces the second surface 82 of the first dielectric film 41 (see FIGS. 1 and 2 ). The fourth surface 84 is the surface opposite the third surface 83. In other words, the fourth surface 84 is the lower surface. Furthermore, the fourth surface 84 and the first electrode 51 may be separated or in contact with each other in the up-down direction, but in this embodiment, the fourth surface 84 and the first electrode 51 are separated from each other.

[0032] The second dielectric film 42 has a second insulating margin 92 and a second electrode arrangement portion 102. More specifically, the third surface 83 of the second dielectric film 42 has the second electrode arrangement portion 102 in which the second electrode 52 is arranged, and a second insulating margin 92 adjacent to the second electrode arrangement portion 102 and located at the end of the second dielectric film 42 closer to the first end surface electrode 21. The second insulating margin 92 is a narrow strip-shaped portion (see FIGS. 1 and 2 ). That is, the second insulating margin 92 has a width in the first direction D1 and extends in the second direction D2. The width of the second insulating margin 92 in the first direction D1 may be the same as or different from the width of the first insulating margin 91; however, in this embodiment, the widths are approximately the same.

[0033] The second electrode arrangement portion 102 is a strip-shaped portion having a width greater than that of the second insulating margin 92 (see FIGS. 1 and 2 ). That is, the second electrode arrangement portion 102 is a portion that is wider in the first direction D1 than the second insulating margin 92 and extends in the second direction D2. In this embodiment, the second electrode arrangement portion 102 is formed to include an end portion opposite to the end portion where the second insulating margin 92 is formed. The width of the second electrode arrangement portion 102 in the first direction D1 may be the same as or different from that of the first electrode arrangement portion 101, but in this embodiment, the lengths are approximately the same.

[0034] (Second Electrode) The second electrode 52 is disposed on the third surface 83 of the second dielectric film 42. More specifically, the second electrode 52 is disposed in the second electrode placement portion 102 of the third surface 83. In other words, the second electrode 52 is not present in the second insulating margin 92. Thus, the second electrode 52 is disposed in a location on the third surface 83 of the second dielectric film 42 excluding the second insulating margin 92. The thickness of the second electrode 52 may be the same as or different from the thickness of the first electrode 51; however, in this embodiment, the second electrode 52 has approximately the same thickness as the first electrode 51. Furthermore, the material of the second electrode 52 may be the same as or different from the material of the first electrode 51; however, in this embodiment, the second electrode 52 is made of the same material as the first electrode 51. The second electrode 52 is connected to the second end surface electrode 22. In other words, the second electrode 52 and the second end surface electrode 22 are electrically connected.

[0035] Furthermore, the second electrode 52 and the second surface 82 may be separated or in contact in the vertical direction, but in this embodiment, the second electrode 52 and the second surface 82 are separated.

[0036] The second electrode 52 includes a second metal oxide layer 62 and a second metal layer 72. The second metal oxide layer 62 and the second metal layer 72 are stacked in ascending order of proximity to the second dielectric film 42. In other words, the second dielectric film 42, the second metal oxide layer 62, and the second metal layer 72 are stacked in this order from bottom to top in the third direction D3. The second metal oxide layer 62 may contain the metal oxide contained in the first metal oxide layer 61. In this embodiment, the second metal oxide layer 62 is composed of the same metal oxide as the metal oxide contained in the first metal oxide layer 61. The second metal layer 72 may also contain the metal contained in the first metal layer 71. In this embodiment, the second metal oxide layer 62 is composed of the same metal oxide as the metal oxide contained in the first metal oxide layer 61. The thickness of the second metal oxide layer 62 may be the same as or different from the thickness of the first metal oxide layer 61; however, in this embodiment, the second metal oxide layer 62 has the same thickness as the first metal oxide layer 61. The thickness of the second metal layer 72 may be the same as or different from the thickness of the first metal layer 71 , but in this embodiment, it has the same thickness as the first metal layer 71 .

[0037] In this embodiment, the second metal oxide layer 62 is disposed so as to be in direct contact with the second dielectric film 42. The second metal oxide layer 62 is also disposed on the second electrode arrangement portion 102 of the second dielectric film 42, and in this embodiment, the second metal oxide layer 62 is disposed so as to cover the entire second electrode arrangement portion 102. The shape of the second metal oxide layer 62 is not particularly limited, but in this embodiment, it has a solid surface shape (a shape that is continuous in a plane).

[0038] In this embodiment, the second metal layer 72 is disposed so as to be in direct contact with the second metal oxide layer 62. The second metal layer 72 does not have to be disposed on the second metal oxide layer 62 so as to cover the entire second metal oxide layer 62. In this embodiment, the second metal layer 72 is divided into multiple regions (see FIG. 2 ). The second metal layer 72 includes a second divided metal layer 76 and a second non-divided metal layer 77. The second divided metal layer 76 occupies approximately half of one side (right side) of the third surface 83 in the first direction D1. The second divided metal layer 76 is located between the second insulating margin 92 and the second non-divided metal layer 77 in the first direction D1. The second divided metal layer 76 includes multiple second small metal layers 761. In this manner, the second divided metal layer 76 is divided into multiple second small metal layers 761. The multiple second small metal layers 761 are aligned in the first direction D1 and the second direction D2. In this embodiment, four second small metal layers 761 are arranged in the first direction D1, but there is no particular limitation on the number of the plurality of second small metal layers 761. Furthermore, although each second small metal layer 761 has a quadrilateral shape in a plan view, there is no particular limitation on the shape in a plan view.

[0039] The second non-divided metal layer 77 occupies approximately half of the other side (left side) in the first direction D1 of the third surface 83. In this embodiment, the second non-divided metal layer 77 has a solid shape (a planar continuous shape) extending in the second direction D2.

[0040] The second metal layer 72 may also have a second fuse 78 (see FIG. 2). The second fuse 78 is a portion that melts when an excessive current flows, thereby interrupting the circuit. In this embodiment, the second fuse 78 connects two second small metal layers 761 that are adjacent to each other in the first direction D1, and connects two second small metal layers 761 and the second non-split metal layer 77 that are adjacent to each other in the first direction D1.

[0041] <End Electrode> The first end electrode 21 is disposed on the right side of the film capacitor 100. The first end electrode 21 is connected to the first electrode 51. A second insulating margin 92 is interposed between the first end electrode 21 and the second electrode 52 in the first direction D1 ( FIGS. 1 and 2 ). In other words, the first end electrode 21 is not connected to the second electrode 52. The material of the first end electrode 21 is not particularly limited, but examples thereof include zinc (Zn), tin (Sn), and alloys thereof. The thickness of the first end electrode 21 is not particularly limited, but is, for example, 0.5 mm to 1.5 mm.

[0042] The second end surface electrode 22 is disposed on the left side of the film capacitor 100. The second end surface electrode 22 is connected to the second electrode 52. A first insulating margin 91 is interposed between the second end surface electrode 22 and the first electrode 51 in the first direction D1. In other words, the second end surface electrode 22 is not connected to the first electrode 51. The material and thickness of the second end surface electrode 22 may be the same as or different from those of the first end surface electrode 21; however, in this embodiment, the material and thickness of the second end surface electrode 22 are the same as those of the first end surface electrode 21.

[0043] (1.2) Method for Producing Metallized Film A method for producing the metallized film 3 according to this embodiment will be described.

[0044] The manufacturing method of the metallized film 3 according to this embodiment includes a first masking step and a second masking step. In the first masking step, before disposing the metal oxide layer 6 on the dielectric film 4, oil is applied to one end in the first direction D1, i.e., the width direction, of the surface 8A of the dielectric film 4 on which the metal oxide layer 6 will be disposed. In the second masking step, before disposing the metal layer 7 on the metal oxide layer 6, oil is applied again to the area where oil was applied in the first masking step. Note that the areas where oil is applied in the first masking step and the second masking step become the insulating margins 9 of the metallized film 3. Furthermore, the manufacturing method of the metallized film 3 may include a first disposing step and a second disposing step in addition to the first masking step and the second masking step. The first disposing step is a step of disposing the metal oxide layer 6. The second step is a step of disposing the metal layer 7. Each step will now be described in more detail.

[0045] <First Masking Step> In the first masking step, before the metal oxide layer 6 is disposed on the dielectric film 4, oil is applied to one widthwise end of the surface 8A of the dielectric film 4 on which the metal oxide layer 6 is to be disposed. Specifically, the dielectric film 4 is conveyed to a transfer roll to which oil has been applied in advance, and the dielectric film 4 is passed through the transfer roll, thereby applying oil to one widthwise end of the dielectric film 4. Examples of oil include silicone oil, fluorine oil, paraffin oil, ester oil, and vegetable oil. The widthwise length of the portion of the dielectric film 4 to which the oil is applied is determined depending on the widthwise length of the desired insulation margin 9.

[0046] <First Placement Step> In the first placement step, the metal oxide layer 6 is placed on the dielectric film 4 (see FIG. 3A ). For example, the metal oxide layer 6 can be placed on the dielectric film 4 by vapor-depositing a metal oxide onto the dielectric film 4. Specifically, the metal oxide layer 6 can be placed on the dielectric film 4 by the following method. First, the dielectric film 4, one end of which is coated with oil, is transported while being held in close contact with a chill roll. Next, metal oxide is vapor-deposited onto the oil-coated surface 8A of the dielectric film 4. In this manner, the metal oxide layer 6 can be placed on the oil-coated surface 8A of the dielectric film 4. At this time, the metal oxide layer 6 is not placed in the areas masked by the oil. In other words, the areas where the metal oxide layer 6 is placed become the electrode placement portions 10 of the metallized film 3. Note that when the metal oxide layer 6 is placed on the dielectric film 4 while the dielectric film 4 is held in close contact with the chill roll, the surface 8B of the dielectric film 4 opposite the oil-coated surface 8A is held in close contact with the chill roll. Therefore, the metal oxide layer 6 is not disposed on the surface 8B of the dielectric film 4 opposite to the surface 8A to which the oil is applied.

[0047] <Second Masking Step> In the second masking step, oil is applied to one end of the dielectric film 4 before the metal layer 7 is disposed on the metal oxide layer 6. This end is a portion of one surface 8A of the dielectric film 4 where metal is not to be vapor-deposited, i.e., a portion to be the insulating margin 9. This is the same portion as the portion to which oil was applied in the first masking step. The oil applied in the first masking step may volatilize and disappear when the metal oxide layer 6 is disposed. Therefore, in the second masking step, oil is again applied to the end of the dielectric film 4 that is to be the insulating margin 9. Note that the method for applying oil in the second masking step can be the same as that in the first masking step. Furthermore, the same oil as in the first masking step can be used. Furthermore, in the second masking step, oil may be applied to the metal oxide layer 6, which prevents the metal layer 7 from being disposed on the portion of the metal oxide layer 6 where oil has been applied. In this manner, the metal layer 7 divided into multiple regions can be disposed on the metal oxide layer 6.

[0048] <Second Arrangement Step> In the second arrangement step, the metal layer 7 is arranged on the metal oxide layer 6 (see FIG. 3B ). For example, the metal layer 7 can be arranged by vapor-depositing a metal onto the metal oxide layer 6. The method for arranging the metal layer 7 on the metal oxide layer 6 can be the same as the method for arranging the metal oxide layer 6 on the dielectric film 4 in the first arrangement step. That is, the dielectric film 4 is transported while being in close contact with a chill roll. Then, metal is vapor-deposited onto the metal oxide layer 6. In this manner, the metal layer 7 is arranged. At this time, the metal layer 7 is not arranged on the portion masked by oil. Note that the surface 8B opposite the surface 8A on which the metal oxide layer 6 is arranged, i.e., the surface 8B opposite the surface 8A on which the oil is applied, is in close contact with the chill roll. Therefore, the metal layer 7 is not arranged on the surface 8B of the dielectric film 4 opposite the surface 8A on which the oil is applied.

[0049] Through the above steps, the metallized film 3 can be manufactured from the dielectric film 4. These steps are preferably performed under vacuum. In this case, if the dielectric film 4 contains volatile components, the volatile components can be evaporated and easily removed. Examples of volatile components include moisture and additives. These volatile components may hinder the deposition of metal oxide, thereby inhibiting the formation of the metal oxide layer 6 on the dielectric film 4, or may hinder the deposition of metal, thereby inhibiting the formation of the metal layer 7 on the metal oxide layer 6.

[0050] (2) Modifications The present disclosure is not limited to the above-described embodiment. The above-described embodiment can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved. Modifications of the above-described embodiment are listed below.

[0051] For example, the first metal layer 71 may be disposed in a solid surface form (a planar continuous shape) on the first metal oxide layer 61. In this case, the first metal layer 71 may or may not cover the entire first metal oxide layer 61. Furthermore, the second metal layer 72 may be disposed in a solid surface form (a planar continuous shape) on the second metal oxide layer 62. In this case, the second metal layer 72 may or may not cover the entire second metal oxide layer 62.

[0052] The first fuse 75 connects two adjacent first small metal layers 731 in the first direction D1, and in addition to connecting the first small metal layers 731 adjacent in the first direction D1 to the first non-split metal layer 74, it can also connect two adjacent first small metal layers 731 in the second direction D2. The second fuse 78 connects two adjacent second small metal layers 761 in the first direction D1, and in addition to connecting the second small metal layers 761 adjacent in the first direction D1 to the second non-split metal layer 77, it can also connect two adjacent second small metal layers 761 in the second direction D2. These features make it possible to suppress excessive reduction in the capacitance of the film capacitor 100 in the event of dielectric breakdown.

[0053] 3. Aspects As is clear from the above embodiment, the present disclosure includes the following aspects. In the following, reference numerals are given in parentheses only to clarify the correspondence with the embodiment.

[0054] A film capacitor (100) according to a first aspect of the present invention comprises a capacitor body (1) including a first metallized film (31) and a second metallized film (32), a first end electrode (21) disposed on one end surface of the capacitor body (1), and a second end electrode (22) disposed on the other end surface of the capacitor body (1). The first metallized film (31) and the second metallized film (32) are wound in a stacked manner or alternately laminated. The first metallized film (31) has a first dielectric film (41) and a first electrode (51) connected to the first end electrode (21). The first dielectric film (41) has a first surface (81) on which the first electrode (51) is disposed and a second surface (82) opposite the first surface (81). The first surface (81) has a first electrode placement portion (101) where the first electrode (51) is placed, and a first insulating margin (91) adjacent to the first electrode placement portion (101) and located at an end of the first dielectric film (41) closer to the second end electrode (22). The first electrode (51) includes a first metal oxide layer (61) and a first metal layer (71), and the first metal oxide layer (61) and the first metal layer (71) are stacked in this order from the first surface (81). The second metallized film (32) has a second dielectric film (42) and a second electrode (52) connected to the second end electrode (22). The second dielectric film (42) has a third surface (83) where the second electrode (52) is placed, and a fourth surface (84) opposite the third surface (83). The third surface (83) has a second electrode arrangement portion (102) where the second electrode (52) is arranged, and a second insulating margin (92) adjacent to the second electrode arrangement portion (102) and located at an end of the second dielectric film (42) closer to the first end surface electrode (21). The second electrode (52) includes a second metal oxide layer (62) and a second metal layer (72), and the second metal oxide layer (62) and the second metal layer (72) are stacked in this order from the third surface (83). The second surface (82) of the first dielectric film (41) and the third surface (83) of the second dielectric film (42) face each other.

[0055] According to this aspect, it is possible to suppress a decrease in capacitance.

[0056] A metallized film (3) according to a second aspect of the present invention comprises a dielectric film (4) and an electrode (5). The surface (8A) of the dielectric film (4) on which the electrode (5) is disposed has an electrode placement section (10) on which the electrode (5) is disposed, and an insulating margin (9) adjacent to the electrode placement section (10) and located at one end in the width direction. The electrode (5) includes a metal oxide layer (6) and a metal layer (7), and the metal oxide layer (6) and the metal layer (7) are laminated in this order from the surface (8A) of the dielectric film (4) on which the electrode (5) is disposed.

[0057] A method for manufacturing a metallized film according to a third aspect of the present disclosure is a method for manufacturing a metallized film (3) according to the second aspect, and includes a first masking step of applying oil to one end in the width direction of the surface (8A) of the dielectric film (4) on which the metal oxide layer (6) is to be placed before placing the metal oxide layer (6) on the dielectric film (4), and a second masking step of applying oil to one end before placing a metal layer (7) on the metal oxide layer (6).

[0058] REFERENCE SIGNS LIST 1 Capacitor body 100 Film capacitor 2 End electrode 21 First end electrode 22 Second end electrode 3 Metallized film 31 First metallized film 32 Second metallized film 4 Dielectric film 41 First dielectric film 42 Second dielectric film 5 Electrode 51 First electrode 52 Second electrode 6 Metal oxide layer 61 First metal oxide layer 62 Second metal oxide layer 7 Metal layer 71 First metal layer 72 Second metal layer 8, 8A, 8B Surface 81 First surface 82 Second surface 83 Third surface 84 Fourth surface 9 Insulating margin 91 First insulating margin 92 Second insulating margin 10 Electrode placement portion 101 First electrode placement portion 102 Second electrode placement portion

Claims

1. A capacitor comprising: a capacitor body including a first metallized film and a second metallized film; a first end electrode disposed on one end surface of the capacitor body; and a second end electrode disposed on the other end surface of the capacitor body, wherein the first metallized film and the second metallized film are overlapping and wound or alternately laminated; the first metallized film has a first dielectric film and a first electrode connected to the first end electrode; the first dielectric film has a first surface on which the first electrode is disposed and a second surface opposite the first surface; the first surface has a first electrode arrangement portion on which the first electrode is disposed and a first insulating margin adjacent to the first electrode arrangement portion and located at an end of the first dielectric film closer to the second end electrode; the first electrode includes a first metal oxide layer and a first metal layer, and the first metal oxide layer and the first metal layer are laminated in this order from the first surface; a second metallized film having a second dielectric film and a second electrode connected to the second end surface electrode; the second dielectric film having a third surface on which the second electrode is arranged and a fourth surface opposite the third surface; the third surface having a second electrode arrangement portion on which the second electrode is arranged and a second insulating margin adjacent to the second electrode arrangement portion and located at an end of the second dielectric film closer to the first end surface electrode; the second electrode including a second metal oxide layer and a second metal layer, the second metal oxide layer and the second metal layer being stacked in this order from the third surface; and the second surface of the first dielectric film facing the third surface of the second dielectric film.

2. A metallized film comprising a dielectric film and an electrode, wherein the surface of the dielectric film on which the electrode is arranged has an electrode arrangement portion where the electrode is arranged and an insulating margin adjacent to the electrode arrangement portion and located at one end in the width direction, and the electrode includes a metal oxide layer and a metal layer, and the metal oxide layer and the metal layer are laminated in this order from the surface of the dielectric film on which the electrode is arranged.

3. A method for producing a metallized film as described in claim 2, comprising: a first masking step of applying oil to one end in the width direction of the surface of the dielectric film on which the metal oxide layer is to be disposed before disposing the metal oxide layer on the dielectric film; and a second masking step of applying the oil to one end before disposing the metal layer on the metal oxide layer.

Citation Information

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