Method for manufacturing optoelectronic devices

Abstract

The invention concerns a method for manufacturing a plurality of optoelectronic devices comprising the steps: Providing a semiconductor layer stack of a first layer of a first conductivity type, a second layer of a second conductivity type as well as an active region between the first and second layer, on a growth substrate; Structuring the semiconductor layer stack to remain first portions and to remove at least one adjacent second portion, the first portions each comprising a bottom surface and first side wall portions extending from the bottom surface into the direction of the growth substrate through at least the second layer and the active region; Providing first contact elements on each of the bottom surfaces electrically contacting the second layer; Providing a material layer covering at least portions of the first side wall portions; Providing a first sacrificial layer at least partially covering the first contact elements and the material layer; Providing a first bond layer covering the first sacrificial layer; Backside processing the semiconductor layer stack such that a plurality of separated optoelectronic devices with each a light emitting surface is formed; Providing a holding structure contacting the light emitting surfaces of the optoelectronic devices; and removing the first sacrificial layer such that the optoelectronic devices are substantially only connected to the holding structure.

Description

[0001] METHOD FOR MANUFACTURING OPTOELECTRONIC DEVICES

[0002] The present application claims priority from German patent application DE 10 2024 106 953.8 filed on March 12, 2024, the disclosure of which is incorporated by way for reference in its entirety.

[0003] The present invention concerns a method for manufacturing optoelectronic devices, in particular pLEDs, as well as an array of optoelectronic devices manufactured by such a method.

[0004] BACKGROUND pLEDs are optoelectronic devices that comprise a lateral dimension in the range from a few pm to about 40 pm. Such devices provide a variety of different applications, including but not limited to displays.

[0005] They are usually processed in arrays of several thousands of devices, and subsequently transferred from their growth substrate or an intermediate carrier to a target substrate (e.g. display backplane) . To date optoelectronic devices and in particular p-LEDs are manufactured in such a way that the finished devices can be transferred to a driver substrate (e.g. display backplane) by a respective transfer process (e.g. stamping, LIFT, ... ) . However, the known methods are usually time-consuming, error-prone, lead to a high level of defects or are unnecessarily cost-intensive due to a large number of steps .

[0006] It is an object of the present application to provide an enhanced method for manufacturing an optoelectronic device, in particular pLED.

[0007] SUMMARY OF THE INVENTION

[0008] This and other objects are addressed by the subject matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims .

[0009] The core of the invention is to provide a method for manufacturing optoelectronic devices, in particular pLEDs, in which a holding structure for the optoelectronic device is provided on a light emitting surface / a top surface of the optoelectronic devices in contrast to known processes where a holding structure is provided on an opposite side . By this an easier transfer of the optoelectronic devices to for example a backplane can be provided as well as a less error-prone process with a lower level of defects can be achieved .

[0010] A key aspect lies in the interaction of several process and design features such as for example : a holding structure for the optoelectronic devices provided on a light emitting surface / a top surface of the optoelectronic devices ( Reduced ris k of flying parts of the holding structure after a transfer of the optoelectronic devices ) ; flip orientation of contact pad ( s ) , so that the optoelectronic devices can directly be transferred using e . g . a LIFT process (without any taping step ) ;

[0011] A mirror around the remaining semiconductor layer stack structure ( optical cavity) ; and

[0012] A specifically tuned material combination for holding structure material , sacrificial layer material and contact layer material .

[0013] According to a first aspect , a method for manufacturing a plurality of optoelectronic devices is provided . The method for manufacturing the plurality of optoelectronic devices comprises the following steps :

[0014] Providing a semiconductor layer stack of at least a first layer of a first conductivity type , a second layer of a second conductivity type as well as an active region between the first and second layer, on a growth substrate ;

[0015] Structuring the semiconductor layer stack to remain first portions of the semiconductor layer stack and to remove at least one adj acent second portion of the semiconductor layer stack, the first portions each comprising a bottom surface and first side wall portions extending from the bottom surface into the direction of the growth substrate through at least the second layer and the active region;

[0016] Providing a first contact elements on each of the bottom surfaces electrically contacting the second layer; Providing a material layer covering at least portions of the first side wall portions and in particular covering at least portions of the first contact elements ;

[0017] Providing a first sacrificial layer at least partially covering the first contact elements and the material layer ;

[0018] Providing a first bond layer covering the first sacrificial layer ;

[0019] Attaching a first temporary carrier to the first bond layer ;

[0020] Backside processing the semiconductor layer stack opposite the bottom surfaces such that a plurality of separated optoelectronic devices with each a light emitting surface opposite the bottom surface is formed;

[0021] Providing a holding structure contacting the light emitting surfaces of the optoelectronic devices ; and

[0022] Removing the first sacrificial layer such that the optoelectronic devices are substantially only connected to the holding structure .

[0023] The optoelectronic devices can in particular be a small light emitting components / elements such as a small LEDs or pLEDs . A pLED can in particular be a very small LED with edge lengths down to 30 pm, down to 10 pm, down to 5 pm or even less . Such small LEDs can be free of a growth substrate and require a special handling and processing to improve their IQE and light outcoupling efficiency . One approach to improve the IQE of the pLED is to cover the first side wall portions with a regrowth layer . A possible approach to improve the outcoupling efficiency and light directionality of the light emitted by the pLED is to provide outcoupling structures and / or reflective structures on / in the pLED .

[0024] According to some aspects , the semiconductor layer stack comprises a semiconductor material such as for example Indium Gallium Aluminium Phosphide ( InGaAlP ) or Gallium Nitride ( GaN) . The semiconductor layer stack comprises at least a first layer of a first conductivity type , a second layer of a second conductivity type as well as an active region between the first and second layer . The first layer can for example be a semiconductor layer that is n-doped, whereas the second layer can for example be a semiconductor layer that is p-doped . The two layers can thus form a pn-j unction with the active region arranged in-between . The active region can for example comprise a quantum well or multi quantum well structure , or can for example comprise quantum dots .

[0025] The first side wall portions can result from an etching step in particular mesa etching step . The first side wall portions can in particular result from a mesa etching step of the semiconductor layer stack from the bottom surface of the semiconductor layer stack . The etching step for generating the first side wall portions can thereby be a dry etching step or a combination of dry and wet etching . By means of the etching in combination with a respective arrangement of contact layers / elements , a particularly advantageous structure can be achieved .

[0026] The term side wall portions shall in this regard be understood as at least portions of the side walls of the respective structure being etched . The respective structure being etched resulting in the first side wall portions can in particular be the semiconductor layer stack .

[0027] According to some aspects , the material layer comprises a regrowth layer covering the first side wall portions . In addition or as an alternative , the material layer comprises a dielectric layer arranged between the first and second contact elements and / or between the bottom surface and the first contact element and / or between the first side wall portions and the first contact elements and / or between the first side wall portions and second contact elements . Apart from quantum well intermixing , the material layer can be regrown with a semiconductor material and / or contain SiO2, A12O3and any other suitable material . In some instances , the material layer forms a portion of the outer surface of the later optoelectronic devices and / or is formed between the first and second contact elements and / or between the bottom surface and the first contact elements and / or between the first side wall portions and the first contact elements and / or between the first side wall portions and second contact elements . The material layer can in particular be configured as or comprise a dielectric material layer electrically isolating layers / components within the later optoelectronic devices preventing a short . The material layer can for example comprise or consist of SiO2, silicon nitride , Nb2O2, HfO2, A12O2, or a stack of a combination of aforementioned materials . The material layer or portions thereof can in particular be deposited using physical vapor deposition ( PVD) , plasma-enhanced chemical vapor deposition ( PECVD) or atomic layer deposition (ALD ) .

[0028] In accordance with some aspects , a first sacrificial layer is deposited . The first sacrificial layer covers at least partially the first contact elements and / or the material layer . In other words , the first sacrificial layer covers all surfaces of the optoelectronic device being exposed, including any contact material on top . The first sacrificial layer may either follow the underlying shape with a substantially continuous thickness or my fill gaps and wholes of the underlying structure and may then be planarized to form an even surface . Said first sacrificial layer may comprise one of Si , SiO2, a metal- oxide and an organic material .

[0029] According to some aspects , a first bond layer is then deposited on the first sacrificial layer . The first bond layer may comprise an organic material or a metallic alloy, in particular containing gold . For example the first bond layer may comprise Benzocyclobutene ( BCB ) . The composition of the first bond layer is different from the first sacrificial layer but selected such that any etchant used for removing the first sacrificial layer does not affect the first bond layer material or the surface of the latter optoelectronic devices .

[0030] According to some aspects , a first temporary carrier is then attached to the first bond layer . After the attachment of the first temporary carrier , the growth substrate as well as a potential buffer layer can be removed to form / expose the light emitting surface of the optoelectronic devices . If needed, material of the semiconductor layer stack is also removed until portions of the first sacrificial layer are exposed . This will provide access to the first sacrificial layer for removing / etching it . The first bond layer does not obstruct a later transfer process in any way, because no bond material is located at undesired places , for example between the optoelectronic devices . This enables the processing of optoelectronic devices with a very high density on the growth substrate , reducing the overall costs . The holding structure , it ' s number per optoelectronic device , its shape , form and the chosen material provides a flexible yet precise control of the adhesive force between the devices and the holding structure .

[0031] According to some aspects , the first sacrificial layer can be exposed at a relatively large size , thus the etching process for removing the first sacrificial layer can be shortened, which does not only increase process speed but also reduces possible effects of the etchant on the remaining portions , i . e . the semiconductor layer stack .

[0032] Some aspects concern the selection of material for the first sacrificial layer . Such selection should be based on a combination of the desired bond material as well as the material of the outer surface of the optoelectronic devices . The material for the first sacrificial layer can be selected based on all layers that are in direct contact with the etchant used for removing the first sacrificial layer .

[0033] In some aspects , the material of the first sacrificial layer is selected to be ZnO if the material layer comprises SiCh or SisN and / or first and / or second contact elements at the outer surface of the optoelectronic device comprises Au or Ag and in particular a solderable layer such as for example AuSn, InSn, AulnSn, NilnSn . Dissolving ZnO would be an inorganic implementation . However , ZnO is easily removed with diluted HC1 that leaves Si02 , SisN4 or noble metals like Au, Pd, Pt and Ag unaffected .

[0034] As an alternative , one can use organic materials and compounds for the first sacrificial layer . Polystyrene , particularly solute in Ethylacetate or Toluol and is suitable if the material layer comprises Si02 or Si3N4 and / or first and / or second contact elements at the outer surface of the optoelectronic device comprises Au or Ag and in particular a solderable layer such as for example AuSn, InSn, AulnSn, NilnSn . Polystyrene has the benefit that it is dissolvable in organic solvents , facilitating the later first sacrificial layer removal .

[0035] Polyvinylalcohol , PVA is also a suitable material if the material layer comprises SiCh . It also has the benefit that it is dissolvable in H2O . A similar material is Polyvinylacetate , PVAc , if the material layer comprises SiCh or SisN4 . It can be dissolved in Ethyl acetate . Finally, soft-baked photoresist can be used, if first and / or second contact elements at the outer surface of the optoelectronic device comprises one of Au and Ag, an Au containing alloy, or a solderable layer such as for example AuSn, InSn, AulnSn, NilnSn . All organic materials as first sacrificial layer material can also be removed by an oxygenbased plasma-etching process if first and / or second contact elements at the outer surface of the optoelectronic devices comprises one of Au, an Au containing alloy, or a solderable layer such as for example AuSn, InSn, AulnSn, NilnSn .

[0036] Some or all of the material of the first sacrificial layer can be deposited by various means , further increasing the flexibility and optimizing the process . For example , deposition techniques include spinning, sputtering, or spraying the first sacrificial layer material on first and / or second contact elements at the outer surface of the optoelectronic device and / or the surface of the material layer . In some aspects , viscosity is adj usted by adding a suitable solvent . Consequently, some techniques can also be used to planarize the first sacrificial layer .

[0037] For example , first sacrificial layer material together with a solvent is deposited using one of the above-mentioned techniques . The solvent is vaporized, leaving a substantially planar and even surface of first sacrificial layer material . Other deposition techniques include melting first sacrificial layer material or pressing molten and low viscous first sacrificial layer material are also possible .

[0038] Depositing the bond material on the first sacrificial layer may include a vapor deposition of the first bond layer material . In some aspects a thin film solder material based on a gold allow like AuSn, AulnSn, but also InSn or NilnSn solder material is suitable . Alternatively, the first bond layer material may be spinned, sputtered or evaporated onto the first sacrificial layer . In some aspects , the bond material comprises an organic compound . Consequently, the bond material may comprise a solvent to adj ust its viscosity . This will provide an even surface after the solvent has evaporated .

[0039] Further deposition techniques may be used depending on the material . For example , one may use melting first bond layer material on the surface or pressing molten or low viscous first bond layer material on the surface of the first sacrificial layer .

[0040] Different first bond layer materials are suitable , particular first bond layer materials that are different in its etching characteristics from the material of the first sacrificial layer . In some aspects , the first bond layer material comprises one of BCB or epoxy resin, that is at least partially cured at room temperature or slightly elevated temperature , particularly if the first sacrificial layer comprises an organic compound and / or if the first and / or second contact elements contain a solderable material stack . The first bond layer material comprises in other aspects polystyrene if the first sacrificial layer comprises PVA, or the first bond layer material comprises epoxy resin or BCB if the first sacrificial layer comprises polystyrene .

[0041] In some aspects , the first bond layer is cured after the temporary carrier is attached to the first bond layer . For curing purposes , thermal or optical measures can be used .

[0042] After attaching the temporary carrier, the semiconductor layer stack can be freed of the growth substrate . The temporary carrier acts as a new substrate for such process steps . Various methods of removing the growth substrate are known in the art . This will expose the semiconductor layer stack from the back side . A possible continuous portion of the semiconductor layer stack can also be removed to separate the individual optoelectronic devices embedded within the first sacrificial layer . Removing the continuous portion of the semiconductor layer stack includes but is not limited to mechanical grinding, polishing , chemical mechanical polishing , CMP, wet or dry etching or combinations thereof . According to some aspects , the step of backside processing the semiconductor layer stack thus comprises at least one of removing the growth substrate and chemical and / or mechanical polishing the semiconductor layer stack, in particular thereby exposing portions of the first sacrificial layer and / or the second contact elements and / or the semiconductor layer stack .

[0043] The back side of the optoelectronic devices namely a top surface of the semiconductor layer stack opposite the bottom surface is then exposed and can be further processed / structured to form each a light emitting surface of the latter optoelectronic devices . The light emitting surfaces can thereby for example be formed by a top surface of the semiconductor layer stack itself , or by a passivation or contact layer arranged on the top surface of the semiconductor layer stack .

[0044] A holding structure contacting the light emitting surfaces of the optoelectronic devices is then provided contacting the light emitting surfaces of the optoelectronic devices . The holding structure can for example comprise separate posts contacting the light emitting surfaces of one or more optoelectronic devices or can be provided as a continuous layer contacting the light emitting surfaces of one or more optoelectronic devices .

[0045] Finally, the proposed method may include removal of the first sacrificial layer, in particular by one of dry-etching , wet-etching , plasma-etching, or dissolving in a solvent , in particular in water . Again, the selected removal process depends on the combination of the material of the semiconductor' s surface , the material of the first sacrificial layer and the bond material . The optoelectronic devices are then separated and held by substantially only the holding structure , defining a specific adhesion force at the interface . This will allow an easy transfer process onto a target substrate or a carrier for a subsequent LI FT process using a stamp , for example .

[0046] According to some aspects , the method further comprises a step of structuring the semiconductor layer stack such that the first portions comprise second side wall portions different from the first side wall portions extending from a level between the active region and the growth substrate into the direction of the growth substrate through at least portions of the first layer .

[0047] In some aspects , the second structuring of the semiconductor layer stack as well is conducted into remaining portions of the semiconductor layer stack layer stack to a depth greater than the depth of the preceding structuring step of the semiconductor layer stack resulting in the first side wall portions . The second step of structuring can for example stop prior to reaching the growth substrate but may also reach until the growth substrate . Generally, after each structuring step, some cleaning or protecting the exposed surface may be conducted .

[0048] In some aspects , the second structuring of the semiconductor layer stack is conducted before the step of providing a material layer . In this case , the material layer covers at least parts of the first and second side wall portions .

[0049] In some aspects , the first side wall portions extend until the same level as the level from which the second side wall portions extend into the direction of the growth substrate . In particular , the first side wall portions can be adj acent to the second sidewall portions and can be contiguous except , for example , for a lateral offset from each other . However , it can also be conceivable that due to a further intermediate etching step further side wall portions are formed between the first and second side wall portions . It can also be conceivable that due to the chosen parameters of the first and second etching step , the first and second side wall portions are substantially contiguous , thus no or substantially no lateral offset between the first and second sidewall portions is present .

[0050] In some aspects , the first side wall portions comprise portions of the first layer, the second layer and the active region . In particular, the first side wall portions comprise the whole side surfaces of the second layer and the active region as well as a side surface portion of the first layer between the active region and the growth substrate . The second side wall portions can on the other hand comprise portions of the first layer . In particular , the second side wall portions comprise a side surface portion of the first layer between the active region and the growth substrate .

[0051] In some aspects , adj acent first side wall portions and second side wall portions are laterally distant from each other . Due to an etching from the same side of the semiconductor layer stack resulting in the side wall portions , a pyramidal shape can for example be generated with several trapezoids stacked above each other in cross section, the side surfaces of which are forming the side wall portions with the largest trapezoid forming the second side wall portions and the smallest trapezoid forming the first side wall portions . In particular , adj acent first side wall portions and second side wall portions are shifted towards each other laterally and are not contiguous . The lateral shift can result from different etching steps with different sized etched surfaces and cross sections resulting from the etching .

[0052] According to some aspects , the first side wall portions and / or the second side wall portions are inclined . Due to a mesa etching , the resulting side wall portions can be inclined with respect to a perpendicular of the light emitting surface or bottom surface . In particular, the resulting side wall portions can be inclined such that the surface towards the bottom surface is smaller in area than the surface towards the light-emitting surface . The mesa etching can in particular leave a truncated pyramid or truncated cone in each case , the outer surfaces of which form the first and second side wall portions at least in places . In particular, the mesa etching can leave a truncated pyramid or truncated cone of different sizes stacked on top of each other , the outer surfaces of which form the inclined and laterally distant from each other first and second side wall portions at least in places .

[0053] According to some aspects , the method further comprises a step of providing second contact elements on the material layer and in particular on the second side wall portions electrically contacting the first layer of each of the first portions . The method can however also comprise a step of providing second contact elements on the exposed top surfaces of the semiconductor layer stack electrically contacting the first layer of each of the first portions .

[0054] According to some aspects , the second contact elements can be provided on the same side of the optoelectronic devices as the first contact elements extending to the first layer along the first and second side wall portions thus forming optoelectronic devices that are of a flip chip configuration . The second contact elements can however also be provided on a side of the optoelectronic devices opposite the first contact elements , in particular on a top surface of the semiconductor layer stack, thus forming optoelectronic devices that are of a vertically contactable configuration .

[0055] In some aspects , the light emitting surface is free of a metal and / or conductive oxide material . For example the optoelectronic devices can be of a flip chip configuration and both electric contacts for powering the optoelectronic devices are arranged on the same side of the optoelectronic device , namely the same side as the bottom surface of the semiconductor layer stack . In some aspects , the light emitting surface can however be formed of or at least comprise a transparent conductive oxide and both electric contacts for powering the optoelectronic devices are arranged on opposing sides of the optoelectronic device , namely the side of the bottom surface and the side of the top surface of the semiconductor layer stack .

[0056] In some aspects , the step of providing the first contact elements comprises providing a first contact layer arranged on the bottom surface and / or a first reflective layer arranged on the first contact layer and / or the bottom surface . In addition or as an alternative , the step of providing the first contact elements comprises providing a first contact pad arranged on the first contact layer, the first reflective layer or the bottom surface . The first contact elements can in particular comprise a first contact layer in particular also being reflective arranged on the bottom surface forming a mirror at the bottom surface of the semiconductor layer stack . The first contact layer can however also be of a transparent conductive material and a first reflective layer can be arranged on the first contact layer or below the first contact layer together forming a mirror at the bottom surface of the semiconductor layer stack. The first contact pad can for example be a contact pad arranged on the first contact layer only in an area opposite the bottom surface or can be in form of a layer covering the whole first contact layer.

[0057] The first contact elements can for example comprise or consist of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as a first contact layer. The first contact elements can for example also comprise or consist of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as a first contact layer combined with a silver (Ag) , aluminum (Al) , gold (Au) , platinum (Pt) and / or titanium (Ti) layer or a layer stack thereof as a first reflective layer. The first contact elements can for example also comprise or consist of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as a first contact layer combined with a silver (Ag) , platinum (Pt) , nickel (Ni) and / or titanium-tungsten-nitride (TiW:N) layer. In addition, the first contact elements can comprise a gold (Au) , platinum (Pt) and / or titanium (Ti) layer as well as a titanium (Ti) , platinum (Pt) , gold- indium-tin (AulnSn) , NilnSn, AuSn, InSn and / or a gold (Au) based solder material as a first contact pad.

[0058] In some aspects, the step of providing the second contact elements comprises providing a second contact layer arranged on the material layer and the second side wall portions, or can comprise a step of providing a second contact layer on the exposed top surfaces of the semiconductor layer stack, wherein the second contact layer electrically contacts the first layer of each of the first portions of the semiconductor layer stack. In addition or as an alternative, the step of providing the second contact elements comprises providing a second reflective layer arranged on the second contact layer and / or the material layer. Further the step of providing the second contact elements may comprise a step of providing a second contact pad / metal layer arranged on the second contact layer, the second reflective layer and / or the material layer, the second contact pad electrically contacting the second contact layer and / or the first layer. The second contact element can in particular comprise a second contact layer in particular also being reflective arranged on the material layer and the second side wall portions forming a mirror around the remaining semiconductor layer stack structure ( optical cavity) . The second contact layer can however also be of a transparent conductive material and a second reflective layer can be arranged on the second contact layer or below the second contact layer together forming a mirror around the remaining semiconductor layer stack structure ( optical cavity) . The second contact pad can for example be a contact pad arranged on the second contact layer only in an area opposite the bottom surface or can be in form of a layer enclosing the second contact layer also electrically contacting the first layer directly .

[0059] The second contact element can for example comprise or consist of a transparent conductive oxide (TCO ) such as indium tin oxide ( ITO ) as a second contact layer . The second contact element can for example also comprise or consist of a transparent conductive oxide (TCO ) such as indium tin oxide ( ITO ) as a second contact layer combined with a gold (Au ) germanium ( Ge ) alloy layer . In addition, the second contact element can comprise a gold (Au ) , platin ( Pt ) and / or titanium ( Ti ) layer as well as a titanium (Ti ) , platin ( Pt ) , gold-indium-tin (AulnSn ) , NilnSn, AuSn, InSn and / or a gold (Au) based solder material as a second contact pad .

[0060] The first as well as the second contact element can comprise a solder material or solder material layer at their outer surface facing away from the bottom surface , which can make a later transfer of the optoelectronic device easier .

[0061] The second contact elements can, when viewed in a direction perpendicular to the bottom surface , each be in form of a ring like structure , wherein a first contact element is arranged in the centre of the ring like structure being electrically isolated from the second contact element . The second contact elements can in particular each extend along the whole outer circumference of the optoelectronic devices , while when viewed in a direction perpendicular to the bottom surface , the first contact element is arranged in the centre of the second contact element distant from the second contact element and thus being electrically isolated from the second contact element .

[0062] According to some aspects , the method further comprises a step of roughening or structuring a top surface of the first portions of the semiconductor layer stack opposite the bottom surfaces . The roughening or structuring can thereby serve to provide a roughened or structured surface enhancing the light outcoupling efficiency of the optoelectronic devices . The top surface of the first portions of the semiconductor layer stack can thereby be roughened or structured throughout its whole surface area or only in defined areas or points . For example areas of a later contact with the holding structures can be excluded from the structuring or roughening of the top surface in order to provide a flat surface for providing the holding structure on . Further a passivation layer can be provided on the roughened or structured top surfaces , thereby forming the light emitting surfaces of the optoelectronic devices . The passivation layer can in particular sever to enhance a stability of the roughened or structured top surfaces and to thus enhance the light outcoupling efficiency of the optoelectronic devices on the long term. The passivation layer can for example contain or consist of SiCh , AI2O3 , SisN HfCh or other suitable dielectric materials .

[0063] According to some aspects , the holding structure is provided to connect the light emitting surfaces of the optoelectronic devices to the first bond layer . In particular the holding structure can be provided on the light emitting surfaces and the first bond layer such that portions or remaining posts of the holding structure connect the light emitting surfaces of the optoelectronic devices to the first bond layer . The holding structure can for example comprise at least one post or portion contacting the light emitting surface of several optoelectronic devices at a time .

[0064] According to some aspects , the method further comprises a step of lifting off the optoelectronic devices connected to the first bond layer , in particular by breaking the holding structure or detaching the holding structure from the first bond layer . For example the optoelectronic devices can be lifted off from the first bond layer by means of a stamp thereby releasing the connection between the optoelectronic devices and the first bond layer . The optoelectronic devices can then be directly transferred onto a target substrate or can be transferred to a carrier for a subsequent LI FT process , for example .

[0065] According to some aspects , the holding structure is provided comprising a second temporary carrier and a second bond layer , wherein the second bond layer is connected to the light emitting surfaces of the optoelectronic devices . The second temporary carrier can thereby in particular act as a temporary carrier for transferring the optoelectronic devices to a target substrate by means of for example a subsequent LI FT process . After providing the holding structure , the first sacrificial layer , the first bond layer and the first temporary carrier substrate can be removed resulting in the optoelectronic devices being connected to the holding structure but being free on a side opposite the holding structure . By means of for example a LIFT process the optoelectronic devices can then be directly transferred to a target substrate without the need of rebonding the optoelectronic devices to a further temporary carrier .

[0066] The second bond layer can thereby be provided to comprise posts being connected to one or more optoelectronic devices at a time , or can be provided to cover the light emitting surfaces of the optoelectronic devices on a large scale .

[0067] To provide post of the holding structure being connected to one or more optoelectronic devices at a time the method can further comprise a step of providing a second sacrificial layer at least partially covering the light emitting surfaces exposing an area of contact between the light emitting surfaces and the holding structure . The second sacrificial layer can then at the same time as the first sacrificial layer be removed such that the post of the holding structure being connected to one or more optoelectronic devices remain . According to some aspects , the holding structure comprises an intermediate layer arranged between the second temporary carrier and the second bond layer, wherein the intermediate layer is light absorbing for light of a first wavelength and the second bond layer is light transmissive for light of the first wavelength . By means of this a respective structure to allow a LIFT process for detaching the optoelectronic devices from the holding structure again can be provided .

[0068] According to some aspects the step of removing the first and / or second sacrificial layer comprises one of dry-etching, wet-etching, plasmaetching or dissolving in a solvent .

[0069] According to a further aspect , an array of optoelectronic devices is provided . The array can in particular be a product or intermediate product of a method according to at least some of aforementioned aspects . Hence all aspects already described for the method can in the same way be applied to the array and vice versa .

[0070] The array of optoelectronic devices comprises a plurality of optoelectronic devices each comprising a semiconductor layer stack of at least a first layer of a first conductivity type , a second layer of a second conductivity type as well as an active region between the first and second layer . The optoelectronic devices further comprise each a first contact element arranged on a bottom surface of the semiconductor layer stack electrically contacting the second layer, and a material layer covering at least portions of first side wall portions extending from the bottom surface into a direction away from the bottom surface through at least the second layer and the active region . The array on the other hand further comprises a holding structure contacting a light emitting surface opposite the bottom surfaces of each of the optoelectronic devices .

[0071] According to some aspects the holding structure connects the light emitting surface of the optoelectronic devices to a first bond layer which surrounds the optoelectronic devices spaced from the optoelectronic devices , at least in lateral direction . The first bond layer can for example be attached to a first temporary carrier . A gap between the first bond layer and the optoelectronic devices can in particular be defined by a first sacrificial layer having been removed .

[0072] According to some aspects the holding structure comprises a second temporary carrier and a second bond layer , wherein the second bond layer is connected to the light emitting surface of the optoelectronic devices . The second temporary carrier can thereby in particular act as a temporary carrier for transferring the optoelectronic devices to a target substrate by means of for example a subsequent LI FT process . In particular the optoelectronic devices can be connected to the holding structure being free on a side opposite the holding structure . By means of for example a LIFT process the optoelectronic devices can then be directly transferred to a target substrate without the need of rebonding the optoelectronic devices to a further temporary carrier .

[0073] According to some aspects the holding structure comprises an intermediate layer arranged between the second temporary carrier and the second bond layer, wherein the intermediate layer is light absorbing for light of a first wavelength and the second bond layer being light transmissive for light of the first wavelength . By means of this a respective structure to allow a LI FT process for detaching the optoelectronic devices from the holding structure again can be provided .

[0074] According to some aspects a contact area between the light emitting surface of the optoelectronic devices and the holding structure is limited to a size of less than 20% , in particular less than 10% , or less than 5 % of the size of the light emitting surface . The size of the contact can be one of the variables defining the adhesive force between the optoelectronic devices and the holding structure .

[0075] According to some aspects , each a top surface of the semiconductor layer stack of the optoelectronic devices opposite the bottom surfaces comprises a roughening or structuring . The roughening or structuring can thereby serve to provide a roughened or structured surface enhancing the light outcoupling efficiency of the optoelectronic devices . The top surface of the first portions of the semiconductor layer stack can thereby be roughened or structured throughout its whole surface area or only in defined areas or points . For example areas of contact with the holding structures can be excluded from the structuring or roughening of the top surface in order to provide a flat surface for providing a better and easier to resolve contact with the holding structure . Further a passivation layer can be provided on the roughened or structured top surfaces , thereby forming the light emitting surfaces of the optoelectronic devices . The passivation layer can in particular sever to enhance a stability of the roughened or structured top surfaces and to thus enhance the light outcoupling efficiency of the optoelectronic devices on the long term . The passivation layer can for example contain or consist of SiCh , AI2O3 , SisN HfCh or other suitable dielectric materials .

[0076] According to some aspects , the holding structure comprises at least one post contacting the light emitting surface of several optoelectronic devices . The holding structure can in particular be provided to comprise posts being connected to one or more optoelectronic devices at a time , or can be provided to cover the light emitting surfaces of the optoelectronic devices on a large scale . The arrangement of the post ( s ) with regard to the optoelectronic devices can thereby be varied with regard to optimized manufacturing of the same and / or optimized positioned for a later removal of the optoelectronic devices .

[0077] SHORT DESCRIPTION OF THE DRAWINGS

[0078] Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings in which

[0079] Fig . 1A to ID show steps of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle ; Fig . 2A to 2 F show each a cross sectional view of embodiments of an array of optoelectronic devices in accordance with some aspects of the proposed principle ;

[0080] Fig . 3A and 3B show steps of another embodiment of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle ;

[0081] Fig . 4A to 4E show each a cross sectional view of embodiments of an array of optoelectronic devices in accordance with some aspects of the proposed principle ; and

[0082] Fig . 5A to 5 F show each a top view of embodiments of an array of optoelectronic devices in accordance with some aspects of the proposed principle .

[0083] DETAILED DESCRIPTION

[0084] The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form. It should be noted that in practice slight differences and deviations from the ideal form may occur without , however, contradicting the inventive idea .

[0085] In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged . However , terms such as "above" , "over" , "below" , "under" "larger" , "smaller" and the like are correctly represented with regard to the elements in the figures . So it is possible to deduce such relations between the elements based on the figures .

[0086] Figures 1A to ID show steps of a method for manufacturing an optoelectronic device 1 in accordance with some aspects of the proposed principle . In the embodiments shown, the manufacture of only one optoelectronic device is exemplarily shown . It is however to be understood that the exemplary illustration can be extended and that by means of the shown steps a plurality of optoelectronic devices can be manufactured in the same way .

[0087] In a first step a growth substrate is provided with a semiconductor layer stack 3 epitaxially grown on top . The semiconductor layer stack comprises a first layer 4 of a first conductivity type , a second layer 5 of a second conductivity type as well as an active region 6 between the first and second layer 4 , 5 . A structured contact layer , in particular a first portion of a first contact element 7 is deposited on a surface , in particular bottom surface 8 , of the semiconductor layer stack 3 . The first portion of the first contact element 7 can for example form a structured mas k which is suitable as a mask for a subsequent etching step but can also be deposited / grown on the semiconductor layer stack 3 after a mesa etching of the semiconductor layer stack 3 has been performed . The first portion of the first contact element 7 comprises a first contact layer 7a . The first contact layer 7a can for example be of a transparent conductive material such as a TCO . The first mesa etching step is then performed, in particular a dry etching step . The mesa etching step structures the semiconductor layer stack 3 , resulting in exposed portions of the semiconductor layer stack 3 that include a bottom surface 8 and inclined first side wall portions 9a . The etching is performed such that the etching does not go through the whole first layer 4 but stops well before reaching the growth substrate . The resulting first side wall portions 9a are thus extending from the bottom surface 8 into a direction away from the bottom surface 8 until a level between the active region 6 and the growth substrate . The exposed portions are thereby as shown in cross section in form of a trapezoid arranged on a residue of the first layer 4 . A first portion of a material layer 10 is then provided on the mesa etched structure following the shape of the mesa etched structure . The first portion of the material layer 10 can be provided such that it covers at least the first side wall portions 9a . In the embodiment shown, the first portion of the material layer 10 covers the first side wall portions 9a, as well as a portion of the surface of the first contact layer 7a . The first portion of the material layer 10 or at least a portion of the first portion of the material layer 10 can for example result from a Quantum well intermixing, and / or the exposed first side wall portions 9a and other exposed surfaces can be regrown with a semiconductor material , SiO2 , AI2O3 and any other suitable material . In the embodiment shown, the first portion of the material layer 10 is a structured regrowth layer of AI2O3 provided by means of ALD that covers the first side wall portions 9a , as well as a portion of the surface of the first contact layer 7a .

[0088] In a further step , a second mesa etching step is performed . The mesa etching step structures the remaining semiconductor layer stack 3 , resulting in exposed portions of the semiconductor layer stack 3 that include inclined second side wall portions 9b . The etching is performed such that the etching does not go through the whole first layer 4 but stops before reaching the underlying growth substrate . In particular the second etching steps for generating the second side wall portions 9b is a wet etching step and / or dry etching step . The resulting second side wall portions 9b are extending from the level , at which the first etching step stopped into a direction away from the bottom surface 8 . The exposed portions are thereby as shown in cross section in form of a trapezoid with a further trapezoid arranged on top .

[0089] In a following step , a first portion of a second contact element 16 , in particular a second contact layer 16a is provided on the mesa etched structure following the shape of the mesa etched structure . The second contact layer 16a can be provided such that it covers at least the second side wall portions 9b and electrically contacts the first layer 4 . In the embodiment shown, the second contact layer 16a covers the second wall portions 9b, portions of the second layer 4 , as well as a portion of the material layer 10 . In the embodiment shown, the second contact layer 16a is a structured metal layer that covers the second wall portions 9b , portions of the first layer 4 , as well as a portion of the material layer 10 . The first portion of the second contact element 16 can however also be a combination of a second contact layer 16a of for example TCO in combination with a second reflective layer covering the second contact layer 16a .

[0090] Then a second portion of the material layer 10 is provided on the first portion of the second contact element 16 . The second portion of the material layer 10 is provided such that it covers at least a portion of the second contact layer 16a being in contact with the first portion of the material layer 10 . In the embodiment shown, the second portion of the material layer 10 covers a large portion of the second contact layer 16a except contact areas for providing first and second contact pad 7a, 16c for the first and second contact element 7 , 16 .

[0091] The second portion of the material layer 10 is also a structured regrowth layer of AL2O3 provided by means of for example ALD that covers portions of the second contact layer 16a . The second portion of the material layer 10 thereby in particular is of or at least comprises a dielectric material similar to that of the first portion of the material layer 10 .

[0092] Then second portions of the first and second contact element 7 , 16 , in particular a first and second contact pad 7 c, 16c are provided on the first and second contact layer 7a, 16a and the material layer 10 in form of a solder material . The first and second contact pad 7c , 16c can for example be of a metal and can comprise for example a solder material or solder material layer on a surface facing away from the semiconductor layer stack 3 . A solder material can for example comprise a metal layer stack consisting of AuSn, AulnSn, InSn, NiSn, NilnSn, SnAgCu .

[0093] Then a first sacrificial layer 11 is deposited on the material layer 10 as well as on the first and second contact element 16 , 7 . The first sacrificial layer 11 covers the first contact element 7 , extends onto the material layer 10 and covers the second contact element 16 . The first sacrificial layer 11 in particular covers all exposed surfaces of the optoelectronic device 1 and in particular fills up completely all gaps resulting from the mesa etching . The first sacrificial layer 11 thereby comprises for example Si or SiCh .

[0094] The deposition of the first sacrificial layer 11 can for example comprise a spinning , sputtering , or spraying of the sacrificial layer material on the exposed surface ( s ) of the optoelectronic device .

[0095] A first bond layer 14 is then provided on the first sacrificial layer 11 . In the embodiment shown, the first bond layer 14 forms an even surface opposite the semiconductor layer stack 3 . The first bond layer 14 can for example comprise an organic material , a gold alloy or can be a ( thin film) solder material or combinations thereof . The composition of the first bond layer 14 is however different form the first sacrificial layer 11 and selected such that an etchant used for removing the first sacrificial layer 11 does not or not substantially affect the first bond layer 14 , the first and second contact element 16 , 7 , the material layer 10 and any other exposed surface ( s ) of the semiconductor layer stack 3 . The first bond layer 14 can for example be provided by means of a spin-on process or sputtering the material of the first bond layer 14 onto the first sacrificial layer 11 .

[0096] A planarization of the first bond layer 14 can comprise a mechanical planarization such as for example grinding and / or polishing, a chemical planarization using for example an etchant , a chemical mechanical polishing ( CMP ) , or by melting and / or pressing molten or low viscous sacrificial layer material on the surface the exposed surface ( s ) . In case of molten / liquid first bond layer material being deposited on the first sacrificial layer, a step of planarization can however be dispensed with in such that the planarization can take place over time by itself as the molten first bond layer material levels itself over time .

[0097] A first temporary carrier 15 is then attached to the first bond layer 14 , for example by means of bonding . After the attachment of the first temporary carrier 15 , the growth substrate as well as a potential buffer layer can be removed to expose a back side of the semiconductor layer stack 3 , in particular the first layer 4 . The semiconductor layer stack 3 , in particular the first layer 4 can, if necessary be thinned to remove a connected residue of the first layer 4 . By means of this , the semiconductor layer stack portions later forming an optoelectronic device 1 can be singulated and access to the first sacrificial layer

[0098] 11 is provided . The growth substrate removal and / or thinning can for example comprise LLO , grinding, dry etching , wet etching , CMP , or combinations thereof . After the step of thinning , portions of the semiconductor layer stack 3 are separated each exposing a top surface

[0099] 12 of the semiconductor layer stack portions . The resulting structure is shown in Figure 1A . In the embodiment shown in Figure 1A the top surface 12 equals to a light emitting surface 17 of the separated optoelectronic device 1 .

[0100] As shown in Figure IB , a holding structure 18 is then provided on the light emitting surface 17 . Therefore , a structured second sacrificial layer 24 is provided on the light emitting surface 17 exposing a contact area 20 between the light emitting surface 17 and the holding structure 18 . The holding structure 18 is then provided on the second sacrificial layer 24 contacting the light emitting surface 17 . The holding structure 18 comprises a second bond layer 22 being in contact with the light emitting surface 17 as well as a second temporary carrier 19 provided on the second bond layer 22 .

[0101] The first temporary carrier 15 , the first bond layer 14 and the first and second sacrificial layer 11 , 24 can then be removed by for example means of dissolving the first and second sacrificial layer 11 , 24 , as shown in Figures 1C and ID resulting in the array 2 with an optoelectronic device 1 being connected to only the holding structure 18 but being free of any other holding material . The removal of the sacrificial layers 11 , 24 can for example be done by one of dryetching , wet-etching or plasma-etching . The selected removal process thereby depends on the combination of the material of the material layer 10 , the first and second contact element 7 , 16 as well as the material of the first and second bond layer 14 , 22 . The optoelectronic device 1 is then held by the holding structure 18 , defining a specific adhesion force at the interface between the holding structure 18 and the light emitting surface 17 . This will allow an easy subsequent transfer process onto a target substrate . In particular , the optoelectronic device 1 can then directly be transferred to for example a target substrate by for example a LIFT process and further step of rebonding the optoelectronic device to a further temporary carrier can be dispensed with . The number of transfer steps can thus be drastically reduced compared to known methods .

[0102] The first temporary carrier 15 , the first bond layer 14 and the first and second sacrificial layer 11 , 24 can however also be removed in a different order by for example removing the first temporary carrier 15 first , then removing the first bond layer 14 before removing the first and second sacrificial layer 11 , 24 . Therefore for example a further intermediate layer can be arranged between the first temporary carrier 15 and the first bond layer 14 , which allows an easy removal of the first temporary carrier 15 . the first bond layer 14 and the first and second sacrificial layer 11 , 24 can then be removed by means of for example etching , melting or dissolving .

[0103] Figures 2A to 2 F show each a cross sectional view of embodiments of an array 2 of optoelectronic devices 1 in accordance with some further aspects of the proposed principle .

[0104] As shown in Figure 2A, the top surface 12 of the semiconductor layer stack 3 may comprise a roughening 13 to enhance the light outcoupling efficiency of the optoelectronic device 1 . The roughening 13 in this case forms the light emitting surface 17 on which the holding structure 18 is arranged . The roughening 13 may however also be covered by means of a passivation layer 21 , as shown in Figure 2B, wherein in this case the passivation layer 21 forms the light emitting surface 17 on which the holding structure 18 is arranged . By means of the passivation layer 21 the top surface 12 of the semiconductor layer stack 3 can be passivated to protect the top surface 12 against for example aging or against external influences . Figure 2C shows an embodiment in which the contact area 20 between the light emitting surface 17 and the holding structure 18 is not centred with regard to the optoelectronic device 1 but in an edge region of the light emitting surface 17 In addition, the contact area 20 is arranged in an area of the top surface 12 being not roughened but in an area of the top surface being substantially planar . By this a better and easier to resolve contact between the light emitting surface 17 and the holding structure 18 can be provided . In addition, the contact area can by this be moved out of a main area of light emission to not or at least less influence the emission characteristics of the optoelectronic device 1 .

[0105] The roughening 13 can as shown in Figure 2D be of different types . For example , the roughening can be in form of an irregular roughening of the top surface 12 but can also be in form of a regular structuring of the top surface 12 to influence the emission properties of the optoelectronic device 1 in a desired way .

[0106] Compared to the embodiments shown, the holding structure 18 can also be provided on the light emitting surface 17 in a large scale manner contacting substantially the whole light emitting surface 17 as shown in Figure 2E . In this case the holding structure 18 may comprise a further intermediate layer 23 arranged between the second bond layer 22 and the second temporary carrier layer 19 that is for example absorbing for light in the UV-range . By this a release of the optoelectronic device 1 from the holding structure 18 can be achieved by irradiating the holding structure 18 with UV-light resulting in a heating up of the intermediate layer 23 and subsequently in a release of the second bond layer 22 . Thus , the second bond layer 22 in this case can remain on the optoelectronic device 1 as for example a passivation of the light emitting surface 17 .

[0107] As shown in Figure 2 F, the optoelectronic device 1 can, compared to the embodiments shown, be of the configuration of a vertically contactable optoelectronic device 1 . The light emitting surface 17 can in this case be formed by the second contact element 16 in form of for example a contact layer of a TCO material . Figure 3A and 3B show steps of another embodiment of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle . In the embodiment shown, the holding structure 18 is provided to connect the light emitting surface 17 with the first bond layer 14 . The resulting array 2 thus provides a different holding structure 18 compared to known methods and the optoelectronic device 1 can be picked from the array 2 by for example by means of a stamp to be further processed or transferred .

[0108] Figure 3A shows a step of providing the holding structure 18 across a transition area between the light emitting surface 17 and the first bond layer 14 . After removal of the first sacrificial layer 11 , as shown in Figure 3B, the optoelectronic device 1 is then held by the holding structure 18 and ready to be picked up by for example a stamp . When picking up the optoelectronic device 1 the holding structure can for example be broken to release the optoelectronic device 1 , or the holding structure can be feared off the first bond layer 14 . However, a picked up optoelectronic device 1 may be characterised in a residue of the holding structure on the light emitting surface 17 .

[0109] Figures 4A to 4E show each a cross sectional view of embodiments of an array 2 of optoelectronic devices 1 in accordance with some aspects of the proposed principle . The embodiments show variations of the embodiment shown in Figure 3B comparable to those ones already described with regard to Figures 2A to 2E . In particular the top surface 12 can comprise a roughening 13 forming the light emitting surface 17 , as shown in Figure 4A, a passivation layer 21 can be arranged on the top surface 12 forming the light emitting surface 17 as shown in Figure 4B, the roughening can be limited to certain areas of the top surface 12 providing an even contact area 20 between the light emitting surface 17 and the holding structure 18 as shown in Figure 4C, the roughening 12 can be varied in terms of its pattern, depth and regularity as shown in Figure 4D, and the optoelectronic device 1 can be formed as a vertically contactable optoelectronic device 1 as shown in Figure 4E .

[0110] Figures 5A to 5 F show each a top view of embodiments of an array 2 of optoelectronic devices 1 in accordance with some aspects of the proposed principle . The embodiments show in top view a possible arrangement of connecting posts of the holding structure 18 compared to the position of several optoelectronic devices 1 . As shown in Figure 5A for example a round post of the holding structure 18 can be provided connecting the light emitting surfaces 17 of four adj acent optoelectronic devices 1 with the first bond layer 14 . The number four as well as a round shape of the post is however to be understood as exemplary and depending on the shape and arrangement of the optoelectronic devices 1 more or less optoelectronic devices 1 can be hold at a time by a differently shaped post of the holding structure 18 as well . For example Figure 5B shows an embodiment of stripe shaped posts each connecting the light emitting surfaces 17 of two adj acent optoelectronic devices 1 with the first bond layer 14 , whereas Figure 5C shows an embodiment of stripe shaped posts each connecting the light emitting surfaces 17 of each one optoelectronic device 1 with the first bond layer 14 .

[0111] Figures 5D to 5 F each show larger dimensioned posts connecting the light emitting surfaces 17 of each optoelectronic devices 1 with the first bond layer 14 . As shown in Figure 5D for example , all light emitting surfaces 17 of optoelectronic devices 1 of two adj acent rows can be connected by means of a post of the holding structure 18 with the first bond layer 14 . This results in the optoelectronic devices 1 being hold by the holding structure 18 along a whole edge of the light emitting surface 17 . As shown in Figure 5E and 5 F on the other hand the holding structure 18 is connected to the optoelectronic devices 1 along two or all edges of the light emitting surface 17 .

[0112] LIST OF REFERENCES optoelectronic device array semiconductor layer stack first layer second layer active region contact element a contact layer b reflective layer c contact pad bottom surface a , 9b side wall portion 0 material layer 1 sacrificial layer 2 top surface 3 roughening 4 bond layer 5 temporary carrier 6 contact element 6a contact layer 6b reflective layer 6c contact pad 7 light emitting surface8 holding structure 9 temporary carrier 0 contact area 1 passivation layer 2 bond layer 3 intermediate layer 4 sacrificial layer

Claims

CLAIMS1. Method for manufacturing a plurality of optoelectronic devices (1) comprising the steps :Providing a semiconductor layer stack (3) of at least a first layer (4) of a first conductivity type, a second layer (5) of a second conductivity type as well as an active region (6) between the first and second layer (4, 5) , on a growth substrate;Structuring the semiconductor layer stack (3) to remain first portions of the semiconductor layer stack (3) and to remove at least one adjacent second portion of the semiconductor layer stack (3) , the first portions each comprising a bottom surface (8) and first side wall portions (9a) extending from the bottom surface (8) into the direction of the growth substrate through at least the second layer (5) and the active region (6) ;Providing a first contact elements (7) on each of the bottom surfaces (8) electrically contacting the second layer (5) ;Providing a material layer (10) covering at least portions of the first side wall portions (9a) and in particular covering at least portions of the first contact elements (7) ;Providing a first sacrificial layer (11) at least partially covering the first contact elements (7) and the material layer (10) ;Providing a first bond layer (14) covering the first sacrificial layer (11) ;Attaching a first temporary carrier (15) to the first bond layer ( 14 ) ;Backside processing the semiconductor layer stack (3) opposite the bottom surfaces (8) such that a plurality of separated optoelectronic devices (1) with each a light emitting surface (17) opposite the bottom surface (8) is formed;Providing a holding structure (18) contacting the light emitting surfaces (17) of the optoelectronic devices (1) ; andRemoving the first sacrificial layer (11) such that the optoelectronic devices (1) are substantially only connected to the holding structure (18) .

2. The method according to claim 1, further comprising a step of structuring the semiconductor layer stack (3) such that the first portions comprise second side wall portions (9b) different from the first side wall portions (9a) extending from a level between the active region (6) and the growth substrate into the direction of the growth substrate through at least portions of the first layer ( 4 ) .

3. The method according to claim 1 or 2 , further comprising a step of providing second contact elements (16) on the material layer (10) and in particular on the second side wall portions (9b) electrically contacting the first layer (4) of each of the first portions .

4. The method according to claim 3, wherein the step of providing the second contact elements (16) comprises: providing a second contact layer (16a) on the material layer (10) and / or the second side wall portions (9b) , the second contact layer (16a) electrically contacting the first layer (4) ; and / or providing a second reflective layer (16b) on the second contact layer (16a) and / or the material layer (10) ; and / or providing a second contact pad (16c) on the second contact layer (16a) , the second reflective layer (16b) and / or the material layer (10) , the second contact pad (16c) electrically contacting the second contact layer (16a) and / or the first layer (4) .

5. The method according to any one of claims 1 to 4, wherein the step of providing the first contact elements (7) comprises: providing a first contact layer (7a) on the bottom surface ( 8 ) ; and / or providing a first reflective layer (7b) on the first contact layer (7a) or the bottom surface (8) ; and / or providing a first contact pad (7c) on the first contact layer (7a) , on the first reflective layer (7b) or on the bottom surface (8) .

6. The method according to any one of claims 1 to 5, wherein the step of backside processing the semiconductor layer stack (3) comprises at least one of: removing the growth substrate; and chemical and / or mechanical polishing the semiconductor layer stack ( 3 ) ; in particular thereby exposing portions of the first sacrificial layer ( 11 ) .

7. The method according to any one of claims 1 to 6, further comprising a step of roughening or structuring a top surface (12) of the first portions opposite the bottom surfaces (8) and in particular a step of providing a passivation layer (21) on the roughened or structured top surfaces (12) , thereby forming the light emitting surfaces (17) of the optoelectronic devices (1) .

8. The method according to any one of claims 1 to 7 , wherein the holding structure (18) connects the light emitting surfaces (17) to the first bond layer (14) .

9. The method according to claim 8, further comprising a step of lifting off the optoelectronic devices (1) connected to the first bond layer (14) , in particular by breaking the holding structure (18) .

10. The method according to any one of claims 1 to 7 , wherein the holding structure (18) comprises a second temporary carrier (19) and a second bond layer (22) , the second bond layer (22) being connected to the light emitting surfaces (17) of the optoelectronic devices ( 1 ) .

11. The method according to claim 10, further comprising a step of providing a second sacrificial layer (24) at least partially covering the light emitting surfaces (17) exposing a contact area (20) between the light emitting surfaces (17) and the holding structure ( 18 ) .

12. The method according to claim 11, wherein the holding structure (18) comprises an intermediate layer (23) arranged between the second temporary carrier (19) and the second bond layer (22) , the intermediate layer (23) being light absorbing for light of a first wavelength and the second bond layer (22) being light transmissive for light of the first wavelength.

13. The method according to any one of claims 1 to 12, wherein the step of removing the first and / or second sacrificial layer (11, 24) comprises one of dry-etching, wet-etching, plasma-etching or dissolving in a solvent.

14. Array (2) of optoelectronic devices (1) , in particular processed by a method according to any one of claims 1 to 13, the array comprising : a plurality of optoelectronic devices (1) each comprising a semiconductor layer stack (3) of at least a first layer (4) of a first conductivity type, a second layer (5) of a second conductivity type as well as an active region (6) between the first and second layer (4, 5) , a first contact element (7) arranged on a bottom surface (8) of the semiconductor layer stack (3) electrically contacting the second layer (5) , and a material layer (10) covering at least portions of first side wall portions (9a) extending from the bottom surface (8) into a direction away from the bottom surface (8) through at least the second layer (5) and the active region ( 6 ) ; and a holding structure (18) contacting a light emitting surface(17) opposite the bottom surfaces (8) of each of the optoelectronic devices ( 1 ) .

15. The array according to claim 14, wherein the holding structure(18) connects the light emitting surface (17) of the optoelectronic devices (1) to a first bond layer (14) which surrounds the optoelectronic devices (1) spaced from the optoelectronic devices (1) , at least in lateral direction, and wherein in particular thefirst bond layer (14) is attached to a first temporary carrier(15) .

16. The array according to claim 14, wherein the holding structure (18) comprises a second temporary carrier (19) and a second bond layer (22) , the second bond layer () being connected to the light emitting surface (17) of the optoelectronic devices (1) .

17. The array according to claim 16, wherein the holding structure (18) comprises an intermediate layer (23) arranged between the second temporary carrier (19) and the second bond layer (22) , the intermediate layer (23) being light absorbing for light of a first wavelength and the second bond layer (22) being light transmissive for light of the first wavelength.

18. The array according to any one of claims 14 to 17, wherein a contact area (20) between the light emitting surface (17) of the optoelectronic devices (1) and the holding structure (18) is limited to a size of less than 10% of the size of the light emitting surface ( 17 ) .

19. The array according to any one of claims 14 to 18, wherein each a top surface (12) of the semiconductor layer stack (3) of the optoelectronic device (1) opposite the bottom surfaces (8) comprises a roughening or structuring (13) , and wherein in particular a passivation layer (21) is arranged on the roughened or structured top surface (12) , thereby forming the light emitting surfaces (17) of the optoelectronic devices (1) .

20. The array according to any one of claims 14 to 19, wherein the holding structure (18) comprises at least one post contacting the light emitting surface (17) of several optoelectronic devices (1) .

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