OLED manufacturing device and OLED manufacturing method using same

Abstract

The present invention relates to an OLED manufacturing device and an OLED manufacturing method using same. The OLED manufacturing device is characterized by comprising: a vacuum chamber in which a deposition substrate is provided; an FMM attached to the deposition substrate and having a plurality of pattern holes formed therein; and an organic material deposition container for supplying an organic substance to the deposition substrate through the pattern holes of the FMM to deposit pixels on the deposition substrate.

Description

Apparatus for manufacturing OLED and method for manufacturing OLED using the same TECHNICAL FIELD

[0001] The present application relates to an apparatus for manufacturing an organic light-emitting diode (OLED) and a method for manufacturing an OLED using the same, and more particularly to an apparatus for manufacturing an OLED capable of manufacturing a mask of invar material in a plating manner on a silicon wafer, using the silicon wafer as a frame of the mask, reducing thickness deviation, omitting a process of welding the mask and an additional frame or a stretching process of the mask, thereby simplifying a manufacturing process and reducing manufacturing costs, and a method for manufacturing an OLED using the same. BACKGROUND

[0002] In the current manufacturing of an OLED panel, a fine metal mask (hereinafter referred to as FMM) as a necessary component plays a role of a mask in RGB deposition. The FMM is in the form of a thin iron plate formed of invar raw material, and in order to be used inside a depositor, needs to be combined with a strong frame. For this, a method of combining the mask and the frame in a physical stretching and laser welding manner has been used in the past.

[0003] That is, the conventional stretching and welding method is a method of stretching the FMM using a stretcher or the like and welding using a laser, and a large-area mask has a problem of alignment deviation. Also, the mask is large in area and thin in thickness, and thus the mask is sagged or twisted due to physical stretching force and load, and there is a problem that pixel positioning accuracy (PPA) is deviated.

[0004] In the manufacturing process of an ultra-high-definition OLED, a slight alignment error of several μm can also cause pixel deposition failure, and thus there is a need to develop a technology capable of preventing deformation such as sagging or bending of the mask and accurately aligning.

[0005] On the other hand, a micro display for an augmented reality (AR) device or a virtual reality (VR) device has recently attracted attention.

[0006] A micro display needs to have a smaller screen size than existing displays and implement high definition in a smaller screen in order to directly display an image in front of a user's eyes in an AR / VR device. Accordingly, compared to a mask used in an existing super-high definition OLED manufacturing process, a pattern hole size and a pitch are reduced, and thus a more minute alignment of the mask is urgently required before a pixel deposition process.

[0007] SUMMARY

[0008] The present application has been made to solve the problems as described above, and aims to provide an OLED manufacturing apparatus and an OLED manufacturing method using the same, which forms a mask of a constantan material in an electroplating manner on a silicon wafer, uses the silicon wafer as a frame of the mask, and can manufacture the mask in a thin thickness while reducing a thickness deviation compared to a calendering method of a constantan sheet, and can omit a process of welding the mask and an additional frame or a stretching process of the mask, thereby simplifying a manufacturing process and reducing manufacturing costs.

[0009] According to the present application, there is provided an OLED manufacturing apparatus, characterized by comprising: a vacuum chamber in which a deposition substrate is disposed; an FMM attached to the deposition substrate to form a plurality of pattern holes; and an organic deposition vessel to supply an organic material to the deposition substrate through the pattern holes of the FMM to deposit a pixel on the deposition substrate.

[0010] Preferably, the present application is characterized in that the FMM comprises: a silicon substrate; a protective film deposited on upper and lower surfaces of the silicon substrate; a conductive layer deposited on an upper surface of the silicon substrate on which the protective film is deposited; a constantan plating layer deposited on the conductive layer deposited on the upper surface, in which a central region of the lower surface of the silicon substrate is removed in a surface shape to form an open portion, and a peripheral region of the silicon substrate, which is not removed, forms a support portion, a plurality of pattern holes are formed by clustering in a through shape at a central portion of the open portion, and a plurality of dummy holes are formed by clustering in a through shape from an outermost portion of the pattern holes clustered in a surrounding shape to a region of the support portion.

[0011] Preferably, the present application is characterized in that an inner side of the support portion of the silicon substrate is formed in a tapered shape.

[0012] Preferably, the present application is characterized in that an alignment hole is formed in the support portion of the silicon substrate, and the alignment hole penetrates the protective film, the conductive layer, and the constantan plating layer including the support portion in an up-and-down direction.

[0013] Preferably, the present application is characterized in that the silicon substrate is a silicon wafer or a quartz wafer formed in a thickness of 50 to 700 μm.

[0014] Preferably, the protective film is a SiNx inorganic film deposited in a thickness of 10 to 50 μm.

[0015] Preferably, the above-mentioned conductive layer is formed of TiN or Ti-Cu, and is deposited to a thickness of 100 to 400 μm.

[0016] Preferably, the above-mentioned Invar plating layer is formed of Invar (Ni-Fe) or super Invar (Ni-Fe-Co) having a coefficient of thermal expansion (CTE) of 3 PPM / °C or less, and is electroplated to a thickness of 2 to 5 μm.

[0017] Preferably, the above-mentioned pattern holes have a diameter of 3 μm or less, and are formed to a pitch of 8 μm or less.

[0018] Preferably, the above-mentioned dummy holes are formed in an elliptical shape having a long axis and a short axis, and the individual dummy holes are arranged so as to be spaced apart from the adjacent dummy holes in the long axis direction, a plurality of dummy hole rows are arranged in the radial direction of the silicon substrate, and the spaced apart dummy hole rows are arranged so that the long axes of the adjacent individual dummy holes are staggered in the radial direction.

[0019] Preferably, the Invar plating layer formed on the above-mentioned conductive layer is subjected to heat treatment before the back etching process.

[0020] On the other hand, according to another aspect of the present application, there is provided an OLED manufacturing method using the OLED manufacturing apparatus according to any one of the above-mentioned features, characterized by comprising: a step (a) of aligning and attaching the FMM to the deposition substrate through the alignment holes; a step (b) of disposing the deposition substrate to which the FMM is attached in the vacuum chamber; and a step (c) of supplying an organic material to the deposition substrate through the pattern holes of the FMM, and depositing a pixel on the deposition substrate.

[0021] According to the present application, the following effects can be obtained. An Invar mask is formed on a silicon wafer by electroplating, and the silicon wafer is used as a frame of the mask, so that the mask can be manufactured to have a thin thickness and a reduced thickness deviation, compared to a drawing method of an Invar sheet.

[0022] Further, the following effects can be obtained. The process of welding the mask and an additional frame or the drawing process of the mask can be omitted, so that the manufacturing process can be simplified and the manufacturing cost can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0023] FIG. 1 is a diagram for explaining a manufacturing method of an OLED using an FMM according to the related art.

[0024] FIGS. 2 and 3 are diagrams for explaining a manufacturing method of an FMM according to the related art.

[0025] FIG. 4 is a diagram for explaining a manufacturing method of an FMM according to a first embodiment of the present application.

[0026] FIG. 5 is a diagram for explaining a manufacturing method of an FMM according to a second embodiment of the present application.

[0027] FIG. 6 is a diagram for explaining a virtual hole structure of an FMM according to an embodiment of the present application.

[0028] FIG. 7 is a diagram for explaining an outer shape structure of an FMM according to an embodiment of the present application.

[0029] FIGS. 8 and 9 are diagrams for explaining actual hole structures of FMMs manufactured according to an embodiment of the present application.

[0030] FIG. 10 is a diagram for explaining a manufacturing apparatus of an OLED using an FMM manufactured according to an embodiment of the present application and a manufacturing method of the OLED.

[0031] Explanation of Reference Numerals 300: FMM 310: Silicon substrate 320: Protective film 330: Conductive layer 340: Invar plating layer 350: Alignment hole 360: Virtual hole 370: Pattern hole 380: Light pattern layer 200: Deposition substrate 400: Organic deposition vessel 500: Vacuum chamber DETAILED DESCRIPTION

[0032] The present application can be variously changed and can have a plurality of embodiments, and a specific embodiment is exemplified in the drawings and described in detail in the specific description. However, it should be understood that the present application is not limited to the specific embodiments, but includes all changes, equivalent technical solutions, and even alternative technical solutions contained in the idea and technical scope of the present application. In the process of explaining each drawing, similar reference numerals are used for similar structural elements.

[0033] The terms of first, second, A, B, etc. can be used to explain various structural elements, but the above structural elements are not limited to the above terms. The above terms are used only for the purpose of distinguishing one structural element from another structural element. For example, the first structural element can be named as the second structural element without departing from the scope of the present application, and similarly, the second structural element can be named as the first structural element. And / or this term includes a combination of a plurality of related items or any one of a plurality of related items.

[0034] When it is referred to that one structural element is "connected" or "coupled" with another structural element, it should be understood that it can be directly connected or coupled with the other structural element, but other structural elements can be interposed. In contrast, when it is referred to that one structural element is "directly connected" or "directly coupled" with another structural element, it should be understood that no other structural element is interposed.

[0035] The terms used in the present application are used only to describe particular embodiments, and are not intended to limit the present application. The singular expression includes the plural expression unless it is clearly different in context. In the present application, it should be understood that the terms "include" or "have" or the like are used to designate the presence of characteristics, numbers, steps, actions, structural elements, components or combinations thereof described in the specification, and do not preclude the presence or possibility of addition of one or more other characteristics, numbers, steps, actions, structural elements, components or combinations thereof.

[0036] Unless differently defined, all terms used herein including technical terms or scientific terms have the same meaning as that generally understood by those skilled in the art to which the present application pertains. The terms as generally used in dictionaries should be interpreted as having the same meaning as that having the context of the relevant technology, and should not be interpreted as ideal or overly formal meanings unless clearly defined in the present application.

[0037] Hereinafter, preferred embodiments according to the present application will be described in detail with reference to the accompanying drawings.

[0038] FIG. 1 is a diagram for explaining a manufacturing method of an OLED using an FMM according to the prior art.

[0039] Hereinafter, in each of the drawings related to the prior art and the embodiments of the present application, the size or thickness of a structural element is exaggerated (or thickened) or reduced (or thinned) for convenience of understanding or the like, or is simply represented, but should not be construed as limiting the scope of protection of the present application thereto.

[0040] Referring to FIG. 1, an OLED manufacturing apparatus implementing a manufacturing method of an OLED using an FMM according to the prior art includes a magnet plate 10 housing a magnet 11 and a cooling water line 12, and a deposition source supply part 40 supplying an organic material source 41 from a lower portion of the magnet plate 10.

[0041] An object substrate 20 of glass or the like on which the organic material source 41 is deposited can be interposed between the magnet plate 10 and the deposition source supply part 40. An FMM 30 that deposits the organic material source 41 by different pixels can be disposed in close contact or in close proximity to the object substrate 20. The magnet 11 generates a magnetic field, and the FMM 30 can be brought into close contact with the object substrate 20 by an attractive force caused by the magnetic field.

[0042] The FMM 30 described above needs to be aligned before being attached to the object substrate 20. One or more masks can be combined with the frame 35. The frame 35 is fixedly installed in an OLED manufacturing device, and the mask can be combined with the frame 35 through an additional attachment, welding process.

[0043] The deposition source supply part 40 can supply the organic material source 41 to the left and right paths reciprocally, and the organic material source 41 supplied in the deposition source supply part 40 can be deposited on one side of the object substrate 20 through the pattern hole 32 formed in the FMM 30. The organic material source 41 deposited through the pattern of the FMM 30 can function as the pixel 21 of the OLED.

[0044] In order to prevent non-uniform deposition of the pixel 21 due to the shadow effect, the pattern hole 32 of the FMM 30 can be formed in a slanting manner (or in a tapered manner (S)). The organic material source 4 passing through the pattern hole 32 in the diagonal direction along the slanting surface can also form the pixel 21, and thus the overall thickness of the pixel 21 can be uniformly deposited.

[0045] The FMM 30 in FIG. 1 can perform a pixel deposition process on a large area object substrate 20.

[0046] A manufacturing method of such an FMM 30 is explained as follows.

[0047] FIGS. 2 and 3 are diagrams for explaining a manufacturing method of an FMM according to the related art.

[0048] First, as shown in (a) of FIG. 2, a relatively thin INVAR substrate 30a prepared in a calendering manner is prepared.

[0049] The INVAR substrate 30a described above is formed of an alloy having a small coefficient of thermal expansion by adding nickel (Ni) to iron (Fe) at a predetermined ratio.

[0050] The thickness of the initially calendered INVAR substrate 30a can be about 25 μm. In order to manufacture an FMM for AR / VR OLED manufacturing, an INVAR substrate 30a having a thickness of about 5 μm is required, but there is a limitation in using the calendering method.

[0051] Therefore, as shown in (b) of FIG. 2, the surface of the INVAR substrate 30a is manufactured in a thinner sheet form through half etching. At this time, the thickness of the INVAR substrate 30a subjected to the half etching can be about 5 μm.

[0052] At this time, the target thickness of the INVAR substrate can be achieved through the half etching, but according to the characteristics of the etching process, a serious thickness deviation occurs, and the thickness has a spread of 5 μm ± 3 μm in total.

[0053] Further, as shown in (c) of FIG. 2, the Invar alloy substrate 30a in the thin plate form is processed by punching the minute pattern holes 32.

[0054] In order to manufacture the FMM of 3000 PPI, the pattern holes 32 of 3 μm in diameter are processed with a pitch of 8 μm by laser or etching. In this process, the thickness deviation of the Invar alloy substrate 30a needs to be ± 3 μm or less, but as described above, the thickness deviation of the Invar alloy substrate 30a adjusted by the rolling and the semi-etching is large, and it is difficult to uniformly manufacture the pattern holes 32.

[0055] After that, as shown in (d) of FIG. 2, the Invar alloy substrate 30a in the thin plate form in which the pattern holes 32 are formed is stretched, and is welded to the frame 35 to manufacture the FMM 30.

[0056] The above-described stretching process is used to adjust the distance (PPA) between the accurate pattern holes 32, and after the Invar alloy substrate 30a in which the pattern holes 32 are formed as shown in (a) of FIG. 3 and the frame 35 are combined as shown in (b) of FIG. 3, the Invar alloy substrate 30a is welded to the frame 35 in a state in which the Invar alloy substrate 30a is pulled in four directions by laser. At this time, the pitch is measured in real time in such a manner that the deviation of the distance between the pattern holes 32 becomes ± 3 μm or less, and the welding is performed. After that, as shown in (c) of FIG. 3, the side portions of the Invar alloy substrate 30a are cut to complete the FMM 30 product.

[0057] As shown in (e) of FIG. 2, in a state in which the thus manufactured FMM 30 is closely attached to the object substrate 20, the organic material source 41 is supplied in the deposition source supply portion 40, and the organic material source 41 can be deposited on one side of the object substrate 20 through the pattern holes 32 formed in the FMM 30. The organic material source 41 deposited through the pattern of the FMM 30 can function as the pixel 21 of the OLED.

[0058] The manufacturing method of the FMM according to the related art has the following problems.

[0059] 1) The thin plate is formed by the rolling and the semi-etching, and thus it is difficult to thin the Invar alloy substrate 30a to a level that can be used for manufacturing the AR / VR OLED. Even if the thin plate is formed, the thickness deviation is generated overall, and thus the product reliability is reduced.

[0060] 2) In order to combine the Invar alloy substrate 30a and the frame 35, a precise physical stretching process is required, and thus the productization process is very difficult. The Invar alloy substrate 30a for manufacturing the AR / VR OLED is very thin, and thus it is difficult to precisely distribute the stretching force, and many PPA errors are generated, and the yield is reduced.

[0061] 3) Since the dissimilar inconel substrate 30a and the frame 35 are combined by laser welding, the bonding force of the combined portion is reduced, and the durability is reduced when the FMM is repeatedly used.

[0062] 4) Since the inconel substrate 30a is very thin, a sagging phenomenon or a deformation phenomenon occurs on the frame 35, thereby causing a reduction in the positional accuracy of the pattern hole 32, and finally, there is a problem of a reduction in the deposition accuracy.

[0063] The manufacturing method of the FMM according to the embodiment of the present application, which is described below, is characterized in that an inconel mask is formed on a silicon wafer in an electroplating manner, and the silicon wafer is used as a frame of the mask, and compared to a calendering method of inconel sheets, the mask can be manufactured in a thin thickness while reducing the thickness deviation, the process of welding the mask and an additional frame or the stretching process of the mask can be omitted, the manufacturing process can be simplified, and the manufacturing cost can be reduced.

[0064] FIG. 4 is a view for explaining the manufacturing method of the FMM according to the first embodiment of the present application.

[0065] First, as shown in (a) of FIG. 4, a silicon substrate 310 is prepared.

[0066] The silicon substrate 310 can use a silicon wafer (Si) or a quartz wafer (SiO2), and can be used without being limited to the above examples as long as the material has a thermal expansion coefficient (CTE) of 3 PPM / °C or less.

[0067] The silicon substrate 310 can be formed in a thickness of 50 to 700 μm.

[0068] Also, as shown in (b) of FIG. 4, a protective film 320 is deposited on both upper and lower surfaces of the silicon substrate 310.

[0069] The protective film 320 can be a SiNx inorganic film having high blocking properties and excellent adhesion. The SiNx inorganic film is coated on the outer surface of the silicon substrate 310 to prevent the silicon substrate 310 from reacting with an electroplating solution in a later-described electroplating process.

[0070] The SiNx inorganic film can be deposited using a vacuum sputter, and can be deposited in a thickness of about 10 to 50 nm, and preferably, about 30 nm.

[0071] After that, as shown in (c) of FIG. 4, a conductive layer 330 is deposited on the upper surface of the silicon substrate 310 on which the protective film 320 is deposited on both upper and lower surfaces.

[0072] Basically, since the silicon substrate 310 is an insulator, it must be subjected to a conductive treatment in order to be electroplated. Also, for electroplating of the Invar alloy (Ni-Fe) or the super Invar alloy (Ni-Fe-Co) to be described later, there is a characteristic that the resistance is high during electroplating and the conductivity of the conductor needs to be low.

[0073] In the embodiment of the present application, in order to electroplate the silicon substrate 310, a conductive layer 330 is deposited to impart conductivity. The conductive layer 330 described above can be formed of TiN or Ti-Cu, and can be used without being limited to the above examples as long as it is a material that can impart conductivity to the silicon substrate 310.

[0074] When the conductive layer 330 is formed of TiN, the TiN layer can be deposited using a vacuum sputter, and can be deposited to a thickness of about 100 to 400 nm, and preferably about 200 nm.

[0075] When the conductive layer 330 is formed of Ti-Cu, a Ti layer is first deposited (to ensure adhesion of silicon-Cu) and then a Cu layer is secondarily deposited (to ensure low conductivity). The Ti layer and the Cu layer described above can be deposited using a vacuum sputter. The Ti layer can be deposited to a thickness of about 10 to 50 nm, and preferably about 30 nm. The Cu layer can be deposited to a thickness of about 100 to 300 nm, and preferably about 200 nm.

[0076] When the Cu layer is thus deposited on the surface, the adhesion between the Cu-Invar alloy layer or the Cu-super Invar alloy layer becomes very high, and thus stable adhesion between the silicon substrate 310 and the Invar alloy plating layer 340 can be ensured.

[0077] After that, as shown in (d) of FIG. 4, the Invar alloy plating layer 340 is deposited on the conductive layer 330 deposited thereon.

[0078] According to the related art, a representative production method of the Invar alloy (Ni-Fe) or the super Invar alloy (Ni-Fe-Co) used to manufacture the FMM uses a cold rolling method, but in order to obtain a thin plate having a thickness of 50 μm or less in the cold rolling method, a multi-stage calendering process is required, and thus the process is long and complicated, and has a disadvantage of high manufacturing cost.

[0079] Recently, a manufacturing method of the Invar alloy for the FMM has been developed in an electroplating method. A general FMM Invar alloy electroplating manufacturing method using this electroplating method is configured in such a manner that an anode electrode plate and a mother material serving as a cathode are arranged to face each other in a mutually parallel state in an inside space of an electroplating bath, an electroplating solution (electrolyte) is supplied to the inside space of the electroplating bath, and then an anode power source and a cathode power source are connected to the anode electrode plate and the mother material, respectively, and current is applied thereto, thereby forming a plating layer (Invar alloy) on one surface of the mother material.

[0080] The Invar sheet or super Invar sheet manufactured in this way by electroplating has a very low coefficient of thermal expansion (CTE), and thus there is little concern that heat energy will cause the pattern shape of the mask to deform, and is mainly used to manufacture high-resolution OLEDs. Among them, the primary qualification of the Invar raw material for FMM is a low coefficient of thermal expansion (CTE).

[0081] According to another prior art, an example of using a single crystal silicon as a base material for electroplating exists as a document (Korean Patent Application No. 2017-0067396, etc.). This base material is used as a conductive substrate by performing a high-concentration doping process on the entire or surface of the single crystal silicon, has a process in which the plated layer and the base material are separated after electroplating is completed, and the separated plated layer is re-bonded to an additional frame. However, since the adhesion between the plated layer and the single crystal silicon as the base material is very high, the process of separating the two is difficult, and an additional physical and chemical treatment process for separation is required, and thus there is a problem in that the process becomes complicated and the plated layer is damaged.

[0082] In the embodiment of the present application, the Invar plated layer 340 is directly deposited on the conductive layer 330 deposited on the silicon substrate 310, and is directly used as a frame without separating the silicon substrate 310 (with reference to the open part 311 and the support part 312), thereby having the advantage that the separation process of the silicon substrate 310 and the conductive layer 330 can be omitted and the conductive layer 330 can be maintained in an electroplated state without change.

[0083] The above-described Invar plated layer 340 can be formed by electroplating a binary or ternary alloy having a coefficient of thermal expansion (CTE) of 3 PPM / ℃ or less, and can be electroplated to a thickness of 2 to 5 μm. Also, since the electroplating method is used, the thickness deviation can be ± 0.3 μm.

[0084] At this time, the deposited Invar plated layer 340 can be subjected to heat treatment.

[0085] Since the Invar plated layer 340 by electroplating has a dense structure, in order to adjust the crystal structure to be softened, heat treatment can be performed at a high temperature, and the elongation rate is improved by this annealing.

[0086] Also, the crystal structure is mixed with a body-centered cubic structure (bcc) and a face-centered cubic structure (fcc), and in order to reduce the coefficient of thermal expansion (CTE), the BCC structure is changed to the FCC structure by heating above the critical temperature (about 450℃) for about 1 hour or more.

[0087] In particular, a Compressed Tension is generated between the silicon substrate 310 and the Invar plated layer 340 during the heat treatment, which prevents the Invar plated layer 340 from sagging or wrinkling after the back etching process described later.

[0088] Also, the Invar plated layer 340 is changed in volume during the heat treatment, and is subjected to a compressive stress, which is released by the dummy holes 360 formed during the dry etching process described later.

[0089] After that, as shown in (e) of FIG. 4, the silicon substrate 310 is removed from the lower protective film 320, and the protective film 320 is removed in a hole shape from a central region of the surface shape of the opening 311 to be formed and a peripheral region of the alignment hole 350 to be formed, thereby opening a portion of the lower surface of the silicon substrate 310.

[0090] After that, as shown in (f) of FIG. 4, back etching is performed on the lower surface of the silicon substrate 310, and the central region of the silicon substrate 310 is removed in a surface shape, thereby forming the opening 311, and the peripheral region is removed in a hole shape, thereby forming the alignment hole 350.

[0091] The central region removed from the silicon substrate 310 by the back etching forms the opening 311, and the silicon substrate 310 of the portion not removed from the peripheral region forms the support 312, and the alignment hole 350 is formed in a hole shape in the peripheral support 312.

[0092] The support 312 formed by the back etching directly functions as a frame supporting the Invar plated layer 340. Also, the opening 311 formed on the inner side of the support 312 functions to directly expose the Invar plated layer 340 in a downward direction.

[0093] Further, by the back etching process, since the edge (support 312) of the silicon substrate 310 replaces the conventional bonding type frame, the process of stretching the Invar plated layer on the additional bonding type frame and the process of bonding the Invar plated layer to the frame by welding the frame, which must be performed in the conventional process, can be omitted.

[0094] At this time, the inner side of the support 312 of the silicon substrate 310 can be formed in an inclined shape, more precisely, in a tapered shape.

[0095] After that, as shown in (g) of FIG. 4, the dry etching is performed on the Invar plated layer 340, the conductive layer 330, and the protective film 320, thereby removing the opening 311 of the silicon substrate 310, forming the dummy hole 360 and the pattern hole 370, and penetrating the position of the alignment hole 350.

[0096] The dry etching process can be achieved by forming holes using a pico laser or by etching holes using plazma.

[0097] The alignment hole 350 is a hole for accurate alignment with a substrate to be manufactured when manufacturing an OLED.

[0098] In order to achieve a high resolution of 3000 PPI or more, the pattern hole 370 can have a diameter of about 3 μm or less and can be formed with a pitch of 8 μm or less. The pattern hole 370 can have a substantially conical shape and can provide a path through which the organic material source 410 of the deposition source supply part 400 can pass. The pattern hole 370 can be formed in a cluster at a center portion of the invar plating layer 340.

[0099] The dummy hole 360 can be formed in a cluster in a manner of surrounding the pattern hole 370. The dummy hole 360 can be formed in a region from an outermost portion of the pattern hole 370 to the support part 312.

[0100] Referring to (a) of FIG. 6, the dummy hole 360 can be formed in a substantially elliptical shape having a long axis and a short axis. The dummy hole 360 can be arranged in a direction of the long axis to be spaced apart from an adjacent dummy hole 360 and a plurality of dummy hole 360 rows can be arranged in a radial direction of the silicon substrate 310. The spaced apart dummy hole 360 rows can be arranged with the long axis of the adjacent dummy hole 360 being offset in the radial direction.

[0101] The dummy hole 360 can be formed at a position where the open portion 311 of the silicon substrate 310 is connected, and can release a compressive stress applied to the invar plating layer 340 at the position. More specifically, as the dummy hole 360 shown in (a) of FIG. 6 is deformed in a length of the short axis due to a tensile stress (see arrows) applied in a horizontal radial direction of the invar plating layer 340 as shown in (b) of FIG. 6, the dummy hole 360 can function to release the compressive stress.

[0102] Accordingly, the dummy hole 360 and the pattern hole 370 can be simultaneously formed by the dry etching process, but it is preferable that the dummy hole 360 be formed first to release the compressive stress and then the pattern hole 370 be formed as shown in (c) of FIG. 6, so that a deformation of the pattern hole 370 due to the compressive stress when the pattern hole 370 is formed can be reduced.

[0103] In the etching process for the back surface of the silicon substrate 310 (refer to (f) of Fig. 4) and the dry etching process of the Invar plating layer 340, the conductive layer 330, and the protective film 320 (refer to (g) of Fig. 4), the order of the dry etching process followed by the back surface etching process is shown in the drawing, but the order can be reversed, i.e., the dry etching process can be performed first, followed by the back surface etching process.

[0104] The FMM 300 can be manufactured by the process of the first embodiment.

[0105] Fig. 7(a) is a top view of the FMM 300, and Fig. 7(b) is a bottom view of the FMM 300. As such, by plating the Invar plating layer 340 on the silicon substrate 310 and etching the lower portion of the silicon substrate 310, the additional stretching process or the soldering process can be omitted, and the silicon substrate 310 directly functions as a frame.

[0106] Further, Figs. 8 and 9 are diagrams for explaining the actual structure of the FMM manufactured according to the embodiment of the present application.

[0107] As shown in Fig. 8, the Invar plating layer 340 is formed on the silicon substrate 310, and as shown in Fig. 9, the silicon substrate 310 supporting the Invar plating layer 340 becomes a structure in which the plating layer 340 is exposed to the lower side of the Invar by back surface etching while supporting the Invar plating layer 340 on the lower side.

[0108] On the other hand, Fig. 5 is a diagram for explaining the manufacturing method of the FMM according to the second embodiment of the present application.

[0109] Referring to Fig. 5, the resulting product of the manufacturing method of the FMM according to the second embodiment of the present application is the same as that of the first embodiment, but the manufacturing process is different. In the following description of the second embodiment, the repeated description of the first embodiment is abbreviated or omitted, and the different parts are focused on.

[0110] First, the silicon substrate 310 is prepared (refer to (a) of Fig. 5), and the protective film 320 is deposited on both the upper and lower surfaces of the silicon substrate 310 (refer to (b) of Fig. 5), and the conductive layer 330 is deposited on the upper surface of the silicon substrate 310 on which the protective film 320 is deposited (refer to (c) of Fig. 5).

[0111] The silicon substrate 310 described above can use a silicon wafer (Si) or a quartz wafer (SiO2), and can use materials having a coefficient of thermal expansion (CTE) of 3 PPM / °C or less, and is not limited to the above examples. The silicon substrate 310 can have a thickness of 50 to 700 μm.

[0112] Also, the protective film 320 can be a SiNx inorganic film having high blocking properties and excellent adhesion. The SiNx inorganic film can be deposited using a vacuum sputter, and can be deposited to a thickness of about 10 to 50 nm, and preferably about 30 nm.

[0113] Also, the conductive layer 330 can be formed of TiN or Ti-Cu, and can be used without being limited to the above examples as long as it is a material that imparts conductivity to the silicon substrate 310. Among them, when the conductive layer 330 is formed of TiN, the TiN layer can be deposited using a vacuum sputter, and can be deposited to a thickness of about 100 to 400 nm, and preferably about 200 nm. Also, when the conductive layer 330 is formed of Ti-Cu, a Ti layer is first deposited (to secure silicon-Cu adhesion), and a Cu layer is secondly deposited (to secure low electrical conductivity). The Ti layer and the Cu layer can be deposited using a vacuum sputter. The Ti layer can be deposited to a thickness of about 10 to 50 nm, and preferably about 30 nm. The Cu layer can be deposited to a thickness of about 100 to 300 nm, and preferably about 200 nm.

[0114] After that, as shown in (d) of FIG. 5, a photo pattern layer 380 is formed on the conductive layer 330 deposited thereon.

[0115] The photo pattern layer 380 is made by thickly applying a photo resist, and forms the following Invar plating layer 340 at a portion where a pattern is opened. That is, such a photo pattern layer 380 is formed at the positions of the pattern holes 370 and the dummy holes 360.

[0116] After that, as shown in (e) of FIG. 5, the Invar plating layer 340 is deposited on the conductive layer 330 on which the photo pattern layer 380 is formed.

[0117] Among them, the Invar plating layer 340 is formed at a portion where a pattern is opened in the photo pattern layer 380, and the photo pattern layer 380 is removed.

[0118] Through this process, the Invar plating layer 340 naturally includes the pattern holes 370 and the dummy holes 360.

[0119] In order to achieve high resolution of 3000 PPI or more, the diameter of the pattern holes 370 can be about 3 μm or less, and can be processed with a pitch of 8 μm or less. Such a pattern hole 370 can be formed in a substantially conical shape, and provides a path through which the organic material source 410 of the deposition source supply part 400 can pass. The pattern holes 370 can be clustered to form at the center portion of the Invar plating layer 340.

[0120] The virtual holes 360 are formed in a cluster pattern surrounding the pattern holes 370. The virtual holes 360 are formed from the outermost portions of the pattern holes 370 to the area of the support portion 312 of the silicon substrate 310, which will be described later.

[0121] Also, each virtual hole 360 is formed in a substantially elliptical shape having a longer major axis and a shorter minor axis. Also, each virtual hole 360 is arranged so as to be spaced apart from an adjacent virtual hole 360 in the direction of the major axis, and a plurality of columns of virtual holes 360 are arranged in the radial direction of the silicon substrate 310. Also, the columns of virtual holes 360, which are spaced apart from each other, are arranged so that the major axes of adjacent virtual holes 360 are offset in the radial direction.

[0122] The above-described inconel plating layer 340 can be formed by electroplating a binary or ternary alloy having a coefficient of thermal expansion (CTE) of 3 PPM / °C or less, and can be electroplated to a thickness of 2 to 5 μm. Also, since electroplating is used, the thickness deviation can be ±0.3 μm.

[0123] At this time, the deposited inconel plating layer 340 can be subjected to heat treatment. The method and effects of the heat treatment have been described above, and thus will be omitted here.

[0124] After that, as shown in (f) of FIG. 5, the silicon substrate 310 is removed from the lower protective film 320, and the protective film 320 is removed from the center area of the surface shape in which the opening portion 311 is to be formed and the outer peripheral area in which the alignment hole 350 is to be formed, by hole formation, to open a portion of the lower surface of the silicon substrate 310.

[0125] After that, as shown in (g) of FIG. 5, back etching is performed on the lower surface of the silicon substrate 310, and the center area of the silicon substrate 310 is removed by surface formation, and the outer peripheral area is removed by hole formation, to form the opening portion 311 and the alignment hole 350.

[0126] The center area removed from the silicon substrate 310 by the back etching forms the opening portion 311, and the silicon substrate 310, which is not removed from the outer peripheral area, forms the support portion 312, and the alignment hole 350 is formed in the hole shape in the outer peripheral support portion 312.

[0127] The support portion 312 formed by the back etching directly functions as a frame to support the inconel plating layer 340. Also, the opening portion 311 formed on the inner side of the support portion 312 functions to directly expose the inconel plating layer 340 in the downward direction.

[0128] Further, by this back etching process, since the edge (support portion 312) of the silicon substrate 310 replaces the existing bonding type frame, the process of stretching the invar alloy plating layer on the additional bonding type frame and the process of bonding by welding the invar alloy plating layer to the frame, which must be performed in the existing process, can be omitted.

[0129] At this time, the inner side of the support portion 312 of the silicon substrate 310 can be formed in an inclined shape, more precisely, can be formed in a tapered shape.

[0130] After that, as shown in (h) of FIG. 5, dry etching is performed on the conductive layer 330 and the protective film 320 in the open portion 311, whereby the invar alloy plating layer 340, the conductive layer 330, and the protective film 320 are etched in the support portion 312 to pass through the position of the alignment hole 350 while removing the open portion 311 of the silicon substrate 310 passing through the dummy hole 360 and the pattern hole 370.

[0131] The dry etching process can be implemented by processing a hole using a pico laser or etching a hole using plasma.

[0132] Among them, with respect to the back etching process (see (g) of FIG. 5) of the lower surface of the silicon substrate 310 and the dry etching process (see (h) of FIG. 5) of the conductive layer 330 and the protective film 320, the order in which the dry etching process is performed after the back etching process is shown in the drawing, but contrary thereto, the order in which the dry etching process is performed first and then the back etching process is performed.

[0133] The FMM 300 can be manufactured through the process of the second embodiment.

[0134] First, the FMM 300 manufactured according to the embodiment of the present application has a structure in which the invar alloy plating layer 340 is formed directly on the upper surface of the silicon substrate 310, and the silicon substrate 310 replaces the frame.

[0135] Looking at the structure in more detail, the protective film can be deposited on the upper and lower surfaces of the silicon substrate 310.

[0136] Further, the conductive layer 330 can be deposited on the upper surface of the silicon substrate 310 on which the protective film 320 is deposited on both the upper and lower surfaces.

[0137] Further, the invar alloy plating layer 340 can be deposited on the conductive layer 330 deposited on the upper surface.

[0138] Among them, the invar alloy plating layer 340 deposited can be subjected to heat treatment.

[0139] And, the back surface of the silicon substrate 310 is etched to remove the center region of the silicon substrate 310 by the surface shape, and the silicon substrate 310 of the portion where the open portion 311 is not removed from the peripheral region forms the support portion 312, and the alignment hole 350 of the hole shape is formed in the peripheral support portion 312.

[0140] The support portion 312 manufactured by the back surface etching directly functions as a frame to support the invar alloy plating layer 340. And, the open portion 311 formed in the inner side of the support portion 312 functions to directly expose the invar alloy plating layer 340 to the downward direction.

[0141] At this time, the inner side of the support portion 312 of the silicon substrate 310 can be formed in an inclined shape, more accurately, a conical shape.

[0142] Among them, the invar alloy plating layer 340, the conductive layer 330, and the protective film 320 disposed at the center portion of the open portion 311 of the silicon substrate 310 can be formed into a plurality of pattern holes 370 by the through shape clustering.

[0143] And, from the outermost portion of the pattern hole 370 clustered in the form of surrounding the clustered pattern hole 370 to the region of the support portion 312, a plurality of virtual holes 360 are formed by the through shape clustering.

[0144] FIG. 10 is a diagram for explaining a manufacturing apparatus of an OLED using the FMM manufactured according to the embodiment of the present application and a manufacturing method of the OLED.

[0145] The OLED manufacturing apparatus implementing the manufacturing method of the OLED using the FMM 300 of such a structure, as shown in FIG. 10, includes the FMM 300, a deposition substrate 200, an organic deposition container 400, and a vacuum chamber 500.

[0146] The FMM 300 has the following characteristics that the invar alloy plating layer 340 is formed on the upper surface of the silicon substrate 310 as it is, and the silicon substrate 310 replaces the frame.

[0147] The FMM 300 includes a plurality of pattern holes 370 formed in a region corresponding to the open portion 311 of the silicon substrate 310 for deposition.

[0148] The deposition substrate 200 is a substrate used when manufacturing a display device. For example, the deposition substrate 2000 can be a substrate for depositing an organic material for an OLED pixel pattern. The organic material patterns of red (Red), green (Greed), and blue (Blue) are formed on the deposition substrate 200 to form 3-primary color pixels of light. That is, the RGB pattern can be formed on the deposition substrate 200.

[0149] The organic material deposition container 400 can be a crucible. The organic material is disposed inside the crucible. The organic material deposition container 400 moves inside the vacuum chamber 500. That is, the organic material deposition container 400 moves in the first direction inside the vacuum chamber 500. That is, the organic material deposition container 400 moves in the width direction of the FMM 300 inside the vacuum chamber 500.

[0150] Inside the vacuum chamber 500, as a heat source and / or an electric current is supplied to the crucible which is the organic material deposition container 400, the organic material is deposited on the deposition substrate 200.

[0151] The FMM 300 is attached to the deposition substrate 200. That is, one side of the FMM 300 on which the invar plating layer 340 is formed is attached to the deposition substrate 200. The FMM 300 needs to be aligned before being attached to the deposition substrate 200. The FMM 300 can be correctly aligned to the target substrate 200 through the alignment hole 350 of the FMM 300.

[0152] If the pixels are deposited on the deposition substrate 200 through the FMM 300, the FMM 300 is separated from the deposition substrate 200.

[0153] Such an FMM 300 can stably and accurately perform a pixel deposition process, especially when manufacturing an AR / VR OLED.

[0154] A method of manufacturing an OLED using the FMM 300 having the above-described structure is as follows.

[0155] First, the FMM 300 is attached to the deposition substrate 200.

[0156] One side of the FMM 300 on which the invar plating layer 340 is formed is attached to the deposition substrate 200. The FMM 300 can be correctly aligned to the target substrate 200 through the alignment hole 350 of the FMM 300 at the time of attachment.

[0157] After that, the deposition substrate 200 to which the FMM 300 is attached is disposed inside the vacuum chamber 500.

[0158] Inside the vacuum chamber 500, the organic material deposition container 400 in which the organic material is disposed is disposed opposite to the deposition substrate 200 as shown in FIG. 10.

[0159] Also, the organic material deposition container 400 moves inside the vacuum chamber 500, supplies the organic material source to the FMM 300, and deposits the pixels on the deposition substrate 200 by means of the organic material source passing through the pattern hole 370 of the FMM 300.

[0160] The best mode contemplated has been disclosed and described herein for a preferred embodiment. The terminology used herein is for the purpose of describing the particular embodiment and is not intended to limit the scope of the application or the claims appended hereto. It is to be understood that various alterations and modifications can be made therein without departing from the spirit of the application. Therefore, it is intended that the true scope of the application be defined only by the technical scope of the claims appended hereto.

Claims

1. An OLED manufacturing device, characterized in that: include: A vacuum chamber is provided with a deposition substrate; FMM, attached to the deposition substrate, forming a plurality of patterned holes; as well as The organic deposition container supplies the organic substance to the deposition substrate through the pattern holes of the FMM, and deposits pixels on the deposition substrate.

2. The OLED manufacturing device according to claim 1, characterized in that: The FMM includes: Silicon substrate; A protective film is deposited on the upper and lower surfaces of the silicon substrate; A conductive layer is deposited on the silicon substrate with protective films deposited on the upper and lower surfaces; Invar alloy coating, deposited on the conductive layer deposited above, The central area of ​​the lower surface of the silicon substrate is removed from the surface to form an open portion, and the silicon substrate in the peripheral area that is not removed forms a supporting portion. A plurality of pattern holes are formed by clustering through shapes at the center of the opening portion, and a plurality of virtual holes are formed by clustering through shapes from the outermost portion of the pattern holes clustered in the form of surrounding the clustered pattern holes to the area of ​​the support portion.

3. The OLED manufacturing device according to claim 2, characterized in that: The inner side of the support portion in the silicon substrate is formed in a tapered shape.

4. The OLED manufacturing device according to claim 2, characterized in that: An alignment hole is formed in the support portion of the silicon substrate, and the alignment hole passes through the protective film, the conductive layer, and the Invar alloy plating layer including the support portion in the vertical direction.

5. The OLED manufacturing device according to claim 2, characterized in that: The silicon substrate is a silicon wafer or a quartz wafer and is formed with a thickness of 50 to 700 μm.

6. The OLED manufacturing device according to claim 2, wherein: The protective film is a SiNx inorganic film, which is deposited with a thickness of 10 to 50 μm.

7. The OLED manufacturing device according to claim 2, characterized in that: The conductive layer is formed of TiN or Ti—Cu and is deposited with a thickness of 100 to 400 μm.

8. The OLED manufacturing device according to claim 2, wherein: The invar alloy coating is formed of an invar alloy (Ni-Fe) or a super invar alloy (Ni-Fe-Co) having a thermal expansion coefficient (CTE) of 3 PPM / °C or less, and is electroplated to a thickness of 2 to 5 μm.

9. The OLED manufacturing device according to claim 2, characterized in that: The pattern holes have a diameter of 3 μm or less and are processed with a pitch of 8 μm or less.

10. The OLED manufacturing device according to claim 2, characterized in that: The virtual hole is formed in the form of an elliptical through-hole with a longer major axis and a shorter minor axis. Individual virtual holes are arranged along the major axis direction and separated from adjacent virtual holes. Multiple virtual hole columns are arranged along the radial direction of the silicon substrate. The separated virtual hole columns are arranged along the radial direction so that the major axes of adjacent individual virtual holes are staggered.

11. The OLED manufacturing device according to claim 2, characterized in that: The Invar alloy plating layer formed on the conductive layer is heat-treated before the backside etching process.

12. An OLED manufacturing method, which is carried out by the OLED manufacturing apparatus according to any one of claims 1 or 11, characterized in that: include: Step (a), aligning the FMM to the deposition substrate through the alignment hole and attaching it; Step (b), placing the deposition substrate with the FMM attached in a vacuum chamber; as well as In step (c), the organic deposition container supplies the organic substance to the deposition substrate through the pattern holes of the FMM, and deposits pixels on the deposition substrate.

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