Display panel and display apparatus

Abstract

The present application primarily relates to the technical field of display, and discloses a display panel (30) and a display apparatus (20). An electronic paper film (200) is arranged between an array substrate (100) and an opposing substrate (300). The array substrate (100) comprises a substrate (110), and an active switch (120), an insulating layer (130), a planarization layer (140), and a pixel electrode (150) which are sequentially arranged on the substrate (110). A common electrode (400) is arranged on the side of the opposing substrate (300) facing the electronic paper film (200). The distance between each first pixel electrode (181) and the common electrode (400) directly opposite the first pixel electrode (181) is greater than the distance between each second pixel electrode (182) and the common electrode (400) directly opposite the second pixel electrode (182). Microcapsules corresponding to each first pixel electrode (181) are first microcapsules (510), and microcapsules corresponding to each second pixel electrode (182) are second microcapsules (520). The movement speed of particles within the first microcapsules (510) is the same as the movement speed of particles within the second microcapsules (520).

Description

Display panel and display device

[0001] The present application claims priority to the Chinese patent application No. CN202410418717.1, filed on April 9, 2024, and entitled "Display panel and display device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0003] With the development of digital technology, more and more display devices, such as electronic paper display panels, have entered people's lives. The electronic paper display panel is to uniformly disperse charged particles in a medium solution with certain viscosity, and to display by electrophoretic movement of the charged particles between the pixel electrode and the common electrode.

[0004] However, since the pixel electrode is above the active switch, and the insulating layer and the planar layer are arranged between the pixel electrode and the drain of the active switch, a switching hole needs to be arranged between the insulating layer and the planar layer, and the pixel electrode is connected to the drain of the active switch through the switching hole. This results in a larger distance between the pixel electrode and the common electrode at the position corresponding to the switching hole, a weaker electric field strength, and a slower movement speed of the particles in the microcapsule corresponding to the region, thereby causing the problem of uneven display of the display panel. SUMMARY

[0005] The purpose of the present application is to provide a display panel and a display device, which improve the display uniformity of the display panel.

[0006] The present application discloses a display panel, which comprises an array substrate, an electronic paper film and a counter substrate, the electronic paper film is arranged between the array substrate and the counter substrate, the array substrate comprises a substrate and an active switch, an insulating layer, a planar layer and a pixel electrode arranged in sequence on the substrate, the array substrate further comprises a common electrode, the common electrode is arranged on the side of the counter substrate facing the electronic paper film; the pixel electrode comprises a first pixel electrode and a second pixel electrode connected, the distance between the first pixel electrode and the opposite common electrode is greater than the distance between the second pixel electrode and the opposite common electrode.

[0007] The electronic paper film comprises a plurality of microcapsules, the microcapsules corresponding to the first pixel electrode are first microcapsules, and the microcapsules corresponding to the second pixel electrode are second microcapsules; the movement speed of the particles in the first microcapsules is the same as that of the particles in the second microcapsules.

[0008] Optionally, the common electrode comprises a first common electrode and a second common electrode, a gap is arranged between the first common electrode and the second common electrode, a projection of the first common electrode on the substrate overlaps a projection of the first pixel electrode on the substrate, a projection of the second common electrode on the substrate overlaps a projection of the second pixel electrode on the substrate, a distance between the first common electrode and the first pixel electrode is greater than a distance between the second common electrode and the second pixel electrode; the first common electrode is connected to a first common voltage, the second common electrode is connected to a second common voltage, the first common voltage is greater than the second common voltage.

[0009] Optionally, the display panel comprises a switching hole, the switching hole penetrates the insulating layer and the flat layer, the pixel electrode is connected to the active switch through the switching hole, the first pixel electrode is located in the switching hole, and a projection of the first common electrode on the substrate overlaps a projection of the switching hole on the substrate.

[0010] Optionally, the display panel further comprises a common electrode and a gate insulating layer, the common electrode and the gate insulating layer are arranged on the substrate in sequence; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further comprises a pixel electrode slot, the pixel electrode slot penetrates the flat layer, the first pixel electrode is located in the pixel electrode slot, and the pixel electrode slot is located between the common electrode and the first pixel electrode, and a projection of the first common electrode on the substrate overlaps a projection of the pixel electrode slot on the substrate.

[0011] Optionally, the display panel comprises a switching hole, the switching hole penetrates the insulating layer and the flat layer, the pixel electrode is connected to the active switch through the switching hole;

[0012] The display panel further comprises a common electrode and a gate insulating layer, the common electrode and the gate insulating layer are arranged on the substrate in sequence; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further comprises a pixel electrode slot, the pixel electrode slot penetrates the flat layer;

[0013] The first pixel electrode is located in the switching hole and the pixel electrode slot, and a projection of the first common electrode on the substrate covers a projection of the pixel electrode slot on the substrate and a projection of the switching hole on the substrate.

[0014] Optionally, the pixel electrode further comprises a third pixel electrode, the third pixel electrode is connected to the first pixel electrode and the second pixel electrode, and the microcapsule corresponding to the third pixel electrode is a third microcapsule.

[0015] The common electrode further comprises a third common electrode, the first common electrode, the second common electrode and the third common electrode are all provided with gaps, a positive projection of the third pixel electrode on the substrate and a positive projection of the third common electrode on the substrate overlap;

[0016] The display panel further comprises a common electrode and a gate insulating layer, the common electrode and the gate insulating layer are sequentially arranged on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further comprises a pixel electrode slot, the pixel electrode slot penetrates through the planar layer, and the pixel electrode slot is located between the common electrode and the second pixel electrode;

[0017] The distance between the second common electrode and the second pixel electrode is greater than the distance between the third common electrode and the third pixel electrode;

[0018] The third common electrode is connected to a third common voltage, the second common voltage is greater than the third common voltage; a positive projection of the second common electrode on the substrate and a positive projection of the pixel electrode slot on the substrate overlap;

[0019] The moving speed of the particles in the first microcapsule, the particles in the second microcapsule and the particles in the third microcapsule are all the same.

[0020] Optionally, the display panel comprises a barrier wall, the barrier wall is arranged between the pixel electrode and the common electrode; and the barrier wall is arranged between the first pixel electrode and the second pixel electrode;

[0021] The first microcapsule has a greater amount of charge than the second microcapsule.

[0022] Optionally, the display panel comprises a switching hole, the switching hole penetrates through the insulating layer and the planar layer, the pixel electrode is connected to the active switch through the switching hole, the first pixel electrode is located in the switching hole, and the first microcapsule corresponds to the switching hole.

[0023] Optionally, the display panel comprises a switching hole, the switching hole penetrates through the insulating layer and the planar layer, the pixel electrode is connected to the active switch through the switching hole;

[0024] The display panel further comprises a common electrode and a gate insulating layer, the common electrode and the gate insulating layer are sequentially arranged on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further comprises a pixel electrode slot, the pixel electrode slot penetrates through the planar layer;

[0025] The first pixel electrode is located in the transfer hole and the pixel electrode groove, and the first microcapsule corresponds to the transfer hole and the pixel electrode groove.

[0026] The application further discloses a display device, which comprises a driving circuit and a display panel.

[0027] Compared with the existing display panel of electronic paper, since the distance between the first pixel electrode and the corresponding common electrode and the distance between the second pixel electrode and the corresponding common electrode are different in a single pixel unit, the electric field intensity corresponding to the first pixel electrode and the second pixel electrode in the single pixel unit is different, and when displaying a picture, the moving speed of the particles in the first microcapsule and the particles in the second microcapsule is different, thereby causing the problem of uneven picture display of the display panel corresponding to the first pixel electrode and the second pixel electrode. Therefore, the moving speed of the particles in the first microcapsule and the particles in the second microcapsule is the same, thereby making the picture display of the display panel corresponding to the first pixel electrode and the second pixel electrode more uniform. BRIEF DESCRIPTION OF DRAWINGS

[0028] The accompanying drawings included to provide a further understanding of the embodiments of the application, constitute a part of the specification and serve to explain the principles of the application together with the text. Obviously, the accompanying drawings in the following description only show some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor. In the drawings:

[0029] Fig. 1 is a schematic diagram of a display device according to an embodiment of the application;

[0030] Fig. 2 is a schematic diagram of a display panel according to a first embodiment of the application;

[0031] Fig. 3 is a schematic diagram of an array substrate and an electronic paper film according to the first embodiment of the application;

[0032] Fig. 4 is a schematic diagram of a plane of two common electrodes according to the first embodiment of the application;

[0033] Fig. 5 is a schematic diagram of a plane of a display panel with a driving chip according to the first embodiment of the application;

[0034] Fig. 6 is a schematic diagram of a common electrode according to the first embodiment of the application;

[0035] Fig. 7 is a schematic diagram of a pixel electrode groove according to the first embodiment of the application;

[0036] Fig. 8 is a schematic view of the counter substrate not shown in Fig. 7;

[0037] Fig. 9 is a schematic view of a plane of three common electrodes of the first embodiment of the present application;

[0038] Fig. 10 is a schematic view of a plane of a display panel corresponding to connection points of three common electrodes of the first embodiment of the present application;

[0039] Fig. 11 is a schematic view of a display panel of the second embodiment of the present application;

[0040] Fig. 12 is a schematic view of an array substrate and an electronic paper film of the second embodiment of the present application;

[0041] Fig. 13 is a schematic view of a plane of two common electrodes of the second embodiment of the present application;

[0042] Fig. 14 is a schematic view of a plane of a display panel with a driving chip of the second embodiment of the present application;

[0043] Fig. 15 is a schematic view of a display panel of the third embodiment of the present application;

[0044] Fig. 16 is a schematic view of an array substrate and an electronic paper film of the third embodiment of the present application;

[0045] Fig. 17 is a schematic view of a plane of two common electrodes of the third embodiment of the present application;

[0046] Fig. 18 is a schematic view of a plane of a display panel with a driving chip of the third embodiment of the present application;

[0047] Fig. 19 is a schematic view of a display panel of the fourth embodiment of the present application;

[0048] Fig. 20 is a schematic view of a pixel electrode slot of the fourth embodiment of the present application;

[0049] Fig. 21 is a schematic view of a display panel of the fifth embodiment of the present application;

[0050] Fig. 22 is a schematic view of a display panel of the sixth embodiment of the present application. DETAILED DESCRIPTION

[0051] It is to be understood that the terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting. It must be noted that, as used in the specification and the appended claims, the singular forms "a," "an" and "the" include plural referents unless the context clearly dictates otherwise. The term "plurality" refers to two or more.

[0052] In the description of the present application, the terms "first", "second" are only for descriptive purpose, and cannot be understood as indicating relative importance, or implying the number of the indicated technical features. Therefore, unless otherwise specified, the features defined with "first", "second" can explicitly or implicitly include one or more of the features; the meaning of "multiple" is two or more. The term "comprising" and any variation thereof means non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components and / or combinations thereof can exist or be added.

[0053] In addition, the terms indicating the orientation or positional relationship of "center", "transverse", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like are described based on the orientation or relative positional relationship shown in the drawings, and are only for the convenience of the simplified description of the present application, and do not indicate that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0054] In addition, unless otherwise specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be direct connection, or indirect connection through intermediate medium, or internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0055] The present application will be described in detail below with reference to the accompanying drawings and optional embodiments.

[0056] Figure 1 is a schematic diagram of a display device according to an embodiment of the present application. As shown in Figure 1, the present application discloses a display device 10, which comprises a driving circuit 20 and a display panel 30, the driving circuit 20 drives the display panel 30 to display a picture. Wherein, the display panel 30 is an electronic paper display panel 30.

[0057] The present application also discloses a display panel 30, which can be used in the above-mentioned display device 10. For the display panel 30, the present application provides the following design, and is specifically introduced through several embodiments:

[0058] Embodiment 1:

[0059] Fig. 2 is a schematic diagram of a display panel of a first embodiment of the present application, Fig. 3 is a schematic diagram of an array substrate and an electronic paper film of a first embodiment of the present application, as shown in Figs. 2-3, the present application discloses a display panel 30, the display panel 30 comprises an array substrate 100, an electronic paper film 200 and a counter substrate 300, the electronic paper film 200 is arranged between the array substrate 100 and the counter substrate 300, the array substrate 100 comprises a substrate 110 and a driving switch 120, an insulating layer 130, a flat layer 140 and a pixel electrode 150 arranged on the substrate 110 in sequence, the array substrate 100 further comprises a common electrode 400, the common electrode 400 is arranged on the side of the counter substrate 300 facing the electronic paper film 200.

[0060] The pixel electrode 150 comprises a connected first pixel electrode 181 and a second pixel electrode 182, the distance between the first pixel electrode 181 and the common electrode 400 opposite is greater than the distance between the second pixel electrode 182 and the common electrode 400 opposite.

[0061] The electronic paper film 200 comprises a plurality of microcapsules, the microcapsules corresponding to the first pixel electrode 181 are first microcapsules 510, and the microcapsules corresponding to the second pixel electrode 182 are second microcapsules 520; the moving speed of the particles in the first microcapsules 510 and the particles in the second microcapsules 520 is the same.

[0062] Wherein, when the display panel 30 is black and white type, the particles comprise black particles and white particles, when the display panel 30 is color type, the particles comprise color particles, or the particles are black and white particles and a color filter layer is arranged on the counter substrate 300, which can be designed more as required, not limited here.

[0063] Compared with the existing display panel 30 of electronic paper, since the distance between the first pixel electrode 181 and the common electrode 400 opposite and the distance between the second pixel electrode 182 and the common electrode 400 opposite are different in a single pixel unit, the electric field intensity corresponding to the first pixel electrode 181 and the second pixel electrode 182 in a single pixel unit is different, when displaying a picture, the moving speed of the particles in the first microcapsules 510 and the particles in the second microcapsules 520 is different, thereby the problem of uneven picture display of the display panel 30 corresponding to the first pixel electrode 181 and the second pixel electrode 182 occurs, therefore, the present application makes the moving speed of the particles in the first microcapsules 510 and the particles in the second microcapsules 520 the same, thereby making the picture display of the display panel 30 corresponding to the first pixel electrode 181 and the second pixel electrode 182 more uniform.

[0064] The embodiment can keep the moving speed of the particles in the first microcapsule 510 and the second microcapsule 520 consistent by connecting the common electrodes 400 corresponding to different regions to different common voltages, thereby ensuring that the display panel 30 has more uniform brightness of the display pictures corresponding to the first pixel electrode 181 and the second pixel electrode 182.

[0065] Specifically, the array substrate 100 further includes a common electrode 400 disposed on a side of the opposite substrate 300 facing the electronic paper film 200; the common electrode 400 includes a first common electrode 410 and a second common electrode 420, and a gap is disposed between the first common electrode 410 and the second common electrode 420, that is, the first common electrode 410 and the second common electrode 420 are not connected, and a projection of the first common electrode 410 on the substrate 110 overlaps a projection of the first pixel electrode 181 on the substrate, and a projection of the second common electrode 420 on the substrate 110 overlaps a projection of the second pixel electrode 182 on the substrate 110.

[0066] The width of the gap is between 8 μm and 10 μm, which can avoid the situation that the first common electrode 410 and the second common electrode 420 are connected and conducted due to too small width of the gap, and can also avoid the problem that the electrophoretic particles in the microcapsules below the gap between the first common electrode 410 and the second common electrode 420 are not easily moved due to weakened electric field force, that is, the width of the gap is set to be between 8 μm and 10 μm.

[0067] The first common electrode 410 and the second common electrode 420 can be prevented from being connected and conducted after etching, and the electrophoretic particles in the microcapsules below the gap between the first common electrode 410 and the second common electrode 420 can be ensured to move normally.

[0068] The distance between the first common electrode 410 and the first pixel electrode 181 is greater than the distance between the second common electrode 420 and the second pixel electrode 182; the first common electrode 410 is connected to a first common voltage, the second common electrode 420 is connected to a second common voltage, and the first common voltage is greater than the second common voltage.

[0069] Wherein, since the pixel electrode 150 is above the active switch 120, and the insulating layer 130 and the planar layer 140 are arranged between the pixel electrode 150 and the drain of the active switch 120, a via hole, i.e. a transfer hole 610, needs to be arranged between the insulating layer 130 and the planar layer 140, the pixel electrode 150 is connected with the drain of the active switch 120 through the transfer hole 610, and the position of the transfer hole 610 corresponds to the first pixel electrode 181 and the first common electrode 410, thus causing the distance between the first pixel electrode 181 and the first common electrode 410 to be greater than the distance between the second pixel electrode 182 and the second common electrode 420.

[0070] Specifically, the display panel 30 comprises a transfer hole 610 penetrating the insulating layer 130 and the planar layer 140, the pixel electrode 150 is connected with the active switch 120 through the transfer hole 610, the first pixel electrode 181 is located in the transfer hole 610, and the orthographic projection of the first common electrode 410 on the substrate 110 overlaps the orthographic projection of the transfer hole 610 on the substrate 110.

[0071] The first common voltage is connected with the first common electrode 410, the second common voltage is connected with the second common electrode 420, and the first common voltage is greater than the second common voltage in the embodiment, thus compensating for the fact that the electric field between the first pixel electrode 181 and the first common electrode 410 is weaker than the electric field between the second pixel electrode 182 and the second common electrode 420 due to the fact that the distance between the first pixel electrode 181 and the first common electrode 410 is greater than the distance between the second pixel electrode 182 and the second common electrode 420, thus making the moving speed of the particles in the first microcapsule 510 and the particles in the second microcapsule 520 the same.

[0072] FIG. 4 is a schematic view of a plane of two common electrodes of the first embodiment of the present application, and FIG. 5 is a schematic view of a plane of a display panel with a driving chip of the first embodiment of the present application, the display panel 30 further comprises a driving chip 700 arranged on the substrate 110, and at least one first array substrate connecting point 721 and at least one second array substrate connecting point 722, the first array substrate connecting point 721 and the second array substrate connecting point 722 are respectively connected with the driving chip 700.

[0073] The first common electrode 410 is provided with at least one first common electrode connecting point 711, and the second common electrode 420 is provided with at least one second common electrode connecting point 712; the first common electrode connecting point 711 corresponds to the first array substrate connecting point 721 one by one, and the second common electrode connecting point 712 corresponds to the second array substrate connecting point 722 one by one; after the opposite substrate 300 and the array substrate 100 are boxed, the first common electrode connecting point 711 and the first array substrate connecting point 721 are connected, and the second common electrode connecting point 712 and the second array substrate connecting point 722 are connected, so as to provide the first common electrode 410 with a first common voltage and provide the second common electrode 420 with the second common voltage.

[0074] The first array substrate connecting point 721 and the second array substrate connecting point 722 of the present application are respectively located at the corners of the non-display area of the substrate 110.

[0075] Fig. 6 is a schematic diagram of a common electrode of the first embodiment of the present application. As shown in Fig. 6, when the pixel electrode slot 620 is not provided, the common electrode 400 includes only the first common electrode 410 and the second common electrode 420. In order to avoid the interference caused by the difference of the strength of the oblique electric field generated between the second edge part 422 of the first common electrode 410 and the second pixel electrode 182, and the oblique electric field generated between the first edge part 412 of the second common electrode 420 and the first pixel electrode 181, the first common electrode 410 and the second common electrode 420 are further improved as follows:

[0076] The first common electrode 410 includes a first main part 411 and a first edge part 412, and the first edge part 412 is arranged around the edge of the first main part 411; the second common electrode 420 includes a second main part 421 and a second edge part 422, and the second edge part 422 is arranged around the edge of the second main part 421; the first edge part 412 is located at the position of the first main part 411 close to the second edge part 422.

[0077] The thickness of the first main part 411 is equal to the thickness of the second main part 421, the thickness of the first main part 411 is greater than the thickness of the first edge part 412, and the thickness of the second main part 421 is less than the thickness of the second edge part 422.

[0078] In brief, by reducing the thickness of the first edge portion 412, the electric field formed between the first pixel electrode 181 and the first common electrode 410 presents a trend of gradually weakening from the first main portion 411 to the first edge portion 412; and by increasing the thickness of the second edge portion 422, the electric field formed between the second pixel electrode 182 and the second common electrode 420 presents a trend of gradually strengthening from the second main portion 421 to the second edge portion 422; so that the electric field at the junction of the first pixel electrode 181 and the second pixel electrode 182 can be smoothly transitioned, the oblique electric field between the second edge portion 422 of the first common electrode 410 and the second pixel electrode 182 is reduced, and the interference caused by the too large difference in the oblique electric field strength between the first edge portion 412 of the second common electrode 420 and the first pixel electrode 181 is reduced, thereby avoiding the display abnormality problem.

[0079] FIG. 7 is a schematic view of a pixel electrode groove of the first embodiment of the present application, and FIG. 8 is a schematic view of an opposite substrate not shown in FIG. 7. As shown in FIGS. 6-8, since the display panel 30 of the electronic paper type needs to form a storage capacitor between the pixel electrode 150 and the common electrode 160 to maintain the movement of the particles in the microcapsule, the present application sets a pixel electrode groove 620 between the planar layer 140 corresponding to the pixel electrode 150 and the common electrode 160 to reduce the distance between the pixel electrode 150 and the common electrode 160 and improve the size of the storage capacitor.

[0080] For example, the pixel electrode 150 further includes a third pixel electrode 183, and the third pixel electrode 183 is connected to the first pixel electrode 181 and the second pixel electrode 182. The microcapsule corresponding to the third pixel electrode 183 is a third microcapsule 530.

[0081] The common electrode 400 further includes a third common electrode 430, and the first common electrode 410, the second common electrode 420, and the third common electrode 430 are all provided with a gap, i.e., the first common electrode 410, the second common electrode 420, and the third common electrode 430 are not connected.

[0082] The width of the gap is between 8 μm and 10 μm. If the width of the gap is too small, the first common electrode 410 and the second common electrode 420 may be turned on. If the width of the gap is too large, the electrophoretic particles in the microcapsule below the gap between the first common electrode 410 and the second common electrode 420 may not be easily moved due to the weakening of the electric field force. Therefore, the width of the gap is set to be between 8 μm and 10 μm.

[0083] The first common electrode 410 and the second common electrode 420 are not easily connected and conducted after etching, and the electrophoretic particles in the microcapsules below the gap between the first common electrode 410 and the second common electrode 420 can move normally.

[0084] The orthographic projection of the third pixel electrode 183 on the substrate 110 and the orthographic projection of the third common electrode 430 on the substrate 110 overlap.

[0085] The display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, which are sequentially arranged on the substrate 110; a storage capacitor is formed between the common electrode 160 and the pixel electrode 150; the display panel 30 further comprises a pixel electrode slot 620, which penetrates the planar layer 140, and the pixel electrode slot 620 is located between the common electrode 160 and the pixel electrode 150.

[0086] The distance between the second common electrode 420 and the second pixel electrode 182 is greater than the distance between the third common electrode 430 and the third pixel electrode 183.

[0087] The third common electrode 430 is connected to a third common voltage, and the second common voltage is greater than the third common voltage; the orthographic projection of the second common electrode 420 on the substrate 110 and the orthographic projection of the pixel electrode slot 620 on the substrate 110 overlap.

[0088] The moving speed of the particles in the first microcapsule 510, the particles in the second microcapsule 520, and the particles in the third microcapsule 530 are the same.

[0089] Because the pixel electrode slot 620 is arranged between the second common electrode 420 and the corresponding second pixel electrode 182, the electric field strength formed between the third pixel electrode 183 and the third common electrode 430 is E3, the electric field strength formed between the second pixel electrode 182 and the second common electrode 420 is E2, and the electric field strength formed between the first pixel electrode 181 and the first common electrode 410 is E1, E1<E2<E3, so the third common electrode 430 is connected to the third common voltage, and the first common voltage>the second common voltage>the third common voltage, thereby balancing the problem of uneven display brightness of the display panel 30 caused by the different sizes of E1, E2, and E3.

[0090] FIG. 9 is a schematic view of a plane of three common electrodes of a first embodiment of the present application, and FIG. 10 is a schematic view of a plane of a display panel corresponding to three common electrode connection points of the first embodiment of the present application, as shown in FIGS. 9-10, the display panel 30 further comprises a driving chip 700 disposed on the substrate 110, at least one first array substrate connection point 721, at least one second array substrate connection point 722, and at least one third array substrate connection point 723, the first array substrate connection point 721, the second array substrate connection point 722, and the third array substrate connection point 723 are respectively connected with the driving chip 700.

[0091] The first common electrode 410 is provided with at least one first common electrode connection point 711, the second common electrode 420 is provided with at least one second common electrode connection point 712, and the third common electrode 430 is provided with at least one third common electrode connection point 713; the first common electrode connection point 711 corresponds to the first array substrate connection point 721 one by one, the second common electrode connection point 712 corresponds to the second array substrate connection point 722 one by one, and the third common electrode connection point 713 corresponds to the third array substrate connection point 723 one by one; after the opposite substrate 300 is sealed with the array substrate 100, the first common electrode connection point 711 and the first array substrate connection point 721 are connected, the second common electrode connection point 712 and the second array substrate connection point 722 are connected, and the third common electrode connection point 713 and the third array substrate connection point 723 are connected, thereby achieving that the first common electrode 410 is provided with a first common voltage, the second common electrode 420 is provided with the second common voltage, and the third common electrode 430 is provided with the third common voltage.

[0092] And the first array substrate connection point 721, the second array substrate connection point 722, and the third array substrate connection point 723 of the present application are respectively located at the corners of the non-display area of the substrate 110.

[0093] Embodiment 2:

[0094] Fig. 11 is a schematic diagram of a display panel of a second embodiment of the present application, and Fig. 12 is a schematic diagram of an array substrate and an electronic paper film of the second embodiment of the present application. In combination with Figs. 11-12, the first common electrode 410 of the present embodiment corresponds to the pixel electrode slot 620, which is different from the first embodiment. Specifically, the display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, which are sequentially arranged on the substrate 110; a storage capacitor is formed between the common electrode 160 and the pixel electrode 150; the display panel 30 further comprises a pixel electrode slot 620, which penetrates the planar layer 140, the first pixel electrode 181 is located in the pixel electrode slot 620, and the pixel electrode slot 620 is located between the common electrode 160 and the first pixel electrode 181, and the orthogonal projection of the first common electrode 410 on the substrate 110 overlaps the orthogonal projection of the pixel electrode slot 620 on the substrate 110.

[0095] Compared with the scheme of the first embodiment, since the area of the adapter hole 610 is small, the microcapsules above the adapter hole 610 are also small relative to the entire display panel 30, and therefore, by only including the common electrode 400 with the first common electrode 410 and the second common electrode 420, and the first common electrode 410 only corresponding to the position of the pixel electrode slot 620 and the second common electrode 420 corresponding to the position other than the pixel electrode slot 620, the design is simpler and the yield is higher.

[0096] Fig. 13 is a schematic diagram of a planar view of two common electrodes of the second embodiment of the present application, and Fig. 14 is a schematic diagram of a planar view of a display panel with a driving chip of the second embodiment of the present application. The display panel 30 further comprises a driving chip 700 arranged on the substrate 110, and at least one first array substrate connecting point 721 and at least one second array substrate connecting point 722, which are respectively connected with the driving chip 700.

[0097] The first common electrode 410 is provided with at least one first common electrode connecting point 711, and the second common electrode 420 is provided with at least one second common electrode connecting point 712; the first common electrode connecting point 711 corresponds to the first array substrate connecting point 721 one by one, and the second common electrode connecting point 712 corresponds to the second array substrate connecting point 722 one by one; after the opposite substrate 300 and the array substrate 100 are boxed, the first common electrode connecting point 711 and the first array substrate connecting point 721 are connected, and the second common electrode connecting point 712 and the second array substrate connecting point 722 are connected, so as to provide the first common electrode 410 with a first common voltage and provide the second common electrode 420 with a second common voltage.

[0098] The first array substrate connecting point 721 and the second array substrate connecting point 722 of the present application are respectively located at the corners of the corresponding non-display area of the substrate 110.

[0099] Embodiment 3:

[0100] Fig. 15 is a schematic diagram of a display panel of a third embodiment of the present application, and Fig. 16 is a schematic diagram of an array substrate and an electronic paper film of the third embodiment of the present application. In combination with Figs. 15-16, different from the first embodiment, the first common electrode 410 of the present embodiment corresponds to the positions of the pixel electrode groove 620 and the adapter hole 610 at the same time, specifically: the display panel 30 comprises an adapter hole 610, the adapter hole 610 penetrates the insulating layer 130 and the flat layer 140, and the pixel electrode 150 is connected with the active switch 120 through the adapter hole 610;

[0101] The display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, which are sequentially arranged on the substrate 110; a storage capacitor is formed between the common electrode 160 and the pixel electrode 150; the display panel 30 further comprises a pixel electrode groove 620, which penetrates the flat layer;

[0102] The first pixel electrode 181 is located in the adapter hole 610 and in the pixel electrode groove 620, and the orthographic projection of the first common electrode 410 on the substrate 110 covers the orthographic projection of the pixel electrode groove 620 on the substrate 110 and the orthographic projection of the adapter hole 610 on the substrate 110.

[0103] Compared with the scheme of the first embodiment, the depth of the adapter hole 610 and the depth of the pixel electrode groove 620 are not much different, so by simultaneously corresponding the adapter hole 610 and the pixel electrode groove 620 to the first common electrode 410, and applying the first common voltage, the moving speed difference of the microcapsules above the adapter hole 610 and the pixel electrode groove 620 is small, and it is not necessary to include three common electrodes 400, which improves the yield of preparation.

[0104] FIG. 17 is a schematic diagram of a planar view of a two-common-electrode of the third embodiment of the present application, and FIG. 18 is a schematic diagram of a planar view of a display panel with a driving chip of the third embodiment of the present application, the display panel 30 further comprises a driving chip 700 disposed on the substrate 110, and at least one first array substrate connecting point 721 and at least one second array substrate connecting point 722, the first array substrate connecting point 721 and the second array substrate connecting point 722 are respectively connected with the driving chip 700.

[0105] The first common electrode 410 is provided with at least one first common electrode connecting point 711, and the second common electrode 420 is provided with at least one second common electrode connecting point 712; the first common electrode connecting point 711 corresponds to the first array substrate connecting point 721 one by one, and the second common electrode connecting point 712 corresponds to the second array substrate connecting point 722 one by one, after the opposite substrate 300 and the array substrate 100 are sealed, the first common electrode connecting point 711 and the first array substrate connecting point 721 are connected, and the second common electrode connecting point 712 and the second array substrate connecting point 722 are connected, thereby providing the first common voltage for the first common electrode 410 and providing the second common voltage for the second common electrode 420.

[0106] And the first array substrate connecting point 721 and the second array substrate connecting point 722 of the present application are respectively located at the corners of the corresponding non-display area of the substrate 110.

[0107] Embodiment 4:

[0108] Fig. 19 is a schematic view of a display panel of a fourth embodiment of the present application. As shown in Fig. 19, different from the first embodiment, the common electrode 400 of the present embodiment is not divided, but the first microcapsule 510 and the second microcapsule 520 are improved, specifically: the array substrate 100 further comprises a common electrode 400, the common electrode 400 is arranged on a side of the opposing substrate 300 facing the electronic paper film 200, the display panel 30 comprises a barrier wall 310, the barrier wall 310 is arranged between the pixel electrode 150 and the common electrode 400; and the barrier wall 310 is arranged between the first pixel electrode 181 and the second pixel electrode 182; the first microcapsule 510 has a greater number of charged particles than the second microcapsule 520.

[0109] The present embodiment can ensure that the moving speed of the particles in the first microcapsule 510 and the particles in the second microcapsule 520 is the same, even if the spacing between the first pixel electrode 181 and the common electrode 400 is greater than the spacing between the second pixel electrode 182 and the common electrode 400, resulting in a smaller electric field between the first pixel electrode 181 and the common electrode 400 than the electric field between the second pixel electrode 182 and the common electrode 400, thereby avoiding the problem of display unevenness of the display panel 30.

[0110] Furthermore, compared with the scheme of the first embodiment, the scheme of the present embodiment does not need to divide the common electrode 400, but only needs to connect the same common voltage, and the structure is simpler.

[0111] The material of the barrier wall 310 comprises a metal material, the electronic paper film 200 comprises a lower adhesive layer 210, a capsule layer 220 and an upper adhesive layer 230, the lower adhesive layer 210 is connected with the array substrate 100, the upper adhesive layer 230 is connected with the opposing substrate 300, and the two ends of the barrier wall 310 abut against the lower adhesive layer 210 and the upper adhesive layer 230, respectively. In this way, the barrier wall 310 can avoid the oblique electric field between the second edge portion 422 of the first common electrode 410 and the second pixel electrode 182; and avoid the oblique electric field between the first edge portion 412 of the second common electrode 420 and the first pixel electrode 181.

[0112] And the display panel 30 further comprises a transition hole 610, the transition hole 610 penetrates the insulating layer 130 and the flat layer 140, the pixel electrode 150 is connected with the active switch 120 through the transition hole 610, the first pixel electrode 181 is located in the transition hole 610, the first microcapsule 510 corresponds to the transition hole 610, that is, the first microcapsule 510 is located above the transition hole 610.

[0113] Fig. 20 is a schematic diagram of a pixel electrode slot of the fourth embodiment of the present application. As shown in Fig. 20, in order to improve the size of the storage capacitor, the display panel 30 of the electronic paper type needs to form a storage capacitor between the pixel electrode 150 and the common electrode 160 to maintain the movement of the particles in the microcapsule, and the pixel electrode slot 620 is arranged between the flat layer 140 corresponding to the pixel electrode 150 and the common electrode 160, thereby reducing the distance between the pixel electrode 150 and the common electrode 160 and improving the size of the storage capacitor.

[0114] For example, the display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, the common electrode 160 and the gate insulating layer 170 are sequentially arranged on the substrate 110; the common electrode 160 and the pixel electrode 150 form a storage capacitor; the display panel 30 further comprises a pixel electrode slot 620, the pixel electrode slot 620 penetrates the flat layer 140, and the pixel electrode slot 620 is located between the common electrode 160 and the pixel electrode 150.

[0115] The pixel electrode 150 further comprises a third pixel electrode 183, the distance between the second pixel electrode 182 and the opposite common electrode 400 is greater than the distance between the third pixel electrode 183 and the opposite common electrode 400; the second pixel electrode 182 is located in the pixel electrode slot 620; the microcapsule corresponding to the third pixel electrode 183 is a third microcapsule 530, and the charged amount of the particles in the second microcapsule 520 is greater than the charged amount of the particles in the third microcapsule 530.

[0116] Due to the pixel electrode groove 620 formed by the flat layer 140 between the second common electrode 420 and the second pixel electrode 182, the electric field strength formed between the third pixel electrode 183 and the third common electrode 430 is E3, the electric field strength formed between the second pixel electrode 182 and the second common electrode 420 is E2, and the electric field strength formed between the first pixel electrode 181 and the first common electrode 410 is E1, E1<E2<E3, so that the amount of charge of the particles in the first microcapsule 510 is greater than that of the particles in the second microcapsule 520, and the amount of charge of the particles in the second microcapsule 520 is greater than that of the particles in the third microcapsule 530, thereby balancing the problem of uneven display brightness of the display panel 30 caused by the different sizes of E1, E2 and E3.

[0117] Embodiment 5:

[0118] FIG. 21 is a schematic diagram of a display panel of a fifth embodiment of the present application. As shown in FIG. 21, different from the fourth embodiment, the first microcapsule 510 of the present embodiment is located above the pixel electrode groove 620. Specifically, the display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, which are sequentially arranged on the substrate 110; a storage capacitor is formed between the common electrode 160 and the pixel electrode 150; the display panel 30 further comprises a pixel electrode groove 620, which penetrates the flat layer 140; the first pixel electrode 181 is located in the pixel electrode groove 620, and the first microcapsule 510 corresponds to the pixel electrode groove 620.

[0119] Compared with the scheme of the fourth embodiment, since the area of the adapter hole 610 is small, the microcapsule above the adapter hole 610 is also small relative to the entire display panel 30, so that by only arranging the first microcapsule 510 above the position corresponding to the pixel electrode groove 620 and arranging the second microcapsule 520 in other positions, the design is simpler, and the yield is higher without the need to arrange the first microcapsule 510 in the small space above the adapter hole 610.

[0120] Embodiment 6:

[0121] FIG. 22 is a schematic diagram of a display panel of a sixth embodiment of the present application. As shown in FIG. 22, different from the fourth embodiment, the first microcapsule 510 of the present embodiment is located above both the pixel electrode groove 620 and the adapter hole 610. Specifically, the display panel 30 comprises an adapter hole 610, which penetrates the insulating layer 130 and the flat layer 140, and the pixel electrode 150 is connected to the active switch 120 through the adapter hole 610.

[0122] The display panel 30 further comprises a common electrode 160 and a gate insulating layer 170, which are sequentially arranged on the substrate 110; a storage capacitor is formed between the common electrode 160 and the pixel electrode 150; the display panel 30 further comprises a pixel electrode slot 620, which penetrates the planar layer 140; the first pixel electrode 181 is located in the transfer hole 610 and the pixel electrode slot 620, and the first microcapsule 510 corresponds to the transfer hole 610 and the pixel electrode slot 620.

[0123] Compared with the scheme of the fourth embodiment, the depth of the transfer hole 610 and the depth of the pixel electrode slot 620 are not greatly different, so by simultaneously arranging the first microcapsule 510 above the transfer hole 610 and the pixel electrode slot 620, the moving speed difference of the first microcapsule 510 above the transfer hole 610 and the pixel electrode slot 620 is small, and it is not necessary to arrange three kinds of microcapsules with different charge amounts, the process is simpler, and the preparation yield is improved.

[0124] It should be noted that the inventive concept of the present application can form a very large number of embodiments, but the length of the application file is limited and cannot be listed one by one, so the above-described embodiments or technical features can be combined to form new embodiments without conflict. The combination of each embodiment or technical feature will enhance the original technical effect.

[0125] The above is a further detailed description of the present application in combination with specific optional embodiments, and the specific implementation of the present application cannot be limited to these descriptions. For ordinary skilled persons in the technical field to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be regarded as falling within the protection scope of the present application.

Claims

1. A display panel comprising an array substrate, an electronic paper film, and an opposing substrate, wherein the electronic paper film is disposed between the array substrate and the opposing substrate, the array substrate comprising a substrate and an active switch, an insulating layer, a planar layer, and a pixel electrode sequentially disposed on the substrate, the array substrate further comprising a common electrode disposed on a side of the opposing substrate facing the electronic paper film; characterized in that: The pixel electrode includes a first pixel electrode and a second pixel electrode connected to each other, wherein a distance between the first pixel electrode and the common electrode facing the first pixel electrode is greater than a distance between the second pixel electrode and the common electrode facing the second pixel electrode; The electronic paper film includes a plurality of microcapsules, the microcapsule corresponding to the first pixel electrode is a first microcapsule, and the microcapsule corresponding to the second pixel electrode is a second microcapsule; the particles in the first microcapsule and the particles in the second microcapsule move at the same speed.

2. The display panel according to claim 1, wherein: The common electrode includes a first common electrode and a second common electrode, a gap is set between the first common electrode and the second common electrode, the orthographic projection of the first common electrode on the substrate overlaps with the orthographic projection of the first pixel electrode on the substrate, the orthographic projection of the second common electrode on the substrate overlaps with the orthographic projection of the second pixel electrode on the substrate, the distance between the first common electrode and the first pixel electrode is greater than the distance between the second common electrode and the second pixel electrode; the first common electrode is connected to a first common voltage, the second common electrode is connected to a second common voltage, and the first common voltage is greater than the second common voltage.

3. The display panel according to claim 2, wherein: The display panel includes a transfer hole, which passes through the insulating layer and the planar layer. The pixel electrode is connected to the active switch through the transfer hole. The first pixel electrode is located in the transfer hole. The orthographic projection of the first common electrode on the substrate overlaps with the orthographic projection of the transfer hole on the substrate.

4. The display panel according to claim 3, wherein: The pixel electrode further includes a third pixel electrode, the third pixel electrode is connected to both the first pixel electrode and the second pixel electrode, and the microcapsule corresponding to the third pixel electrode is a third microcapsule; The common electrode further includes a third common electrode, the first common electrode, the second common electrode and the third common electrode are all provided with gaps, and the orthographic projection of the third pixel electrode on the substrate overlaps with the orthographic projection of the third common electrode on the substrate; The display panel further includes a common electrode and a gate insulating layer, the common electrode and the gate insulating layer being sequentially disposed on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further includes a pixel electrode groove, the pixel electrode groove penetrating the planar layer and located between the common electrode and the second pixel electrode; The distance between the second common electrode and the second pixel electrode is greater than the distance between the third common electrode and the third pixel electrode; The third common electrode is connected to a third common voltage, and the second common voltage is greater than the third common voltage; the orthographic projection of the second common electrode on the substrate overlaps with the orthographic projection of the pixel electrode groove on the substrate; The particles in the first microcapsule, the particles in the second microcapsule, and the particles in the third microcapsule all move at the same speed.

5. The display panel according to claim 4, wherein: The display panel further includes a driving chip disposed on the substrate, at least one first array substrate connection point, at least one second array substrate connection point, and at least one third array substrate connection point, wherein the first array substrate connection point, the second array substrate connection point, and the third array substrate connection point are respectively connected to the driving chip; At least one first common electrode connection point is provided on the first common electrode, at least one second common electrode connection point is provided on the second common electrode, and at least one third common electrode connection point is provided on the third common electrode; The first common electrode connection point corresponds to the first array substrate connection point in a one-to-one manner, the second common electrode connection point corresponds to the second array substrate connection point in a one-to-one manner, and the third common electrode connection point corresponds to the third array substrate connection point in a one-to-one manner; After the opposing substrate is aligned with the array substrate, the first common electrode connection point is connected to the first array substrate connection point, the second common electrode connection point is connected to the second array substrate connection point, and the third common electrode connection point is connected to the third array substrate connection point, providing a first common voltage for the first common electrode, providing the second common voltage for the second common electrode, and providing the third common voltage for the third common electrode.

6. The display panel according to claim 5, wherein: The first array substrate connection point, the second array substrate connection point, and the third array substrate connection point are respectively located at corners of the non-display area of ​​the substrate.

7. The display panel according to claim 2, wherein: The display panel also includes a common electrode and a gate insulating layer, which are sequentially arranged on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel also includes a pixel electrode groove, which passes through the flat layer, the first pixel electrode is located in the pixel electrode groove, and the pixel electrode groove is located between the common electrode and the first pixel electrode, and the orthographic projection of the first common electrode on the substrate overlaps with the orthographic projection of the pixel electrode groove on the substrate.

8. The display panel according to claim 2, wherein: The display panel includes a transfer hole, the transfer hole passes through the insulating layer and the planar layer, and the pixel electrode is connected to the active switch through the transfer hole; The display panel further includes a common electrode and a gate insulating layer, the common electrode and the gate insulating layer being sequentially disposed on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further includes a pixel electrode groove, the pixel electrode groove penetrating the planar layer; The first pixel electrode is located in the transfer hole and the pixel electrode groove, and the orthographic projection of the first common electrode on the substrate covers and overlaps the orthographic projection of the pixel electrode groove on the substrate and the orthographic projection of the transfer hole on the substrate.

9. The display panel according to claim 7 or 8, characterized in that: The display panel further includes a driving chip disposed on the substrate, and at least one first array substrate connection point and at least one second array substrate connection point, wherein the first array substrate connection point and the second array substrate connection point are respectively connected to the driving chip; At least one first common electrode connection point is provided on the first common electrode, and at least one second common electrode connection point is provided on the second common electrode; The first common electrode connection points correspond to the first array substrate connection points in a one-to-one manner, and the second common electrode connection points correspond to the second array substrate connection points in a one-to-one manner; After the opposing substrate is aligned with the array substrate, the first common electrode connection point is connected to the first array substrate connection point, and the second common electrode connection point is connected to the second array substrate connection point, providing a first common voltage for the first common electrode and providing the second common voltage for the second common electrode.

10. The display panel according to claim 9, wherein: The first array substrate connection point and the second array substrate connection point are respectively located at corners of corresponding non-display areas of the substrate.

11. The display panel according to claim 2, wherein: The first common electrode includes a first main portion and a first edge portion, the first edge portion being arranged around the edge of the first main portion; the second common electrode includes a second main portion and a second edge portion, the second edge portion being arranged around the edge of the second main portion, the first edge portion being located at a position of the first main portion close to the second edge portion; The thickness of the first main body portion is equal to the thickness of the second main body portion, the thickness of the first main body portion is greater than the thickness of the first edge portion, and the thickness of the second main body portion is less than the thickness of the second edge portion.

12. The display panel according to claim 2, wherein: The width of the gap is between 8 μm and 10 μm.

13. The display panel according to claim 1, wherein The display panel includes a barrier wall, which is arranged between the pixel electrode and the common electrode; and the barrier wall is arranged between the first pixel electrode and the second pixel electrode; The charge amount of the particles in the first microcapsule is greater than the charge amount of the particles in the second microcapsule.

14. The display panel according to claim 13, wherein: The display panel includes a transfer hole, which passes through the insulating layer and the planar layer. The pixel electrode is connected to the active switch through the transfer hole. The first pixel electrode is located in the transfer hole, and the first microcapsule corresponds to the transfer hole.

15. The display panel according to claim 13, wherein: The display panel includes a transfer hole, the transfer hole passes through the insulating layer and the planar layer, and the pixel electrode is connected to the active switch through the transfer hole; The display panel further includes a common electrode and a gate insulating layer, the common electrode and the gate insulating layer being sequentially disposed on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further includes a pixel electrode groove, the pixel electrode groove penetrating the planar layer; The first pixel electrode is located in the transfer hole and the pixel electrode groove, and the first microcapsule corresponds to the transfer hole and the pixel electrode groove.

16. The display panel according to claim 13, wherein: The material of the retaining wall includes a metal material, and the electronic paper film includes a lower adhesive layer, a capsule layer and an upper adhesive layer. The lower adhesive layer is connected to the array substrate, and the upper adhesive layer is connected to the opposing substrate. The two ends of the retaining wall are respectively in contact with the lower adhesive layer and the upper adhesive layer.

17. The display panel according to claim 14, wherein: The display panel further includes a common electrode and a gate insulating layer, the common electrode and the gate insulating layer being sequentially disposed on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further includes a pixel electrode groove, the pixel electrode groove penetrating the planar layer and located between the common electrode and the pixel electrode; The pixel electrode also includes a third pixel electrode, and the distance between the second pixel electrode and the common electrode facing it is greater than the distance between the third pixel electrode and the common electrode facing it; the second pixel electrode is located in the pixel electrode groove; the microcapsule corresponding to the third pixel electrode is a third microcapsule, and the charge of the particles in the second microcapsule is greater than the charge of the particles in the third microcapsule.

18. The display panel according to claim 13, wherein: The display panel also includes a common electrode and a gate insulating layer, which are sequentially arranged on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel also includes a pixel electrode groove, which passes through the flat layer; the first pixel electrode is located in the pixel electrode groove, and the first microcapsule corresponds to the pixel electrode groove.

19. The display panel according to claim 13, wherein: The display panel includes a transfer hole, the transfer hole passes through the insulating layer and the planar layer, and the pixel electrode is connected to the active switch through the transfer hole; The display panel further includes a common electrode and a gate insulating layer, the common electrode and the gate insulating layer being sequentially disposed on the substrate; a storage capacitor is formed between the common electrode and the pixel electrode; the display panel further includes a pixel electrode groove, the pixel electrode groove penetrating the planar layer; The first pixel electrode is located in the transfer hole and the pixel electrode groove, and the first microcapsule corresponds to the transfer hole and the pixel electrode groove.

20. A display device, characterized in that: The display device includes a driving circuit and a display panel according to any one of claims 1 to 19, wherein the driving circuit drives the display panel to display an image.

Images