Power module and power device

Abstract

Provided in some embodiments of the present application are a power module and a power device. The power module comprises a substrate structure and an interconnection structure which are stacked in a first direction. The substrate structure comprises a substrate and a power chip arranged on the substrate. The interconnection structure comprises a first power electrode, a second power electrode and an output electrode, wherein at least part of the first power electrode, at least part of the second power electrode and at least part of the output electrode are stacked in the first direction and are insulated from each other; and the first power electrode is used for electrically connecting to the power chip, the second power electrode is used for electrically connecting to a conductive layer of the substrate, and the output electrode is used for electrically connecting to the power chip and the conductive layer. A three-dimensional structural design is used in the interconnection structure. Therefore, some of the magnetic flux brought about by power loop links in a power module is cancelled, such that the mutual inductance between power loops in the power module is enhanced, and thus the mutual inductance cancellation effect of the power loop links is improved, thereby facilitating a reduction in a total parasitic inductance of the power module.

Description

Power module and power device

[0001] The present application claims priority to the Chinese patent application No. 202410430722.4, filed on April 10, 2024, entitled “Power module and power device”, the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of semiconductor packaging, in particular to a power module and a power device. BACKGROUND

[0003] Current power modules are rapidly developing towards high frequency, high junction temperature, high efficiency, etc. In actual applications, parasitic inductance is one of the main problems that need to be overcome in the application of power electronic devices. In particular, in high-voltage high-frequency application scenarios, large parasitic inductance can cause large voltage spikes, increased loss, and other problems, affecting the overall performance and long-term reliability of the power module. SUMMARY

[0004] The embodiments of the present application provide a power module and a power device which are beneficial to reducing parasitic inductance and improving reliability.

[0005] In a first aspect, some embodiments of the present application provide a power module, which includes a substrate structure and an interconnection structure stacked along a first direction. The substrate structure includes a substrate and a power chip disposed on the substrate. The interconnection structure includes a first power electrode, a second power electrode, and an output electrode. At least part of the first power electrode, at least part of the second power electrode, and at least part of the output electrode are stacked and insulated from each other along the first direction. The first power electrode is configured to electrically connect with the power chip, the second power electrode is configured to electrically connect with a conductive layer of the substrate, and the output electrode is configured to electrically connect with the power chip and the conductive layer.

[0006] The power module provided in the application, the first power electrode is used for electrical connection with the power chip, that is, the first power electrode is used for connection with the negative electrode of the direct current power supply, the second power electrode is used for electrical connection with the conductive layer, that is, the second power electrode is used for connection with the negative electrode of the direct current power supply, when the current flows through the power loop in which the power module is located, the current is input from the second power electrode, passes through the conductive layer and the power chip, and is then output from the first power electrode; since the substrate structure and the interconnection structure are stacked along the first direction, at least part of the first power electrode, at least part of the second power electrode and at least part of the output electrode are stacked along the first direction, that is, the interconnection structure adopts a three-dimensional structure design, the current directions of at least part of the first power electrode and at least part of the second power electrode which are stacked with each other are opposite, so that part of the magnetic flux caused by the power loop link in the power module is offset, the mutual inductance of the power loop of the power module is enhanced, and then the mutual inductance offset effect of the power loop link is increased, so as to facilitate reduction of the overall parasitic inductance of the power module. In addition, at least part of the first power electrode, at least part of the second power electrode and at least part of the output electrode overlap with each other along the first direction, which is beneficial to the layout of the module circuit of the power module and reduction of the area occupied by the power module.

[0007] According to the first aspect, in a possible implementation, the first power electrode, the second power electrode and the output electrode each include a trunk part and at least one branch part, one end of each branch part is connected with the trunk part and covers the substrate. The trunk part of the first power electrode, the trunk part of the second power electrode and the trunk part of the output electrode are stacked along the first direction. Each branch part of the first power electrode, one branch part of the second power electrode and one branch part of the output electrode are stacked along the first direction.

[0008] In this possible implementation, the trunk parts of the first power electrode, the second power electrode and the output electrode are sequentially stacked along the first direction, and the corresponding branch parts of the first power electrode, the second power electrode and the output electrode are sequentially stacked along the first direction. The stacked area of the first power electrode, the second power electrode and the output electrode is large, which is beneficial to further enhancing the mutual inductance of the power loop of the power module and further reducing the overall parasitic inductance of the power module.

[0009] According to the first aspect, in a possible implementation, at least one of the trunk part and the branch part is provided with a pin terminal, the pin terminal of the first power electrode is used for connection with the power chip, the pin terminal of the second power electrode is used for connection with the conductive layer, and the pin terminal of the output electrode is used for connection with the conductive layer and the power chip.

[0010] In this possible implementation, the interconnection structure adopts the pin terminal to be electrically connected with the power chip and the conductive layer, which is beneficial to improving the electrical connection stability between the interconnection structure and the power chip and between the interconnection structure and the conductive layer.

[0011] According to the first aspect, in a possible implementation manner, the branch part extends along the second direction, the at least one branch part comprises a first branch part, a second branch part and a third branch part arranged in sequence along a third direction, the third direction, the first direction and the second direction are perpendicular to each other; the opposite sides of the first branch part and the second branch part of the first power electrode are provided with pin terminals; the opposite sides of the second branch part and the third branch part of the second power electrode are provided with pin terminals; and the opposite sides of the first branch part and the second branch part and the opposite sides of the second branch part and the third branch part of the output electrode are provided with pin terminals.

[0012] In the possible implementation manner, since the pin terminals of the first power electrode are arranged on the inner wall of the first through slot, and the pin terminals of the second power electrode are arranged on the inner wall of the second through slot, the connection between the pin terminals of the first power electrode and the substrate structure and the connection between the pin terminals of the second power electrode and the substrate structure are facilitated, and the simplicity of the internal pin terminal layout of the power module is improved.

[0013] According to the first aspect, in a possible implementation manner, the overlapping area of the orthographic projection of the pin terminal of the first power electrode on the substrate, the orthographic projection of the pin terminal of the second power electrode on the substrate and the orthographic projection of the pin terminal of the output electrode on the substrate is 0.

[0014] In the possible implementation manner, the overlapping area of the orthographic projection of the pin terminal of the first power electrode on the substrate, the orthographic projection of the pin terminal of the second power electrode on the substrate and the orthographic projection of the pin terminal of the output electrode on the substrate is 0, that is, the pin terminal of the first power electrode, the pin terminal of the second power electrode and the pin terminal of the output electrode are staggered, and the electrical interconnection between each pin terminal and the substrate or the power chip on the substrate is facilitated.

[0015] According to the first aspect, in a possible implementation manner, the pin terminal of each first power electrode and the corresponding pin terminal of the output electrode are arranged in a first direction; and / or, the pin terminal of each second power electrode and part of the corresponding pin terminal of the output electrode are arranged in a second direction.

[0016] In the possible implementation manner, the pin terminal of each first power electrode and the corresponding pin terminal of the output electrode are arranged in a first direction; and / or, the pin terminal of each second power electrode and part of the corresponding pin terminal of the output electrode are arranged in a second direction, which facilitates the layout simplicity of the power module.

[0017] According to the first aspect, in a possible implementation manner, one end of the pin terminal connected with the substrate structure is perpendicular to the side of the substrate facing the interconnection structure.

[0018] In the possible implementation manner, the end of the pin terminal connected with the substrate structure is perpendicular to the surface of the substrate structure facing the interconnection structure, so that the end of the pin terminal closer to the substrate is not bent, and the structure of the pin terminal is simplified, and the manufacturing of the interconnection structure is facilitated.

[0019] According to the first aspect, in a possible implementation manner, the pin terminal comprises a first part and a second part connected with each other, the first part is perpendicular to the substrate, and the second part is bent relative to the first part and parallel to the surface of the substrate structure facing the interconnection structure, and the second part is used for being connected with the substrate structure.

[0020] In the possible implementation manner, since the second part is bent relative to the first part and parallel to the surface of the substrate structure facing the interconnection structure, the connection area between the second part and the conductive layer or between the second part and the power chip is increased, and the connection stability between the interconnection structure and the conductive layer or between the interconnection structure and the power chip is increased.

[0021] According to the first aspect, in a possible implementation manner, the first power electrode is provided with a first power terminal at one end in a second direction perpendicular to the first direction, and the first power terminal is used for being connected with the negative electrode of the direct-current power supply; the second power electrode is provided with a second power terminal at one end in the second direction, and the second power terminal is used for being connected with the negative electrode of the direct-current power supply; the first power terminal and the second power terminal are stacked and insulated from each other along the first direction, or the first power terminal and the second power terminal are spaced apart and insulated from each other along a direction perpendicular to the first direction.

[0022] In the possible implementation manner, when the second power terminal, the first power terminal and the third power terminal are arranged along the third direction, the second power terminal, the first power terminal and the third power terminal can be regarded as a tiled structure, and the tiled structure is beneficial to improve the convenience of electrically connecting the second power terminal, the first power terminal and the third power terminal to the circuit board or other devices by laser welding or screw fixing.

[0023] When the first power terminal and the second power terminal are stacked and insulated from each other along the first direction, the direction of the magnetic field generated by the first power terminal when passing through the current is opposite to the direction of the magnetic field generated by the second power terminal when passing through the current, further enhancing the mutual inductance of the power loop of the power module, that is, enhancing the mutual inductance offset effect of the power loop, and further reducing the parasitic inductance of the power loop of the power module.

[0024] In a possible implementation manner according to the first aspect, the second power electrode is further provided with a third power terminal at one end in the second direction, and the second power terminal, the first power terminal and the third power terminal are arranged in a third direction, which is perpendicular to the first direction and perpendicular to the second direction.

[0025] In the possible implementation manner, the second power terminal and the third power terminal of the second power electrode can be used for inputting or outputting direct current, which facilitates the connection with external devices.

[0026] In a possible implementation manner according to the first aspect, the output electrode is provided with an output power terminal at one end in the second direction. The output power terminal and the first power terminal are located on opposite sides of the substrate in the second direction.

[0027] In the possible implementation manner, the output power terminal and the first power terminal are located on opposite sides of the substrate in the second direction, which is conducive to improving the layout simplicity of the power module.

[0028] In a possible implementation manner according to the first aspect, the power module further comprises an output power terminal which is separately arranged from the output electrode and is electrically connected to the output electrode through the conductive layer.

[0029] In the possible implementation manner, the output electrode and the output power terminal are separately arranged, which is conducive to simplifying the structure of the interconnection structure and improving the flexibility of the layout of the power module.

[0030] In a possible implementation manner according to the first aspect, the substrate structure comprises a plurality of board units, each of which comprises a substrate and a power chip; each of the first power electrode, the second power electrode and the output electrode comprises a main part and at least two branch parts, and a through slot is arranged between adjacent two branch parts; each branch part of the first power electrode, each branch part of the second power electrode and each branch part of the output electrode correspond to one board unit.

[0031] In the possible implementation manner, since the plurality of board units share the same interconnection structure, the structure of the power module is simplified.

[0032] In a possible implementation manner according to the first aspect, the power chip comprises a first bridge arm chip and a second bridge arm chip, and the first bridge arm chip and the second bridge arm chip are arranged on the substrate and are electrically connected to the conductive layer of the substrate; the first power electrode is used for electrical connection with the first bridge arm chip, the second power electrode is used for electrical connection with the conductive layer, and the output electrode is used for electrical connection with the second bridge arm chip and the conductive layer.

[0033] In the possible implementation manner, the power module can be a 2-in-1 module or a 6-in-1 module.

[0034] In a second aspect, some embodiments of the present application further provide a power device, which includes a circuit board and a power module according to the first aspect, wherein the power module is arranged on the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] FIG1 is a schematic structural diagram of a vehicle provided in one embodiment of the present application;

[0036] FIG2 is a structural block diagram of a powertrain provided in one embodiment of the present application;

[0037] FIG3 is a schematic structural diagram of a photovoltaic system provided in one embodiment of the present application;

[0038] FIG4 is a schematic structural diagram of an inverter circuit provided in one embodiment of the present application;

[0039] FIG5A is a schematic diagram of a three-dimensional assembly of a power module provided in one embodiment of the present application;

[0040] FIG5B is a schematic exploded perspective view of the power module shown in FIG5A ;

[0041] FIG6 is a side view of a power module provided in one embodiment of the present application;

[0042] FIG7 is a schematic diagram of the current path of the power module from a top view;

[0043] FIG8 is a schematic diagram of the current path of the power module from a side view;

[0044] FIG9 shows an enlarged schematic diagram of the dotted area in FIG4 ;

[0045] FIG10 is a perspective schematic diagram of an interconnection structure provided in some embodiments of the present application;

[0046] FIG11 is a perspective exploded schematic diagram of the interconnection structure shown in FIG10 ;

[0047] FIG12 is an enlarged schematic diagram of a partial area B in FIG6 ;

[0048] FIG13 is a schematic diagram of a possible implementation method of connecting a pin terminal to a substrate structure provided in some embodiments of the present application;

[0049] FIG14 is a side view of the power module shown in FIG13;

[0050] FIG15 is a schematic diagram of a possible implementation method of connecting a pin terminal to a substrate structure provided in some embodiments of the present application;

[0051] FIG16 is a side view of the power module shown in FIG15 ;

[0052] Fig. 17 is a schematic diagram of one possible implementation of a pin terminal and a substrate structure according to some embodiments of the present application;

[0053] Fig. 18 is a side view of the power module of Fig. 15;

[0054] Fig. 19 is a perspective view of a power module according to some embodiments of the present application;

[0055] Fig. 20 is a perspective view of a power module according to some embodiments of the present application;

[0056] Fig. 21 is a side view of the power module of Fig. 20;

[0057] Fig. 22 is a top view of a power module according to some embodiments of the present application;

[0058] Fig. 23 is a side view of the power module of Fig. 22;

[0059] Fig. 24 is a top view of a power module according to some embodiments of the present application;

[0060] Fig. 25 is a side view of the power module of Fig. 24.

[0061] Fig. 25 is a side view of the power module of Fig. 24.

[0061] Reference signs: 1000 - vehicle; 300 - vehicle body; 200 - battery pack; 100 - powertrain; 101 - power device; 103 - drive motor; 30 - power module; 301 - input terminal; 303 - output terminal; 2000 - photovoltaic system; 401 - DC power supply; 403 - load; 31 - substrate structure; 310 - board unit; 311 - substrate; 3111 - insulating base material; 3113 - conductive layer; 3115 - heat dissipation layer; 313 - power chip; 3131 - first bridge arm chip; 3133 - second bridge arm chip; 33 - interconnection structure; 331 - first power electrode; 332 - second power electrode; 333 - output electrode; 334 - insulating layer; 336, 336A, 336B, 336C - through slot; 3361, 3361A, 3361B, 3361C - first through slot; 3363, 3363A, 3363B, 3363C - second through slot; 3311A, 3311B, 3311C - stem portion; 3312A, 3312B, 3312C - branch portion; 3313A, 3313B, 3313C - first branch portion; 3315A, 3315B, 3315C - second branch portion; 3317A, 3317B, 3317C - third branch portion; 3318 - first power terminal; 3321 - second power terminal; 3323 - third power terminal; 3331 - output power terminal; 337A, 337B, 337C - pin terminal; 339 - bonding layer; Z - first direction; Y - second direction; X - third direction. DETAILED DESCRIPTION

[0062] Referring to FIG. 1, FIG. 1 is a structural schematic diagram of a vehicle according to an embodiment of the present application. The vehicle 1000 includes a vehicle body 300, a battery pack 200 and a power assembly 100. The battery pack 200 and the power assembly 100 are both mounted on the vehicle body 300. The battery pack 200 is configured to provide direct current to the power assembly 100. The power assembly 100 is configured to provide power to the vehicle 1000. The vehicle 1000 can further include other necessary or non-necessary structures, which are not described herein.

[0063] Referring to FIG. 2, FIG. 2 is a structural block diagram of the power assembly according to an embodiment of the present application. The power assembly 100 includes a power device 101 and a drive motor 103. The power device 101 includes a circuit board 10 and a power module 30 disposed on the circuit board 10. The power module 30 includes an input end 301 and an output end 303. The input end 301 is a direct current input end, and the output end 303 is an alternating current output end. The input end 301 of the power module 30 is electrically connected to the battery pack 200, and the output end 303 of the power module 30 is electrically connected to the drive motor 103. The power module 30 is configured to convert the direct current output by the battery pack 200 into alternating current and transmit the alternating current to the drive motor 103. The power module 30 is a semiconductor device configured to transform the voltage, current and frequency of the direct current output by the battery pack 200.

[0064] Referring to FIG. 3, FIG. 3 is a structural schematic diagram of a photovoltaic system according to an embodiment of the present application. The power module 30 according to the present application can also be applied to the photovoltaic system 2000. The photovoltaic system 2000 includes a power device 101 and a photovoltaic assembly 105. The photovoltaic assembly 105 is electrically connected to the power device 101. The direct current generated by the photovoltaic assembly 105 is converted into alternating current by the power module 30. The alternating current output by the power module 30 is transmitted to a power consumer, such as a base station or a data center.

[0065] Referring to FIG. 4, FIG. 4 is a schematic diagram of an inverter circuit. The inverter circuit includes a direct current power supply 401, a load 403 and three power modules 30. The power modules 30 are connected to the direct current power supply 401. The power modules 30 are configured to convert the direct current output by the direct current power supply 401 into alternating current and output the alternating current to the load 403. The power modules 30 can also be configured to convert alternating current into direct current. In summary, the power modules 30 are configured to convert between direct current and alternating current. The number of power modules 30 is not limited in the present application.

[0066] Traditional power module packaging usually adopts two-dimensional planar connection mode, using traditional planar (2D) interconnection sheet or wire bonding mode to connect power chips on the substrate and external circuits, which generates a large parasitic inductance. In high-voltage high-frequency application scenarios, a large parasitic inductance can cause a large voltage spike, increased loss, and other problems, affecting the overall performance and long-term reliability of the power module.

[0067] Based on this, referring to FIGS. 5A and 5B, some embodiments of the present application provide a power module 30, which includes a substrate structure 31 and an interconnection structure 33 stacked along a first direction Z. The interconnection structure 33 is used to connect the conduction current. For example, the interconnection structure 33 can be used to connect with the DC power supply 401 and the load 403. The substrate structure 31 includes a substrate 311 and a power chip 313 disposed on the substrate 311. The substrate 311 is used to carry the power chip 313 and the interconnection structure 33. The interconnection structure 33 includes a first power electrode 331, a second power electrode 332, and an output electrode 333, at least part of the first power electrode 331, at least part of the second power electrode 332, and at least part of the output electrode 333 are stacked along the first direction Z and insulated from each other, the first power electrode 331 is used to electrically connect with the power chip 313, the second power electrode 332 is used to electrically connect with a conductive layer 3113 of the substrate 311, and the output electrode 333 is used to electrically connect with the power chip 313 and the conductive layer 3113.

[0068] In some embodiments of the present application, the power module 30 is applied to the inverter circuit shown in FIG. 4, for example, the second power electrode 332 is used to connect with the positive electrode of the DC power supply 401, the first power electrode 331 is connected with the negative electrode of the DC power supply 401, and the output electrode 333 is connected with the load 403, that is, the first power electrode 331 can be regarded as a DC negative bus, the second power electrode 332 can be regarded as a DC positive bus, and the output electrode 333 is an AC bus. The current is input from the second power electrode 332 and output from the first power electrode 331. The output electrode 333 is used to output AC power to the load 403.

[0069] Since the substrate structure 31 and the interconnection structure 33 are stacked along the first direction Z, and at least part of the first power electrode 331, at least part of the second power electrode 332 and at least part of the output electrode 333 are stacked along the first direction Z, that is, the interconnection structure 33 adopts a three-dimensional structure design, the magnetic flux caused by the power loop link in the power module 30 is partially offset, the mutual inductance of the power loop of the power module 30 is enhanced, and the mutual inductance offset effect of the power loop link is increased, so as to facilitate reducing the overall parasitic inductance of the power module 30. In addition, at least part of the first power electrode 331, at least part of the second power electrode 332 and at least part of the output electrode 333 overlap each other along the first direction Z, which is conducive to the layout of the module circuit of the power module 30 and reduces the area occupied by the power module 30.

[0070] Please refer to FIG. 6, the substrate 311 further comprises an insulating substrate 3111, a conductive layer 3113 and a heat dissipation layer 3115, the conductive layer 3113, the insulating substrate 3111 and the heat dissipation layer 3115 are sequentially stacked along the first direction Z. The substrate 311 can be an active metal brazing substrate, a copper-clad ceramic substrate, etc. The active metal brazing substrate refers to a metal layer such as a copper layer or an aluminum layer being welded on both sides of the insulating substrate 3111 by metal solder, for example, the conductive layer 3113 and the heat dissipation layer 3115 can be formed by etching the copper layer, and the conductive layer 3113 comprises the circuit required by the power module 30. In the copper-clad ceramic substrate, the insulating substrate 3111 is a ceramic substrate, and the conductive layer (such as a copper foil) is directly bonded to the insulating substrate 3111 at high temperature. The application does not limit the type of substrate 311. The heat dissipation layer 3115 can be used to connect with a heat sink or other devices.

[0071] The power chip 313 is disposed on and connected with the conductive layer 3113. In some embodiments of the present application, the power chip 313 is attached on the conductive layer 3113 by welding or sintering, etc. The number of the power chip 313 is multiple. The multiple power chips 313 are arranged in an array on the substrate 311. The multiple power chips 313 can include at least one of a metal oxide semiconductor (power MOS tube), an insulated gate bipolar transistor (IGBT), and a fast recovery diode (FRD). The present application does not limit the type of the power chip 313. For example, the multiple power chips 313 include multiple columns, and each column of the power chip 313 includes multiple power chips 313. Among them, the multiple power chips 313 are sequentially and spacedly arranged in 4 columns along the third direction X, and each column includes 4 power chips 313, and the 4 power chips 313 in each column are arranged along the second direction Y. Along the third direction X in FIG. 7, from left to right, the 4 columns of power chips 313 include the first column of power chips 313, the second column of power chips 313, the third column of power chips 313, and the fourth column of power chips 313. The present application does not limit the total number of columns of the power chip 313, the present application does not limit the number of power chips 313 in each column, and the present application does not limit the arrangement manner of the multiple power chips 313.

[0072] Please continue to refer to FIG. 7, the power chip 313 includes the first bridge arm chip 3131 and the second bridge arm chip 3133. For convenience of identification, in FIG. 7, the first power electrode 331 is not filled with color, the second power electrode 332 is filled with gray, and the output electrode 333 is filled with black. The first bridge arm chip 3131 and the second bridge arm chip 3133 are both disposed on the substrate 311 and electrically connected with the conductive layer 3113 of the substrate 311. The first power electrode 331 is used for electrically connecting with the first bridge arm chip 3131, the second power electrode 332 is used for electrically connecting with the conductive layer 3113, and the output electrode 333 is used for electrically connecting with the second bridge arm chip 3133 and the conductive layer 3113.

[0073] Please refer to FIG. 7 and FIG. 8, the current paths of the current in the power module 30 are shown by arrows in FIG. 7 and FIG. 8. The current paths in FIG. 7 and FIG. 8 do not represent the actual current paths of the current in the power module 30. The current is input from the second power electrode 332, sequentially passes through the conductive layer 3113, the second bridge arm chip 3133, the conductive layer 3113, the first bridge arm chip 3131, the first power electrode 331, and is output from the first power electrode 331. At least part of the first power electrode 331 and the second power electrode 332 which are stacked with each other have opposite current directions when the current flows, so that the directions of the generated magnetic fields are opposite.

[0074] FIG. 9 shows a schematic diagram of the internal circuit of the power module 30 shown in FIG. 4, wherein the circular dashed boxes in FIG. 9 represent the first bridge arm chip 3131 and the second bridge arm chip 3133, respectively, each of which can be one or formed by two or more power chips 313 in parallel. In FIG. 9, Pbus can represent the second power electrode 332, Nbus can represent the first power electrode 331, and ACbus can represent the output electrode 333.

[0075] The overall parasitic inductance of the power module 30 can be calculated by the formula: L loop＝ L P +L AC +L N -2(M P-AC +M AC-N +M P-N ).

[0076] L loop is the overall parasitic inductance of the power module 30.

[0077] L P ,L N ,L AC represents the parasitic inductance generated by the internal power loop of the power module 30. M P-AC ,M P-N ,M AC-N represents the mutual inductance generated by the internal power loop of the power module 30.

[0078] The first power electrode 331 is used for electrical connection with the power chip 313, i.e., the first power electrode 331 is used for connection with the negative electrode of the DC power supply 401, and the second power electrode 332 is used for electrical connection with the conductive layer 3113, i.e., the second power electrode 332 is used for connection with the negative electrode of the DC power supply 401. When the power loop in which the power module 30 is located flows through the current, the current is input from the second power electrode 332, then passes through the conductive layer 3113 and the power chip 313, and is output from the first power electrode 331. Since at least part of the first power electrode 331, at least part of the second power electrode 332, and at least part of the output electrode 333 are stacked in the first direction Z, at least part of the first power electrode 331 and the second power electrode 332 are stacked with each other in opposite directions of the current when the current flows, so that part of the magnetic flux caused by the power loop link in the power module 30 is canceled out, the mutual inductance of the power loop of the power module 30 is enhanced, and thus the mutual inductance cancellation effect of the power loop link is greater, i.e., the value of (M P-AC +M AC-N +M P-N ) is increased, which is conducive to reducing the overall parasitic inductance L loop of the power module 30.

[0079] In this embodiment, referring to FIG. 10, the output electrode 333, the second power electrode 332 and the first power electrode 331 are sequentially stacked in the first direction Z, and the output electrode 333 is arranged on the side of the interconnection structure 33 close to the substrate 311 in the first direction Z. An insulating layer 334 is arranged between the output electrode 333 and the second power electrode 332 to realize mutual insulation between the output electrode 333 and the second power electrode 332. An insulating layer 334 is arranged between the second power electrode 332 and the first power electrode 331 to realize mutual insulation between the second power electrode 332 and the first power electrode 331. The application does not limit the stacking order of the output electrode 333, the second power electrode 332 and the first power electrode 331 to enhance the layout flexibility of the power module 30. For example, in the first direction Z, the output electrode 333 can be arranged between the second power electrode 332 and the first power electrode 331, or the first power electrode 331 can be arranged between the output electrode 333 and the second power electrode 332. The first power electrode 331, the second power electrode 332 and the output electrode 333 can be composed of copper or aluminum or an alloy thereof. It can be understood that the application does not limit the material of the first power electrode 331, the second power electrode 332 and the output electrode 333.

[0080] Referring to FIG. 11, the first power electrode 331 includes a trunk portion 3311A and a branch portion 3312A, and one end of the branch portion 3312A is connected to the trunk portion 3311A and covers the substrate 311. In this embodiment, the branch portion 3312A extends in the second direction Y perpendicular to the first direction Z. The second power electrode 332 includes a trunk portion 3311B and a branch portion 3312B, and one end of the branch portion 3312B is connected to the trunk portion 3311B and covers the substrate 311. The branch portion 3312B extends in the second direction Y perpendicular to the first direction Z. The output electrode 333 includes a trunk portion 3311C and a branch portion 3312C, and one end of the branch portion 3312C is connected to the trunk portion 3311C and covers the substrate 311. The branch portion 3312C extends in the second direction Y perpendicular to the first direction Z.

[0081] In some embodiments of the present application, the number of branch portions 3312A, the number of branch portions 3312B, and the number of branch portions 3312C are each at least two, the at least two branch portions 3312A are arranged at intervals, the trunk portion 3311A and the adjacent two branch portions 3312A enclose a through slot 336A; the at least two branch portions 3312B are arranged at intervals; the trunk portion 3311B and the adjacent two branch portions 3312B enclose a through slot 336B; and the at least two branch portions 3312C are arranged at intervals, the trunk portion 3311C and the adjacent two branch portions 3312C enclose a through slot 336C. The present application does not limit the number of branch portions 3312A to be at least two, the number of branch portions 3312B to be at least two, and the number of branch portions 3312C to be at least two. The number of branch portions 3312A can also be one, the number of branch portions 3312B can also be one, and the number of branch portions 3312C can also be one.

[0082] The through slot 336A of the first power electrode 331, the corresponding through slot 336B of the second power electrode 332, and the corresponding through slot 336C of the output electrode 333 are connected to form a through slot 336 that penetrates through the two opposite sides of the interconnection structure 33 in the first direction Z (as shown in FIG. 7), and the through slot 336 is provided with the power chip 313 in the area where the orthographic projection of the substrate 311 is located. The substrate 311 is provided with the power chip 313 corresponding to the area where the through slot 336 is located, and the part of the power chip 313 of the substrate 311 corresponding to the area where the through slot 336 is located can not be covered by the interconnection structure 33, or the power chip 313 of the substrate 311 corresponding to the area where the through slot 336 is located can not be covered by the interconnection structure 33.

[0083] Please continue to refer to FIG. 11, the trunk portion 3311A of the first power electrode 331, the trunk portion 3311B of the second power electrode 332, and the trunk portion 3311C of the output electrode 333 are stacked along the first direction Z. The branch portion 3312A of the first power electrode 331, the branch portion 3312B of one second power electrode 332, and the branch portion 3312C of one output electrode 333 are stacked along the first direction Z.

[0084] Since the trunk portions 3311A, 3311B and 3311C are sequentially stacked along the first direction Z, and each branch portion 3312A, the corresponding branch portion 3312B and the corresponding branch portion 3312C are sequentially stacked along the first direction Z, the stacking area of the first power electrode 331, the second power electrode 332 and the output electrode 333 is large, which is conducive to further enhancing the power loop mutual inductance of the power module 30 and further reducing the overall parasitic inductance of the power module 30. In the present embodiment, as shown in FIG. 11, the plurality of branch portions 3312A include a first branch portion 3313A, a second branch portion 3315A and a third branch portion 3317A. The first branch portion 3313A, the second branch portion 3315A and the third branch portion 3317A are sequentially arranged along the third direction X. The number of through grooves 336A is two, and the through grooves 336A include a first through groove 3361A and a second through groove 3363A. The first branch portion 3313A, the second branch portion 3315A and the trunk portion 3311A enclose the first through groove 3361A, and the second branch portion 3315A, the third branch portion 3317A and the trunk portion 3311A enclose the second through groove 3363A. The third direction X is perpendicular to the second direction Y, and the third direction X is perpendicular to the first direction Z. It can be understood that the present application does not limit any two of the first direction Z, the second direction Y and the third direction X to be perpendicular, for example, any two of the first direction, the second direction and the third direction are not the same.

[0085] The plurality of branch portions 3312B include a first branch portion 3313B, a second branch portion 3315B and a third branch portion 3317B. The first branch portion 3313B, the second branch portion 3315B and the third branch portion 3317B are sequentially arranged along the third direction X. The number of through grooves 336B is two, and the through grooves 336B include a first through groove 3361B and a second through groove 3363B. The first branch portion 3313B, the second branch portion 3315B and the trunk portion 3311B enclose the first through groove 3361B, and the second branch portion 3315B, the third branch portion 3317B and the trunk portion 3311B enclose the second through groove 3363B.

[0086] The plurality of branch portions 3312C includes a first branch portion 3313C, a second branch portion 3315C, and a third branch portion 3317C. The first branch portion 3313C, the second branch portion 3315C, and the third branch portion 3317C are arranged in sequence along the third direction X. The number of the through-slots 336C is two, and the through-slots 336C include a first through-slot 3361C and a second through-slot 3363C. The first branch portion 3313C, the second branch portion 3315C, and the trunk portion 3311C enclose the first through-slot 3361C, and the second branch portion 3315C, the third branch portion 3317C, and the trunk portion 3311C enclose the second through-slot 3363C. The first through-slot 3361A, the first through-slot 3361B, and the first through-slot 3361C are connected to form a first through-slot 3361 (as shown in FIG. 7) that penetrates through the two opposite sides of the interconnection structure 33 in the first direction Z. The second through-slot 3363A, the second through-slot 3363B, and the second through-slot 3363C are connected to form a second through-slot 3363 (as shown in FIG. 7) that penetrates through the two opposite sides of the interconnection structure 33 in the first direction Z. In other words, the through-slots 336 include the first through-slots 3361 and the second through-slots 3363.

[0087] The trunk portion 3311A of the first power electrode 331, the trunk portion 3311B of the second power electrode 332, and the trunk portion 3311C of the output electrode 333 are arranged in layers along the first direction Z. The first branch portion 3313A of the first power electrode 331, the first branch portion 3313B of the second power electrode 332, and the first branch portion 3313C of the output electrode 333 are arranged in layers along the first direction Z. The second branch portion 3315A of the first power electrode 331, the second branch portion 3315B of the second power electrode 332, and the second branch portion 3315C of the output electrode 333 are arranged in layers along the first direction Z. The third branch portion 3317A of the first power electrode 331, the third branch portion 3317B of the second power electrode 332, and the third branch portion 3317C of the output electrode 333 are arranged in layers along the first direction Z. In this way, the shapes and sizes of the first power electrode 331, the second power electrode 332, and the output electrode 333 are substantially the same or close, which is conducive to maximizing the magnetic field coupling effect, further enhancing the power loop mutual inductance of the power module 30, further reducing the overall parasitic inductance of the power module 30, and also improving the assembly efficiency of stacking the first power electrode 331, the second power electrode 332, and the output electrode 333 together.

[0088] In some embodiments of the present application, the main part 3311A of the first power electrode 331, the main part 3311B of the second power electrode 332, and the main part 3311C of the output electrode 333 each have the same length in the second direction Y, the main part 3311A of the first power electrode 331, the main part 3311B of the second power electrode 332, and the main part 3311C of the output electrode 333 each have the same length in the third direction X, and the main part 3311A of the first power electrode 331, the main part 3311B of the second power electrode 332, and the main part 3311C of the output electrode 333 each have the same length in the orthogonal projection of the substrate 311. The first branch part 3313A of the first power electrode 331, the first branch part 3313B of the second power electrode 332, and the first branch part 3313C of the output electrode 333 each have the same length in the third direction X, and the first branch part 3313A of the first power electrode 331, the first branch part 3313B of the second power electrode 332, and the first branch part 3313C of the output electrode 333 each have the same length in the orthogonal projection of the substrate 311. The second branch part 3315A of the first power electrode 331, the second branch part 3315B of the second power electrode 332, and the second branch part 3315C of the output electrode 333 each have the same length in the third direction X, and the second branch part 3315A of the first power electrode 331, the second branch part 3315B of the second power electrode 332, and the second branch part 3315C of the output electrode 333 each have the same length in the orthogonal projection of the substrate 311. The third branch part 3317A of the first power electrode 331, the third branch part 3317B of the second power electrode 332, and the third branch part 3317C of the output electrode 333 each have the same length in the third direction X, and the third branch part 3317A of the first power electrode 331, the third branch part 3317B of the second power electrode 332, and the third branch part 3317C of the output electrode 333 each have the same length in the orthogonal projection of the substrate 311. In this way, the flatness of the outer wall of the interconnection structure 33 extending in the first direction Z is improved, and the generation of pores in the encapsulation material when the power module 30 is encapsulated is reduced, thereby improving the reliability of the power module 30.

[0089] Each of the main part 3311A of the first power electrode 331, the main part 3311B of the second power electrode 332, and the main part 3311C of the output electrode 333 can cover the substrate 311 entirely, or can not cover the substrate 311, or can cover the substrate 311 partially, and the present application does not limit this. It can be understood that the present application does not limit the number of branch parts of each of the first power electrode 331, the second power electrode 332, and the output electrode 333, and the present application does not limit the structure and size of each part of the first power electrode 331, the second power electrode 332, and the output electrode 333.

[0090] In the first direction Z, between two adjacent ones of the first power electrode 331, the second power electrode 332 and the output electrode 333, an insulation layer 334 is provided to achieve insulation between the first power electrode 331, the second power electrode 332 and the output electrode 333. The insulation layer 334 can be an insulation paper, an insulation coating or the like, and can achieve electrical insulation between the first power electrode 331, the second power electrode 332 and the output electrode 333. In the direction perpendicular to the first direction Z, the edge of the insulation layer 334 can protrude out of the edge of the adjacent electrode, so that the size of the insulation layer 334 can be greater than the size of the adjacent electrode in the corresponding part, and thus has good electrical performance. For example, the width of the insulation layer 334 between the main stem part 3311A of the first power electrode 331 and the main stem part 3311B of the second power electrode 332 in the second direction Y is greater than the width of the main stem part 3311A of the first power electrode 331 in the second direction Y, and greater than the width of the main stem part 3311B of the second power electrode 332 in the second direction Y; the width of the insulation layer 334 between the main stem part 3311A of the first power electrode 331 and the main stem part 3311B of the second power electrode 332 in the third direction X is greater than the width of the main stem part 3311A of the first power electrode 331 in the third direction X, and greater than the width of the main stem part 3311B of the second power electrode 332 in the third direction X, so that the insulation layer 334 between the main stem part 3311A of the first power electrode 331 and the main stem part 3311B of the second power electrode 332 protrudes out of the main stem part 3311A of the first power electrode 331 and the main stem part 3311B of the second power electrode 332.

[0091] In some embodiments of the present application, referring to FIG. 10 and FIG. 11, the first power electrode 331 is provided with a first power terminal 3318 at one end in the second direction Y. The first power terminal 3318 is connected to the main stem portion 3311A of the first power electrode 331 at one end in the second direction Y away from the branch portion 3312A of the first power electrode 331. The first power terminal 3318 is used to connect to the negative pole of the direct current power supply 403 (shown in FIG. 4) through the busbar connection of the power device 101 to output current. The overlapping area of the front projection of the first power terminal 3318 in the first projection plane and the front projection of the substrate 311 in the first projection plane is zero, i.e. the first power terminal 3318 protrudes out of the substrate 311. The second power electrode 332 is provided with a second power terminal 3321 and a third power terminal 3323 at one end in the second direction Y. The second power terminal 3321 and the third power terminal 3323 are both connected to the main stem portion 3311B of the second power electrode 332 at one end in the second direction Y away from the branch portion 3312B of the second power electrode 332. The second power terminal 3321 and the third power terminal 3323 are used to connect to the positive pole of the direct current power supply 403 (shown in FIG. 4) through the busbar connection of the power device 101. The second power terminal 3321, the first power terminal 3318 and the third power terminal 3323 are arranged along the third direction X. The first power terminal 3318, the second power terminal 3321 and the third power terminal 3323 serve as the direct current input terminals of the power module 30. Referring to FIG. 7 and FIG. 11, the overlapping area of the front projection of the second power terminal 3321 in the first projection plane and the front projection of the substrate 311 in the first projection plane is zero, and the overlapping area of the front projection of the third power terminal 3323 in the first projection plane and the front projection of the substrate 311 in the first projection plane is zero, i.e. the second power terminal 3321 and the third power terminal 3323 protrude out of the substrate 311. Each power terminal protrudes out of the substrate 311, which facilitates the electrical connection of each power terminal with a circuit board or other devices and equipment. The first projection plane is perpendicular to the first direction. It can be understood that in some embodiments of the present application, the overlapping area of the front projection of the first power terminal 3318 in the first projection plane and the front projection of the substrate 311 in the first projection plane can not be zero, the overlapping area of the front projection of the second power terminal 3321 in the first projection plane and the front projection of the substrate 311 in the first projection plane can not be zero, and the overlapping area of the front projection of the third power terminal 3323 in the first projection plane and the front projection of the substrate 311 in the first projection plane can not be zero.

[0092] The second power terminal 3321, the first power terminal 3318 and the third power terminal 3323 are arranged along the third direction X, and can be considered as a flat structure, which is beneficial to improve the convenience of electrically connecting the second power terminal 3321, the first power terminal 3318 and the third power terminal 3323 to a circuit board or other devices by laser welding or screw fixing.

[0093] In some embodiments of the application, the output electrode 333 is provided with an output power terminal 3331 at one end in the second direction Y, and the output power terminal 3331 and the first power terminal 3318 are arranged along the second direction Y. The output power terminal 3331 and the first power terminal 3318 are located on opposite sides of the substrate 311 in the second direction Y, which is beneficial to reduce the area occupied by the interconnection structure 33 in the plane perpendicular to the first direction Z and the volume of the interconnection structure 33.

[0094] The application does not limit the first power electrode 331 to include only one first power terminal 3318, and the number of power terminals of the first power electrode 331 can be one or more.

[0095] The application does not limit the number of power terminals of the second power electrode 332. For example, the second power electrode 332 can omit the second power terminal 3321 or the third power terminal 3323, or the number of power terminals on the second power electrode 332 is three or more.

[0096] The application does not limit the output electrode 333 to include only one output power terminal 3331, and the number of power terminals of the output electrode 333 can be one or more.

[0097] Please refer to FIGS. 7, 10 and 11, the first power electrode 331 is provided with a pin terminal 337A for connecting with the power chip 313. The second power electrode 332 is provided with a pin terminal 337B for connecting with the conductive layer 3113. The output electrode 333 is provided with a pin terminal 337C for connecting with the conductive layer 3113 and the power chip 313. The interconnection structure 33 is electrically connected with the power chip 313 and the conductive layer 3113 by the pin terminals, which is beneficial to improve the stability of the electrical connection between the interconnection structure 33 and the power chip 313 and between the interconnection structure 33 and the conductive layer 3113. The number of pin terminals of the first power electrode 331, the second power electrode 332 and the output electrode 333 is multiple.

[0098] In some embodiments of the present application, referring to FIG. 11, the inner wall of the first through slot 3361A of the first power electrode 331 is provided with pin terminals 337A, which can be distributed on the main stem 3311A of the first power electrode 331 and the first branch 3313A of the first power electrode 331. The inner wall of the first through slot 3361A of the first power electrode 331 is provided with pin terminals 337A, i.e. the pin terminals 337A are arranged on the inner wall of the first through slot 3361. The first branch 3313A and the opposite side of the second branch 3315A of the first power electrode 331 are provided with pin terminals 337A. As shown in FIG. 7, the pin terminals 337A of the first power electrode 332 are used to connect with the first bridge arm chip 3131. The first bridge arm chip 3131 on the substrate 311 is not covered by the interconnection structure 33 and is exposed through the first through slot 3361. The first bridge arm chip 3131 is located in the area where the orthographic projection of the first through slot 3361 on the substrate 311 is located. In other words, the pin terminals 337A of the first power electrode 332 are used to electrically connect with the power chip 313 located in the area where the orthographic projection of the first through slot 3361 on the substrate 311 is located.

[0099] Referring to FIG. 11, the inner wall of the second through slot 3363B of the second power electrode 332 is provided with pin terminals 337B, and the inner wall of the second through slot 3363B of the second power electrode 332 is provided with pin terminals 337B, i.e. the pin terminals 337B are arranged on the inner wall of the second through slot 3363. The second branch 3315B and the opposite side of the third branch 3317B of the second power electrode 332 are provided with pin terminals 337B. The pin terminals 337B of the second power electrode 332 can be distributed on the main stem 3311B and the second branch 3315B of the second power electrode 332. As shown in FIG. 7, the pin terminals 337B of the second power electrode 332 are used to electrically connect with the conductive layer 3113 located in the area where the orthographic projection of the second through slot 3363 on the substrate 311 is located. The conductive layer 3113 located in the area where the orthographic projection of the second through slot 3363 on the substrate 311 is located is not covered by the interconnection structure 33.

[0100] Referring to FIG. 11, the inner wall of the first through slot 3361C and the second through slot 3363C of the output electrode 333 is provided with a pin terminal 337C, that is, the inner wall of the first through slot 3361 and the second through slot 3363 is provided with a pin terminal 337C. The pin terminals 337C on the inner wall of the first through slot 3361 of the output electrode 333 can be distributed on the main stem part 3311C of the output electrode 333 and the first branch part 3313C of the output electrode 333. The inner wall of the second through slot 3363 of the output electrode 333 is provided with a pin terminal 337C. The pin terminals 337C on the inner wall of the second through slot 3363 of the output electrode 333 can be distributed on the main stem part 3311C of the output electrode 333 and the second branch part 3315C of the output electrode 333. The opposite side edges of the first branch part 3313C and the second branch part 3315C of the output electrode 333 are provided with pin terminals 337C. The opposite side edges of the second branch part 3315C and the third branch part 3317C of the output electrode 333 are provided with pin terminals 337C. As shown in FIG. 7, the pin terminals 337C on the inner wall of the first through slot 3361 of the output electrode 333 are used to connect the conductive layer 3113 located in the area of the first through slot 3361 in the orthographic projection of the substrate 311. The pin terminals 337C on the inner wall of the second through slot 3363 of the output electrode 333 are used to connect the second bridge arm chip 3133 located in the area of the second through slot 3363 in the orthographic projection of the substrate 311. The second bridge arm chip 3133 on the substrate 311 is not covered by the interconnection structure 33 and is exposed through the second through slot 3363.

[0101] Since the pin terminals 337A of the first power electrode 331 are arranged on the inner wall of the first through slot 3361, the pin terminals 337B of the second power electrode 332 are arranged on the inner wall of the second through slot 3363, and the pin terminals 337C of the output electrode 333 are arranged on the inner wall of the first through slot 3361 and the second through slot 3363, it is convenient to connect the pin terminals 337A of the first power electrode 331 with the substrate structure 31, connect the pin terminals 337B of the second power electrode 332 with the substrate structure 31, and connect the pin terminals 337C of the output electrode 333 with the substrate structure 31, and it is also conducive to improving the simplicity of the layout of the pin terminals 337 inside the power module 30.

[0102] The present application does not limit the pin terminals 337A of the first power electrode 331 to be arranged on the inner wall of the first through slot 3361. For example, the pin terminals 337A of the first power electrode 331 can also be arranged on the outer wall of the first branch part 3313A of the first power electrode 331 away from the first through slot 3361 or other positions.

[0103] The pin terminal 337B of the second power electrode 332 is not limited to be arranged on the inner wall of the second through slot 3363. For example, the pin terminal 337B of the second power electrode 332 can also be arranged on the outer wall of the third branch part 3317B of the second power electrode 332, away from the second through slot 3363, or other positions.

[0104] The pin terminal 337C of the output electrode 333 is not limited to be arranged on the inner wall of the first through slot 3361 and the second through slot 3363. For example, the pin terminal 337C of the output electrode 333 can also be arranged on the outer wall of the first branch part 3313C of the output electrode 333, away from the first through slot 3361, or other positions.

[0105] The pin terminal 337C on the inner wall of the first through slot 3361 of the output electrode 333 is electrically connected to the conductive layer 3113 in the area of the orthographic projection of the first through slot 3361 on the substrate 311. The pin terminal 337C on the inner wall of the second through slot 3363 of the output electrode 333 is electrically connected to the power chip 313 in the area of the orthographic projection of the second through slot 3363 on the substrate 311.

[0106] In some embodiments of the present application, referring again to FIG. 7, the overlapping area of any two of the orthographic projection of the pin terminal 337A of the first power electrode 331 on the substrate 311, the orthographic projection of the pin terminal 337B of the second power electrode 332 on the substrate 311, and the orthographic projection of the pin terminal 337C of the output electrode 333 on the substrate 311 is 0, i.e., the pin terminal 337A of the first power electrode 331, the pin terminal 337B of the second power electrode 332, and the pin terminal 337C of the output electrode 333 are staggered, facilitating electrical interconnection of each pin terminal with the substrate 311 or the power chip 313 on the substrate 311.

[0107] It can be understood that the overlapping area of any two of the orthographic projection of the pin terminal 337A of the first power electrode 331 on the substrate 311, the orthographic projection of the pin terminal 337B of the second power electrode 332 on the substrate 311, and the orthographic projection of the pin terminal 337C of the output electrode 333 on the substrate 311 is not limited to be 0.

[0108] Referring back to FIG. 7, the plurality of pin terminals 337A of the first power electrode 331 are divided into two columns and located in the first through slot 3361, the pin terminals 337A of the first column of the first power electrode 331 are arranged along the first branch 3313A, and the pin terminals 337A of the second column of the first power electrode 331 are arranged along the second branch 3315A. The plurality of pin terminals 337B of the second power electrode 332 are divided into two columns and located in the first through slot 3361, the pin terminals 337B of the first column of the second power electrode 332 are arranged along the second branch 3315A, and the pin terminals 337B of the second column of the second power electrode 332 are arranged along the third branch 3317A. The plurality of pin terminals 337C of the output electrode 333 are divided into four columns, the pin terminals 337C of the first column of the output electrode 333 are arranged along the first branch 3313A, the pin terminals 337C of the second column of the output electrode 333 are arranged along the second branch 3315A, the pin terminals 337C of the third column of the output electrode 333 are arranged along the second branch 3315A, and the pin terminals 337C of the fourth column of the output electrode 333 are arranged along the third branch 3317A. The pin terminals 337C of the first column of the output electrode 333 and the pin terminals 337C of the second column of the output electrode 333 are located in the first through slot 3361. The pin terminals 337C of the third column of the output electrode 333 and the pin terminals 337C of the fourth column of the output electrode 333 are located in the second through slot 3363.

[0109] The plurality of pin terminals 337A of the first power electrodes 331 in the first column are arranged alternately with the plurality of pin terminals 337C of the output electrodes 333 in the first column, i.e. in the second direction Y, one pin terminal 337C of the output electrodes 333 in the first column is arranged between two pin terminals 337A of the first power electrodes 331 in the first column. The plurality of pin terminals 337A of the first power electrodes 331 in the second column are arranged alternately with the plurality of pin terminals 337C of the output electrodes 333 in the second column, i.e. in the second direction Y, one pin terminal 337C of the output electrodes 333 in the second column is arranged between two pin terminals 337A of the first power electrodes 331 in the second column. The plurality of pin terminals 337B of the second power electrodes 332 in the first column are arranged alternately with the plurality of pin terminals 337C of the output electrodes 333 in the third column, i.e. in the second direction Y, one pin terminal 337C of the output electrodes 333 in the third column is arranged between two pin terminals 337B of the second power electrodes 332 in the first column. The plurality of pin terminals 337B of the second power electrodes 332 in the second column are arranged alternately with the plurality of pin terminals 337C of the output electrodes 333 in the fourth column, i.e. in the second direction Y, one pin terminal 337C of the output electrodes 333 in the fourth column is arranged between two pin terminals 337B of the second power electrodes 332 in the second column. In this way, since each column of the power chips 313 is arranged along the corresponding branch part, the current sharing of the power module 30 is improved, the structure of the interconnection structure 33 is simplified, and the layout structure of the power module 30 is also simplified.

[0110] The first column of power chips 313 and the second column of power chips 313 are arranged on the substrate 311 corresponding to the positions of the first through-slots 3361, and at least part of each of the first column of power chips 313 and at least part of each of the second column of power chips 313 are exposed in the first through-slots 3361 to facilitate electrical interconnection with the interconnection structure 33. The first column of power chips 313 are arranged along the first branch 3313A. The pin terminals 337A of the first column of first power electrodes 331 are connected with the first column of power chips 313. The second column of power chips 313 are arranged along the second branch 3315A. The pin terminals 337A of the second column of first power electrodes 331 are connected with the second column of power chips 313. The third column of power chips 313 and the fourth column of power chips 313 are arranged on the substrate 311 corresponding to the positions of the second through-slots 3363, and at least part of each of the third column of power chips 313 and at least part of each of the fourth column of power chips 313 are exposed in the second through-slots 3363 to facilitate electrical interconnection with the interconnection structure 33. The third column of power chips 313 are arranged along the second branch 3315A. The pin terminals 337C of the third column of output electrodes 333 are connected with the third column of power chips 313. The fourth column of power chips 313 are arranged along the third branch 3317A. The pin terminals 337C of the fourth column of output electrodes 333 are connected with the fourth column of power chips 313. In some embodiments, the first column of power chips 313 and the second column of power chips 313 can be first bridge arm chips 3131, and the third column of power chips and the fourth column of power chips 313 can be second bridge arm chips 3133.

[0111] In some embodiments of the present application, the connection between the pin terminal 337A and the power chip 313 can be achieved by welding or sintering process, the connection between the pin terminal 337B and the conductive layer 3113 can be achieved by welding or sintering process, the connection between the pin terminal 337C and the power chip 313 can be achieved by welding or sintering process, the connection between the pin terminal 337C and the power chip 313 can be achieved by welding or sintering process, and the connection between the pin terminal 337C and the conductive layer 3113 can be achieved by welding or sintering process. Referring to FIG. 12, the pin terminal 337C of the output electrode 333 is taken as an example, the pin terminal 337C and the conductive layer 3113 can be connected through a bonding layer 339, or the pin terminal 337C and the power chip 313 can be connected through the bonding layer 339, and the bonding layer 339 can be achieved by welding, sintering or other processes. The power chip 313 and the conductive layer 3113 can be connected through the bonding layer 339, and the bonding layer 339 can be achieved by welding, sintering or other processes.

[0112] It can be understood that the application does not limit the first power electrode 331 to be a DC negative bus, and the second power electrode 332 to be a DC positive bus. In some possible implementation manners, the second power electrode 332 can be connected to the negative pole of a DC power supply, the second power electrode 332 is a DC negative bus, the first power electrode 331 can be connected to the positive pole of the DC power supply, the first power electrode 331 is a DC positive bus, the polarity of the first power electrode 331 is determined according to whether the first power electrode 331 is connected to the positive pole or the negative pole of the DC power supply, the polarity of the second power electrode 333 is determined according to whether the second power electrode 333 is connected to the positive pole or the negative pole of the DC power supply, and the application does not limit the polarity of the first power electrode 331 and the second power electrode 333.

[0113] In some embodiments of the application, referring to FIG. 13 and FIG. 14, the connection between the pin terminal 337A and the substrate structure 31, the connection between the pin terminal 337B and the substrate structure 31, and the connection between the pin terminal 337A and the substrate structure 31 adopt a vertical connection mode. Taking the connection between the pin terminal 337B and the substrate structure 31 as an example, the end of the pin terminal 337B connected to the substrate 311 is perpendicular to the side of the substrate 311 facing the interconnection structure 33, so that the end of the pin terminal 337B closer to the substrate 311 is not designed to be bent, thereby simplifying the structure of the pin terminal 337B and facilitating the manufacturing of the interconnection structure 33. FIG. 13 and FIG. 14 exemplarily show the connection between the pin terminal 337B of the second power electrode 332 and the conductive layer 3113 of the substrate 311, and the connection between the pin terminal 337C of the output electrode 333 and the power chip 313. The part of the pin terminal 337B of the second power electrode 332 connected to the conductive layer 3113 is perpendicular to the substrate 311. The part of the pin terminal 337C of the output electrode 333 connected to the power chip 313 is perpendicular to the substrate 311.

[0114] In some embodiments of the present application, referring to FIG. 15 and FIG. 16, the part of the pin terminal 337A, the pin terminal 337B, the pin terminal 337C connected with the substrate structure 31 comprises a bending structure. Each of the pin terminal A, the pin terminal B and the pin terminal C comprises a first part 3371 and a second part 3373 connected with each other. The first part 3371 is connected with the corresponding stem part, the first part 3371 is perpendicular to the substrate 311, the second part 3373 is bent relative to the first part 3371 to form a bending structure, and the second part 3373 is parallel to the side of the substrate 311 facing the interconnection structure 33. The second part 3373 is used to connect with the conductive layer 3113 or the power chip 313. Since the second part 3373 is bent relative to the first part 3371, the second part 3373 is parallel to the side of the substrate 311 facing the interconnection structure 33, which is conducive to increasing the area of the connection surface between the second part 3373 and the conductive layer 3113 or between the second part 3373 and the power chip 313, and is conducive to increasing the connection stability between the pin terminal and the conductive layer 3113 or between the pin terminal and the power chip 313.

[0115] The structures of the pin terminal 337A, the pin terminal 337B and the pin terminal 337C can be the same or different, and the structures of the pin terminal 337A, the pin terminal 337B and the pin terminal 337C are not limited in the present application. For example, the part of the pin terminal 337A connected with the substrate structure 31 is not bent, and the part of the pin terminal 337B connected with the substrate structure 31 is a bending structure.

[0116] The part of the pin terminal connected with the substrate structure 31 can be perpendicular to the substrate 311 or be processed to be bent parallel to the substrate 311, which improves the flexibility of the layout of the power chip 313 and the producibility of the combination of the pin terminal with the power chip 313 or the substrate 311.

[0117] In some embodiments of the present application, referring to FIG. 17 and FIG. 18, the part of the pin terminal 337A of the first power electrode 331 and the part of the corresponding pin terminal 337A of the output electrode 333 are arranged in a stacked manner, and the part of the orthographic projection of the pin terminal 337A of the first power electrode 331 on the substrate 311 and the part of the orthographic projection of the corresponding pin terminal 337C of the output electrode 333 on the substrate 311 overlap. The part of the pin terminal 337B of the second power electrode 332 and the part of the corresponding pin terminal 337C of the output electrode 333 are arranged in a stacked manner, and the part of the orthographic projection of the pin terminal 337B of the second power electrode 332 on the substrate 311 and the part of the orthographic projection of the corresponding pin terminal 337C of the output electrode 333 on the substrate 311 overlap. In this way, it is conducive to reducing the covered area of the substrate structure 31 by the interconnection structure 33 and improving the layout simplicity of the power module 30.

[0118] The overlapping area between the bonding surface of the pin terminal 337A of the first power electrode 331 and the bonding surface of the substrate 311, the bonding surface of the pin terminal 337A of the first power electrode 331 and the bonding surface of the power chip 313, the bonding surface of the pin terminal 337B of the second power electrode 332 and the bonding surface of the substrate 311, the bonding surface of the pin terminal 337B of the second power electrode 332 and the bonding surface of the power chip 313, the bonding surface of the pin terminal 337C of the output electrode 333 and the bonding surface of the substrate 311, and the bonding surface of the pin terminal 337C of the output electrode 333 and the bonding surface of the power chip 313 is zero. The arrangement of the pin terminal 337A of the first power electrode 331, the pin terminal 337B of the second power electrode 332, and the pin terminal 337C of the output electrode 333 is not limited.

[0119] In some embodiments of the present application, referring to FIG. 19, the first power terminal 3318 and the second power terminal 3321 are arranged in a stacked manner along the first direction Z and are insulated from each other. In this way, the direction of the magnetic field generated when the first power terminal 3318 passes current is opposite to the direction of the magnetic field generated when the second power terminal 3321 passes current, further enhancing the mutual inductance of the power loop of the power module 30, i.e., enhancing the mutual inductance cancellation effect of the power loop, and further reducing the parasitic inductance of the power loop of the power module 30. The present application does not limit the arrangement of the first power terminal 3318 on the first power electrode 331, and the present application does not limit the arrangement of the second power terminal 3321 on the second power electrode 332.

[0120] In some embodiments of the present application, referring to FIGS. 20 and 21, the power module 30 further includes an output power terminal 3331, which is electrically connected to the output electrode 333 through the conductive layer 3113, i.e., the output power terminal 3331 is arranged separately from the output electrode 333. The output power terminal 3331 is not limited by the output electrode 333 and can be flexibly arranged on the substrate 311, improving the layout flexibility of the power module 30. At least part of the output power terminal 3331 protrudes out of the substrate 311. The output power terminal 3331 serves as an alternating current output terminal of the power module 30.

[0121] In some embodiments of the present application, referring to FIGS. 22 and 23, the power module 30 is a 2-in-1 power module, the number of power chips 313 in each column extending along the second direction Y is two, and the first power terminal 3318 and the second power terminal 3321 are arranged in a stacked manner along the first direction Z. The present application does not limit the power module 30 to be a 2-in-1 power module 30. The first power terminal 3318 and the output power terminal 3331 are arranged along the second direction Y.

[0122] In some embodiments of the present application, referring to FIGS. 24 and 25, the power module 30 is a 6-in-1 power module. The substrate structure 31 further includes three board units 310, each of which includes a substrate 311 and a power chip 313. The first power electrode 331, the second power electrode 332, and the output electrode 333 each include a trunk portion 3311 and at least two branch portions 3312, and a through slot 336 is arranged between two adjacent branch portions 3312. The branch portions 3312 of each first power electrode 331, the branch portions 3312 of each second power electrode 332, and the branch portions 3312 of each output electrode 333 are arranged corresponding to one board unit 310. Since the plurality of board units 310 share the same interconnection structure 33, the structure of the power module 30 is simplified.

[0123] The power chip 313 of each board unit 310 includes a first bridge arm chip 3131 and a second bridge arm chip 3133. The output electrode 333 is provided with an output power terminal 3331 corresponding to each board unit 310. The number of board units 310 is not limited in the present application, and the power module 30 is not limited to be a full-bridge power module 30.

[0124] Referring to FIG. 24 again, the first power electrode 331 further includes a first power terminal 3318 and a fourth power terminal 3319. The second power electrode 332 includes a second power terminal 3321 and a third power terminal 3323. The second power terminal 3321, the first power terminal 3318, the third power terminal 3323, and the fourth power terminal 3319 are arranged in the third direction X in sequence.

[0125] It should be understood that expressions such as “include” and “may include” used in the present application represent the existence of disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In the present application, terms such as “include” and / or “have” can be interpreted as indicating the presence of specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but cannot be interpreted as excluding the presence or addition of one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0126] In addition, in the present application, the expression “and / or” includes any and all combinations of the associated listed terms. For example, the expression “A and / or B” can include A, can include B, or can include both A and B.

[0127] In this application, expressions such as "first" and "second" are used to modify various elements. These elements should not be limited by these expressions. For example, the expressions do not limit the order and / or the importance of the elements. The expressions are only used to distinguish one element from another. For example, a first user equipment and a second user equipment indicate different user equipments, although both the first user equipment and the second user equipment are user equipments. Similarly, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element, without departing from the scope of the present application.

[0128] When a component is referred to as being "connected" or "accessed" to another component, it should be understood that there can be another component between the component and the other component. On the other hand, when a component is referred to as being "directly connected" or "directly accessed" to another component, it should be understood that there is no component between them.

[0129] The above description is merely a specific implementation of the present application, but the scope of the protection of the present application is not limited thereto. Any person skilled in the art within the scope of the technology disclosed in the present application can easily think of changes or replacements, which should be covered by the scope of protection of the present application. Therefore, the scope of protection of the present application should be limited by the scope of protection of the claims.

Claims

1. A power module, characterized in that: The power module includes a substrate structure and an interconnection structure stacked along a first direction, wherein the substrate structure includes a substrate and a power chip arranged on the substrate; The interconnection structure includes a first power electrode, a second power electrode and an output electrode. At least a portion of the first power electrode, at least a portion of the second power electrode and at least a portion of the output electrode are stacked along a first direction and insulated from each other. The first power electrode is used to electrically connect to the power chip, the second power electrode is used to electrically connect to the conductive layer of the substrate, and the output electrode is used to electrically connect to the power chip and the conductive layer.

2. The power module according to claim 1, characterized in that: The first power electrode, the second power electrode and the output electrode each include a main body and at least one branch, one end of each branch is connected to the main body and covers the substrate; The main body of the first power electrode, the main body of the second power electrode, and the main body of the output electrode are stacked along the first direction; The branch portion of the first power electrode, one branch portion of the second power electrode, and one branch portion of the output electrode are stacked along the first direction.

3. The power module according to claim 2, characterized in that: At least one of the main body and the branch parts is provided with a pin terminal; The pin terminal of the first power electrode is used to connect to the power chip; The pin terminal of the second power electrode is used to connect to the conductive layer; The pin terminals of the output electrodes are used to connect to the conductive layer and the power chip.

4. The power module according to claim 3, characterized in that: The branch portion extends along the second direction, and the at least one branch portion includes a first branch portion, a second branch portion, and a third branch portion sequentially arranged along a third direction, and the third direction, the first direction, and the second direction are perpendicular to each other; Pin terminals are provided on opposite sides of the first branch portion and the second branch portion of the first power electrode; A pin terminal is provided on opposite sides of the second branch portion and the third branch portion of the second power electrode; Pin terminals are provided on opposite sides of the first branch portion and the second branch portion of the output electrode and on opposite sides of the second branch portion and the third branch portion.

5. The power module according to any one of claims 3 or 4, characterized in that: An overlapping area of ​​the orthographic projections of the first power electrode pin terminal on the substrate, the orthographic projections of the second power electrode pin terminal on the substrate, and the orthographic projections of the output electrode pin terminal on the substrate on the substrate is zero.

6. The power module according to any one of claims 3 or 4, characterized in that: The pin terminals of each first power electrode and the corresponding pin terminals of the output electrode are stacked in the first direction; and / or the pin terminals of each second power electrode and the corresponding pin terminals of the output electrode are partially stacked in the second direction.

7. The power module according to any one of claims 3 to 6, characterized in that: At least a portion of the pin terminal is perpendicular to a surface of the substrate facing the interconnection structure.

8. The power module according to any one of claims 3 to 7, characterized in that: The pin terminal includes a first part and a second part that are connected to each other, the first part is perpendicular to the substrate, the second part is bent relative to the first part and is parallel to a side of the substrate facing the interconnection structure, and the second part is used to connect to the conductive layer or one of the power chips.

9. The power module according to any one of claims 1 to 8, characterized in that: The first power electrode is provided with a first power terminal at one end in the second direction, the first power terminal being used to connect to the negative electrode of a DC power supply, and the second direction is perpendicular to the first direction; The second power electrode is provided with a second power terminal at one end in the second direction, and the second power terminal is used to be connected to the negative electrode of the DC power supply; The first power terminal and the second power terminal are stacked along the first direction and insulated from each other, or the first power terminal and the second power terminal are spaced apart along a direction perpendicular to the first direction and insulated from each other.

10. The power module according to claim 9, characterized in that: The second power electrode is further provided with a third power terminal at one end in the second direction. The second power terminal, the first power terminal and the third power terminal are arranged along a third direction, which is perpendicular to the first direction and perpendicular to the second direction.

11. The power module according to claim 9, characterized in that: The output electrode is provided with an output power terminal at one end in the second direction; The output power terminal and the first power terminal are located on two opposite sides of the substrate in the second direction.

12. The power module according to claim 9, characterized in that: The power module further includes an output power terminal, which is electrically connected to the output electrode through a conductive layer.

13. The power module according to any one of claims 2 to 12, characterized in that: The substrate structure includes a plurality of board units, each of which includes the substrate and the power chip; Each branch portion of the first power electrode, each branch portion of the second power electrode, and each branch portion of the output electrode are provided corresponding to one of the panel units.

14. The power module according to any one of claims 1 to 13, characterized in that: The power chip includes a first bridge arm chip and a second bridge arm chip, wherein the first bridge arm chip and the second bridge arm chip are both provided on the substrate and electrically connected to the conductive layer of the substrate; The first power electrode is used to be electrically connected to the first bridge arm chip, the second power electrode is used to be electrically connected to the conductive layer, and the output electrode is used to be electrically connected to the second bridge arm chip and the conductive layer.

15. A power device, characterized in that: The power device includes a circuit board and a power module according to any one of claims 1 to 14, and the power module is arranged on the circuit board.

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