Optical switch circuit

Abstract

This optical switch circuit has lower loss and is configured such that input ports and output ports are alternately adjacent to one another, said circuit comprising N×N unit optical switches each having two input ports and two output ports. The N×N unit optical switches are divided into first through 2×N-th groups each having the same number of unit optical switches, the p-th (p being an integer at least 1 and no greater than 2×N) group being arranged so as to be adjacent to the p+1-th group and the p-1-th group. In each of the groups, unit optical switches of first through N / 2-th rows are arranged from the inside to the outside, and either the input ports or the output ports of the unit optical switches are arranged toward the inside. The inside-facing ports of the unit optical switches of the first row in the p-th group are connected to the ports of the nearer ports of the unit optical switches of the first row in the p-1-th group and the p+1-th group, and the inside-facing ports of the unit optical switches of the q-th (q being an integer at least 2 and no greater than N / 2) row in the p-th group are connected to the nearer ports of the outside-facing ports of the unit optical switches of the q-1-th row in the p-1-th group and the p+1-th group.

Description

Optical switch circuit

[0001] The present invention relates to an optical switch circuit.

[0002] A typical conventional optical switch has a circuit configuration that connects any input port in the input port array on the left side to any output port in the output port array on the right side, as shown in Figure 1. Wiring to nodes outside the input and output port arrays is assumed to use optical fiber, as shown schematically in Figure 2, and is premised on unlimited low-loss. Note that in a communication network, both input and output ports of each node are not necessarily connected to the same optical switch.

[0003] However, for the purpose of interconnecting small devices such as semiconductor chips, including central processing units (CPUs), graphics processing units (GPUs), and memories, via optical switches to perform advanced calculations, it is necessary to integrate all of the semiconductor chips, photoelectric conversion chips, and optical switch chips onto a single board or package, thereby achieving high efficiency and high density. In such cases, optical fibers cannot be used, and connections are made using optical waveguides made of organic materials, glass, silicon, etc. However, optical waveguides have higher losses than optical fibers, and large losses occur when paths cross multiple times.

[0004] For this reason, it is preferable to arrange an input / output port array, in which input ports and output ports are arranged alternately, on both sides of the optical switch, as shown schematically in Fig. 3. In this way, even if a plurality of small devices such as semiconductor chips are arranged on both sides of the optical switch, as shown schematically in Fig. 4, the arrangement of the input / output ports of the optical switch and the input / output ports of the small devices will match, making it possible to connect them over a short distance without crossing.

[0005] A configuration in which input ports and output ports are alternately arranged in this manner in an optical switch is disclosed, for example, in Patent Document 1. However, this document aims to suppress degradation of crosstalk characteristics and does not adopt a PILOSS (Path-Independent Insertion Loss) topology, which results in problems such as high power consumption due to the large number of unit optical switches that need to be turned ON, and path-dependent loss.

[0006] Furthermore, for example, Patent Document 2 discloses a technology for reducing the number of crossings of planar optical waveguides by arranging inputs and outputs adjacent to each other, thereby reducing optical waveguide crossing loss. However, the topology is Switch & Select, and there are problems in that the large number of switches that need to be turned ON results in high power consumption and loss that depends on the path.

[0007] For example, Non-Patent Document 1 discloses a technology applicable to shuffle wiring. Specifically, it discloses a two-layer crosspoint optical switch in which Si optical waveguides are formed on both layers, and discloses that the interlayer connection of the crosspoint is not fixed but can be made variable by moving the optical waveguide using MEMS (Micro Electro Mechanical Systems). The technology disclosed in this document is characterized by the variable interlayer connection.

[0008] JP 2015-148697 A JP 2016-161604 A Japanese Patent No. 6521072 A Japanese Patent No. 6708338 A

[0009] A. Honardoost, J. Henriksson, K. Kwon, J. Luo, and MC Wu, “Low-Loss Wafer-Bonded Silicon Photonic MEMS Switches,” OFC 2022, paper M2D.8.X. Xiaojun, et al., “A review of Silicon-Based Integrated Optical Switches”, Laser Photonics Rev. 2023, 17, 2200571

[0010] In view of the above, an object of the present invention, according to one aspect, is to provide an optical switch circuit with lower loss and in which input ports and output ports are alternately arranged adjacent to each other.

[0011] An optical switch circuit according to a first aspect of the present invention has N×N unit optical switches, each having two input ports and two output ports. The N×N unit optical switches are divided into first to 2×N groups, each having the same number of unit optical switches, and the pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is 1) and the p−1th group (when p=1, p−1 is 2×N), and in each group, first to N / 2th columns of unit optical switches are arranged from inside to outside, with either the input port or the output port of each unit optical switch facing inward. The inward-facing port of the unit optical switch in the first column of the pth group is connected to the closer port of the unit optical switch in the first column of the p-1th and p+1th groups, and the inward-facing port of the unit optical switch in the qth column (q is an integer between 2 and N / 2) of the pth group is connected to the closer port of the outward-facing port of the unit optical switch in the q-1th column of the p-1th and p+1th groups.

[0012] An optical switch circuit according to a second aspect of the present invention comprises (A) M optical switch circuits, each including N×N unit optical switches, each having two input ports and two output ports, and (B) N×M input / output ports of N / 2 connection destinations, each having 2×M input / output ports, and two shuffle circuits that respectively connect the N×M input / output ports out of the total 2×M×N input / output ports of the M optical switch circuits so as to satisfy a desired connection relationship. Here, the M optical switch circuits are arranged in a row, with one of the two shuffle circuits located on the left side of the row and the other on the right side of the row. Then, for each of the M optical switch circuits, the N×N unit optical switches are divided into 1st to 2×N groups each having the same number of unit optical switches, and the pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is set to 1) and the p−1th group (when p=1, p−1 is set to 2×N), and in each group, the unit optical switches are arranged from the 1st column to the N / 2th column from the inside to the outside, with either the input port or the output port of each unit optical switch facing inward. The inward-facing port of the unit optical switch in the first column of the pth group is connected to the closer port of the unit optical switch in the first column in the p−1th and p+1th groups, and the inward-facing port of the unit optical switch in the qth (q is an integer between 2 and N / 2) column of the pth group is connected to the closer port of the outward-facing port of the unit optical switch in the q−1th column in the p−1th and p+1th groups. Furthermore, for each of the unit optical switches in the N / 2-th column, a specific one of the outward-facing ports is used for either input or output in a different type between adjacent groups, with the first to N-th groups arranged facing left and the (N+1)-th to (2×N)-th groups arranged facing right. Furthermore, each of the two shuffle circuits includes a first optical circuit layer on which M×N first optical waveguides are formed and a second optical circuit layer on which M×N second optical waveguides are formed, and any one of the first optical waveguides and any one of the second optical waveguides is connected by a single interlayer connection structure so as to satisfy a desired connection relationship.

[0013] FIG. 1 is a diagram for explaining problems with the conventional technology. FIG. 2 is a diagram for explaining problems with the conventional technology. FIG. 3 is a diagram for explaining problems with the conventional technology. FIG. 4 is a diagram for explaining problems with the conventional technology. FIG. 5 is a diagram showing an example of an arrangement of unit optical switches in a PILOSS topology. FIG. 6 is a diagram showing a Mach-Zehnder interferometer switch. FIG. 7 is a diagram for explaining the operation of a Mach-Zehnder interferometer switch. FIG. 8 is a diagram showing a process of transformation into an optical switch circuit according to a first embodiment. FIG. 9 is a diagram showing a process of transformation into an optical switch circuit according to the first embodiment. FIG. 10 is a diagram showing a process of transformation into an optical switch circuit according to the first embodiment. FIG. 11 is a diagram showing a configuration of an optical switch circuit according to the first embodiment. FIG. 12 is a diagram showing a configuration of another example of the optical switch circuit according to the first embodiment. FIG. 13 is a diagram showing an example of paths in another example of the optical switch circuit according to the first embodiment. FIG. 14 is a diagram showing a configuration of an optical switch circuit according to a modification of the first embodiment. FIG. 15 is a diagram showing an example of connecting a chip to the optical switch circuit according to a modification of the first embodiment. FIG. 16 is a diagram for explaining Application Example 1 of the optical switch circuit according to the first embodiment. FIG. 17 is a diagram for explaining Application Example 1 of the optical switch circuit according to the first embodiment. FIG. 18 is a diagram for explaining Application Example 1 of the optical switch circuit according to the first embodiment. FIG. 19 is a diagram for explaining Application Example 2 of the optical switch circuit according to the first embodiment. FIG. 20 is a diagram for explaining Application Example 2 of the optical switch circuit according to the first embodiment. FIG. 21 is a diagram for explaining an optical switch circuit according to the second embodiment. FIG. 22 is a diagram for explaining an optical switch circuit according to the second embodiment. FIG. 23 is a diagram for explaining a configuration example of a shuffle circuit according to the second embodiment. FIG. 24 is a diagram for explaining a configuration example of a shuffle circuit according to the second embodiment. FIG. 25 is a diagram for explaining a modification of the shuffle circuit according to the second embodiment. FIG. 26 is a diagram for explaining a modification of the shuffle circuit according to the second embodiment.

[0014] [Basic Concept of the Embodiment of the Present Invention] The embodiment of the present invention is based on the PILOSS topology. The PILOSS topology is a completely non-blocking topology, in which the number of unit optical switches that are turned ON is small (one per path), saving power, and the number of switches and the number of wiring intersections per path are uniform (N and N-1, respectively), making loss path-independent. N is the number of input ports.

[0015] Fig. 5 shows an example of a circuit in a PILOSS topology in which inputs 1 to 4 and outputs 1' to 4' are normally arranged. The optical switch circuit shown in Fig. 5 is a PILOSS topology optical switch circuit also shown in Patent Document 3, and includes N x N unit optical switches, each with two inputs and two outputs and represented by a square.

[0016] A two-input, two-output unit optical switch is, for example, a Mach-Zehnder interferometer switch. For example, as shown in FIG. 6( a), it has two input ports IN1 and IN2 on the left side and two output ports OUT1 and OUT2 on the right side. Also, as shown in FIG. 6( b), a specific optical circuit structure includes phase shifters 10 and 20 and optical couplers 30 and 40 before and after them. Note that the solid lines in FIG. 6( b) represent optical waveguides. In this optical circuit structure, the refractive indexes of the phase shifters 10 and 20 are electrically changed to switch between the bar state shown in FIG. 7( a) and the cross state shown in FIG. 7( b). More specifically, when power is supplied and the switch is turned ON, the switch is in the bar state, and when power is stopped and the switch is turned OFF, the switch is in the cross state. Note that in such a unit optical switch, the input and output are interchangeable.

[0017] In the optical switch circuit shown in Fig. 5, 16 unit optical switches are arranged in 4 rows and 4 columns, with one port of each of the four unit optical switches in the leftmost column being an input port and one port of each of the four unit optical switches in the rightmost column being an output port. The unit optical switches are connected in the manner shown in Fig. 5.

[0018] Here, in order to arrange the input ports and output ports so that they are alternately adjacent to each other, the board is first folded to the left in the center, and the input ports and output ports are lined up on the left side, as shown in Fig. 8. In Fig. 8, the ports are lined up in the order (1,1'), (2',2), (3,3'), and (4',4) from top to bottom, but it has been found that to separate the board into left and right halves and arrange the input ports and output ports alternately adjacent to each other on each halves, it is effective to line them up, for example, as (1',2) and (3',4) on the left side and (1,2') and (3,4') on the right side.

[0019] 9, the unit optical switches that have been moved by folding are hatched in the first manner, but the unit optical switches that will not be moved in the next step are moved to the rear and then re-hatched in the second manner. Then, the unit optical switches that remain on the top surface rather than the rear surface are spread out to the right.

[0020] This results in an arrangement of unit optical switches as shown in Fig. 10. In the arrangement shown in Fig. 10, the input ports and output ports are arranged alternately next to each other, with (1', 2) and (3', 4) on the left side and (1, 2') and (3, 4') on the right side. Note that the numbers assigned to the ports are merely for convenience, and there is no problem in reassigning the numbers among input ports 1 to 4 and output ports 1' to 4'.

[0021] The optical switch circuit with the layout shown in Figure 10 is different from that shown in Figure 5, but it retains the same PILOSS characteristics of being completely non-blocking, power-saving, and path-independent in loss, and because the input and output ports are arranged alternately next to each other, it can be connected to the outside world over a short distance without crossings. Furthermore, the number of crossings within the optical switch circuit is reduced by one to N-2 for each path. In other words, it is possible to suppress losses due to wiring crossings.

[0022] [Embodiment 1] Fig. 11 shows a circuit layout in which the arrangement and wiring of the unit optical switches in the optical switch circuit shown in Fig. 10 are arranged neatly. This optical switch circuit includes unit optical switches S11 to S82. These unit optical switches are divided into a first group including unit optical switches S11 and S12, a second group including unit optical switches S21 and S22, a third group including unit optical switches S31 and S32, a fourth group including unit optical switches S41 and S42, a fifth group including unit optical switches S51 and S52, a sixth group including unit optical switches S61 and S62, a seventh group including unit optical switches S71 and S72, and an eighth group including unit optical switches S81 and S82.

[0023] The groups are arranged adjacent to each other in numerical order. The first group and the eighth group are also arranged adjacent to each other. Each group includes a first row of unit optical switches and a second row of unit optical switches from the inside to the outside. Specifically, in the first group, the first row of unit optical switches S11 and the second row of unit optical switches S12 are arranged from the inside to the outside. In the second group, the first row of unit optical switches S21 and the second row of unit optical switches S22 are arranged from the inside to the outside. In the third group, the first row of unit optical switches S31 and the second row of unit optical switches S32 are arranged from the inside to the outside. In the fourth group, the first row of unit optical switches S41 and the second row of unit optical switches S42 are arranged from the inside to the outside. Similarly, in the eighth group, the first row of unit optical switches S81 and the second row of unit optical switches S82 are arranged from the inside to the outside. In each unit optical switch, either the input port or the output port faces inward in order to connect the first columns with each other, and the second and subsequent columns with the columns before and after.

[0024] The inward-facing port of the unit optical switch in the first column of each group is connected to the closer port of the unit optical switch in the first column of the adjacent group. That is, the unit optical switch S11 is connected to the unit optical switch S21 and the unit optical switch S81, the unit optical switch S21 is connected to the unit optical switch S11 and the unit optical switch S31, the unit optical switch S31 is connected to the unit optical switch S21 and the unit optical switch S41, the unit optical switch S41 is connected to the unit optical switch S31 and the unit optical switch S51, the unit optical switch S51 is connected to the unit optical switch S41 and the unit optical switch S61, the unit optical switch S61 is connected to the unit optical switch S51 and the unit optical switch S71, the unit optical switch S71 is connected to the unit optical switch S61 and the unit optical switch S81, and the unit optical switch S81 is connected to the unit optical switch S71 and the unit optical switch S11.

[0025] Furthermore, the inward-facing ports of the unit optical switches in the second column of each group are connected to the nearest port among the outward-facing ports of the unit optical switches in the first column of the adjacent group. That is, the unit optical switch S12 is connected to the nearest port among the outward-facing ports of the unit optical switch S21 in the first column of the adjacent second group, and to the nearest port (marked with a circle) among the outward-facing ports of the unit optical switch S81 in the first column of the adjacent eighth group. The unit optical switch S22 is connected to the nearest port among the outward-facing ports of the unit optical switch S11 in the first column of the adjacent first group, and to the nearest port among the outward-facing ports of the unit optical switch S31 in the first column of the adjacent third group. The unit optical switch S32 is connected to the nearest port among the outward-facing ports of the unit optical switch S21 and to the nearest port among the outward-facing ports of the unit optical switch S41. The unit optical switch S42 is connected to the nearest port of the unit optical switch S31 facing outward and to the nearest port (marked with a circle) of the unit optical switch S51 facing outward.

[0026] The unit optical switch S52 is connected to the nearest port (marked with a circle) of the outward facing ports of the unit optical switch S41 and to the nearest port of the outward facing ports of the unit optical switch S61. The unit optical switch S62 is connected to the nearest port of the outward facing ports of the unit optical switch S51 and to the nearest port of the outward facing ports of the unit optical switch S71. The unit optical switch S72 is connected to the nearest port of the outward facing ports of the unit optical switch S61 and to the nearest port of the outward facing ports of the unit optical switch S81. The unit optical switch S82 is connected to the nearest port of the outward facing ports of the unit optical switch S71 and to the nearest port (marked with a circle) of the outward facing ports of the unit optical switch S11.

[0027] For each unit optical switch in the last column (here, the second column) in each group, a specific one of the outward-facing ports is used as a port of a type different from the type of port (i.e., input or output) of the unit optical switch in the last column of the adjacent group, so that the input port and the output port are arranged alternately next to each other. If there is a last column + 1 column, the specific one is the port connected to the (last column + 1 column) unit optical switch in the (own group number + 1) group.

[0028] Here, the lower of the outward facing ports of the unit optical switch S12 is used as input port 1, the lower of the outward facing ports of the unit optical switch S22 is used as output port 1', the lower of the outward facing ports of the unit optical switch S32 is used as input port 2, the lower of the outward facing ports of the unit optical switch S42 is used as output port 2', the upper of the outward facing ports of the unit optical switch S52 is used as input port 4, the upper of the outward facing ports of the unit optical switch S62 is used as output port 4', the upper of the outward facing ports of the unit optical switch S72 is used as input port 3, and the upper of the outward facing ports of the unit optical switch S82 is used as output port 3'.

[0029] In this way, by arranging the first to fourth groups facing left and the fifth to eighth groups facing right, it becomes possible to arrange semiconductor chips and the like on the left and right of the optical switch circuit without crossing wiring.

[0030] Figure 12 shows an example in which the 4-input, 4-output optical switch circuit shown in Figure 11 is expanded to an 8-input, 8-output optical switch circuit, where N = 8. This optical switch circuit includes a total of 8 x 8 = 64 (= N x N) unit optical switches, namely unit optical switches S11 to S164. These unit optical switches are divided into groups 1 to 16 (= 2 x N). The first group has four (=N / 2) unit optical switches S11 to S14, the second group has four unit optical switches S21 to S24, the third group has four unit optical switches S31 to S34, the fourth group has four unit optical switches S41 to S44, the fifth group has four unit optical switches S51 to S54, the sixth group has four unit optical switches S61 to S64, the seventh group has four unit optical switches S71 to S74, the eighth group has four unit optical switches S81 to S84, and the ninth group has The first group includes four unit optical switches S91 to S94, the tenth group includes four unit optical switches S101 to S104, the eleventh group includes four unit optical switches S111 to S114, the twelfth group includes four unit optical switches S121 to S124, the thirteenth group includes four unit optical switches S131 to S134, the fourteenth group includes four unit optical switches S141 to S144, the fifteenth group includes four unit optical switches S151 to S154, and the sixteenth group includes four unit optical switches S161 to S164.

[0031] The groups are arranged adjacent to each other in numerical order. The first and sixteenth groups are also arranged adjacent to each other. Here, p is an integer between 1 and 16 (=2×N), and the pth group is arranged adjacent to the p+1th group (when p=16=2×N, p+1 is 1) and the p−1th group (when p=1, p−1 is 16 (2×N)).

[0032] Each group includes, from the inside to the outside, first to fourth columns (=2 / N) of unit optical switches. Specifically, in the first group, the unit optical switch S11 in the first column, the unit optical switch S12 in the second column, the unit optical switch S13 in the third column, and the unit optical switch S14 in the fourth column are arranged in this order from the inside to the outside. Similarly, in the eighth group, the unit optical switch S81 in the first column, the unit optical switch S82 in the second column, the unit optical switch S83 in the third column, and the fourth unit optical switch S84 are arranged in this order from the inside to the outside. In the ninth group, the unit optical switch S91 in the first column, the unit optical switch S92 in the second column, the unit optical switch S93 in the third column, and the fourth unit optical switch S94 are arranged in this order from the inside to the outside. In the sixteenth group, the unit optical switches S161 in the first column, the unit optical switch S162 in the second column, the unit optical switch S163 in the third column, and the fourth unit optical switch S164 are arranged in this order from the inside to the outside.

[0033] In each unit optical switch, either the input port or the output port is arranged to face inward, and the other is arranged to face outward.

[0034] Furthermore, the inward-facing port of the unit optical switch in the first column in each group is connected to the closer port of the unit optical switch in the first column in the adjacent group. For example, the unit optical switch S11 in the first group is connected to the unit optical switch S161 and the unit optical switch S21, and the unit optical switch S21 in the second group is connected to the unit optical switch S11 and the unit optical switch S31. Similarly, the unit optical switch S81 in the eighth group is connected to the unit optical switch S71 and the unit optical switch S91. The unit optical switch S161 in the sixteenth group is connected to the unit optical switch S11 and the unit optical switch S151.

[0035] Furthermore, the inward-facing port of the qth (q is an integer between 2 and 16 (=N / 2)) column of unit optical switches in each group is connected to the nearest outward-facing port of the unit optical switch in the q-1th column of the adjacent group, i.e., for the pth group, the p-1th group and the p+1th group. For example, the unit optical switch S12 is connected to the unit optical switch S161 and the unit optical switch S21. The unit optical switch S23 is connected to the unit optical switch S12 and the unit optical switch S32. The unit optical switch S34 is connected to the unit optical switch S23 and the unit optical switch S43.

[0036] Moreover, the unit optical switch S13 is connected to the unit optical switch S162 and the unit optical switch S22. The unit optical switch S14 is connected to the unit optical switch S163 and the unit optical switch S23.

[0037] Furthermore, the unit optical switch S82 is connected to the unit optical switch S71 and the unit optical switch S91. The unit optical switch S83 is connected to the unit optical switch S72 and the unit optical switch S92. The unit optical switch S84 is connected to the unit optical switch S73 and the unit optical switch S93.

[0038] Similarly, the unit optical switch S92 is connected to the unit optical switch S81 and the unit optical switch S101. The unit optical switch S93 is connected to the unit optical switch S82 and the unit optical switch S102. The unit optical switch S94 is connected to the unit optical switch S83 and the unit optical switch S103.

[0039] Furthermore, the unit optical switch S162 is connected to the unit optical switch S151 and the unit optical switch S11. The unit optical switch S163 is connected to the unit optical switch S152 and the unit optical switch S12. The unit optical switch S164 is connected to the unit optical switch S153 and the unit optical switch S13.

[0040] For each unit optical switch in the fourth (=N / 2) column, which is the final column, a specific one of the ports facing outward, i.e., if there is an (N / 2+1) column, the port connected to the unit optical switch in the (N / 2+1) column in the p+1-th group, is used as a port of a type different from the type of port of the unit optical switch in the N / 2 column in the adjacent group, so that the input ports and output ports are arranged alternately next to each other. Also in Figure 12, output ports and input ports appear in pairs in order, such as (1',1), (2',2),..., (8',8).

[0041] The bar state and cross state of each unit optical switch are controlled by the control unit 100 to an appropriate state in accordance with the path to be set.

[0042] Figure 13 shows three example paths in the optical switch circuit shown in Figure 12. Figure 13 illustrates a path R1 from input port 1 of unit optical switch S24 to output port 6' of unit optical switch S114, a path R2 from input port 8 of unit optical switch S164 to output port 5' of unit optical switch S94, and a path R3 from input port 7 of unit optical switch S144 to output port 4' of unit optical switch S74. These paths are merely examples, and the unit optical switch that the control unit 100 turns ON (bar state) in these paths R1 to R3 is only the last unit optical switch that is passed through.

[0043] Which unit optical switch should be turned on in a path from a specific input port to a specific output port is specified in advance, and when the control unit 100 realizes that path, it turns on the specified unit optical switch, thereby realizing any path.

[0044] Although the above examples show N=4 and N=8, the same configuration can be applied to cases where N is other values.

[0045] [Variation of First Embodiment] When semiconductor chips or the like are arranged on the left and right sides of the optical switch circuit, an optical switch circuit such as that shown in FIG. 12 is preferable, but in some cases, unit optical switches may be arranged as in the optical switch circuit shown in FIG. 14. This optical switch circuit includes 64 unit optical switches, as in FIG. 12, and four unit optical switches located on a half line from the center of the circle belong to one group. For example, if the group at 12 o'clock is designated as the first group and group numbers are assigned in counterclockwise order at equal angular intervals, the group at 9 o'clock is the fifth group, the group at 6 o'clock is the ninth group, and the group at 3 o'clock is the thirteenth group. Furthermore, unit optical switches that are the same distance from the center of the circle, i.e., arranged on a circumference of the same radius, are unit optical switches in the same row, and are arranged in rows 1 to 4 from the center of the circle (i.e., the inside) to the outside.

[0046] The fact that the unit optical switches in the first column are connected to the unit optical switches in the first column in the adjacent groups on both sides, and that each unit switch in the second column and onwards is connected to the unit optical switch in the previous column in the adjacent groups on both sides, are the same as those shown in Fig. 12. The same applies to other rules.

[0047] With an optical switch circuit such as that shown in FIG. 14, semiconductor chips (xPU1 to xPU8 in FIG. 15) can be arranged not only on the left and right but also on the top and bottom, as shown schematically in FIG.

[0048] 14, the unit optical switches are arranged based on a circle, but the unit optical switches may be arranged based on a polygon instead of a circle. For example, K polygons may be arranged in N / 2 rows concentrically, with 2×N / K groups on each side.

[0049] [Application Example 1 of Embodiment 1] The optical switch circuit according to the first embodiment has unused idle ports, similar to PILOSS, which can be used as another independent and synchronized switch circuit. This is the same as the feature of PILOSS described in Patent Document 3.

[0050] For example, for the optical switch circuit of N=4 shown in Fig. 11, names are assigned to the input and output ports as shown in Fig. 16. That is, the first set of input / output ports includes the lower output port B1 of the unit optical switch S12, the lower input port A2 of the unit optical switch S22, the lower output port B3 of the unit optical switch S32, the lower input port A4 of the unit optical switch S42, the upper output port B4 of the unit optical switch S52, the upper input port A3 of the unit optical switch S62, the upper output port B2 of the unit optical switch S72 and the upper input port A1 of the unit optical switch S82. The second set of input / output ports includes the upper input port K4 of the unit optical switch S12, the upper output port L4 of the unit optical switch S22, the upper input port K3 of the unit optical switch S32, the upper output port L2 of the unit optical switch S42, the lower input port K1 of the unit optical switch S52, the lower output port L1 of the unit optical switch S62, the lower input port K2 of the unit optical switch S72, and the lower output port L3 of the unit optical switch S82. Switching from the input ports A1 to A4 to the output ports B1 to B4 and switching from the input ports K1 to K4 to the output ports L1 to L4 are performed independently of and synchronous with each other.

[0051] Specifically, for example, the paths for the first set, such as from input port A1 to output port B4, from input port A2 to output port B2, from input port A3 to output port B3, and from input port A4 to output port B1, and the paths for the second set, such as from input port K1 to output port L4, from input port K2 to output port L2, from input port K3 to output port L3, and from input port K4 to output port L1, can be realized independently and synchronously as shown schematically in Fig. 17. At this time, the unit optical switch S12, unit optical switch S32, unit optical switch S52, and unit optical switch S72 are turned ON (bar state).

[0052] Furthermore, for example, each path of the first set, such as from input port A1 to output port B2, from input port A2 to output port B1, from input port A3 to output port B4, and from input port A4 to output port B3, and each path of the second set, such as from input port K1 to output port L2, from input port K2 to output port L1, from input port K3 to output port L4, and from input port K4 to output port L3, can be realized independently and synchronously as shown schematically in Fig. 18. At this time, unit optical switches S21, S41, S61, and S81 are turned ON (bar state).

[0053] In this way, it can be used in the same way as the PILOSS optical switch circuit.

[0054] [Application Example 2 of Embodiment 1] It is also possible to configure a wavelength selective switch by combining a wavelength selective coupler with an optical switch circuit (FIG. 11) where N=4, for example. For example, the optical switch circuit according to the first embodiment can be applied to the technology described in Patent Document 4.

[0055] In FIG. 19, four wavelengths λ １ 〜λ ４ 19 shows an example of a circuit for selecting a signal of each wavelength from a wavelength division multiplexed signal of wavelength λ. １ a wavelength selective coupler 201 for selecting light of wavelength λ ２ a wavelength selective coupler 301 for selecting light of wavelength λ ３ a wavelength selective coupler 401 for selecting light of wavelength λ ４ The optical waveguide 602 is connected in series with a wavelength selection coupler 501 for selecting light of wavelength λ １ a wavelength selective coupler 202 for selecting light of wavelength λ ２ a wavelength selective coupler 302 for selecting light of wavelength λ ３ a wavelength selective coupler 402 for selecting light of wavelength λ ４ and a wavelength selection coupler 502 for selecting the light from the first and second wavelengths.

[0056] Furthermore, the optical waveguide 603 includes a wavelength λ １a wavelength selective coupler 204 for selecting light of wavelength λ ２ a wavelength selective coupler 304 for selecting light of wavelength λ ３ a wavelength selective coupler 404 for selecting light of wavelength λ ４ The optical waveguide 604 is formed in series with a wavelength selection coupler 504 for selecting light of wavelength λ １ a wavelength selective coupler 205 for selecting light of wavelength λ ２ a wavelength selective coupler 305 for selecting light of wavelength λ ３ a wavelength selective coupler 405 for selecting light of wavelength λ ４ and a wavelength selection coupler 505 for selecting the light from the first and second wavelengths.

[0057] Furthermore, wavelength selective couplers 201, 202, 204, and 205 are connected to an N=4 optical switch circuit 203 shown in Fig. 11. Wavelength selective couplers 301, 302, 304, and 305 are connected to an N=4 optical switch circuit 303 shown in Fig. 11. Wavelength selective couplers 401, 402, 404, and 405 are connected to an N=4 optical switch circuit 403 shown in Fig. 11. Wavelength selective couplers 501, 502, 504, and 505 are connected to an N=4 optical switch circuit 503 shown in Fig. 11.

[0058] Then, by connecting input port 1 and output port 1' of optical switch circuit 203, connecting input port 3 and output port 3', connecting input port 1 and output port 3' of optical switch circuit 303, connecting input port 3 and output port 2', connecting input port 1 and output port 2' of optical switch circuit 403, connecting input port 3 and output port 4', connecting input port 1 and output port 4' of optical switch circuit 503, and connecting input port 3 and output port 1', the following branching becomes possible.

[0059] That is, when a wavelength division multiplexed signal with four wavelengths is input from the left end (terminal 1) of the optical waveguide 602, a signal with wavelength λ 1 is output from the left end (terminal 1') of the optical waveguide 601. １ and outputs light of wavelength λ from the right end (terminal 3′) of the optical waveguide 602. ２ and outputs light of wavelength λ from the left end (terminal 2′) of the optical waveguide 603.３ and outputs light of wavelength λ from the right end (terminal 4′) of the optical waveguide 604. ４ It will emit light of

[0060] 20, when a wavelength division multiplexed signal with four wavelengths is input from the right end (terminal 3) of the optical waveguide 601, a signal with wavelength λ 1 is output from the right end (terminal 3') of the optical waveguide 602. １ and outputs light of wavelength λ from the left end (terminal 2′) of the optical waveguide 603. ２ and outputs light of wavelength λ from the right end (terminal 4′) of the optical waveguide 604. ３ and outputs light of wavelength λ from the left end (terminal 1′) of the optical waveguide 601. ４ It outputs light.

[0061] Such a wavelength selective switch is not limited to four wavelengths and can be modified for wavelength division multiplexed signals with other numbers of wavelengths.

[0062] [Embodiment 2] When 2×M input / output ports are provided on each of N chips and interconnected in multiple lanes in order to ensure communication capacity, rather than using an M×N input and M×N output optical switch circuit as shown in FIG. 21 , preparing and interconnecting M N input / N output optical switch circuits as shown in FIG. 22 will significantly reduce the number of unit optical switches that make up the optical switch circuit, thereby significantly reducing size and power consumption and significantly simplifying control and implementation.

[0063] For example, if M=N=4 in the PILOSS topology, the number of unit optical switches in the former is (M×N) ２ = 256, but the number of unit optical switches in the latter is M × N ２ = 64, and if M = N = 16, the number of unit optical switches in the former is 65,536, but the number of unit optical switches in the latter is only 4,096. However, as shown in Figure 22, if a large number of intersections occur between each chip and the optical switch circuit due to complex shuffle wiring, there is a problem of increased loss. Note that the maximum number of intersections in the shuffle portion is (M-1) x (N-2), and if N = M = 16, it is 210.

[0064] In this embodiment, the optical switch circuit described in the first embodiment is used for the N-input, N-output optical switch, and M of these optical switch circuits are arranged vertically. On the left and right of the row of these optical switch circuits, shuffle circuits with N x M input ports and N x M output ports are placed. These shuffle circuits use a two-layer optical waveguide structure to prevent crossings within the same circuit plane.

[0065] The shuffle circuit according to this embodiment employs a cross-point topology, as shown in Fig. 23. That is, for example, W first-layer optical waveguides 1000 made of Si are formed in the east-west direction (left-right direction), and W second-layer optical waveguides 1100 made of SiN are formed in the north-south direction (up-down direction). Note that the materials used for the first-layer optical waveguides 1000 and the second-layer optical waveguides 1100 are different from each other. That is, Si may be replaced with SiN, and SiN may be replaced with Si.

[0066] Then, based on the required connection relationship with the chip or the like, one of the intersections of the waveguides is selected, and an interlayer connection structure (circled in FIG. 23) between the first layer optical waveguide 1000 and the second layer optical waveguide 1100 is placed there.

[0067] This provides a W-input W-output shuffle circuit that is free from crossover within the same layer and allows arbitrary connection with low loss.

[0068] When the input / output port 1200 is formed on the same plane as the first layer optical waveguide 1000, an interlayer connection structure is formed between the second layer optical waveguide 1100 and the optical waveguide of the input / output port 1200. However, when an optical waveguide array or the like is directly connected to the second layer optical waveguide 1100 and an optical switch circuit is disposed on the same plane as the second layer optical waveguide 1100, the interlayer connection structure of the input / output port 1200 is not necessary.

[0069] For example, the basic form of a shuffle circuit where N = M = 4 and N × M = 16 is shown in Figure 24. In Figure 24, 16 optical waveguides are arranged in the east-west and north-south directions, and interlayer connection structures are formed at the intersections of the optical waveguides based on the required connection relationships. However, it is preferable that the pitch and direction of the first interlayer connection structure in the east-west direction be matched to the pitch and direction of the input / output ports of the chip or optical switch circuit, and that the pitch and direction of the second interlayer connection structure in the north-south direction be modified to match the pitch and direction of the input / output ports of the chip or optical switch circuit.

[0070] Therefore, for example, consider the case where a shuffle circuit located on the right side of the row of optical switch circuits in Figure 22 is modified. Figure 25 shows the first stage of modification. That is, the first through eighth lines of the second-layer optical waveguide 1100 are moved to the upper side and their order is changed. If the interlayer connection structure is not changed, the connection relationship is maintained even if such a rearrangement is made. Furthermore, as shown in Figure 26, by removing unnecessary portions of the optical waveguide and adjusting the extraction direction of the second-layer optical waveguide so that the distance to the port of the connected chip is shortest, a shuffle circuit can be properly formed.

[0071] [Implementation of the Embodiments] The circuits according to the above-described embodiments are preferably implemented as optical integrated circuits made of Si optical waveguides or SiN optical waveguides manufactured by silicon photonics technology.

[0072] Silicon photonics is based on advanced silicon technology developed through electronics, which means that the material's properties are highly stable and reproducible. Furthermore, because it can be manufactured in semiconductor manufacturing plants, it excels in mass productivity, precision, and long-term reliability.

[0073] In order to achieve the main objective of this embodiment, which is to optically interconnect semiconductor chips such as CPUs, GPUs, and memories via the optical switch circuit according to the embodiment of the present invention, it is preferable to integrate each semiconductor chip, photoelectric conversion chip, etc. onto a single board or package, but silicon photonics technology is suitable for miniaturizing the optical switch circuit as well.

[0074] The unit optical switches included in the optical switch circuit are typically 2x2 Mach-Zehnder interference switches that integrate a Si optical waveguide and a microheater (when using the thermo-optic effect) or a pin structure (when using the carrier plasma effect). However, the switch disclosed in Non-Patent Document 1 or the ring-type optical switch disclosed in Non-Patent Document 2 may also be used.

[0075] In the shuffle circuit, the SiN optical waveguide layer is a Si optical waveguide layer and a SiO ２ The SiN optical waveguides are formed on the upper layer, sandwiching a cladding layer between them, and are spaced apart vertically by a sufficient distance, for example, 1 μm or more, so that loss and crosstalk do not occur even when they intersect three-dimensionally. A directional coupler or the like is used to connect the Si optical waveguide and the SiN optical waveguide to each other, achieving a highly efficient connection with a loss of less than 1 dB.

[0076] [Effects] By employing the optical switch circuit shown in the first embodiment, it becomes possible to connect to a semiconductor chip or the like over a short distance without crossing and with low loss.

[0077] As an example, consider a connection with a Si optical waveguide loss of 1 dB / cm and a Si optical waveguide crossing loss of 0.02 dB / piece. For example, when connecting as shown in Figure 2, the optical waveguide wraps around the optical switch, so the length of the optical waveguide is approximately half the circumference of the optical switch at most, and the number of crossings is a maximum of 2M × (N / 2 - 1) for N chips with 2M inputs and outputs. In practice, assuming an optical switch chip is 1 cm square and M = N = 16, a loss of approximately 6.5 dB (optical waveguide loss of approximately 2 dB, crossing loss of 224 × 0.02 = 4.5 dB) will occur. However, using an optical switch circuit such as that shown in the first embodiment can improve this loss.

[0078] Furthermore, by using a shuffle circuit as shown in the second embodiment, crossings within the same plane do not occur in the shuffle wiring between each optical switch circuit and each chip, making it possible to achieve low-loss connections.

[0079] As an example, let us assume that only one Si optical waveguide layer is used and the Si optical waveguide crossing loss is 0.02 dB per layer. For N chips with 2M inputs and outputs, the maximum number of crossings in the shuffle section is (M-1) x (N-2). In practice, if M = N = 16, a loss of approximately 210 x 0.02 = 4.2 dB occurs. However, by using a shuffle circuit as shown in the second embodiment, this loss can be reduced.

[0080] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments. In addition, specific features in the above-described embodiments may be arbitrarily selected, combined, or deleted depending on the purpose.

[0081] The above-described embodiment can be summarized as follows.

[0082] An optical switch circuit according to a first aspect of this embodiment has N×N unit optical switches, each having two input ports and two output ports. The N×N unit optical switches are divided into 1st to 2×N groups, each having the same number of unit optical switches, and the pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is 1) and the p−1th group (when p=1, p−1 is 2×N), and in each group, 1st to N / 2th columns of unit optical switches are arranged from inside to outside, with either the input port or the output port of each unit optical switch facing inward. The inward-facing port of the unit optical switch in the first column of the pth group is connected to the closer port of the unit optical switch in the first column of the p-1th and p+1th groups, and the inward-facing port of the unit optical switch in the qth column (q is an integer between 2 and N / 2) of the pth group is connected to the closer port of the outward-facing port of the unit optical switch in the q-1th column of the p-1th and p+1th groups.

[0083] The arrangement and wiring of the unit optical switches as described above allows the input ports and output ports to be arranged adjacent to each other. Furthermore, crossing of the wiring is suppressed, thereby suppressing loss due to crossing.

[0084] In addition, for each unit optical switch in the N / 2-th column, a specific one of the outward-facing ports may be used as a different type (either input or output) between adjacent groups. For example, if the port of the unit optical switch in the N / 2-th column in an adjacent group is an input port, a specific one of the ports of this unit optical switch is an output port.

[0085] Furthermore, the first through Nth groups may be arranged facing left, and the N+1th through 2xNth groups may be arranged facing right. In this way, even if the connection destination chips or the like are arranged on the left and right, they can be connected without crossing the wiring. Note that the first through 2xNth groups may be divided by the number of sides of the polygon, and 2xN / (number of sides) groups may be arranged in a direction perpendicular to each side.

[0086] An optical switch circuit according to a second aspect of this embodiment includes (A) M optical switch circuits, each including N×N unit optical switches, each having two input ports and two output ports, and (B) N×M input / output ports of N / 2 connection destinations, each having 2×M input / output ports, and two shuffle circuits that respectively connect the N×M input / output ports out of the total 2×M×N input / output ports of the M optical switch circuits so as to satisfy a desired connection relationship. Here, the M optical switch circuits are arranged in a row, with one of the two shuffle circuits located on the left side of the row and the other on the right side of the row. Then, for each of the M optical switch circuits, the N×N unit optical switches are divided into 1st to 2×N groups each having the same number of unit optical switches, and the pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is set to 1) and the p−1th group (when p=1, p−1 is set to 2×N), and in each group, the unit optical switches are arranged from the 1st column to the N / 2th column from the inside to the outside, with either the input port or the output port of each unit optical switch facing inward. The inward-facing port of the unit optical switch in the first column of the pth group is connected to the closer port of the unit optical switch in the first column in the p−1th and p+1th groups, and the inward-facing port of the unit optical switch in the qth (q is an integer between 2 and N / 2) column of the pth group is connected to the closer port of the outward-facing port of the unit optical switch in the q−1th column in the p−1th and p+1th groups. Furthermore, for each of the unit optical switches in the N / 2-th column, a specific one of the outward-facing ports is used for either input or output in a different type between adjacent groups, with the first to N-th groups arranged facing left and the (N+1)-th to (2×N)-th groups arranged facing right. Furthermore, each of the two shuffle circuits includes a first optical circuit layer on which M×N first optical waveguides are formed and a second optical circuit layer on which M×N second optical waveguides are formed, and any one of the first optical waveguides and any one of the second optical waveguides is connected by a single interlayer connection structure so as to satisfy a desired connection relationship.

[0087] In this way, two shuffle circuits can be used to connect N / 2 destinations (e.g., chips) each having 2 × M input / output ports without crossing. Each of the M optical switch circuits is substantially the same as the optical switch circuit according to the first aspect, which reduces the number of unit optical switches and enables connection with destinations with low loss.

[0088] It is preferable that the first optical waveguide and the second optical waveguide are made of different materials. For example, the first optical waveguide may be made of Si and the second optical waveguide may be made of SiN, or the first optical waveguide may be made of SiN and the second optical waveguide may be made of Si.

Claims

1. A system having N×N unit optical switches, each having two input ports and two output ports, wherein the N×N unit optical switches are divided into 1st to 2nd×N groups, each having the same number of unit optical switches, and the pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is 1) and the p-1th group (when p=1, p-1 is 2×N), and in each group, 1st to N / 2th columns of unit optical switches are arranged from the inside to the outside, and either one of the input port or the output port of each unit optical switch is arranged facing inward, and the inward-facing port of the unit optical switch in the first column of the pth group is connected to the closer port of the unit optical switch in the first column in the p-1th and p+1th groups, An optical switch circuit in which an inward-facing port of a unit optical switch in the qth (q is an integer of 2 or more and N / 2 or less) column of the pth group is connected to a closer port outward-facing port of a unit optical switch in the q-1th column of the p-1th group and the p+1th group.

2. The optical switch circuit according to claim 1, wherein for each of the N / 2 rows of unit optical switches, a specific one of the outward facing ports is used for either input or output in a different type between adjacent groups.

3. The optical switch circuit according to claim 1, wherein the first to Nth groups are arranged to face left, and the N+1th to 2×Nth groups are arranged to face right.

4. A system comprising: M optical switch circuits each including N×N unit optical switches, each having two input ports and two output ports; N×M input / output ports of N / 2 connection destinations, each having 2×M input / output ports; and two shuffle circuits each connecting the N×M input / output ports of the total 2×M×N input / output ports of said M optical switch circuits so as to satisfy a desired connection relationship; said M optical switch circuits are arranged in a row; one of said two shuffle circuits is arranged on the left side of said row and the other is arranged on the right side of said row; and for each of said M optical switch circuits, said N×N unit optical switches are divided into 1st to 2×N groups each having the same number of unit optical switches, and said pth (p is an integer between 1 and 2×N) group is arranged adjacent to the p+1th group (when p=2×N, p+1 is 1) and the p-1th group (when p=1, p-1 is 2×N), In each group, unit optical switches are arranged in a first to an N / 2-th column from the inside to the outside, and either the input port or the output port of each unit optical switch is arranged facing inward, and the inward-facing port of the unit optical switch in the first column of the p group is connected to the closer port of the unit optical switch in the first column in the p-1 and p+1 groups, and the inward-facing port of the unit optical switch in the q-th column (q is an integer between 2 and N / 2) of the p group is connected to the closer port of the outward-facing port of the unit optical switch in the q-1-th column in the p-1 and p+1 groups, and for each of the N / 2 columns of unit optical switches, a specific one of the outward-facing ports is used for either input or output, and is different in type between adjacent groups, and the first to N-th groups are arranged facing leftward, and the N+1 to 2×N groups are arranged facing rightward, and each of the two shuffle circuits is a first optical circuit layer in which M×N first optical waveguides are formed; and a second optical circuit layer in which M×N second optical waveguides are formed, wherein any one of the first optical waveguides and any one of the second optical waveguides are connected by a single interlayer connection structure so as to satisfy the desired connection relationship.Optical switch circuit.

5. An optical switch circuit according to claim 4, wherein said first optical waveguide and said second optical waveguide are made of different materials.

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