Method for forming stub-free via hole, and PCB

Abstract

The present invention relates to a method for forming a stub-free via hole, and a PCB. The method for forming a stub-free via hole comprises the steps of: pressing a plurality of first layered circuits into a communication layer; drilling a communication hole in the communication layer; performing electroless plating copper on the communication hole; pressing a plurality of second layered circuits into a non-communication layer; routing a first surface of the non-communication layer to form a routed groove on the first surface at the position corresponding to the communication hole; pressing the communication layer and the non-communication layer to form a circuit board, wherein during pressing, the first surface faces the communication layer; performing electroless plating copper on the circuit board; and routing a second surface of the non-communication layer facing away from the communication layer to route through the second surface at the position opposite to the routed groove to form a routed hole, wherein the routed hole mates with the communication hole to form a stepped hole running through the circuit board. The present invention can realize a stub-free partially-metalized through hole, thereby satisfying stub requirements on the PCB, reducing the tip effect of the PCB in a signal transmission process, improving the quality, and improving the production yield.

Description

Stub-free via hole manufacturing method and PCB TECHNICAL FIELD

[0001] The present application relates to the technical field of PCB (Printed Circuit Board), in particular to a Stub-free via hole manufacturing method and PCB. BACKGROUND

[0002] In electronic engineering, Stub refers to a protruding structure on a PCB, which is an additional structure connected to the main signal transmission line but does not affect the signal. Stub is also called stub line or residual stub line. The line head is generally not allowed to appear, and the excess line head will produce antenna radiation effect and cause signal reflection, eventually causing signal integrity problems. In addition to Stub lines, Stub produced by via holes also needs to be considered in some high-speed scenarios.

[0003] Back drilling process is a common process for processing local non-metalized via structures. During back drilling, after the metalized via is processed on the PCB, part of the metalized via is drilled into a non-metalized hole from the back of the PCB, so that part of the device hole is formed into a non-metalized hole structure. The existing back drilling process is prone to Stub. As the requirements for signal transmission are becoming higher and higher, the Stub of some PCBs is required to be less than 5 mil, or even 0 mil. The existing back drilling method obviously cannot meet the requirements. SUMMARY

[0004] The purpose of the present application is to provide a Stub-free via hole manufacturing method and PCB, which can realize Stub-free partial metalized via, thereby meeting the Stub requirements of the PCB, reducing the tip effect of the PCB in the signal transmission process, and improving the quality and production yield.

[0005] A Stub-free via hole manufacturing method, comprising the steps of:

[0006] Pressing a plurality of first layered circuits into a connected layer;

[0007] Drilling a connected hole in the connected layer;

[0008] Copper plating is performed on the connected hole;

[0009] Pressing a plurality of second layered circuits into a disconnected layer;

[0010] Plate milling is performed on the first surface of the disconnected layer to form a milling groove at the position corresponding to the connected hole on the first surface;

[0011] Pressing the connected layer and the disconnected layer to form a circuit board, and the first surface faces the connected layer during pressing;

[0012] copper plating to the circuit board;

[0013] drilling the second surface of the non-communicating layer away from the communicating layer, drilling through the second surface to form a drilled hole, the drilled hole and the communicating hole cooperating to form a stepped hole penetrating the circuit board.

[0014] Further, after the copper plating to the communicating hole, the method further comprises exposing the communicating hole by making an outer plating hole pattern to the communicating layer, and chemically depositing nickel and gold to the communicating hole.

[0015] Further, the thickness of the chemically deposited nickel is 2-3 μm, and the thickness of the chemically deposited gold is 0.01-0.03 μm.

[0016] Further, after the formation of the stepped hole penetrating the circuit board, the method further comprises the steps of:

[0017] making an outer circuit pattern to the circuit board, exposing the stepped hole by pattern exposure, and covering the circuit board with a dry film except the stepped hole;

[0018] etching the copper plating at the stepped hole position.

[0019] Further, in the etching of the copper plating at the stepped hole position, the etching is alkaline etching.

[0020] Further, the drilling of the first surface of the non-communicating layer forms a drilled groove at the position corresponding to the communicating hole, and the depth of the drilled groove is 0.1-0.15 mm.

[0021] Further, the copper plating to the communicating hole has a thickness of 20-25 μm.

[0022] Further, the copper plating to the circuit board has a thickness of 20-25 μm.

[0023] Further, the drilling is controlled-depth drilling.

[0024] The present application also provides a PCB obtained by the above method for making a via without residual stub.

[0025] Compared with the prior art, the beneficial effects of the present application are that the metalized communication hole is formed in the communication layer, the groove opposite to the communication hole is drilled in the non-communication layer before pressing, so that the hole copper of the communication hole after pressing is isolated from the non-communication layer, the length of the hole copper is ensured, the Stub of the hole copper in the subsequent process is avoided, finally the groove is drilled through the second surface of the non-communication layer, so that the stepped hole penetrating the PCB is formed, the operation is simple, the Stub is effectively avoided, the Stub requirement of the PCB is met, the tip effect of the PCB in the signal transmission process is reduced, and the quality and production yield are improved. BRIEF DESCRIPTION OF DRAWINGS

[0026] Fig. 1 is a flowchart of the stub-free via hole manufacturing method of the present application.

[0027] Fig. 2 is a structural schematic diagram of a partially metalized via hole manufactured by the existing back drilling process.

[0028] Fig. 3 is a schematic diagram of step S1 of the stub-free via hole manufacturing method of the present application.

[0029] Fig. 4 is a schematic diagram of step S2 of the stub-free via hole manufacturing method of the present application.

[0030] Fig. 5 is a schematic diagram of step S3 of the stub-free via hole manufacturing method of the present application.

[0031] Fig. 6 is a schematic diagram of step S4 of the stub-free via hole manufacturing method of the present application.

[0032] Fig. 7 is a schematic diagram of step S5 of the stub-free via hole manufacturing method of the present application.

[0033] Fig. 8 is a schematic diagram of step S6 of the stub-free via hole manufacturing method of the present application.

[0034] Fig. 9 is a schematic diagram of step S8 of the stub-free via hole manufacturing method of the present application.

[0035] BRIEF DESCRIPTION OF DRAWINGS

[0036] Communication layer 1, first layer-shaped circuit 11, communication hole 12, non-communication layer 2, second layer-shaped circuit 21, groove 22, drilled hole 23, stub 3. DETAILED DESCRIPTION

[0037] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the related drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be realized in many different forms and is not limited to the embodiments described herein.

[0038] Referring to Fig. 2, it is to be noted that in the existing back drilling process, after a metalized via hole is processed on a PCB, part of the metalized via hole is drilled into a non-metalized hole from the back of the PCB, so that part of the device hole is formed into a non-metalized hole structure. Due to the tapered structure of the drill bit, after back drilling, a protruding stub 3 is formed at the end of the via hole, which will cause a sharp end effect and affect the transmission signal.

[0039] Based on this, the present application provides a stub-free via hole manufacturing method, which can effectively avoid Stub, reduce the sharp end effect of the PCB in the signal transmission process, and improve the quality and production yield.

[0040] Referring to Figs. 1, 3 to 9, in a preferred embodiment, the stub-free via hole manufacturing method of the present application comprises the following steps:

[0041] S1, a plurality of first layered circuits 11 are pressed into a communication layer 1;

[0042] The number of the first layered circuits 11 can be set according to the actual needs of the circuit board, and the communication layer 1 is the number of layers that need to be connected by metal via holes. In this embodiment, the first layered circuits 11 are four layers, L1, L2, L3 and L4. Before pressing, the first layered circuits 11 can undergo the existing PCB processing method for the pre-process, such as opening the board and cleaning, which is not described in detail herein.

[0043] S2, a communication hole 12 is drilled on the communication layer 1;

[0044] S3, the communication hole 12 is subjected to copper plating;

[0045] After copper plating, a metalized via hole is formed which connects the communication layer 1, and the copper thickness is preferably 20-25 μm. It is to be noted that after the communication hole 12 is subjected to copper plating, the first layered circuits 11 are subjected to film stripping and inner layer patterning. The inner layer patterning is to pattern the first layered circuits 11 on the inner side of the circuit board after pressing, i.e. L4 in this embodiment. After completing the inner layer patterning, the communication layer 1 is subjected to the post-process.

[0046] S4, a plurality of second layered circuits 21 are pressed into a non-communication layer 2;

[0047] The number of the second layer circuit 21 can be set according to the actual demand of the circuit board, and the number of the non-communication layer 2, i.e. the number of layers that do not need to be communicated through the metal through hole. In the embodiment, the second layer circuit 21 is two layers, L5 and L6, and before pressing, the second layer circuit 21 can be processed according to the existing PCB processing method, such as opening the board and cleaning, which will not be repeated here. After the pre-process is completed, it also includes making inner layer pattern for the second layer circuit 21, which is to make pattern for the second layer circuit 21 located inside the circuit board after pressing, i.e. L5 in the embodiment.

[0048] S5, milling the first surface of the non-communication layer 2 to form a milling groove 22 at the position corresponding to the communication hole 12 on the first surface;

[0049] The position of the milling groove 22 corresponds to the communication hole 12 one by one, and is located on the first surface of the non-communication layer 2, which is the side surface of L5 in the embodiment. In the embodiment, the depth of the milling groove 22 is preferably 0.1mm-0.15mm.

[0050] S6, pressing the communication layer 1 and the non-communication layer 2 to form a circuit board, and the first surface faces the communication layer 1 during pressing;

[0051] The pressing can be performed by pressing without glue PP, and windowing is performed before pressing.

[0052] S7, copper plating is performed on the circuit board;

[0053] Before copper plating, the outer layer of the circuit board can be drilled to drill the through hole needed except the stepped hole. The thickness of the copper plating is preferably 20-25μm.

[0054] S8, milling the second surface of the non-communication layer 2 away from the communication layer 1 to form a milling hole 23 by milling the position opposite to the milling groove 22 on the second surface, and the milling hole 23 cooperates with the communication hole 12 to form a stepped hole penetrating through the circuit board.

[0055] The milling is controlled by depth milling, and the second surface is L6 in the embodiment.

[0056] Through the above method, a stepped hole penetrating through the circuit board can be formed, which is simple to operate, effectively avoids Stub, meets the Stub requirement of PCB, reduces the tip effect of PCB in the signal transmission process, and improves the quality and production yield.

[0057] In this embodiment, after electroplating copper onto the connecting hole 12, the method further includes creating an outer plated hole pattern on the connecting layer 1 to expose the location of the connecting hole 12, and then performing electroless nickel-gold plating on the connecting hole 12 to form a nickel-gold layer on the surface of the copper hole. The preferred thickness of the electroless nickel-gold plating is 2μm-3μm, and the preferred thickness of the gold plating is 0.01μm-0.03μm.

[0058] After forming the stepped via through the circuit board, the process also includes the following steps: creating the outer circuit pattern of the circuit board, exposing the location of the stepped via through the pattern, and covering the other areas of the PCB board except for the stepped via with dry film; etching away the electroplated copper at the location of the stepped via.

[0059] By forming a nickel-gold layer on the surface of the copper hole, which is resistant to alkaline corrosion, after the stepped hole is fabricated, the electroplated copper at the stepped hole location is etched away by alkaline etching. The nickel-gold layer can protect the PAD at the bottom of the stepped hole from being etched away, thereby removing the unnecessary copper in the L5-L6 layer of the stepped hole and further preventing the formation of stubs.

[0060] The present invention also provides a PCB obtained by the above-described via fabrication method without residual vias.

[0061] This invention forms a metallized connecting hole 12 in the connecting layer 1. Before lamination, a groove 22 opposite to the connecting hole 12 is pre-riveted in the non-connecting layer 2, thereby isolating the copper of the connecting hole 12 after lamination from the non-connecting layer 2, ensuring the length of the copper, and preventing the copper from becoming stub in subsequent processes. Finally, the groove 22 is ruptured through the second surface of the non-connecting layer 2 to form a stepped hole that penetrates the PCB. The operation is simple, effectively avoids stub, meets the stub requirements of the PCB, reduces the tip effect of the PCB in the signal transmission process, and can improve quality and increase production yield.

[0062] In the description of this invention, it should be understood that terms such as "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0063] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0064] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for making a via without a residual stub, the method comprising: The method comprises the steps of: pressing a plurality of first laminated circuits into a connected layer; drilling a connected hole in the connected layer; copper plating the connected hole; pressing a plurality of second laminated circuits into a non-connected layer; punching the first surface of the non-connected layer to form a punch groove corresponding to the position of the connected hole; pressing the connected layer and the non-connected layer to form a circuit board, and the first surface faces the connected layer during pressing; copper plating the circuit board; punching the second surface of the non-connected layer away from the connected layer to form a punch hole corresponding to the position opposite to the punch groove, and the punch hole cooperates with the connected hole to form a stepped hole penetrating through the circuit board.

2. The method of claim 1, wherein, After the copper plating of the connected hole, the method further comprises the steps of:

3. The method of claim 2, wherein, exposing the position of the connected hole by making an outer plating hole pattern on the connected layer, and chemically depositing nickel and gold on the connected hole.

4. The method of claim 2, wherein, The thickness of the chemically deposited nickel is 2-3 μm, and the thickness of the chemically deposited gold is 0.01-0.03 μm. After the formation of the stepped hole penetrating through the circuit board, the method further comprises the steps of: making an outer circuit pattern on the circuit board, exposing the position of the stepped hole by pattern exposure, and covering the circuit board with a dry film except the position of the stepped hole; 5. The method of claim 4, wherein, etching the copper plating at the position of the stepped hole.

6. The method of claim 1, wherein, In the etching of the copper plating at the position of the stepped hole, the etching method is alkaline etching.

7. The method of claim 1, wherein, The depth of the punch groove formed by punching the first surface of the non-connected layer is 0.1-0.15 mm.

8. The method of claim 1, wherein, The thickness of the copper plating of the connected hole is 20-25 μm.

9. The method of claim 1, wherein, The thickness of the copper plating of the circuit board is 20-25 μm.

10. A PCB, characterized by The punching method is controlled depth punching. The PCB obtained by the via hole making method without residual stubs as claimed in claim 1.

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