Capacitor and method for manufacturing capacitor
The three-dimensional capacitor design with irregular surfaces and manufacturing process enhances capacitance and compactness, addressing the need for increased packaging density in miniaturized components.
Patent Information
- Application Number
- PCT/JP2025/028370
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-08-13
- Filing Date
- 2025-08-08
- Publication Date
- 2026-02-19
AI Technical Summary
Existing capacitors face challenges in efficiently increasing capacitance while maintaining a compact size, particularly in applications where packaging density is high and components are miniaturized.
A capacitor design featuring electrodes and dielectric structures with three-dimensional configurations and surfaces with repeated, continuous irregularities, along with a manufacturing process that includes forming grooves and etching layers to enhance surface area.
The design increases capacitance and allows for a smaller form factor, achieving higher capacitance density without increasing physical size.
Smart Images

Figure JP2025028370_19022026_PF_FP_ABST
Abstract
Description
Capacitor and method of manufacturing the same
[0001] The present disclosure relates to capacitors and methods for manufacturing capacitors.
[0002] Capacitors have been widely used in circuits such as filters for the purposes of noise removal, power supply voltage smoothing, etc. In particular, in fields such as mobile phones and high-performance televisions, capacitors with large capacitance and good temperature and frequency characteristics are indispensable.
[0003] Multilayer ceramic capacitors (MLCCs) are known as capacitors with large capacitance. Multilayer ceramic capacitors are constructed by repeatedly stacking plate-shaped electrodes and dielectric materials. By increasing the number of layers of electrodes and dielectric materials, the capacitance can be increased.
[0004] Furthermore, as a capacitor having a capacitance greater than that of conventional multilayer ceramic capacitors, a capacitor in which the electrodes and the dielectric are each formed in a three-dimensional structure is known. Such capacitors are disclosed, for example, in U.S. Patent Application Publication No. 2010 / 0195262 A1, U.S. Patent No. 8,462,482 B2, U.S. Patent Application Publication No. 2009 / 0000093 A1, U.S. Patent No. 10,283,274 B2, and U.S. Patent No. 11,056,282 B2.
[0005] US Patent Application Publication No. 2010 / 0195262A1 US Patent No. 8,462,482B2 US Patent Application Publication No. 2009 / 0000093A1 US Patent No. 10,283,274B2 US Patent No. 11,056,282B2
[0006] As mentioned above, the capacitance of a capacitor can be increased by increasing the number of layers of electrodes and dielectric material, as well as by increasing the contact area between the electrodes and dielectric material. Meanwhile, as devices incorporating capacitors become smaller, the packaging density of multiple components, including capacitors, is increasing and the capacitors themselves are becoming smaller. Therefore, there is a need to efficiently increase capacitance.
[0007] An object of the present disclosure is to provide a capacitor capable of increasing capacitance and a method for manufacturing the capacitor.
[0008] A capacitor according to an embodiment of the present disclosure includes a first electrode made of a conductive material, a second electrode made of a conductive material, and a dielectric structure made of a dielectric material and interposed between the first and second electrodes. Each of the first and second electrodes has a three-dimensional structure defined by a height direction and a first and second direction orthogonal to the height direction. At least a portion of the surface of each of the first and second electrodes has a plurality of repeated, continuous irregularities.
[0009] A method for manufacturing a capacitor according to an embodiment of the present disclosure includes the steps of forming a first electrode, forming a second electrode, and constructing a dielectric structure. The dielectric structure includes a first portion and a second portion. The step of forming the dielectric structure includes the steps of forming the first portion, forming an etched layer so as to cover the first portion, forming a groove in the etched layer that extends in the height direction and exposes a portion of the first portion, forming the second portion in the groove, and removing the etched layer after forming the second portion.
[0010] In the capacitor of the present disclosure, at least a portion of the surface of each of the first electrode and the second electrode has a plurality of repeated, continuous irregularities, thereby realizing a capacitor capable of increasing capacitance according to the present disclosure.
[0011] 1. A cross-sectional view showing a capacitor according to a first embodiment of the present disclosure. 2. A perspective view showing a capacitor according to a first embodiment of the present disclosure. 3. A cross-sectional view showing a layer portion in the first embodiment of the present disclosure. 4. A perspective view showing a part of a layer portion in the first embodiment of the present disclosure. 5. A perspective view showing a part of a layer portion in the first embodiment of the present disclosure. 6. A perspective view showing a part of a first electrode, a second electrode, and a dielectric structure in the first embodiment of the present disclosure. 7. A perspective view showing a part of a first electrode, a second electrode, and a dielectric structure in the first embodiment of the present disclosure. 8. A perspective view showing a part of a dielectric structure in the first embodiment of the present disclosure. 9. A plan view showing an intervening portion of a dielectric structure in the first embodiment of the present disclosure. 10. A cross-sectional view showing a step subsequent to the step shown in FIG. 11. 12. A cross-sectional view showing a layer to be etched in the first embodiment of the present disclosure. 13. A cross-sectional view showing a step subsequent to the step shown in FIG. 15. 16. A cross-sectional view showing a step subsequent to the step shown in FIG. 17. 18. A cross-sectional view showing a step subsequent to the step shown in FIG. 19. A cross-sectional view showing a step subsequent to the step shown in FIG. 20. A cross-sectional view showing a step in a method for manufacturing a capacitor in accordance with a second embodiment of the present disclosure. A cross-sectional view showing a step subsequent to the step shown in FIG. 22. A cross-sectional view showing a step in a method for manufacturing a capacitor in accordance with a third embodiment of the present disclosure. A cross-sectional view showing a step subsequent to the step shown in FIG. 24. A cross-sectional view showing a step subsequent to the step shown in FIG. 25. A cross-sectional view showing a step subsequent to the step shown in FIG. 26. A cross-sectional view showing a step subsequent to the step shown in FIG. 27. A cross-sectional view showing a step subsequent to the step shown in FIG. 28. A perspective view showing a first electrode, a second electrode, and a portion of a dielectric structure in a fourth embodiment of the present disclosure. A perspective view showing a portion of a dielectric structure in accordance with the fourth embodiment of the present disclosure. A perspective view showing a portion of a dielectric structure in accordance with the fourth embodiment of the present disclosure.FIG. 1 is a plan view showing an interposition portion of a dielectric structure according to a fourth embodiment of the present disclosure. FIG. 2 is a cross-sectional view showing a portion of a capacitor according to a fifth embodiment of the present disclosure. FIG. 3 is a perspective view showing a portion of a layer portion according to a fifth embodiment of the present disclosure. FIG. 4 is a perspective view showing a portion of a layer portion according to a fifth embodiment of the present disclosure. FIG. 5 is a perspective view showing a first electrode, a second electrode, and a portion of a dielectric structure according to a fifth embodiment of the present disclosure. FIG. 6 is a plan view showing a first electrode, a second electrode, and a portion of a dielectric structure according to a fifth embodiment of the present disclosure. FIG. 7 is a perspective view showing an interposition portion of a dielectric structure according to a fifth embodiment of the present disclosure.
[0012] [First Embodiment] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. First, the configuration of a capacitor according to a first embodiment of the present disclosure will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a cross-sectional view showing a capacitor according to the present embodiment. Fig. 2 is a perspective view showing a capacitor according to the present embodiment.
[0013] 1 and 2, a capacitor 1 according to this embodiment includes a body 2 and a first terminal 3 and a second terminal 4 integrated with the body 2. The first and second terminals 3 and 4 are made of a conductive material. The conductive material making up the first and second terminals 3 and 4 may include at least one of Ni, Cu, Au, Ag, and Al.
[0014] The main body 2 has a rectangular parallelepiped shape. The main body 2 has a bottom surface 2a, a top surface 2b, and four side surfaces 2c, 2d, 2e, and 2f. The bottom surface 2a and the top surface 2b face in opposite directions, the side surfaces 2c and 2d face in opposite directions, and the side surfaces 2e and 2f face in opposite directions.
[0015] Here, the X direction, Y direction, and Z direction are defined as follows. The X direction is a direction perpendicular to the side surfaces 2c and 2d. The Y direction is a direction perpendicular to the side surfaces 2e and 2f. The Z direction is a direction perpendicular to the bottom surface 2a and the top surface 2b. The X direction, Y direction, and Z direction are perpendicular to one another. The Z direction or a direction parallel to the Z direction corresponds to the "height direction" in this disclosure. Furthermore, the direction opposite to the X direction is defined as the -X direction, the direction opposite to the Y direction is defined as the -Y direction, and the direction opposite to the Z direction is defined as the -Z direction.
[0016] Hereinafter, a position further in the Z direction than the reference position will be referred to as "above," and a position on the opposite side of "above" than the reference position will be referred to as "below." Furthermore, with respect to the components of capacitor 1, the surface located at the end in the Z direction will be referred to as the "top surface," and the surface located at the end in the -Z direction will be referred to as the "bottom surface." Furthermore, the expression "when viewed from a specific direction (e.g., the Z direction)" means viewing an object from a position away from a specific direction or a direction parallel to a specific direction, that is, viewing the object from a planar view from the Z direction. Furthermore, with respect to the components of capacitor 1, the shape viewed from the Z direction, that is, the shape viewed from a planar view from the Z direction, will also be referred to as the "planar shape."
[0017] The first terminal 3 covers the entire side surface 2c and portions of the bottom surface 2a, top surface 2b, and sides 2e and 2f close to the side surface 2c. The second terminal 4 covers the entire side surface 2d and portions of the bottom surface 2a, top surface 2b, and sides 2e and 2f close to the side surface 2d.
[0018] 1, the main body 2 includes a first substrate 11 and a second substrate 12 arranged at different positions in the height direction, i.e., a direction parallel to the Z direction, and a plurality of layer portions arranged between the first substrate 11 and the second substrate 12. The second substrate 12 is located above the first substrate 11. The first substrate 11 has a lower surface that constitutes the lower surface 2a of the main body 2 and an upper surface opposite thereto. The second substrate 12 has an upper surface that constitutes the upper surface 2b of the main body 2 and a lower surface opposite thereto.
[0019] The multiple layer portions are stacked in the height direction, i.e., parallel to the Z direction. FIG. 1 shows an example in which the main body 2 has six layer portions. However, the number of layer portions is not limited to six, as long as it is plural. Hereinafter, the six layer portions shown in FIG. 1 will be denoted by the reference numerals 10S1, 10S2, 10S3, 10S4, 10S5, and 10S6 from bottom to top. Any layer portion will be denoted by the reference numeral 10.
[0020] Next, the configuration of the layer portion 10 will be described with reference to Figures 3 to 5. Figure 3 is a cross-sectional view showing one layer portion 10. Figures 4 and 5 are perspective views showing part of the layer portion 10.
[0021] 3 to 5 , the layer portion 10 includes a first electrode 21, a second electrode 22, and a dielectric structure 23 interposed between the first electrode 21 and the second electrode 22. The first electrode 21 and the second electrode 22 are each made of a conductive material. The conductive material making up the first and second electrodes 21, 22 may include at least one of Ni, Cu, Au, Ag, and Al. One of the first electrode 21 and the second electrode 22 may correspond to an anode electrode, and the other may correspond to a cathode electrode.
[0022] The dielectric structure 23 is made of a dielectric material. The dielectric structure 23 may be made of a sintered dielectric. The dielectric material that makes up the dielectric structure 23 is, for example, Al. 2 O 3 , Si 3 N 4 , HfO 2 , Ta 2 O 5 , Ba 0.5 Sr 0.5 TiO 3 , BaTiO 3 , Zr—Ti—Y—O based material, or Zr—Ta—Y—O based material.
[0023] The first electrode 21 is connected to the first terminal 3 but is not connected to the second terminal 4. The second electrode 22 is connected to the second terminal 4 but is not connected to the first terminal 3. The first electrode 21 and the second electrode 22 are insulated by a dielectric structure 23.
[0024] Each of the first electrode 21 and the second electrode 22 has a three-dimensional structure, which is a three-dimensional structure defined by a height direction, i.e., the Z direction, and a first direction and a second direction, each of which is orthogonal to the Z direction. The first direction may be the X direction, and the second direction may be the Y direction. Note that the fact that each of the first electrode 21 and the second electrode 22 has a three-dimensional structure means that each of the first electrode 21 and the second electrode 22 has a relatively complex structure, rather than a simple linear structure or a simple plate-like structure.
[0025] Similarly, the dielectric structures 23 have a three-dimensional structure defined by a height direction, i.e., the Z direction, and a first direction and a second direction each orthogonal to the Z direction. Note that the fact that each of the dielectric structures 23 has a three-dimensional structure means that the dielectric structures 23 have a relatively complex structure, rather than a simple linear structure or a simple plate-like structure.
[0026] The first electrode 21 includes a base 211 and an opposing portion 212 connected to the base 211. The second electrode 22 includes a base 221 and an opposing portion 222 connected to the base 221. The base 211 of the first electrode 21 and the base 221 of the second electrode 22 each have a plate-like shape perpendicular to the height direction, i.e., the Z direction. The base 211 of the first electrode 21 and the base 221 of the second electrode 22 are disposed at different positions in the height direction, i.e., a direction parallel to the Z direction. The opposing portion 212 of the first electrode 21, the opposing portion 222 of the second electrode 22, and the dielectric structure 23 are disposed between the base 211 of the first electrode 21 and the base 221 of the second electrode 22. The opposing portion 212 and the opposing portion 222 face each other via the dielectric structure 23 in the height direction, i.e., a direction perpendicular to the Z direction.
[0027] 1 , the base 211 of the first electrode 21 in the layer portion 10S1 is disposed on the first substrate 11. The base 221 of the second electrode 22 in the layer portion 10S1 and the base 221 of the second electrode 22 in the layer portion 10S2 are connected to each other. The base 211 of the first electrode 21 in the layer portion 10S2 and the base 211 of the first electrode 21 in the layer portion 10S3 are connected to each other. The base 221 of the second electrode 22 in the layer portion 10S3 and the base 221 of the second electrode 22 in the layer portion 10S4 are connected to each other. The base 211 of the first electrode 21 in the layer portion 10S4 and the base 211 of the first electrode 21 in the layer portion 10S5 are connected to each other. The bases 221 of the second electrodes 22 in the layer portions 10S5 and 10S6 are connected to each other. The second substrate 12 is disposed on the bases 211 of the first electrodes 21 in the layer portions 10S6.
[0028] Here, the shapes of the first electrode 21, the second electrode 22, and the dielectric structure 23 will be described in detail with reference to Figs. 6 and 7 are perspective views showing a portion of the first electrode 21, the second electrode 22, and the dielectric structure 23. Fig. 8 is a perspective view showing the interposed portion of the dielectric structure 23. Fig. 9 is a plan view showing the interposed portion of the dielectric structure 23.
[0029] The dielectric structure 23 includes a base 231 and an intervening portion 232 connected to the base 231. The intervening portion 232 is interposed between the opposing portion 212 of the first electrode 21 and the opposing portion 222 of the second electrode 22. The dielectric structure 23 includes a portion that forms a region surrounded by the dielectric structure 23. In the present embodiment, the intervening portion 232 includes a plurality of cylindrical portions 232a, each of which has a cylindrical shape extending in the height direction and has one end closed in the height direction. A plurality of the cylindrical portions 232a may be arranged in each of the X direction and the Y direction. Each of the plurality of cylindrical portions 232a corresponds to a portion that forms a region surrounded by the dielectric structure 23. In the examples shown in FIGS. 7 to 9, each of the plurality of cylindrical portions 232a has a rectangular cylindrical shape.
[0030] The base portion 231 has a plate-like shape that is perpendicular to the height direction, i.e., the Z direction, and is connected to the intervening portion 232. The base portion 231 has a plurality of openings that communicate with the interiors of the plurality of cylindrical portions 232a, respectively.
[0031] 6 and 7, the facing portion 212 of the first electrode 21 is arranged around a plurality of cylindrical portions 232a. The surface of the facing portion 212 includes a plurality of portions that are perpendicular to the height direction, i.e., the Z direction, and face in different directions. In the example shown in FIGS. 6 and 7, the surface of the facing portion 212 includes a portion facing the X direction, a portion facing the −X direction, a portion facing the Y direction, and a portion facing the −Y direction.
[0032] The facing portion 222 of the second electrode 22 is a columnar portion disposed inside the plurality of cylindrical portions 232a, and includes a plurality of columnar portions each extending in the height direction, i.e., the Z direction. The plurality of columnar portions are connected to the base 221 through a plurality of openings in the base 231 of the dielectric structure 23. Each of the plurality of columnar portions faces a plurality of portions, i.e., the above-mentioned four portions, on the surface of the facing portion 212 of the first electrode 21.
[0033] The planar shape of each of the plurality of columnar portions when viewed from the height direction may be a shape with four-fold or more rotational symmetry. In the examples shown in Figures 5 to 7, the planar shape of each of the plurality of columnar portions is square or approximately square.
[0034] The surface of each of the plurality of columnar portions includes a plurality of portions that are perpendicular to the height direction, i.e., the Z direction, and face in different directions. In the example shown in Figures 6 and 7, the surface of the facing portion 212 includes a portion facing the X direction, a portion facing the -X direction, a portion facing the Y direction, and a portion facing the -Y direction. The facing portion 212 of the first electrode 21 faces the plurality of portions on the surface of each of the plurality of columnar portions, i.e., the above-mentioned four portions.
[0035] As shown in Figure 3, the opposing portion 212 of the first electrode 21 faces the opposing portion 222 of the second electrode 22 via the intervening portion 232 of the dielectric structure 23, and also faces the base portion 221 of the second electrode 22 via the base portion 231 of the dielectric structure 23.
[0036] 3, at least a portion of the surface of each of the first electrode 21 and the second electrode 22 has a plurality of repeated, continuous irregularities. In the example shown in Fig. 3, the portion of the surface of the facing portion 212 of the first electrode 21 that faces the facing portion 222 of the second electrode 22 has a plurality of repeated, continuous irregularities. Similarly, the portion of the surface of the facing portion 222 of the second electrode 22 that faces the facing portion 212 of the first electrode 21 has a plurality of repeated, continuous irregularities.
[0037] 3, at least a part of the surface of the dielectric structure 23 has a plurality of repeated, continuous irregularities. In the example shown in Fig. 3, of the surface of the interposed portion 232 of the dielectric structure 23, the portion facing the facing portion 212 of the first electrode 21 and the portion facing the facing portion 222 of the second electrode 22 have a plurality of repeated, continuous irregularities.
[0038] Of the surface of the interposed portion 232 of the dielectric structure 23, a portion facing the facing portion 212 of the first electrode 21 may be in contact with the facing portion 212 of the first electrode 21. In this case, the uneven shape of the surface of the facing portion 212 of the first electrode 21 will be an inverted shape of the uneven shape of the surface of the interposed portion 232 of the dielectric structure 23. Similarly, of the surface of the interposed portion 232 of the dielectric structure 23, a portion facing the facing portion 222 of the second electrode 22 may be in contact with the facing portion 222 of the second electrode 22. In this case, the uneven shape of the surface of the facing portion 222 of the second electrode 22 will be an inverted shape of the uneven shape of the surface of the interposed portion 232 of the dielectric structure 23.
[0039] The "multiple repeated and continuous irregularities" may be a shape formed by arranging a plurality of protrusions at intervals in both the height direction and the direction perpendicular to the height direction. The arrangement of the plurality of protrusions may be regular or irregular. The size and height of the plurality of protrusions may be the same or different from each other.
[0040] 1 and 3, other configurations of the layer portion 10 will be described. The base 211 and the facing portion 212 of the first electrode 21 are connected to the first terminal 3. The base 221 and the facing portion 222 of the second electrode 22 are connected to the second terminal 4.
[0041] The layer portion 10 further includes dielectric films 24 and 25, each made of a dielectric material. The dielectric film 24 is interposed between the base 211 of the first electrode 21 and the second terminal 4, and insulates the first electrode 21 from the second terminal 4. The dielectric film 25 is interposed between the base 221 of the second electrode 22 and the first terminal 3, and insulates the second electrode 22 from the first terminal 3.
[0042] The dielectric material constituting the dielectric films 24 and 25 may be the same as or different from the dielectric material constituting the dielectric structure 23 .
[0043] The first electrode 21 further includes a laminated portion 213. The laminated portion 213 is interposed between the first terminal 3 and the dielectric film 25, and is connected to the first terminal 3 and the facing portion 212.
[0044] When the layer portions 10S1 to 10S6 are stacked, the layer portions 10S1, 10S3, and 10S5 have the same orientation. The layer portions 10S2, 10S4, and 10S6 have orientations that are symmetrical to the orientation of the layer portions 10S1, 10S3, and 10S5 with respect to an imaginary plane perpendicular to the height direction, i.e., the Z direction.
[0045] In the pair of layer portions 10S1 and 10S2, the pair of layer portions 10S3 and 10S4, and the pair of layer portions 10S5 and 10S6, the bases 221 of the second electrodes 22 of the two layer portions 10 are connected to each other, and the laminated portions 213 of the first electrodes 21 of the two layer portions 10 are connected to each other. In addition, the dielectric films 25 of the two layer portions 10 are in contact with each other.
[0046] In the pair of layer portions 10S2 and 10S3 and the pair of layer portions 10S4 and 10S5, the bases 211 of the first electrodes 21 of the two layer portions 10 are connected to each other. Furthermore, the dielectric films 24 of the two layer portions 10 are in contact with each other.
[0047] The base 211 of the first electrode 21 and the dielectric film 24 of the layer portion 10S1 are in contact with the first substrate 11. The base 211 of the first electrode 21 and the dielectric film 24 of the layer portion 10S6 are in contact with the second substrate 12.
[0048] As described above, the capacitor 1 according to this embodiment includes the first electrode 21, the second electrode 22, and the dielectric structure 23. The first electrode 21 and the second electrode 22 each have a three-dimensional structure. At least a portion of the surface of each of the first electrode 21 and the second electrode 22 has a plurality of repeated, continuous irregularities. As a result, according to this embodiment, the surface area of each of the first electrode 21 and the second electrode 22 can be increased compared to a conventional capacitor having a two-dimensional structure composed of a plate-shaped electrode and a dielectric. As a result, according to this embodiment, the capacitance of the capacitor 1 can be increased. Furthermore, when compared at the same capacitance, the capacitor 1 can be made smaller.
[0049] In this embodiment, the dielectric structure 23 has a three-dimensional structure. At least a part of the surface of the dielectric structure 23 has a plurality of repeated, continuous irregularities. As a result, as will be described later, a plurality of repeated, continuous irregularities can be formed on the surfaces of the first electrode 21 and the second electrode 22.
[0050] Furthermore, in this embodiment, the capacitor 1 includes multiple layer portions 10. The multiple layer portions 10 have a structure that allows them to be stacked. As a result, according to this embodiment, by increasing the number of multiple layer portions 10, the capacitance of the capacitor 1 can be increased.
[0051] Next, a description will be given of a method for manufacturing the capacitor 1 according to this embodiment. The method for manufacturing the capacitor 1 includes the step of forming each of the plurality of layer portions 10 (hereinafter referred to as the step of forming the layer portions 10).
[0052] The process of forming the layer portion 10 will now be described with reference to FIGS. 10 to 21. FIGS. 10 to 21 show a cross section of the stack during the manufacturing process of the capacitor 1. In the process of forming the layer portion 10, first, the base 211 of the first electrode 21 and the dielectric film 24 are formed on a substrate 50, such as a silicon substrate. Note that an insulating film (not shown) may be formed between the substrate 50 and the base 211 and dielectric film 24. In this process, the base 211 may be formed first, or the dielectric film 24 may be formed first. The base 211 is formed by electroplating or sputtering.
[0053] 11 shows the next step. In this step, a dielectric film is first formed on the base 211 of the first electrode 21 and the dielectric film 24. The dielectric film is, for example, a BaTiO 3 Alternatively, the dielectric film 232 may be formed by applying a slurry containing ultrafine particles of a dielectric material such as SiO 2 or the like to the dielectric film 232A, and then solidifying the applied slurry by heat treatment. Next, using a photoresist mask (not shown), the dielectric film is patterned by, for example, ion beam etching (hereinafter referred to as IBE) so that the dielectric film becomes the dielectric 232A that will later become part of the interposed portion 232 of the dielectric structure 23.
[0054] 12 shows the next step. In this step, first, a layer to be etched 51 is formed on the upper surface of the stack so as to cover the dielectric 232A. The layer to be etched 51 is made of an inorganic material such as carbon. The layer to be etched 51 may also be formed by, for example, a sputtering method. The thickness of the layer to be etched 51 may be in the range of 1.0 to 5.0 μm, for example. Next, a metal film 52 made of Ta or the like is formed on the layer to be etched 51 by, for example, a sputtering method. The thickness of the metal film 52 may be in the range of 10 to 100 nm, for example.
[0055] In this embodiment, the layer to be etched 51 may be porous and contain a large number of bubbles. When the layer to be etched 51 is made of carbon, the layer to be etched 51 may be a porous carbon film.
[0056] 13 shows the next step. In this step, first, the metal film 52 is selectively etched by, for example, IBE using a photoresist mask (not shown). Next, using the etched metal film 52 as a mask, a plurality of grooves 51a each extending in the height direction are formed in the etching target layer 51 by, for example, reactive ion etching (hereinafter referred to as RIE). This etching is continued until the dielectric 232A is exposed. Next, the metal film 52 is removed.
[0057] 14 is a cross-sectional view showing the etching target layer 51 in which a plurality of grooves 51a are formed. The step of etching the etching target layer 51 is performed so that a plurality of irregularities are formed on the surface 51a1 of each of the plurality of grooves 51a. The etching of the etching target layer 51 may be performed by anisotropic etching. In addition, when the etching target layer 51 is a porous carbon film, O 2 A large number of irregularities can be automatically formed by anisotropic etching using plasma. The pattern of the irregularities may be regular or irregular. Note that, not only in FIG. 14 but also in other examples in this disclosure, the sizes of the irregularities are exaggerated for convenience.
[0058] 15 shows the next step. In this step, a dielectric film 232P is formed so as to fill the plurality of grooves 51a in the etching target layer 51. The dielectric film 232P is also formed on the etching target layer 51. The dielectric film 232P is formed by depositing, for example, BaTiO 3 The grooves 51a may be formed by filling the grooves 51a of the etching target layer 51 with a slurry containing ultrafine particles of a dielectric material such as silicon dioxide, and then solidifying the filled slurry by heat treatment. As a method for filling the grooves 51a of the etching target layer 51 with the slurry, for example, spray coating is used.
[0059] 16 shows the next step. In this step, the portion of the dielectric film 232P formed on the etching target layer 51 is removed and the top surface of the stack is planarized by, for example, chemical mechanical polishing (hereinafter referred to as CMP) or etch-back processing. The remaining dielectric film 232P becomes the dielectric 232B that becomes another part of the interposed portion 232.
[0060] 17 shows the next step. In this step, the layer to be etched 51 is first removed. If the layer to be etched 51 is made of carbon, for example, O 2 The layer to be etched 51 is removed using plasma. Next, the dielectrics 232A and 232B are sintered by a firing process to form the interposed portion 232. The firing process is performed at a temperature higher than that of the heat treatment for solidifying the slurry. The firing process is performed within a range of 900 to 1100°C, for example.
[0061] The baking treatment may be performed before removing the etched layer 51. In this case, the etched layer 51 may be removed simultaneously with or after the baking treatment. Alternatively, a pre-baking treatment may be performed at a low temperature or for a short time before removing the etched layer 51.
[0062] 18 shows the next step, in which a conductive film 200 is formed on the upper surface of the laminate. The conductive film 200 is formed, for example, by forming a seed layer by electroless plating and then forming a plating film on the seed layer by electrolytic plating.
[0063] 19 shows the next step. In this step, first, the conductive film 200 is removed by, for example, CMP or etch-back processing until the intervening portion 232 is exposed, and the upper surface of the stack is planarized. Of the remaining conductive film 200, the portion connected to the base 211 becomes the opposing portion 212 of the first electrode 21, and the portion not connected to the base 211 becomes the opposing portion 222 of the second electrode 22.
[0064] Next, a dielectric film 231P is formed on the upper surface of the laminate. The dielectric film 231P may be made of the same dielectric material as the intervening portion 232, or may be made of a different dielectric material from the intervening portion 232. For example, the dielectric film 231P may be made of a material other than BaTiO 3 When the composition is BaTiO 3 or Al 2 O 3When the dielectric film 231P is made of the same dielectric material as the interposed portion 232, the dielectric film 231P may be made of, for example, BaTiO 3 Alternatively, the dielectric layer may be formed by applying a slurry containing ultrafine particles of a dielectric material such as fluorine, and then solidifying the applied slurry by heat treatment.
[0065] 20 shows the next step. In this step, a plurality of openings that expose the opposing portions 222 of the second electrodes 22 are formed in the dielectric film 231P by, for example, IBE using a photoresist mask (not shown). As a result, the dielectric film 231P becomes the base 231 of the dielectric structure 23.
[0066] In addition, when the dielectric film 231P is formed by solidifying an applied slurry through heat treatment, after forming a plurality of openings in the dielectric film 231P, the dielectric film 231P may be sintered by a firing process to form the base 231.
[0067] 21 shows the next step, in which the base 221 of the second electrode 22 is formed on the opposing portion 222 of the second electrode 22 and the base 231 of the dielectric structure 23, for example, by plating, and the laminated portion 213 of the first electrode 21 is formed on the opposing portion 212 of the first electrode 21 and the base 231 of the dielectric structure 23.
[0068] Although not shown, next, a dielectric film 25 is formed (see FIG. 3), thereby completing the layer portion 10.
[0069] Next, the process of forming the main body 2 by stacking multiple layer portions 10 will be described. In the process of forming the main body 2, first, two first substructures are prepared, each having a layer portion 10 formed on a substrate 50, and the two first substructures are stacked so that the bases 221 of the second electrodes 22 of the two first substructures face each other. Next, one of the substrates 50 is peeled off from the stack of the two first substructures. This results in a second substructure in which two layered layer portions 10 are arranged on the substrate 50.
[0070] Next, two second substructures are prepared and stacked so that the bases 211 of the first electrodes 21 of the two second substructures face each other. Next, one of the substrates 50 is peeled off from the stack of the two second substructures. This results in a third substructure in which four layer portions 10 are arranged on the substrate 50.
[0071] Next, a third substructure and a second substructure are prepared, and the third substructure and the second substructure are stacked so that the bases 221 of the second electrodes 22 of the third substructure and the second substructure face each other. This results in a stacked body in which six stacked layer portions 10 are arranged between two substrates 50. This stack becomes the main body 2 shown in FIG. 2. One substrate 50 in the stack becomes the first substrate 11 of the main body 2, and the other substrate 50 in the stack becomes the second substrate 12 of the main body 2.
[0072] In the method of manufacturing the capacitor 1, the first terminal 3 and the second terminal 4 are formed on the body 2 thus formed, thereby completing the capacitor 1 shown in FIG.
[0073] As described above, the method for manufacturing capacitor 1 according to this embodiment includes the steps of forming first electrode 21, forming second electrode 22, and configuring dielectric structure 23. The step of forming first electrode 21 includes the steps of forming base portion 211, forming opposing portion 212, and forming laminated portion 213. The step of forming second electrode 22 includes the steps of forming base portion 221 and forming opposing portion 222.
[0074] The process of forming the dielectric structure 23 includes the steps of forming a dielectric 232A that is a part of the interposition portion 232, forming an etched layer 51 so as to cover the dielectric 232A, forming a groove 51a in the etched layer 51 that extends in the height direction and exposes a part of the dielectric 232A, forming a dielectric 232B that is another part of the interposition portion 232 in the groove 51a, and removing the etched layer 51 after forming the dielectric 232B. The process of forming the dielectric structure 23 further includes the step of forming a base 231.
[0075] According to this embodiment, the plurality of irregularities formed on the surface 51a1 of the groove 51a of the to-be-etched layer 51 can form the plurality of irregularities on the surface of the intervening portion 232 of the dielectric structure 23, and the plurality of irregularities formed on the surface of the intervening portion 232 can form the plurality of irregularities on the surface of the opposing portion 212 of the first electrode 21 and the surface of the opposing portion 222 of the second electrode 22. As a result, according to this embodiment, the surface area of each of the first electrode 21 and the second electrode 22 can be increased. As a result, according to this embodiment, the capacitance of the capacitor 1 can be increased.
[0076] Second Embodiment Next, a second embodiment of the present disclosure will be described. The capacitor 1 according to this embodiment includes a dielectric film interposed between the first electrode 21 and the dielectric structure 23 and between the second electrode 22 and the dielectric structure 23. The dielectric material constituting the dielectric film may be, for example, the same material as any of the dielectric materials constituting the dielectric structure 23 described in the first embodiment.
[0077] 22 and 23, the differences between the method for manufacturing capacitor 1 according to this embodiment and the method for manufacturing capacitor 1 according to the first embodiment will be described. 22 and 23 show cross sections of the laminate during the manufacturing process of capacitor 1.
[0078] In this embodiment, after forming the base 211 of the first electrode 21 (see FIG. 10), the dielectric film 31 is formed. The dielectric 232A (see FIG. 11) is formed on the dielectric film 31. When the dielectric film that forms the dielectric 232A is patterned, a portion of the dielectric film 31 is also patterned.
[0079] In this embodiment, after the intervening portion 232 of the dielectric structure 23 is formed (see FIG. 17 ), a dielectric film 32 is formed on the upper surface of the laminate so as to cover the intervening portion 232. FIG. 22 shows the laminate after the dielectric film 32 is formed.
[0080] 23 shows a step after the formation of the dielectric film 32. In this step, first, a photoresist mask (not shown) is used to form a plurality of openings in the dielectric film 32 by, for example, IBE, to expose the base portions 211 of the first electrodes 21. Next, similar to the steps shown in FIGS. 18 and 19 in the first embodiment, the opposing portions 212 of the first electrodes 21 and the opposing portions 222 of the second electrodes 22 are formed.
[0081] Next, dielectric film 33, dielectric film 231P (see FIG. 19 ), and dielectric film 34 are formed in this order on the upper surface of the laminate. Next, similar to the process shown in FIG. 20 of the first embodiment, a photoresist mask (not shown) is used to form a plurality of openings in dielectric film 231P and dielectric films 33 and 34 by, for example, IBE, exposing the opposing portion 222 of second electrode 22. As a result, dielectric film 231P becomes base 231 of dielectric structure 23. Next, similar to the process shown in FIG. 21 of the first embodiment, base 221 of second electrode 22 and laminated portion 213 of first electrode 21 are formed. Subsequent processes are similar to those of the first embodiment.
[0082] According to this embodiment, desired characteristics can be achieved by combining dielectric materials with different characteristics for the dielectric structure 23 and the dielectric film. For example, by combining dielectric materials with different temperature characteristics, such as materials that exhibit opposite changes with temperature, it is possible to suppress the temperature dependence of capacitance. Furthermore, for example, in order to control the characteristic of capacitance change when a direct current voltage is applied to the capacitor 1 (DC bias characteristic), it is possible to control the voltage applied to the dielectric structure 23 by controlling the thickness of the dielectric film. The dielectric film may be formed by atomic layer deposition.
[0083] Other configurations, actions, and effects of this embodiment are the same as those of the first embodiment.
[0084] [Third Embodiment] Next, a third embodiment of the present disclosure will be described. In this embodiment, the first electrode 21, the second electrode 22, and the dielectric structure 23 in the first embodiment are replaced with a first electrode 121, a second electrode 122, and a dielectric structure 123, respectively. The first electrode 121 includes a base portion 1211 and an opposing portion 1212, similar to the first electrode 21. The second electrode 122 includes a base portion 1221 and an opposing portion 1222, similar to the second electrode 22. The dielectric structure 123 includes a base portion 1231 and an interposed portion 1232, similar to the dielectric structure 23.
[0085] 24 to 29, the differences between the method for manufacturing capacitor 1 according to this embodiment and the method for manufacturing capacitor 1 according to the first embodiment will be described below. 24 to 29 show cross sections of the laminate in the manufacturing process of capacitor 1.
[0086] In this embodiment, as shown in FIG. 24 , first, a base 1211 of a first electrode 121 is formed on a substrate 50. Next, a layer to be etched 151 is formed on the base 1211. Next, a metal film 152 is formed on the layer to be etched 151. The method for forming the base 1211 may be the same as the method for forming the base 211 of the first electrode 21 in the first embodiment. The material, thickness, structure, and formation method of the layer to be etched 151 may be the same as the material, thickness, structure, and formation method of the layer to be etched 51 in the first embodiment. The material, thickness, and formation method of the metal film 152 may be the same as the material, thickness, and formation method of the metal film 52 in the first embodiment.
[0087] 25 shows the next step. In this step, first, the metal film 152 is selectively etched by, for example, IBE using a photoresist mask (not shown). Next, using the etched metal film 152 as a mask, a plurality of grooves 151a each extending in the height direction is formed in the etching target layer 151 by, for example, RIE. This etching is performed until the base 1211 is exposed. Next, the metal film 152 is removed. The method for forming the plurality of grooves 151a may be the same as the method for forming the plurality of grooves 51a in the first embodiment.
[0088] 26 shows the next step, in which a conductive film 1212P is formed on the upper surface of the laminate by, for example, plating so as to fill the plurality of grooves 151a in the etching target layer 151.
[0089] 27 shows the next step. In this step, the conductive film 1212P is removed by, for example, CMP or etch-back processing until the etching target layer 151 is exposed, and the upper surface of the stack is planarized. The remaining conductive film 1212P becomes the opposing portion 1212 of the first electrode 121.
[0090] 28 shows the next step, in which the to-be-etched layer 151 is removed. The method for removing the to-be-etched layer 151 may be the same as the method for removing the to-be-etched layer 51 in the first embodiment.
[0091] 29 shows the next step. In this step, first, a dielectric structure 123, which is a dielectric film, is formed on the upper surface of the laminate so as to cover the base portion 1211 and the facing portion 1212. The method for forming the dielectric structure 123 may be the same as the method for forming the base portion 231 of the dielectric structure 23 in the first embodiment. Next, a second electrode 122 is formed on the dielectric structure 123. In this embodiment, the base portion 1221 and the facing portion 1222 of the second electrode 122 may be formed substantially simultaneously. The second electrode 122 is formed, for example, by forming a seed layer by electroless plating and then forming a plating film on the seed layer by electrolytic plating. The subsequent steps are the same as those in the first embodiment.
[0092] The first electrode 121 and the second electrode 122 may be in contact with the dielectric structure 123. Alternatively, similar to the second embodiment, a dielectric film may be provided between the first electrode 121 and the dielectric structure 123 and between the second electrode 122 and the dielectric structure 123.
[0093] Other configurations, actions, and effects of this embodiment are the same as those of the first or second embodiment.
[0094] Fourth Embodiment Next, a fourth embodiment of the present disclosure will be described. The capacitor 1 according to this embodiment includes a dielectric structure 223 instead of the dielectric structure 23 in the first embodiment. The material of the dielectric structure 223 may be the same as the material of the dielectric structure 23.
[0095] The shape of the dielectric structure 223 will be described in detail below with reference to Figs. 30 to 33. Fig. 30 is a perspective view showing the first electrode 21, the second electrode 22, and a portion of the dielectric structure 23. Fig. 31 is a perspective view showing a portion of the dielectric structure 223. Fig. 32 is a perspective view showing the interposed portion of the dielectric structure 223. Fig. 33 is a plan view showing the interposed portion of the dielectric structure 223.
[0096] The dielectric structure 223 includes a base 2231 and an intervening portion 2232 connected to the base 2231. The intervening portion 2232 is interposed between the opposing portion 212 of the first electrode 21 and the opposing portion 222 of the second electrode 22. The dielectric structure 223 includes a portion that forms a region surrounded by the dielectric structure 223. In the present embodiment, the intervening portion 2232 includes a plurality of cylindrical portions 2232a, each of which has a cylindrical shape extending in the height direction and has one end closed in the height direction. The plurality of cylindrical portions 2232a may be arranged in plural numbers in both the X direction and the Y direction. Each of the plurality of cylindrical portions 2232a corresponds to a portion that forms a region surrounded by the dielectric structure 223. In the example shown in FIGS. 30 to 33 , each of the plurality of cylindrical portions 2232a has a hexagonal cylindrical shape.
[0097] The interposition portion 2232 has a plate-like shape that is perpendicular to the height direction, i.e., the Z direction, and is connected to the base portion 2231. The base portion 2231 has a plurality of openings that communicate with the interiors of the plurality of cylindrical portions 2232a, respectively.
[0098] At least a part of the surface of the dielectric structure 223 has a plurality of repeated, continuous irregularities, similar to the dielectric structure 23. Although not shown, of the surface of the interposed portion 2232 of the dielectric structure 223, a portion facing the facing portion 212 of the first electrode 21 and a portion facing the facing portion 222 of the second electrode 22 have a plurality of repeated, continuous irregularities.
[0099] Of the surface of the interposed portion 2232 of the dielectric structure 223, a portion facing the facing portion 212 of the first electrode 21 may be in contact with the facing portion 212 of the first electrode 21. In this case, the uneven shape of the surface of the facing portion 212 of the first electrode 21 will be an inverted shape of the uneven shape of the surface of the interposed portion 2232 of the dielectric structure 223. Similarly, of the surface of the interposed portion 2232 of the dielectric structure 223, a portion facing the facing portion 222 of the second electrode 22 may be in contact with the facing portion 222 of the second electrode 22. In this case, the uneven shape of the surface of the facing portion 222 of the second electrode 22 will be an inverted shape of the uneven shape of the surface of the interposed portion 2232 of the dielectric structure 223.
[0100] As in the second embodiment, a dielectric film may be provided between the first electrode 21 and the dielectric structure 223 and between the second electrode 22 and the dielectric structure 223 .
[0101] According to this embodiment, it is possible to increase the number of intervening portions 2232 per unit area compared to when cylindrical portion 2232a has a rectangular cylindrical shape, thereby making it possible to further increase the capacitance of capacitor 1.
[0102] Other configurations, actions, and effects of this embodiment are the same as those of the first or second embodiment.
[0103] Fifth Embodiment Next, a fifth embodiment of the present disclosure will be described. First, an outline of the configuration of a capacitor 301 according to this embodiment will be described with reference to Fig. 34. Fig. 34 is a cross-sectional view showing a part of the capacitor 301.
[0104] Similar to the capacitor 1 according to the first embodiment, the capacitor 301 according to this embodiment includes a first terminal 3, a second terminal 4, a first substrate 11, and a second substrate 12 (see FIGS. 1 and 2). Furthermore, instead of the multiple layer portions 10 of the first embodiment, the capacitor 301 according to this embodiment includes multiple layer portions 310. FIG. 34 shows an example in which three layer portions 310 are stacked on the first substrate 11. However, the number of multiple layer portions 310 is not limited to three. Below, the three layer portions shown in FIG. 34 will be denoted, from bottom to top, by the reference numerals 310S1, 310S2, and 310S3.
[0105] The layer portion 310 includes a first electrode 321, a second electrode 322, and a dielectric structure 323 interposed between the first electrode 321 and the second electrode 322. The first electrode 321, the second electrode 322, and the dielectric structure 323 may be formed from the same materials as the first electrode 21, the second electrode 22, and the dielectric structure 23 in the first embodiment, respectively. One of the first electrode 321 and the second electrode 322 may correspond to an anode electrode, and the other may correspond to a cathode electrode.
[0106] The first electrode 321 is connected to the first terminal 3 but is not connected to the second terminal 4. The second electrode 322 is connected to the second terminal 4 but is not connected to the first terminal 3. The first electrode 321 and the second electrode 322 are insulated by a dielectric structure 323.
[0107] Each of the first electrode 321, the second electrode 322, and the dielectric structure 323 has a three-dimensional structure defined by a height direction, i.e., the Z direction, and a first direction and a second direction, each of which is orthogonal to the Z direction. The first direction may be the X direction, and the second direction may be the Y direction.
[0108] The first electrode 321 includes a base 3211 and an opposing portion 3212 connected to the base 3211. The second electrode 322 includes a base 3221 and an opposing portion 3222 connected to the base 3221. The base 3211 of the first electrode 321 and the base 3221 of the second electrode 322 each have a plate-like shape perpendicular to the height direction, i.e., the Z direction. The base 3211 of the first electrode 321 and the base 3221 of the second electrode 322 are disposed at different positions from each other in the height direction, i.e., a direction parallel to the Z direction. The opposing portion 3212 of the first electrode 321, the opposing portion 3222 of the second electrode 322, and the dielectric structure 323 are disposed between the base 3211 of the first electrode 321 and the base 3221 of the second electrode 322. The facing portion 3212 and the facing portion 3222 face each other across the dielectric structure 323 in the height direction, that is, in a direction perpendicular to the Z direction.
[0109] 34 , the base 3211 of the first electrode 321 in the layer portion 310S1 is disposed on the first substrate 11. The base 3221 of the second electrode 322 in the layer portion 310S1 and the base 3221 of the second electrode 322 in the layer portion 310S2 are connected to each other. The base 3211 of the first electrode 321 in the layer portion 310S2 and the base 3211 of the first electrode 321 in the layer portion 310S3 are connected to each other.
[0110] The shapes of the first electrode 321, the second electrode 322, and the dielectric structure 323 will now be described in detail with reference to FIGS. 35 to 39. FIGS. 35 and 36 are perspective views showing a portion of the layer portion 310. FIG. 37 is a perspective view showing a portion of the first electrode 321, the second electrode 322, and the dielectric structure 323. FIG. 38 is a plan view showing a portion of the first electrode 321, the second electrode 322, and the dielectric structure 323. FIG. 39 is a perspective view showing an interposed portion of the dielectric structure 323.
[0111] The dielectric structure 323 includes base portions 3231 and 3232 that are arranged at different positions in the height direction, i.e., the Z direction, and an intervening portion 3233 that is arranged between the base portions 3231 and 3232 and connected to the base portions 3231 and 3232. The intervening portion 3233 is interposed between the opposing portion 3212 of the first electrode 321 and the opposing portion 3222 of the second electrode 322. The dielectric structure 323 includes a portion that forms a region surrounded by the dielectric structure 323. In this embodiment, the intervening portion 3233 has a non-straight shape, specifically a zigzag shape, in a plan view seen from the Z direction. The zigzag-shaped portion corresponds to the portion that forms the region surrounded by the dielectric structure 323.
[0112] In the example shown in Figure 39, the interposition portion 3233 includes a plurality of plate-shaped portions 3233A, a plurality of plate-shaped portions 3233B, and a plurality of plate-shaped portions 3233C. Each of the plurality of portions 3233A and the plurality of portions 3233B extends in the X direction in a plan view seen from the Z direction. The plurality of portions 3233B includes a first row in which a plurality of portions 3233B are arranged along the X direction, and a second row in which a plurality of portions 3233B are arranged along the X direction at a position different from the first row in a direction parallel to the Y direction. A plurality of portions 3233A are arranged in each of the X direction and the Y direction between the first row and the second row.
[0113] Here, attention will be focused on three adjacent portions 3233A spaced apart in a direction parallel to the Y direction. For convenience, of the three portions 3233A, portion 3233A located at the end in the Y direction will be referred to as first portion 3233A, portion 3233A located at the end in the -Y direction will be referred to as third portion 3233A, and portions 3233A and 3233A located between first portion 3233A and third portion 3233A will be referred to as second portion 3233A. First portion 3233A, second portion 3233A, and third portion 3233A are connected by portion 3233C so that the portion including first portion 3233A, second portion 3233A, and third portion 3233A forms a zigzag shape in a plan view seen from the Z direction. That is, one end of the first portion 3233A and one end of the second portion 3233A are connected by a portion 3233C, and the other end of the second portion 3233A and one end of the third portion 3233A are connected by another portion 3233C.
[0114] Each of the plurality of portions 3233B is connected to two adjacent portions 3233A in a direction parallel to the X direction by two portions 3233C.
[0115] 37 and 38 , the facing portion 3212 of the first electrode 321 has a comb-like planar shape in plan view from the height direction, i.e., the Z direction, in which a plurality of protrusions 3212B extending in a direction parallel to the X direction are arranged in parallel in a direction parallel to the Y direction. Each facing portion 3212 further includes a plurality of bases 3212A. A plurality of protrusions 3212B protruding in the X direction from each of the plurality of bases 3212A and a plurality of protrusions 3212B protruding in the −X direction from each of the plurality of bases 3212A are connected to each of the plurality of bases 3212A.
[0116] The facing portion 3222 of the second electrode 322 has a comb-like planar shape in plan view from the height direction, i.e., the Z direction, in which a plurality of protrusions 3222B, each extending in a direction parallel to the X direction, are arranged in parallel in a direction parallel to the Y direction. Each facing portion 3222 further includes a plurality of bases 3222A. Connected to each of the bases 3222A are a plurality of protrusions 3222B protruding in the X direction from each of the bases 3222A, and a plurality of protrusions 3222B protruding in the −X direction from each of the bases 3222A.
[0117] The first electrode 321 and the second electrode 322 are arranged such that, in a plan view seen from the Z direction, the plurality of protrusions 3212B of the facing portion 3212 and the plurality of protrusions 3222B of the facing portion 3222 interdigitate with each other so that one protrusion of one of the facing portions 3212 and 3222 fits between two protrusions of the other facing portion 3222. Interposition portions 3233 of the dielectric structure 323 are interposed between the plurality of protrusions 3212B of the facing portion 3212 and the plurality of protrusions 3222B of the facing portion 3222.
[0118] Each of the base portions 3231 and 3232 has a plate shape perpendicular to the height direction, that is, the Z direction, and is connected to an intervening portion 3233 .
[0119] Next, other configurations of the capacitor 301 according to this embodiment will be described with reference to FIG. 34 . The capacitor 301 includes dielectric films 324, 325, 326, and 327. The dielectric film 324 is interposed between the base 3211 of the first electrode 321 and the base 3231 of the dielectric structure 323. The dielectric film 325 is interposed between the opposing portion 3212 of the first electrode 321 or the opposing portion 3222 of the second electrode 322 and the intermediate portion 3233 of the dielectric structure 323. The dielectric film 326 is interposed between the opposing portion 3212 of the first electrode 321 or the opposing portion 3222 of the second electrode 322 and the base 3232 of the dielectric structure 323. The dielectric film 327 is interposed between the base 3221 of the second electrode 322 and the base 3232 of the dielectric structure 323.
[0120] Each of the dielectric films 324 to 327 may be made of the same dielectric material as the dielectric structure 323, or may be made of a dielectric material different from that of the dielectric structure 323. Note that the dielectric films 324 to 327 are not essential components of the capacitor 301 and may not be provided.
[0121] Other configurations, actions, and effects of this embodiment are the same as those of the first embodiment.
[0122] The present disclosure is not limited to the above-described embodiments, and various modifications are possible. For example, the capacitor of the present disclosure may include only one layer portion.
[0123] Furthermore, the planar shapes of the first electrode, second electrode and dielectric structure of the present disclosure are not limited to the shapes in each embodiment, but may be any shape such as a circle, an ellipse, a spiral shape, or the like.
[0124] Furthermore, the interposition portion of the dielectric structure of the present disclosure is not limited to a square or hexagonal cylindrical shape, but may be a cylindrical shape or an even-numbered polygonal cylindrical shape such as an octagonal cylindrical shape.
[0125] As described above, a capacitor according to an embodiment of the present disclosure includes a first electrode made of a conductive material, a second electrode made of a conductive material, and a dielectric structure made of a dielectric material and interposed between the first and second electrodes. Each of the first and second electrodes has a three-dimensional structure defined by a height direction and a first and second direction orthogonal to the height direction. At least a portion of the surface of each of the first and second electrodes has a plurality of repeated, continuous irregularities.
[0126] In a capacitor according to an embodiment of the present disclosure, at least one of the first electrode and the second electrode may include a columnar portion extending in a height direction, and the columnar portion may have a planar shape with four-fold or more rotational symmetry when viewed from the height direction.
[0127] Furthermore, in a capacitor according to one embodiment of the present disclosure, at least one of the first electrode and the second electrode may include a portion that, when viewed in a plan view from the height direction, has a comb-shaped planar shape in which multiple protrusion portions extending in a first direction are arranged in parallel in a second direction.
[0128] In the capacitor according to the embodiment of the present disclosure, one of the surfaces of the first electrode and the second electrode may include a plurality of portions orthogonal to the height direction and facing in different directions, and the other of the first electrode and the second electrode may face the plurality of portions via the dielectric structure.
[0129] In addition, in a capacitor according to an embodiment of the present disclosure, the dielectric structure may have a three-dimensional structure defined by a height direction, a first direction, and a second direction, and may have a shape that forms a region surrounded by the dielectric structure. At least a portion of the surface of the dielectric structure may have a plurality of repeated, continuous irregularities. One of the first electrode and the second electrode may be arranged in a region. The other of the first electrode and the second electrode may be arranged around the dielectric structure. The plurality of irregularities on at least a portion of the surface of each of the first electrode and the second electrode may face the plurality of irregularities on at least a portion of the surface of the dielectric structure.
[0130] Furthermore, the capacitor according to the embodiment of the present disclosure may further include a dielectric material film interposed between the first electrode and the dielectric structure and between the second electrode and the dielectric structure.
[0131] In the capacitor according to the embodiment of the present disclosure, the dielectric material is Al 2 O 3 , Si 3 N 4 , HfO 2 , Ta 2 O 5 , Ba 0.5 Sr 0.5 TiO 3、 BaTiO 3 , Zr—Ti—YO-based material, or Zr—Ta—YO-based material.
[0132] A method for manufacturing a capacitor according to an embodiment of the present disclosure includes the steps of forming a first electrode, forming a second electrode, and constructing a dielectric structure. The dielectric structure includes a first portion and a second portion. The step of forming the dielectric structure includes the steps of forming the first portion, forming an etched layer so as to cover the first portion, forming a groove in the etched layer that extends in the height direction and exposes a portion of the first portion, forming the second portion in the groove, and removing the etched layer after forming the second portion.
[0133] In the method for manufacturing a capacitor according to one embodiment of the present disclosure, the step of forming the dielectric structure may further include a step of forming a dielectric material film so as to cover the surfaces of each of the first and second portions after removing the layer to be etched.
Claims
1. A capacitor comprising: a first electrode made of a conductive material; a second electrode made of a conductive material; and a dielectric structure made of a dielectric material and interposed between the first electrode and the second electrode, wherein each of the first electrode and the second electrode has a three-dimensional structure defined by a height direction and a first direction and a second direction respectively perpendicular to the height direction, and at least a portion of the surface of each of the first electrode and the second electrode has a plurality of repeated, continuous irregularities.
2. The capacitor according to claim 1, wherein at least one of the first electrode and the second electrode includes a portion having a columnar shape extending in the height direction.
3. The capacitor according to claim 2, wherein the planar shape of the portion having a columnar shape when viewed from the height direction is a shape with four-fold or more rotational symmetry.
4. The capacitor according to claim 1, wherein at least one of the first electrode and the second electrode includes a portion having a comb-shaped planar shape in a plan view seen from the height direction, in which a plurality of protruding portions extending in the first direction are arranged in parallel in the second direction.
5. The capacitor according to claim 1, wherein one surface of the first electrode and the second electrode includes a plurality of portions that are perpendicular to the height direction and face in different directions from each other, and the other of the first electrode and the second electrode faces the plurality of portions via the dielectric structure.
6. The capacitor according to claim 1, wherein the dielectric structure has a three-dimensional structure defined by the height direction, the first direction, and the second direction, and includes a portion having a shape that forms an area surrounded by the dielectric structure, and at least a portion of the surface of the dielectric structure has a plurality of repeated, continuous irregularities.
7. The capacitor according to claim 6, wherein one of the first electrode and the second electrode is disposed in the region, the other of the first electrode and the second electrode is disposed around the periphery of the dielectric structure, and the plurality of projections and depressions on at least a portion of the surface of each of the first electrode and the second electrode face each other.
8. The capacitor according to claim 1, further comprising a dielectric material film interposed between said first electrode and said dielectric structure and between said second electrode and said dielectric structure.
9. The dielectric material is Al 2 O 3 , Si 3 N 4 , HfO 2 , Ta 2 O 5 , Ba 0.5 Sr 0.5 TiO 3 , BaTiO 3 2. The capacitor of claim 1, comprising at least one of a Zr-Ti-Y-O based material or a Zr-Ta-Y-O based material.
10. A method for manufacturing a capacitor according to claim 1, comprising the steps of: forming the first electrode; forming the second electrode; and configuring the dielectric structure, wherein the dielectric structure includes a first portion and a second portion; and the step of forming the dielectric structure comprises the steps of: forming the first portion; forming a layer to be etched so as to cover the first portion; forming a groove in the layer to be etched that extends in the height direction and exposes a portion of the first portion; forming the second portion in the groove; and removing the layer to be etched after forming the second portion.
11. The method for manufacturing a capacitor according to claim 10, wherein the step of forming the dielectric structure further includes the step of forming a dielectric material film so as to cover the surfaces of the first portion and the second portion after removing the layer to be etched.
Citation Information
Patent Citations
Method of manufacturing semiconductor device
JP2003174102A
Trench capacitor and manufacturing method of the trench capacitor
JP2020136455A
Thin film capacitor and manufacturing method thereof
JP2023000481A
Electronic component, electronic circuit and method for manufacturing electronic component
JP2023110595A
High aspect ratio bosch deep etch
US20220102155A1