Stacked full bridge inverter

Abstract

Disclosed is a stacked full-bridge inverter for driving an n-phase actuator, where n is a first integer greater than 1, the stacked full-bridge inverter comprising m stacked inverters, where m is a second integer greater than or equal to 1; wherein each of the m stacked inverters are configured to output a respective AC voltage, each output AC voltage for connection to a respective phase of the n-phase actuator; wherein each of said m stacked inverters is configured to be supplied by a respective different input converter which is configured to convert a DC source into n independent AC sources, and wherein each of the n independent AC sources supplies a different phase of its respective stack.

Description

STACKED FULL BRIDGE INVERTERCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 687,084 which was filed on 26 August 2024 and which is incorporated herein in its entirety by referenceFIELD

[0002] The present invention relates to methods and apparatus usable, for example, in the manufacture of devices by lithographic techniques, and to methods of manufacturing devices using lithographic techniques.BACKGROUND

[0003] A lithographic apparatus or exposure apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. including part of a die, one die, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. These target portions are commonly referred to as “fields”.

[0004] In the manufacture of complex devices, typically many lithographic patterning steps are performed, thereby forming functional features in successive layers on the substrate. A critical aspect of performance of the lithographic apparatus is therefore the ability to place the applied pattern correctly and accurately in relation to features laid down (by the same apparatus or a different lithographic apparatus) in previous layers. For this purpose, the substrate is provided with one or more sets of alignment marks. Each mark is a structure whose position can be measured at a later time using a position sensor, typically an optical position sensor. The lithographic apparatus includes one or more alignment sensors by which positions of marks on a substrate can be measured accurately. Different types of marks and different types of alignment sensors are known from different manufacturers and different products of the same manufacturer.

[0005] The lithographic apparatus or exposure apparatus may be of a type wherein an optical projection system is used to project a pattern imparted on a radiation beam by a patterning device, for instance a mask, onto a target portion of a substrate, as will be explained later.

[0006] The aforementioned reticle may be transmissive or reflective depending on the wavelength of light used; EUV systems for example use a reflective reticle within a vacuum chamber to prevent absorption of the EUV radiation. The reticle can be placed on a platform or stage (hereinafter, bothare referred to as “stage”). The stage can be positioned according to parameters of the lithographic system. Similarly, the semiconductor wafer can be placed on a stage. The stage supporting either the reticle or the semiconductor wafer can be moved one or more directions and / or one or more degrees of freedom depending on how the image is to be formed on the semiconductor wafer.

[0007] A typical reticle stage comprises a coarse positioning apparatus or long stroke module, for coarse positioning of the reticle, and a fine positioning apparatus or short stroke module for fine positioning of the reticle. The long stroke module supports the short stroke module, while the short stroke module is configured to carry the reticle.

[0008] It is desirable to improve on the reticle stage, and in particular to actuation of the reticle stage. More specifically it is desirable to improve on actuation of the long stroke module of the reticle stage.

[0009] A component of the electrical circuitry which contributes to actuation of the reticle stage is an inverter (this may also be referred to as a converter). Inverters are used for converting direct current (DC) power to alternating current (AC) power. This allows a load to be driven (i.e. actuated) which requires variable electrical power, spanning positive and negative polarities. Different inverter topologies are used in different circuits. For example, a well-known inverter type is that of the halfbridge inverter, which are typically used for multiphase motor control (e.g. in Permanent Sy chronous Motors, PMSMs). The half-bridge inverter uses two diodes and two switching devices which are connected anti-parallel. The two switches are complementary, such that when one switch is ON, the other switch is OFF, and vice versa. However, half-bridge inverters have several disadvantages. For example, half-bridge inverters are only able to supply half of the DC source voltage to an actuator which is receiving the AC output (e.g. To drive an 800V motor, it is necessary to use a 1600V DC link voltage). Consequently, the input converter which supplies the DC voltage to the half-bridge converter to output an AC signal must be designed and constructed using a reliable and safe power bank.

[0010] An alternative inverter design is that of the full-bridge inverter (also called an H-Bridge inverter in the art), which uses four switches to convert DC power to AC power. The peak-to-peak voltage of a full-bridge inverter is effectively four times that of the half-bridge inverter, and the DC link voltage required for a half-bridge inverter is double that than for a full-bridge inverter. For example, for a half-bridge inverter, an 800V motor would require a 1600V input converter, but for a full-bridge inverter only an 800V input converter would be required. Therefore, for high power applications, full-bridge inverters are preferred as these can provide the full DC link voltage to any connected components, such as a reticle stage. For example, a full -bridge inverter is typically used to drive voice coils or brushed DC motors. However, known disadvantages which can be associated with the use of full-bridge inverters to drive multi-phase actuators (such as three-phase motors) include the presence of full-bridge shoot throughs, which are short circuit currents that can damage the inverter or any connected components.

[0011] Furthermore, both half-bridge inverters and full-bridge inverters require an extremely high precision clock to perform pulse width modulation (PWM) switching at high switching frequencies. PWM switching is a known technique in the art for generating an AC voltage from DC signals. In particular, PWM switches a rectangular DC voltage signal ON at different voltage levels for periods of time, such that a DC voltage is ON for a first level of voltage and a first period of time and is then switched OFF; and in a subsequent time period a different voltage level is turned ON for a second period of time and is then switched OFF, and so on. The PWM continues to be modulated in this manner so that the resultant output power of the full-bridge inverter over time alternates like an AC output power.

[0012] Consequently, a solution is required which overcomes at least some of the above-mentioned disadvantages.SUMMARY

[0013] The embodiments in a first aspect provides a stacked full-bridge inverter for driving one phase of an n-phase actuator, where n is a first integer greater than 1, the stacked full-bridge inverter comprising m stacked inverters, where m is a second integer greater than or equal to 1 ; wherein each of the m stacked inverters are configured to output a respective AC voltage, each output AC voltage for connection to a respective phase of the n-phase actuator; wherein each of said m stacked inverters is configured to be supplied by a respective different input converter which is configured to convert a DC source into n independent AC sources, and wherein each of the n independent AC sources supplies a different phase of its respective stack. Advantageously, the output voltage of the inverter in accordance with the first aspect is at least three times the voltage of that achievable by conventional half-bridge inverters, while allowing for higher switching frequencies with higher resolution. The inverters in accordance with the first aspect allow the use of GaN transistors at higher voltages than is known in the art due to the effects of stacking the full-bridge inverters. By stacking the full-bridge inverters, the effective output of the inverter is increased (i.e. the total output power is the sum of the powers of the individual full-bridges). The switching frequencies are increased without requiring high precision frequency signals from a microcontroller or a field programmable gate-array (FPGA). The full DC link voltage is employable from the input converter, thus reducing the demands on the design of the input converters when compared with the demands required for conventional half-bridge inverters, typically used to drive multi -phase actuators, or for non-stacked full-bridge inverters.

[0014] The embodiment in a second aspect provides a stacked full-bridge inverter for driving one phase of an n-phase actuator, the stacked full-bridge inverter comprising m stacked inverters, wherein the stacked full-bridge inverter is configured for one phase of the n-phase actuator; wherein the stacked full-bridge inverter is configured to output an AC voltage, the output AC voltage being connected to one phase of the n-phase actuator. Advantageously, the second aspect allows for all of the advantages of the first aspect of the embodiment. In addition, the second aspect advantageouslyprovides a design for a stacked full-bridge inverter where the input converters are designed based on average power, rather than being design based on peak power. Advantageously, this reduces the demands on the design of the input converters while allowing all of the advantages of the first aspect.

[0015] The above and other aspects of the embodiments will be understood from a consideration of the examples described below.BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Embodiments will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0017] - Figure 1 depicts a lithographic apparatus; and

[0018] - Figure 2 depicts a schematic of a measurement and exposure processes in the apparatus of Figure 1 ; and

[0019] - Figure 3a depicts a schematic of a stacked full-bridge inverter configured to supply an output voltage for a single phase (A) of a multi-phase actuator, in accordance with a first aspect; and

[0020] - Figure 3b depicts outputs as a function of time of the embodiment of the full-bridge inverter schematically depicted in Figure 3a, in accordance with the first aspect; and

[0021] - Figure 4 depicts a circuit diagram of the stacked full-bridge inverter in accordance with the first aspect; and

[0022] - Figure 5 depicts a circuit diagram of the stacked full-bridge inverter in accordance with an embodiment of the first aspect; and

[0023] - Figure 6a depicts a schematic of an alternative configuration of a stacked full-bridge inverter configured to supply an output voltage for three phases of a three-phase actuator, in accordance with a second aspect; and

[0024] - Figure 6b depicts outputs of the configuration of the stacked full-bridge inverter schematically depicted in Figure 6a.DETAILED DESCRIPTION OF EMBODIMENTS

[0025] Before describing embodiments in detail, it is instructive to present an example environment in which embodiments may be implemented.

[0026] Figure 1 schematically depicts an exposure apparatus or lithographic apparatus LA. The apparatus includes an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., UV radiation or DUV radiation), a patterning device support or support structure (e.g., a mask table) MT constructed to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device in accordance with certain parameters; two substrate tables (e.g., a wafer table) WTa and WTb each constructed to hold a substrate (e.g., a resist coated wafer) W and each connected to a second positioner PW configured to accurately position the substrate in accordance with certain parameters; and a projection system (e.g.,a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g., including one or more dies) of the substrate W. A reference frame RF connects the various components, and serves as a reference for setting and measuring positions of the patterning device and substrate and of features on them.

[0027] The illumination system may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, for directing, shaping, or controlling radiation.

[0028] The patterning device support MT holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the exposure apparatus, and other conditions, such as for example whether or not the patterning device is held in a vacuum environment. The patterning device support can use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device. The patterning device support MT may be a frame or a table, for example, which may be fixed or movable as required. The patterning device support may ensure that the patterning device is at a desired position, for example with respect to the projection system.

[0029] The term “patterning device” used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section such as to create a pattern in a target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate, for example if the pattern includes phase-shifting features or so called assist features. Generally, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit.

[0030] As here depicted, the apparatus is of a transmissive type (e.g., employing a transmissive patterning device). Alternatively, the apparatus may be of a reflective type (e.g., employing a programmable mirror array of a type as referred to above, or employing a reflective mask). Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Any use of the terms “reticle” or “mask” herein may be considered synonymous with the more general term “patterning device.” The term “patterning device” can also be interpreted as referring to a device storing in digital form pattern information for use in controlling such a programmable patterning device.

[0031] The term “projection system” used herein should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term “projection lens” herein may be considered as synonymous with the more general term “projection system”.

[0032] The exposure apparatus may also be of a type wherein at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a spacebetween the projection system and the substrate. An immersion liquid may also be applied to other spaces in the exposure apparatus, for example, between the mask and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of projection systems.

[0033] In operation, the illuminator IL receives a radiation beam from a radiation source SO. The source and the exposure apparatus may be separate entities, for example when the source is an excimer laser. In such cases, the source is not considered to form part of the exposure apparatus and the radiation beam is passed from the source SO to the illuminator IL with the aid of a beam delivery system BD including, for example, suitable directing mirrors and / or a beam expander. In other cases the source may be an integral part of the exposure apparatus, for example when the source is a mercury lamp. The source SO and the illuminator IL, together with the beam delivery system BD if required, may be referred to as a radiation system.

[0034] The illuminator IL may comprise an adjuster AD for adjusting the angular intensity distribution of the radiation beam. Generally, at least the outer and / or inner radial extent (commonly referred to as o-outer and o-inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. In addition, the illuminator IL may comprise various other components, such as an integrator IN and a condenser CO. The illuminator IL may be used to condition the radiation beam B, to have a desired uniformity and intensity distribution in its cross section.

[0035] The radiation beam B is incident on the patterning device MA, which is held on the patterning device support MT, and is patterned by the patterning device. Having traversed the patterning device (e.g., mask) MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. With the aid of the second positioner PW and position sensor IF (e.g., an interferometric device, linear encoder, 2-D encoder or capacitive sensor), the substrate table WTa or WTb can be moved accurately, e.g., so as to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and another position sensor (which is not explicitly depicted in Figure 1) can be used to accurately position the patterning device (e.g., mask) MA with respect to the path of the radiation beam B, e.g., after mechanical retrieval from a mask library, or during a scan.

[0036] The exposure apparatus may comprise an aberration sensor for the verification of an aberration fingerprint of the projection system PS. In an embodiment such an aberration fingerprint, i.e. aberrations per field point of the projection system PS, may be determined using a such wavefront aberration sensor. A wavefront aberration sensor of a known type, for instance such as described in US2002 / 0001088, incorporated herein by reference, may be used. Such a wavefront aberration sensor may be based on the principle of shearing interferometry and comprises a source module and a sensor module. The source module may comprise a patterned layer of chromium that is placed in the object plane (i.e. where during production the pattern of the patterning means is) of the projection system PS and has additional optics provided above the chromium layer. The combination provides a wavefrontof radiation to the entire pupil of the projection system PS. The sensor module may comprise a patterned layer of chromium that is placed in the image plane of the projection system (i.e. where during production the substrate W is) and a camera that is placed some distance behind said layer of chromium. The patterned layer of chromium on the sensor module diffracts radiation into several diffraction orders that interfere with each other giving rise to an interferogram. The interferogram is measured by the camera. The aberrations in the projection lens can be determined by software based upon the measured interferogram. The wavefront aberration sensor may be configured to transfer information with respect to the aberration fingerprint towards the control unit.

[0037] Patterning device (e.g., mask) MA and substrate W may be aligned using mask alignment marks Ml, M2 and substrate alignment marks Pl, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, they may be located in spaces between target portions (these are known as scribe-lane alignment marks). Similarly, in situations in which more than one die is provided on the patterning device (e.g., mask) MA, the mask alignment marks may be located between the dies. Small alignment marks may also be included within dies, in amongst the device features, in which case it is desirable that the markers be as small as possible and not require any different imaging or process conditions than adjacent features. The alignment system, which detects the alignment markers is described further below.

[0038] The depicted apparatus could be used in a variety of modes. In a scan mode, the patterning device support (e.g., mask table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e., a single dynamic exposure). The speed and direction of the substrate table WT relative to the patterning device support (e.g., mask table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS. In scan mode, the maximum size of the exposure field limits the width (in the non-scanning direction) of the target portion in a single dynamic exposure, whereas the length of the scanning motion determines the height (in the scanning direction) of the target portion. Other types of exposure apparatus and modes of operation are possible, as is well-known in the art. For example, a step mode is known. In so-called “maskless” lithography, a programmable patterning device is held stationary but with a changing pattern, and the substrate table WT is moved or scanned.

[0039] Combinations and / or variations on the above described modes of use or entirely different modes of use may also be employed.

[0040] Exposure apparatus LA is of a so-called dual stage type which has two substrate tables WTa, WTb and two stations - an exposure station EXP and a measurement station MEA - between which the substrate tables can be exchanged. While one substrate on one substrate table is being exposed at the exposure station, another substrate can be loaded onto the other substrate table at the measurement station and various preparatory steps carried out. This enables a substantial increase in the throughput of the apparatus. The preparatory steps may include mapping the surface height contours of the substrate using a level sensor LS and measuring the position of alignment markers on the substrateusing an alignment sensor AS. If the position sensor IF is not capable of measuring the position of the substrate table while it is at the measurement station as well as at the exposure station, a second position sensor may be provided to enable the positions of the substrate table to be tracked at both stations, relative to reference frame RF. Other arrangements are known and usable instead of the dualstage arrangement shown. For example, other exposure apparatuses are known in which a substrate table and a measurement table are provided. These are docked together when performing preparatory measurements, and then undocked while the substrate table undergoes exposure.

[0041] The exposure apparatus control unit LACU which controls all the movements and measurements of various actuators and sensors to receive substrates W and reticles MA and to implement the patterning operations. Exposure apparatus control unit LACU also includes signal processing and data processing capacity to implement desired calculations relevant to the operation of the apparatus, e.g., based on inter aha level sensor LS data, alignment sensor AS data and feedback metrology data (e.g., one or more of inter aha overlay, focus, dose, critical dimension data). In practice, control unit LACU may be realized as a system of many sub-units, each handling the realtime data acquisition, processing and control of a subsystem or component within the apparatus.

[0042] Figure 2 illustrates the steps to expose target portions (e.g. dies) on a substrate W in the dual stage apparatus of Figure 1. On the left hand side within a dotted box are steps performed at a measurement station MEA, while the right hand side shows steps performed at the exposure station EXP. From time to time, one of the substrate tables WTa, WTb will be at the exposure station, while the other is at the measurement station, as described above. For the purposes of this description, it is assumed that a substrate W has already been loaded into the exposure station. At step 200, a new substrate W’ is loaded to the apparatus by a mechanism not shown. These two substrates are processed in parallel in order to increase the throughput of the exposure apparatus.

[0043] Referring initially to the newly-loaded substrate W’, this may be a previously unprocessed substrate, prepared with a new photo resist for first time exposure in the apparatus. In general, however, the lithography process described will be merely one step in a series of exposure and processing steps, so that substrate W’ has been through this apparatus and / or other lithography apparatuses, several times already, and may have subsequent processes to undergo as well. Particularly for the problem of improving overlay performance, the task is to ensure that new patterns are applied in exactly the correct position on a substrate that has already been subjected to one or more cycles of patterning and processing. These processing steps progressively introduce distortions in the substrate that must be measured and corrected for, to achieve satisfactory overlay performance.

[0044] The previous and / or subsequent patterning step may be performed in other lithography apparatuses, as just mentioned, and may even be performed in different types of lithography apparatus. For example, some layers in the device manufacturing process which are very demanding in parameters such as resolution and overlay may be performed in a more advanced lithography tool than other layers that are less demanding. Therefore some layers may be exposed in an immersiontype lithography tool, while others are exposed in a ‘dry’ tool. Some layers may be exposed in a tool working at DUV wavelengths, while others are exposed using EUV wavelength radiation.

[0045] At 202, alignment measurements using the substrate marks Pl etc. and image sensors (not shown) are used to measure and record alignment of the substrate relative to substrate table WTa / WTb. In addition, several alignment marks across the substrate W’ will be measured using alignment sensor AS. These measurements are used in one embodiment to establish a “wafer grid”, which maps very accurately the distribution of marks across the substrate, including any distortion relative to a nominal rectangular grid.

[0046] At step 204, a map of wafer height (Z) against X-Y position is measured also using the level sensor LS. Conventionally, the height map is used only to achieve accurate focusing of the exposed pattern. It may be used for other purposes in addition.

[0047] When substrate W’ was loaded, recipe data 206 were received, defining the exposures to be performed, and also properties of the wafer and the patterns previously made and to be made upon it. To these recipe data are added the measurements of wafer position, wafer grid and height map that were made at 202, 204, so that a complete set of recipe and measurement data 208 can be passed to the exposure station EXP. The measurements of alignment data for example comprise X and Y positions of alignment targets formed in a fixed or nominally fixed relationship to the product patterns that are the product of the exposure process. These alignment data, taken just before exposure, are used to generate an alignment model with parameters that fit the alignment model to the data. These parameters and the alignment model will be used during the exposure operation to correct positions of patterns applied in the current lithographic step. The model in use interpolates positional deviations between the measured positions. A conventional alignment model might comprise four, five or six parameters, together defining translation, rotation and scaling of the ‘ideal’ grid, in different dimensions. Advanced models are known that use more parameters.

[0048] At 210, wafers W’ and W are swapped, so that the measured substrate W’ becomes the substrate W entering the exposure station EXP. In the example apparatus of Figure 1, this swapping is performed by exchanging the supports WTa and WTb within the apparatus, so that the substrates W, W’ remain accurately clamped and positioned on those supports, to preserve relative alignment between the substrate tables and substrates themselves. Accordingly, once the tables have been swapped, determining the relative position between projection system PS and substrate table WTb (formerly WTa) is all that is necessary to make use of the measurement information 202, 204 for the substrate W (formerly W’) in control of the exposure steps. At step 212, reticle alignment is performed using the mask alignment marks Ml, M2. In steps 214, 216, 218, scanning motions and radiation pulses are applied at successive target locations across the substrate W, in order to complete the exposure of a number of patterns.

[0049] By using the alignment data and height map obtained at the measuring station in the performance of the exposure steps, these patterns are accurately aligned with respect to the desiredlocations, and, in particular, with respect to features previously laid down on the same substrate. The exposed substrate, now labeled W” is unloaded from the apparatus at step 220, to undergo etching or other processes, in accordance with the exposed pattern.

[0050] The skilled person will know that the above description is a simplified overview of a number of very detailed steps involved in one example of a real manufacturing situation. For example rather than measuring alignment in a single pass, often there will be separate phases of coarse and fine measurement, using the same or different marks. The coarse and / or fine alignment measurement steps can be performed before or after the height measurement, or interleaved.

[0051] In an exposure apparatus, it is known to control machine settings, e.g. lens settings and (reticle and substrate) stage settings, during exposures onto a substrate to optimize the projected image in terms of one or more placement parameters of interest, e.g., parameters related to placement of structures on the substrate. Such placement parameters of interest may comprise parameters on which device functionality and yield are dependent. In particular, the machine settings typically controlled include inter alia stage settings, lens control settings (e.g., to correct for lens aberration) and dose control settings. Stage settings may describe a planned or set stage movement such as described by various stage setpoints determined by the control hardware and software (e.g., as controlled by lithographic apparatus control unit or exposure apparatus control unit LACU). These may relate to stage positioning, speed, and / or acceleration in each of the substrate plane (e.g., for placement / overlay control) and perpendicular to the substrate plane (e.g., for focus control).

[0052] In this manner, parameters of interest such as one or more of overlay, focus, and imaging (e.g., critical dimension (CD)) may be optimized. Such an optimization may comprise some trade-off between some of these parameters, but which ensure that each of these parameters of interest remain within-specification (e.g., within a tolerance indicative of a yielding or functional device). As such, “optimize” in the context of this disclosure may simply mean improve and / or ensure that the parameter is within-specification. Alternatively, or in addition, “optimize” may mean optimizing towards a target projection (e.g., an optimized or ideal projection) onto the substrate (e.g., where there is a single ideal setting rather than a specification range. Similarly “minimize” in the context of this disclosure may simply mean reduce, e.g., minimizing variation may be understood to reduce variation and / or to reduce said variation as much as is practically possible.

[0053] Though only drawn as a very basic schematic in Figure 1, it can be appreciated that the support structure MT for the patterning device (hereafter reticle) MA comprises a significantly more complex stage apparatus (hereafter reticle stage) than is depicted. The reticle stage may comprise a long stroke module (or coarse positioning apparatus) which supports a short stroke module (or fine positioning apparatus); the short stroke module in turn being configured to carry the reticle. The long stroke module is used for coarse positioning of the reticle stage, while the short stroke module is used for fine positioning of the reticle with respect to the projection system and / or wafer. Duringexposures, the short stroke module may accurately position the reticle, moving the reticle along a meandering or zig-zag path so as to expose different portions of the substrate.

[0054] The stage apparatuses and arrangements disclosed herein are described in the context of a DUV lithographic apparatus, for which the reticle is a transmissive reticle. However, it can be appreciated that the concepts herein are not limited to only reticle stages for DUV lithographic apparatuses and transmissive reticles; the concepts are equally applicable to reticle stages for EUV lithographic apparatuses and reflective reticles, and more to stages generally (e.g., also to the wafer / substrate stage for any type of lithographic apparatuses, metrology apparatuses etc.).

[0055] According to concepts disclosed herein, full -bridge inverters are stacked in series (i.e. each H- bridge is wired in series with another H-bridge). An isolated DC voltage is supplied at each fullbridge in the stacked full-bridge. The output of these stacked full-bridge inverters is used to generate an output voltage, where the sum of the isolated DC voltages of each full-bridge is summed to create an AC output which has a peak voltage of the isolated DC voltages times the number of full stack bridges. For example, Figure 4 depicts a circuit with three full-bridges stacked in series, each with their own DC sources Vdcl, Vdc2, Vdc3. The peak output voltage from this configuration is the sum of these sources Vdcl+Vdc2+Vdc3 (e.g., 3Vdc where Vdc=Vdcl=Vdc2=Vdc3). Figure 4 is described in great detail below. This configuration of a stacked full-bridge inverter is only for one phase (A) of a multi-phase device. For three phases (e.g. phase A, phase B, and phase C of a three-phase motor), three stacked full-bridge inverters are required, where one stacked full -bridge is depicted in Figure 4. With the use of a transformer, only one DC power source is required to generate multiple (three in the case of three inverters) DC sources. With this, the output of the inverter is at least three times the voltage at a high switching frequencies with higher resolution. The inverters in accordance with the first aspect allow the use of GaN transistors at higher voltages than is known in the art due to the effects of stacking the full -bridge inverters.

[0056] In order to supply a DC voltage to each full-bridge of the stacked full-bridge circuit, an input converter is used which supplies a DC source voltage to each full-bridge. To supply each full-bridge with a DC source, a transformer is used which provides a DC link voltage. The transformer maintains an electrical isolation between the input converter and each full-bridge of the stack of full-bridges. In other words, the isolated DC voltages (Vdcl, Vdc2, Vdc3) of each full-bridge in the stack of fullbridges is supplied by the input converter, in combination with a transformer.

[0057] Figure 3a depicts a schematic of a stacked full-bridge inverter configured to supply an output voltage for a single phase (A) of a multi-phase actuator (not depicted), in accordance with at least one concept disclosed herein. There is depicted an input converter 310, the input converter 310 being configured to supply a DC voltage to three full-bridge inverters 320, 330 and 340. The input converter 310 is galvanically isolated from the three stacked full-bridge inverters 320, 330 and 340. The input converter 310 supplies AC power to each of the three full-bridge inverters via a transformer (notdepicted). The stacked full-bridge inverters 320, 330 and 340 are connected in series so as to output an AC voltage for a single phase (A) of the multi-phase actuator.

[0058] In use, the stacked full-bridge inverter of Figure 3a is configured to supply power for a single phase of a multi-phase actuator (e.g. a three-phase motor). To supply power for all n-phases of a multi -phase actuator (e.g. supply three phases of power for a three-phase motor), it would be required to have n stacked full -bridge inverters, each supplying a phase of the n-phases of the multi-phase actuator.

[0059] Figure 3b depicts outputs of the embodiment of the full-bridge inverter schematically depicted in Figure 3a. The top plot of Figure 3b is an example plot of the phase voltage PV as a function of time t for the full-bridge inverter of Figure 3a. This depicts a DC voltage which is electrically switched using PWM switching. As described above, using PWM, an AC voltage 350 is generated from a DC signals. In particular, PWM switches a rectangular DC voltage signal for different voltage levels. For example, Figure 3b (top) depicts a DC voltage being modulated such that the DC voltage is ON for a first level between 0V and 400V for first time period; then at a subsequent time period the DC voltage is ON between 400V and 800V for a second time period, and subsequently the DC voltage is ON between 800V and 1200V for a third time period. The PWM continues to be modulated in this manner so that the resultant output voltage of the stacked full-bridge inverter over time appears to alternate as an AC output voltage. Consequently, in the aforementioned example, the peak voltage of the AC output voltage is 1200V.

[0060] Figure 3b (bottom) depicts an example of the output power P as a function of time t of the full-bridge inverter schematically depicted in Figure 3a (the power P being proportional to the voltage V through the well-known relationship P=IV where I is current). Figure 3b (bottom) depicts a first power curve 370 describing an output AC power produced by a single stacked full-bridge input converter (as described in relation to Figure 3a, this output power is produced for a single phase (A) of a multi-phase actuator). Also shown is a second power curve 360 describing the total output power (i.e. the peak power) for all phases of the n-phase actuator. It can be seen that the peak power is significantly larger for the second power curve 360 (total power) than for a single phase 370. In this embodiment, it is understood that the power supply (i.e. the power supplied by a DC input converter) should be designed to supply power for the peak power 360.

[0061] Figure 4 depicts a circuit diagram 400 of the stacked full-bridge inverter in accordance with a concept disclosed herein. There are depicted three full-bridge inverters 410, 420 and 430, each inverter of the three full-bridge inverters 410, 420 and 430 having a respective (isolated) DC power supply Vdcl, Vdc2, Vdc3. It can be seen that the output AC voltage 470 from the circuit diagram 400 is the sum of these respective supplies.

[0062] Each full-bridge inverter 410 420 or 430 comprises four switches connected in parallel. For example, inverter 410 depicts the four switches S9, S10, Si l, and S12 connected in the full-bridge arrangement, inverter 420 depicts the four switches S5, S6, S7, and S8 connected in the full-bridgearrangement, and inverter 430 depicts the four switches SI, S2, S3, and S4 connected in the fullbridge arrangement,. Each switch 440 of the four switches depicted in each full-bridge inverter 410, 420 or 430 of Figure 4 comprises a switching element (e.g. a transistor, such as a MOSFET transistor, and in a particular example a GaN-based transistor) and a diode (e.g. a Schottky diode). The three full-bridge inverters 410, 420 and 430 are electrically connected together in series by connection lines 450 and 460. In this manner, the total AC output voltage 470 of the circuit diagram 400 is the sum of the DC voltages of each of the three stacked full-bridge inverters 410, 420 and 430. The load applied to the output is represented here by resistor Rai, inductor Lal and source Eal.

[0063] Figure 5 depicts a circuit diagram 500 of the stacked full-bridge inverter 400 of Figure 4 with additional detail of the DC power supplies Vdcl, Vdc2, Vdc3. No further discussion will be given in relation to circuit diagram 400 for Figure 5. Figure 5 depicts an input converter 510 which supplies AC voltages, as discussed in relation to Figure 3a. A transformer 520 is shown which is configured to transfer the AC voltage from the input converter 510 to three separate AC-DC converters 530. Each of the AC-DC converters 530 comprise four switches, each similar to switch 440 in the arrangement described in relation to Figure 4, above.

[0064] A respective capacitor 540 is connected between each AC-DC converter 530 and each of the stacked full-bridge inverters discussed in relation to the circuit diagram 400 discussed above in relation to Figure 4. The capacitor 540 is configured to store energy from the AC-DC converter 530. In an example, a first capacitance value of the capacitor 540 is selected to filter high frequency components of the current passing through the capacitor 540. In another example, a second capacitance value (greater than the first capacitance value) of the capacitor 540 is selected to increase power being supplied to circuit 400. This may produce higher output AC powers from circuit 400 relative to a circuit shown without said capacitor 540.

[0065] A disadvantage of using a stacked full-bridge inverter in accordance with the first aspect, is that the power required for the input converter is the sum of the powers required per stacked converter (consequently, the maximum / peak output AC voltage is the sum of the DC voltages of each input converter). The input converter has to supply phase power that is not constant. For example, in a specific example for actuating a three-phase motor, where each full-bridge has an isolated (e.g., 400V) DC voltage, the input converter has to be designed for the peak voltage (and of course peak power, which is directly proportional to peak voltage), which in this example is 1200V (i.e. 3 times 400V). In other words, as a result of this circuit topology, the input converter needs to be designed for the peak power of the AC output, rather than for the average power of the circuit. The peak power is much higher than the average power. This places greater demand on the design of the input converter. Consequently, a solution is required which overcomes at least some of the above-mentioned disadvantages.

[0066] Figure 6a depicts a schematic of an alternative configuration of a stacked full-bridge inverter configured to supply an n-phase output voltage. In the specific example shown, the inverter suppliesthree phases A, B and C, e.g., for supply of a three-phase actuator (not depicted). Figure 6a depicts three input converters 610, 620 and 630, where each input converter 610, 620 and 630 is each configured to supply an AC voltage to a respective stacked full-bridge inverter 640a, 640b, 640c. For example, input converter 610 is configured to supply an AC supply to a stacked inverter 640a, input converter 620 is configured to supply an AC supply to a stacked inverter 640b and input converter 630 is configured to supply an AC supply to a stacked inverter 640c.

[0067] Each of the input converters 610, 620 and 630 may be configured the same and / or comprise the same components as the input converter 510 described in relation to Figure 5, above. Each of the AC-DC converters Ala, A2a, A3a, Bia, B2a, B3a, Cla, C2a, C3a, may be configured the same and / or comprise the same components as the AC-DC converters 530 of Figure 5. Each of the full-bridge inverters Alb, A2b, A3b, Bib, B2b, B3b, Clb, C2b, C3b, may be configured the same and / or comprise the same components as the full-bridge inverters 410, 420, 430 of Figures 4 and 5.

[0068] To provide galvanic isolation, there may be a respective transformer between each input converter and the respective AC-DC converter for which it supplies.

[0069] As described in relation to Figure 5, a respective capacitor may be provided in parallel between each AC-DC converter and its respective full-bridge inverter.

[0070] Within each stack level, each full-bridge inverter is configured to supply an output AC voltage for a respective phase A, B, C of the three-phase actuator at the same level of stacking. For example, in relation to the third level of stacking depicted in Figure 6a, each full-bridge inverter A3b, B3b, C3b of the stacked full-bridge inverter 640c converts DC power to AC power for a respective phase of the three-phase (A, B and C) actuator.

[0071] In relation to the first level of stacking 640a, a DC voltage is supplied by input converter 610 to a first full-bridge inverter Ala for a first phase A; to a second full -bridge inverter B la for a second phase B; and to a third full-bridge inverter Cla for a third phase. Similarly, at the second level of stacking 640b, a DC voltage is supplied by input converter 620 to a first full-bridge inverter A2a for a first phase A; to a second full-bridge inverter B2a for a second phase B; and to a third full-bridge inverter C2a for a third phase; and at the third level of stacking 640c, a DC voltage is supplied by input converter 630 to a first full-bridge inverter A3a for a first phase A; to a second full-bridge inverter B3a for a second phase B; and to a third full-bridge inverter C3a for a third phase.

[0072] In this respect, it can be appreciated that the number of the input converters (e.g., and isolation transformers) may equal the number of stacking levels and be independent of the number of output phases.

[0073] In use, the configuration depicted in relation to Figure 6a may be used to supply power for an n-phase actuator, where n can be any positive integer greater than 1. It can be understood that using the configuration depicted in Figure 6a, a single input converter can be used per stacking level to supply power for n-phases of a stack. It can also be understood that in use, the configuration depictedin relation to Figure 6a may include m-stacked inverters, where m comprises the number of stacks and may be any positive integer greater than or equal to 1.

[0074] As such, the arrangement of Figure 6a may be extended to provide an n-phase output greater than 3 by providing additional columns (as depicted in the Figure) of AC-DC converters and fullbridge inverters, one additional column per phase (or a column may be removed for a 2 phase supply). Similarly, the arrangement of Figure 6a may be extended to provide more or fewer stacking levels by providing addition rows, or removing rows, of AC-DC converters and full-bridge inverters.

[0075] Figure 6b depicts outputs of the embodiment of the full-bridge inverter schematically depicted in Figure 6a. There is depicted a three-phase AC power P output 680A, 680B, 680C from the stacked full-bridge inverter depicted in Figure 6a, as a function of time t. The three phase AC power 680A, 680B, 680C comprises the three phases described in relation to Figure 6a (i.e. A, B and C). Each phase (A, B and C) of the three-phase AC power 680A, 680B, 680C are depicted as being a period of time out of phase with each other phase depicted in Figure 6b (top). The person skilled in the art would understand this in relation to multi-phase motors, where each phase of the multi-phase motor is selectively turned ON and OFF in a particular sequence to actuate the multi-phase motor). It can be seen that the DC power 690 required by the input converter is a constant in the configuration of the stacked full -bridge inverter depicted in Figure 6a. Further, the DC power 690 required for the input converter is the sum of the powers 680A, 680B, 680C for every phase (A. B and C) at any period in time, resulting in a constant power requirement for each input converter. In other words, the embodiment depicted in relation to Figure 6a spreads the average input power of each input converter 610, 620 or 630 over all phases (here phases A, B and C, although the person skilled in the art would understand that this may be spread over n-phases of a multi -phase actuator) at the same level.

[0076] Therefore, the input converters for the configuration of the stacked full-bridge inverter depicted in relation to Figure 6a are adapted for the average power. In the configuration of the stacked full-bridge inverter depicted in Figure 3a in accordance with the first aspect, the input converter is adapted for the peak power requirement of the actuator (not depicted) as this supplies DC power for each phase. In other words, the power requirements for the input converters 310 and 510 are not constant, but the power requirements for the input converters in relation to the second aspect depicted in Figures 6a and 6b are constant as a function of time.

[0077] Also disclosed is an integrated circuit manufactured by an exposure apparatus as disclosed herein and / or according to an exposure process and / or using an exposure apparatus as disclosed herein.

[0078] While specific embodiments have been described above, it will be appreciated that the embodiments may be practiced otherwise than as described.

[0079] Although specific reference may have been made above to the use of embodiments in the context of optical lithography, it will be appreciated that embodiments may be used in other applications, for example imprint lithography, and where the context allows, is not limited to opticallithography. In imprint lithography a topography in a patterning device defines the pattern created on a substrate. The topography of the patterning device may be pressed into a layer of resist supplied to the substrate whereupon the resist is cured by applying electromagnetic radiation, heat, pressure or a combination thereof. The patterning device is moved out of the resist leaving a pattern in it after the resist is cured.

[0080] Further aspects of the invention are set out in the following clauses:1. A stacked full -bridge inverter for driving an n-phase actuator, where n is a first integer greater than 1, the stacked full-bridge inverter comprising m stacked inverters, where m is a second integer greater than or equal to 1; wherein each of the m stacked inverters are configured to output a respective AC voltage, each output AC voltage for connection to a respective phase of the n-phase actuator; wherein each of said m stacked inverters is configured to be supplied by a respective different input converter which is configured to convert a DC source into n independent AC sources, and wherein each of the n independent AC sources supplies a different phase of its respective stack.2. The stacked full-bridge inverter of clause 1, wherein each of the m stacked inverters comprises, per phase of the n-phase actuator: a bridge for converting an input AC voltage to DC voltage; and a bridge for converting the DC voltage to an output AC voltage.3. The stacked full-bridge inverter of any preceding clause, wherein the n-phase actuator is a three-phase motor.4. The stacked full-bridge inverter of any preceding clause, wherein the n-phase actuator is a linear synchronous motor.5. The stacked full-bridge inverter of clause 4, wherein the linear synchronous motor is configured to drive a stage in a photolithography apparatus.6. The stacked full-bridge inverter of clause 4 or 5, wherein the three-phase motor is configured to drive a coarse positioning apparatus of the stage in the photolithography apparatus.7. The stacked full-bridge inverter of any preceding clause, wherein each phase of the n-phase actuator is temporally out of phase with each of the other phases.8. The stacked full-bridge inverter of any preceding clause, wherein the stacked full-bridge inverter further comprises m transformers configured to deliver AC signals of a first power output from each of the input converters supplying each stack, wherein each transformer of the m transformers are further configured to electrically isolate each input converter from each of the m stacked inverters.9. The stacked full-bridge inverter of any preceding clause, wherein, per stack of the m stacked inverters, the sum of the powers produced for each of the n-phases is constant over time.10. The stacked full-bridge inverter of any preceding clause, further comprising said m input converters, each of said m input converters being configured to supply a respective one of said m stacked inverters with n independent AC sources.11. The stacked full-bridge inverter of any preceding clause, wherein the stacked full-bridge inverter further comprises m capacitors, each capacitor being connected in parallel with each fullbridge converter for each phase of the n-phases, wherein in operation the capacitors are configured to increase the output AC power of the stacked full-bridge inverter.12. The stacked full-bridge inverter of any preceding clause, wherein each inverter of the m stacked inverters for each phase of the n-phase actuator are connected together in series.13. A stacked full-bridge inverter for driving one phase of an n-phase actuator, the stacked fullbridge inverter comprising m stacked inverters, wherein the stacked full-bridge inverter is configured for one phase of the n-phase actuator; wherein the stacked full-bridge inverter is configured to output an AC voltage, the output AC voltage being connected to one phase of the n-phase actuator.14. The stacked full-bridge inverter of clause 13, wherein each stack of the m stacked inverters receives an input voltage from an input converter configured to supply a DC voltage to each of the m stacked inverters.15. The stacked-full -bridge inverter of clause 13 or 14, wherein the stacked full-bridge inverter further comprises m capacitors, each capacitor being connected in parallel between each full-bridge converter for each phase of the n-phases, wherein in operation the capacitors are configured to increase the output AC power of the stacked full-bridge inverter.16. An n-phase actuator comprising the stacked-full -bridge inverter of any preceding clause being configured to supply power to said n-phase actuator.17. An n-phase actuator of clause 16, wherein the n-phase actuator is a three-phase motor.18. An n-phase actuator of clause 16 or 17, wherein the n-phase actuator is a linear synchronous motor.19. A coarse positioning apparatus for a stage apparatus comprising the n-phase actuator of any of clauses 16 to 18, said n-phase actuator being configured to actuate said coarse positioning apparatus.20. An exposure apparatus comprising the coarse positioning apparatus of clause 19.21. An integrated circuit manufactured by an exposure apparatus as claimed in clause 20.22. A device manufacturing method comprising: providing a substrate in an exposure apparatus according to clause 20, said substrate at least partially covered by a layer of radiation-sensitive material; providing a projection beam of radiation using a radiation system; projecting a patterned beam of radiation onto a target portion of the layer of radiationsensitive material as to impart a pattern on the target portion;removing a portion of the layer of radiation-sensitive material.23. A stacked full -bridge inverter configure for driving an n-phase actuator, wherein n is a first integer greater than 1, the stacked full-bridge inverter comprising: m stacked inverters, where m is a second integer greater than or equal to 1 ; wherein each of the m stacked inverters are configured to output a respective AC voltage, each output AC voltage for connection to a respective phase of the n-phase actuator; wherein each of said m stacked inverters is configured to be supplied by a respective different input converter which is configured to convert a DC source into n independent AC sources, and wherein each of the n independent AC sources supplies a different phase of its respective stack.24. A stacked full-bridge inverter configured for driving one phase of an n-phase actuator, the stacked full-bridge inverter comprising: m stacked inverters, wherein the stacked full-bridge inverter is configured for one phase of the n-phase actuator; wherein the stacked full-bridge inverter is configured to output an AC voltage, the output AC voltage being connected to one phase of the n-phase actuator.

[0081] The terms “radiation” and “beam” used herein encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having a wavelength of or about 365, 355, 248, 193, 157 or 126 nm) and extreme ultra-violet (EUV) radiation (e.g., having a wavelength in the range of 1-100 nm), as well as particle beams, such as ion beams or electron beams.

[0082] The term “lens”, where the context allows, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic and electrostatic optical components. Reflective components are likely to be used in an apparatus operating in the UV and / or EUV ranges.

[0083] The breadth and scope of the present embodiments should not be limited by any of the above described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

CLAIMS1. A stacked full -bridge inverter for driving an n-phase actuator, where n is a first integer greater than 1, the stacked full-bridge inverter comprising m stacked inverters, where m is a second integer greater than or equal to 1; wherein each of the m stacked inverters are configured to output a respective AC voltage, each output AC voltage for connection to a respective phase of the n-phase actuator; wherein each of said m stacked inverters is configured to be supplied by a respective different input converter which is configured to convert a DC source into n independent AC sources, and wherein each of the n independent AC sources supplies a different phase of its respective stack.

2. The stacked full-bridge inverter of claim 1, wherein each of the m stacked inverters comprises, per phase of the n-phase actuator: a bridge for converting an input AC voltage to DC voltage; and a bridge for converting the DC voltage to an output AC voltage.

3. The stacked full-bridge inverter of any preceding claim, wherein the n-phase actuator is a linear synchronous motor.

4. The stacked full-bridge inverter of claim 3, wherein the linear synchronous motor is configured to drive a stage in a photolithography apparatus.

5. The stacked full-bridge inverter of any preceding claim, wherein the stacked full-bridge inverter further comprises m transformers configured to deliver AC signals of a first power output from each of the input converters supplying each stack, wherein each transformer of the m transformers are further configured to electrically isolate each input converter from each of the m stacked inverters.

6. The stacked full-bridge inverter of any preceding claim, wherein, per stack of the m stacked inverters, the sum of the powers produced for each of the n-phases is constant over time.

7. The stacked full-bridge inverter of any preceding claim, further comprising said m input converters, each of said m input converters being configured to supply a respective one of said m stacked inverters with n independent AC sources.

8. The stacked full-bridge inverter of any preceding claim, wherein the stacked full-bridge inverter further comprises m capacitors, each capacitor being connected in parallel with each full-bridge converter for each phase of the n-phases, wherein in operation the capacitors are configured to increase the output AC power of the stacked full-bridge inverter.

9. The stacked full-bridge inverter of any preceding claim, wherein each inverter of the m stacked inverters for each phase of the n-phase actuator are connected together in series.

10. A stacked full-bridge inverter for driving one phase of an n-phase actuator, the stacked fullbridge inverter comprising m stacked inverters, wherein the stacked full-bridge inverter is configured for one phase of the n-phase actuator; wherein the stacked full-bridge inverter is configured to output an AC voltage, the output AC voltage being connected to one phase of the n-phase actuator.

11. The stacked full-bridge inverter of claim 10, wherein each stack of the m stacked inverters receives an input voltage from an input converter configured to supply a DC voltage to each of the m stacked inverters.

12. The stacked-full -bridge inverter of claims 10 or 11, wherein the stacked full-bridge inverter further comprises m capacitors, each capacitor being connected in parallel between each full-bridge converter for each phase of the n-phases, wherein in operation the capacitors are configured to increase the output AC power of the stacked full-bridge inverter.

13. An n-phase actuator comprising the stacked-full -bridge inverter of any preceding claim being configured to supply power to said n-phase actuator.

14. An n-phase actuator of claim 13, wherein the n-phase actuator is a linear synchronous motor.

15. A coarse positioning apparatus for a stage apparatus comprising the n-phase actuator of claim 13 or 14, said n-phase actuator being configured to actuate said coarse positioning apparatus.

16. An exposure apparatus comprising the coarse positioning apparatus of claim 15.

17. An integrated circuit manufactured by an exposure apparatus as claimed in claim 16.

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