Multilayer wiring board, method for manufacturing multilayer wiring board, and multilayer wiring base board

Abstract

The purpose of the present invention is to provide a technology capable of securing reliability of a multilayer wiring board by avoiding damage to a core substrate even in a high humidity environment.　A multilayer wiring board according to the present invention comprises: a core substrate composed of a glass substrate having a first surface, a second surface facing the first surface, and a side surface connecting a peripheral portion of the first surface and a peripheral portion of the second surface; a first wiring layer that is a wiring layer formed on the first surface; and a second wiring layer that is a wiring layer formed on the second surface. The side surface is covered with a low water absorption resin having a water absorption rate of 0.05% to 0.6%.

Description

Multilayer wiring board, method for manufacturing a multilayer wiring board, and multilayer wiring base material substrate

[0001] This invention relates to a multilayer wiring board, a method for manufacturing a multilayer wiring board, and a multilayer wiring base material substrate.

[0002] With the increasing sophistication and miniaturization of electronic devices, there is a growing demand for higher density multilayer wiring boards that make up semiconductor devices. Traditionally, organic materials such as glass epoxy resin have been commonly used as materials for multilayer wiring boards. In recent years, advances in glass drilling technology have made it possible, for example, to form small-diameter through-holes of 100 μm or less on a 300 μm thick glass substrate with a pitch of 150 μm or less. For this reason, glass is attracting attention as a material for electronic circuit boards.

[0003] In the manufacturing process of multilayer printed circuit boards (MLPCS), grinding is performed to separate MPCS with a glass core substrate. Grinding generates extremely minute cracks on the edges of the separated glass substrates. These cracks propagate due to stress caused by the difference in thermal expansion coefficients between the glass substrate and the wiring layer, resulting in microcracks that extend into the interior of the glass substrate. The occurrence of microcracks becomes more pronounced with stress accumulation, particularly when the difference in thermal expansion coefficients between the glass substrate and the wiring layer is large, and also with temperature changes, especially during temperature cycling tests. Because microcracks affect the reliability of MPCs, countermeasures are being considered.

[0004] For example, Patent Document 1 aims to provide a semiconductor device that can maintain the flatness of a glass substrate and adequately protect the edges of the glass substrate, and discloses the following features for such a semiconductor device: "The semiconductor device comprises a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; wiring provided on the first and second surfaces; a first insulating film covering the first surface; a second insulating film covering the second surface; and a third insulating film covering the first side surface and continuous with at least one of the first and second insulating films."

[0005] International Publication No. 2021 / 200406

[0006] In Patent Document 1, semiconductor devices are manufactured by framing glass substrates with insulating resin fixed to their sides. In environments where moisture is present (for example, high humidity environments), the glass undergoes hydrolysis, reducing its strength. In glass substrates that have been framing by cutting processes such as dicing and have extremely minute cracks on their edges, in addition to this reduction in strength in environments with moisture, microcracks are more likely to occur due to stress caused by the difference in the coefficient of thermal expansion between the glass substrate and the wiring layer. However, Patent Document 1 does not adequately address these points.

[0007] Therefore, the present invention aims to provide a technology that can prevent damage to the core substrate even in high-humidity environments and ensure the reliability of multilayer wiring boards.

[0008] To solve the above problems, one representative multilayer wiring substrate of the present invention is a core substrate which is a glass substrate having a first surface, a second surface facing the first surface, and a side surface connecting the peripheral edge of the first surface and the peripheral edge of the second surface, a first wiring layer which is a wiring layer formed on the first surface, and a second wiring layer which is a wiring layer formed on the second surface, wherein the side surface is covered with a low water absorption resin with a water absorption rate of 0.05% or more and 0.6% or less.

[0009] According to the present invention, it is possible to avoid damage to the core substrate even in high humidity environments and to ensure the reliability of the multilayer wiring board. Problems, configurations, and effects other than those described above will be clarified by the following description of embodiments.

[0010] Figure 1 is a cross-sectional view showing a multilayer wiring substrate according to the first embodiment. Figure 2 is an enlarged cross-sectional view showing the structure of a through-electrode in the multilayer substrate wiring according to the first embodiment. Figure 3 is a cross-sectional view illustrating the bonding process of the first support in the manufacturing method according to the first embodiment. Figure 4 is a cross-sectional view illustrating the formation process of the laser-modified portion in the manufacturing method according to the first embodiment. Figure 5 is a diagram illustrating the formation location of the laser-modified portion in the manufacturing method according to the first embodiment. Figure 6 is a cross-sectional view illustrating the formation process of the first wiring layer in the manufacturing method according to the first embodiment. Figure 7 is a cross-sectional view illustrating the bonding process of the second support in the manufacturing method according to the first embodiment. Figure 8 is a cross-sectional view illustrating the peeling process of the first support in the manufacturing method according to the first embodiment. Figure 9 is a cross-sectional view illustrating the formation process of a through-hole by etching in the manufacturing method according to the first embodiment. Figure 10 is a bottom view of a glass substrate when a separation groove is formed. Figure 11 is a schematic enlarged view showing a part of the bottom view of the separation groove. Figure 12 is a schematic view showing the side of the separation groove. Figure 13 is a schematic enlarged view showing the separation groove. Figure 14 is a schematic diagram showing an enlarged portion of the bottom view of the separation groove. Figure 15 is a cross-sectional view illustrating the process of forming the through electrode and the through electrode connection in the manufacturing method according to the first embodiment. Figure 16 is a cross-sectional view illustrating the process of arranging the low water absorption resin in the manufacturing method according to the first embodiment. Figure 17 is a cross-sectional view illustrating the process of forming the second wiring layer in the manufacturing method according to the first embodiment. Figure 18 is a cross-sectional view illustrating the peeling process of the second support in the manufacturing method according to the first embodiment. Figure 19 is a cross-sectional view illustrating the process after the peeling process of the second support has been performed in the manufacturing method according to the first embodiment. Figure 20 is a cross-sectional view illustrating the process of forming the build-up layer in the manufacturing method according to the first embodiment. Figure 21 is a cross-sectional view illustrating the process of forming the connection pad in the manufacturing method according to the first embodiment. Figure 22 is a cross-sectional view illustrating the individualization process in the manufacturing method according to the first embodiment. Figure 23 is a flowchart of the manufacturing method according to the first embodiment. Figure 24 is a cross-sectional view illustrating the process of forming the second wiring layer in the manufacturing method according to the first modified example.Figure 25 is a flowchart illustrating the manufacturing method according to the first modified example. Figure 26 is a cross-sectional view illustrating the preparation process of the glass wiring substrate in the manufacturing method according to the second embodiment. Figure 27 is a cross-sectional view illustrating the bonding process of the third support in the manufacturing method according to the second embodiment. Figure 28 is a cross-sectional view illustrating the placement process of the low water absorption resin in the manufacturing method according to the second embodiment. Figure 29 is a cross-sectional view illustrating the formation process of the first wiring layer in the manufacturing method according to the second embodiment. Figure 30 is a cross-sectional view illustrating the peeling process of the third support in the manufacturing method according to the second embodiment. Figure 31 is a cross-sectional view illustrating the formation process of the second wiring layer in the manufacturing method according to the second embodiment. Figure 32 is a cross-sectional view illustrating the formation process of the build-up layer in the manufacturing method according to the second embodiment. Figure 33 is a cross-sectional view illustrating the formation process of the connection pad in the manufacturing method according to the second embodiment. Figure 34 is a cross-sectional view illustrating the individualization process in the manufacturing method according to the second embodiment. Figure 35 is a cross-sectional view showing the individualized multilayer wiring substrate manufactured in the second manufacturing method. Figure 36 is a flowchart illustrating the manufacturing method according to the second embodiment. Figure 37 is a cross-sectional view illustrating the process of forming a low water absorption resin in the manufacturing method according to the second modified example. Figure 38 is a flowchart of the manufacturing method according to the second modified example. Figure 39 is a diagram illustrating the overlap rate between the laser-modified portion and the through-hole. Figure 40 is a cross-sectional view showing a multilayer wiring board according to the third embodiment. Figure 41 is an enlarged cross-sectional view showing the structure of the through-electrode in the multilayer wiring board according to the fourth embodiment. Figure 42 is a cross-sectional view showing a multilayer wiring board according to the fifth embodiment. Figure 43 is a schematic perspective view of a multilayer wiring board. Figure 44 is a schematic view of a multilayer wiring base material substrate.

[0011] Embodiments of the invention will be described below with reference to the drawings. The following description relates to an example of the present invention, and the invention is not limited thereto. Furthermore, in the drawings, identical parts are denoted by the same reference numerals. The positions, sizes, shapes, and ranges of the components shown in the drawings may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings.

[0012] In this disclosure, "surface" may refer not only to the surface of the plate-like member, but also to the interface of a layer contained within the plate-like member that is substantially parallel to the surface of the plate-like member. Furthermore, "upper surface" and "lower surface" refer to the surfaces shown above or below the plate-like member or the layers contained within the plate-like member in the drawing. In addition, "upper surface" and "lower surface" may also be referred to as "first surface" and "second surface."

[0013] Furthermore, "side" refers to the surface or thickness of a layer within a plate-like member or a layer contained within a plate-like member. In addition, a part of the surface and the side together are sometimes called the "end." Furthermore, "upward" refers to the direction vertically upward when a plate-like member or layer is placed horizontally. In addition, "upward" and its opposite, "downward," are sometimes referred to as the "positive z-axis direction" and the "negative z-axis direction," respectively, and the horizontal direction is sometimes referred to as the "x-axis direction" and the "y-axis direction."

[0014] <First Embodiment> (Structure of Multilayer Wiring Board) A multilayer wiring board according to the first embodiment will be described with reference to Figures 1 and 2. Figure 1 is a cross-sectional view showing a multilayer wiring board according to the first embodiment. Figure 2 is an enlarged cross-sectional view showing the structure of through electrodes in the multilayer wiring board according to the first embodiment. As shown in Figures 1 and 2, the multilayer wiring board 1 has a core substrate 10 which is a glass substrate made of glass. The core substrate 10 has a first wiring layer 21 formed on its upper surface in the z-positive direction (hereinafter also referred to as the "first surface 10a") and a second wiring layer 22 formed on its lower surface in the z-negative direction (hereinafter also referred to as the "second surface 10b"). In the following description, when the first wiring layer 21 and the second wiring layer 22 are not particularly distinguished, they may simply be referred to as "wiring layers".

[0015] The core substrate 10 has a first surface 10a, a second surface 10b facing the first surface 10a, and a side surface 10c connecting the peripheral edge of the first surface 10a and the peripheral edge of the second surface 10b. Figures 1 and 2 show cross-sectional views when cut along a direction perpendicular to the first surface 10a and the second surface 10b, and the side surface 10c is covered with a low water absorption resin 24, for example, with a water absorption rate of 0.05% to 0.6%. The side surface 10c of the core substrate 10 is also an etched surface. In Figure 1, the side surface 10c is at the end of the core substrate 10 in the y-axis direction and is the area enclosed by the dotted line.

[0016] The core substrate 10 has a through-hole 11 that penetrates from the first surface 10a to the second surface 10b, in other words, penetrates both the front and back surfaces. The shape of the through-hole 11 is not particularly limited, and any through-hole shape such as a V-shape, Y-shape, or X-shape can be set. In this disclosure, the V-shape will be described as an example. A through-electrode 12 is placed on the through-hole 11. The through-electrode 12 includes a seed metal layer (hereinafter also simply referred to as the "seed layer") formed on the inner wall surface of the through-hole 11, and provides electrical conductivity between the first surface 10a and the second surface 10b of the core substrate 10 through the through-hole 11. In addition, as shown in Figure 2, a capacitor electrode 13 is placed above the through-electrode 12 in the first wiring layer 21. It is also possible to incorporate other circuit elements other than capacitors, such as inductors, into the first wiring layer 21.

[0017] Next, the structure of the first wiring layer 21, which is a wiring layer formed on the first surface 10a of the core substrate 10, will be described. The through-electrode connection portion 41 (hereinafter also referred to as the "first conductive portion") is an electrode that is placed within the first wiring layer 21 and connects to the through-electrode 12. The through-electrode connection portion 41 and the through-electrode 12 are made of the same material, with the portion placed on the first surface 10a being called the through-electrode connection portion 41 and the portion placed within the through-hole 11 being called the through-electrode 12. A conductive electrode 31 is provided on the through-electrode connection portion 41. The capacitor electrode 13, the dielectric layer 14, and the through-electrode connection portion 41 form a MIM (Metal Insulator Metal) structure. The wiring 16 is wiring placed within the first wiring layer 21 and connects to the through-electrode 12, conductive electrode 31, etc. The through-electrode connection portion 41, conductive electrode 31, capacitor electrode 13, dielectric layer 14, and wiring 16 are all protected by an insulating resin layer 25. Furthermore, when the multilayer wiring board 1 is used as a relay board for connecting multiple semiconductor elements, i.e., as an interposer board, the semiconductor element bonding solder 52 is a bump used when mounting other semiconductor elements or connecting them to other semiconductor elements. The solder resist 55 is a film made of an insulating material for protecting the multilayer wiring board 1. Here, two conductive electrodes 31 are provided stacked within the first wiring layer 21. This indicates that the first wiring layer 21 is made by stacking two wiring layers.

[0018] The configuration of the second wiring layer 22, which is a wiring layer formed on the second surface 10b of the core substrate 10, will now be described. The through-electrode connection portion 42 (hereinafter also referred to as the "second conductive portion") is an electrode that is placed within the second wiring layer 22 and connects to the through-electrode 12, and is formed to match the shape of the open end of the through-electrode 12. The through-electrode connection portion 42 and the through-electrode 12 are also made of the same material, and the portion formed on the second surface 10b is called the through-electrode connection portion 42, and the portion placed within the through-hole 11 is called the through-electrode 12. A conductive electrode 32 is connected to the through-electrode connection portion 42. A predetermined combination of through-electrode connection portions among the through-electrode connection portion 42 placed in the second wiring layer 22 and the through-electrode connection portion 41 placed in the first wiring layer 21 provides conductivity through the through-electrode 12. The substrate bonding solder 54 is a bump used when connecting to a printed wiring board. The solder resist 55 is a film made of an insulating material for protecting the multilayer wiring board 1. Here, the conductive electrode 32 forms a conductive path within the second wiring layer 22 either by overlapping with other wiring layers or via other wiring layers. This indicates that the second wiring layer 22 is made by overlapping two wiring layers.

[0019] The first wiring layer 21 and the second wiring layer 22 include an insulating resin layer 25. The low water absorption resin 24 covering the side surface 10c of the core substrate 10 may be made of the same type of resin material as the resin material constituting the insulating resin layer 25, or it may be made of a different type of resin material. The side surface 10c of the core substrate 10 corresponds to the separation groove 17, which is the separation point when separating the multilayer wiring board from the glass substrate 60, as will be described later. It is also possible that the low water absorption resin 24 is a resin member placed in the separation groove 17.

[0020] (Dimensions and composition of the multilayer wiring board) The relationship between the opening width D1 at the bottom of the through electrode 12 (on the first surface 10a side of the core substrate 10) and the opening width D2 on the second surface 10b side of the core substrate 10 (bottom opening width D1 / second surface opening width D2) is in the range of 0.35 or more and 0.65 or less. The relationship between the bottom opening width D1 and the second surface 10b opening width D2 can be set as appropriate within the above range.

[0021] Furthermore, the thickness T2 of the core substrate 10 is in the range of 50 μm to 2000 μm, and its thickness can be set according to the characteristic values ​​of the capacitor electrode 13, inductor, resistor, etc. formed on the first wiring layer 21. More preferably, the thickness T2 of the core substrate 10 is in the range of 100 μm to 1000 μm.

[0022] The insulating resin layer 25 has a relative permittivity in the range of 3.1 to 3.5 and a dielectric loss tangent in the range of 0.002 to 0.012. The insulating resin layer 25 is formed of a thermosetting resin. An insulating resin material having such relative permittivity and dielectric loss tangent is used for the insulating resin layer 25. The thermosetting resin is an epoxy resin, a polyimide resin, a polyamide resin, or a composite material thereof (specifically, an epoxy resin alone, a polyimide resin alone, a polyamide resin group material, a combination of an epoxy resin and a polyimide resin, a combination of an epoxy resin and a polyamide resin, a combination of an epoxy resin and a polyamide resin, a combination of an epoxy resin, a polyimide resin, and a polyamide resin), and contains at least SiO ２ A filler material containing SiO is used, which is filled in a range of 65% to 80%. ２ If the filling rate of the filler material (hereinafter sometimes referred to as "filler filling rate") is 65% or less, the relative permittivity and dielectric loss tangent will fall outside the above range, which will cause a decrease in transmission characteristics. More preferably, SiO ２ The filling rate of the filler material shall be 72% or more. In addition, among the above composite materials, SiO ２ Materials with a high concentration of filler material have a low coefficient of thermal expansion, which is close to that of glass materials. Therefore, by using such materials, it is possible to reduce the stress that may occur when a wiring layer is formed on the core substrate 10. In this way, the values ​​of the relative permittivity and dielectric loss tangent can be kept within the above range, and it is possible to avoid affecting the transmission characteristics.

[0023] The low water absorption resin 24 has a relative permittivity in the range of 3.1 to 3.5 and a dielectric loss tangent in the range of 0.002 to 0.012. Furthermore, its water absorption rate is in the range of 0.05% to 0.6%. The low water absorption resin 24 is formed from a thermosetting resin. An insulating resin material having such relative permittivity, dielectric loss tangent, and water absorption rate is used for the low water absorption resin 24. Examples of thermosetting resins include epoxy resins, polyimide resins, polyamide resins, acrylic resins, and composite materials thereof, and SiO ２ A filler material containing SiO may be used, with a concentration of 65% to 80%. ２ If the filling rate of the filler material is 65% or less, the relative permittivity and dielectric loss tangent will fall outside the above range, which will cause a decrease in transmission characteristics. More preferably, SiO ２ The filling rate of the filler material should be 72% or higher. Regarding water absorption, if the water absorption rate is less than 0.05%, there are few polar functional groups in the low-water-absorbent resin, which may result in insufficient adhesion between the glass substrate and the low-water-absorbent resin, potentially leading to interfacial delamination. On the other hand, if the water absorption rate is greater than 0.6%, the suppression of glass hydrolysis will be insufficient, leading to the propagation of microcracks. Furthermore, among the above composite materials, SiO ２Materials with a high concentration of filler material have a low coefficient of thermal expansion, which is close to that of glass materials. Therefore, by using such materials, it is possible to reduce the stress that may occur when the low water absorption resin 20 is placed on the side surface 10c of the core substrate 10. In this way, the values ​​of the relative permittivity and dielectric loss tangent can be kept within the above range, and it is possible to avoid affecting the transmission characteristics. It is also possible to change the water absorption rate of the material by changing the filler filling rate. For example, if the low water absorption resin 24 and the insulating resin layer 25 are made of the same type of resin material, the filler filling rate of the resin material constituting the low water absorption resin 24 may be set higher than that of the resin material constituting the insulating resin layer 25, so that the water absorption rate of the low water absorption resin 24 is lower than that of the insulating resin layer 25. Even if the low water absorption resin 24 and the insulating resin layer 25 are made of different types of resin materials, it is possible to adjust the filler filling rate so that the low water absorption resin 24 has a lower water absorption rate than the insulating resin layer 25.

[0024] The sides of the multilayer wiring board 1 expose the insulating resin layer 25 contained in the first wiring layer 21 and the second wiring layer 22, and the low water absorption resin 24 formed on the side surface 10c of the core substrate 10. The thickness wi of the insulating resin on the side surface of the multilayer wiring board 1 (in other words, the thickness of the low water absorption resin 24 on the side surface 10c of the core substrate 10) is at least 50 μm when measured in the xy plane direction (the direction in which the multilayer wiring board 1 expands). The side surface 10c of the core substrate 10 takes the range of 21° to 35° when a perpendicular straight line is assumed to extend from the first surface 10a to the second surface 10b, and the angle between this straight line and a line parallel to the side surface 10c of the core substrate 10 is defined as θ1. In other words, the shape of the side surface 10c of the core substrate 10 can be described as a so-called V shape.

[0025] An insulating resin layer 25 and a low water absorption resin 24 are arranged on the side surface of the multilayer wiring board 1, and as a result, the side surface of the multilayer wiring board 1 is protected by the low water absorption resin 24. This makes it possible to distribute the stress generated in the first wiring layer 21 or the second wiring layer 22 formed on the upper and lower surfaces of the core substrate 10 to the other wiring layer through the low water absorption resin 24 on the side surface 10c of the core substrate 10. In addition, chipping of the edges of the core substrate 10 and the insulating resin material can be suppressed, and the reliability of the multilayer wiring board 1 can be improved. Furthermore, because the low water absorption resin 24 is arranged on the side surface 10c of the core substrate 10, moisture present in the air or around the core substrate 10 can be prevented from entering or coming into contact with the side surface 10c of the core substrate 10, so that hydrolysis of the glass constituting the core substrate 10 is suppressed and the reduction in glass strength can be suppressed. Therefore, even in environments where moisture is present (for example, in high humidity environments), the occurrence of μ cracks on the side surface 10c of the core substrate 10 can be suppressed, and the reliability of the multilayer wiring board 1 can be improved.

[0026] The capacitor formed on the first wiring layer 21 of the multilayer wiring substrate 1 has a MIM structure. The dielectric layer 14 forming the capacitor can be selected from at least one of alumina, silica, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate, from the viewpoint of insulation and dielectric constant. Furthermore, the material used for the upper and lower electrodes of the MIM structure can be at least one of, for example, Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu. For example, Cu is a desirable material.

[0027] The core substrate 10 used in the multilayer wiring board 1 is made of a transparent glass material that has light transmittance. The composition of the glass, the mixing ratio of each component contained in the glass, and the method of manufacturing the glass are not particularly limited. For example, examples of glass include alkali-free glass, alkali glass, borosilicate glass, quartz glass, sapphire glass, and photosensitive glass, but any glass material mainly composed of silicate may be used. Furthermore, other so-called glass materials may also be used. In the multilayer wiring board 1 according to the first embodiment, the case in which alkali-free glass is used will be described.

[0028] The core substrate 10 uses glass manufactured by methods such as the float method, down-draw method, fusion method, up-draw method, and roll-out method, but glass material manufactured by any of these methods may be used. The coefficient of thermal expansion of the glass is preferably in the range of -1 ppm / K to 15.0 ppm / K. This is because if it is below -1 ppm / K, it is difficult to select a glass material. On the other hand, if it is above 15.0 ppm / K, the difference in thermal expansion coefficients with other layers becomes large, reducing reliability when used in a multilayer wiring board. Furthermore, when a silicon chip is mounted on the multilayer wiring board 1 of the first embodiment, the reliability of the connection with the silicon chip decreases. The coefficient of thermal expansion of the glass is preferably in the range of 0.5 ppm / K to 8.0 ppm / K, and even more preferably in the range of 1.0 ppm / K to 4.0 ppm / K.

[0029] <First Manufacturing Method According to the First Embodiment> The manufacturing method of the multilayer wiring board 1 according to the first embodiment will be described below with reference to Figures 3 to 22. In the following figures, for ease of understanding, the glass substrate described later will be shown in sections containing one multilayer wiring board 1. Multiple similar sections are arranged in the xy-plane direction of the glass substrate.

[0030] (Preparation of Glass Substrate) First, referring to FIG. 3, the bonding process of the first support will be described. FIG. 3 is a cross-sectional view for explaining the bonding process of the first support in the manufacturing method according to the first embodiment. First, as shown in FIG. 3, a base substrate (hereinafter also referred to as "glass substrate") 60 having a first surface 60a and a second surface 60b facing the first surface is prepared. The thickness of the glass substrate 60 is T1. In the present disclosure, the explanation is made using the glass substrate 60, but the present disclosure is not limited to the case of a glass substrate. The present disclosure can also be applied when a material other than glass is used. The surface on the positive z-axis side of the glass substrate 60 is referred to as the first surface 60a, and the surface on the negative z-axis side of the glass substrate 60 is referred to as the second surface 60b. Further, the glass substrate 60 becomes the core substrate 10 through the manufacturing process and substantially has the same configuration. For convenience, it is referred to as the glass substrate 60 in the manufacturing process and as the core substrate 10 in the multilayer wiring board 1 after manufacturing.

[0031] (Bonding of First Support) Subsequently, referring to FIG. 3, the process (first process) of bonding the first support 61 to the glass substrate 60, which is the base substrate, will be described. The first process is a process of bonding the support (first support 61) to the second surface 60b of the glass substrate 60.

[0032] The glass substrate 60 has a first surface 60a and a second surface 60b. As shown in FIG. 3, using the first adhesive layer 62, the first support 61 is bonded to the glass substrate 60 to form a laminated structure 63 composed of the glass substrate 60, the first adhesive layer 62, and the first support 61. The first support 61 may be bonded to either the first surface 60a or the second surface 60b. In the present disclosure, for convenience, it is described assuming that the surface to which the first support 61 is bonded is the second surface 60b.

[0033] Note that in the drawings, the first adhesive layer is so thin that its thickness can be ignored compared to the glass substrate 60 and the first support 61, and it can also be represented as the interface between the glass substrate 60 and the first support 61. However, for the sake of clarity, it is illustrated as a layered structure with a thickness. Also, the glass substrate 60 extends in the y-axis direction, and only a part of it is shown in the drawing, so the ends in the y-axis direction are shown as straight lines.

[0034] The first adhesive layer 62 is an adhesive layer for temporarily fixing the first support 61 to the glass substrate 60. The first adhesive layer 62 can also be a surface formed on the second surface 60b of the glass substrate 60 and containing a hydroxyl group. As long as the adhesive interface contains a hydroxyl group, it may also contain a plurality of other functional groups. Therefore, the material of the first adhesive layer 62 can be appropriately selected from resins that can be peeled off by absorbing light such as UV light and generating heat, sublimating, or changing quality, resins that can be peeled off by foaming due to heat, or functional groups, etc. To bond the first support 61 to the glass substrate 60, for example, a laminator, a vacuum pressure press, a vacuum bonding machine, etc. can be used. Thus, by forming an interface containing a hydroxyl group on the second surface 60b of the glass substrate 60, it becomes possible to form a hydrogen bond using the hydroxyl group between the glass substrate 60 and the first support 61. Note that an adhesive layer containing a hydroxyl group can also be formed on the first surface 10a of the glass substrate 60.

[0035] The first support 61 is preferably made of the same material as the glass substrate 60. When the material of the glass substrate 60 is non-alkali glass, it is desirable that the material of the first support 61 is also non-alkali glass. Also, the thickness of the first support 61 can be appropriately set according to the thickness T1 of the glass substrate 60. However, it is desirable that the thickness be such that it can be transported during the manufacturing process. For example, the thickness T1 of the glass substrate 60 is in the range of 75 μm or more and 3000 μm or less, and the thickness of the first support 61 can be set in the range of 300 μm or more and 1500 μm or less.

[0036] In the first embodiment, the first support 61 is made of a glass material, and hydroxyl groups (hydroxyl groups) and a plurality of functional groups are used as the bonding interface.

[0037] The adhesion strength between the glass substrate 60 and the first support 61 is 0.15 J / cm ２ or more and 0.45 J / cm ２ or less. It is preferable that the strength falls within the above range. If the strength within the above range cannot be obtained, annealing treatment may be performed after forming the hydroxyl groups to improve the adhesion strength. If the adhesion strength is 0.15 J / cm ２ or less, the possibility of peeling at the interface between the glass substrate 60 and the first support 61 during the process flow increases. Conversely, if the adhesion strength is 0.45 J / cm ２ or more, problems are likely to occur in the peeling process described separately. More preferably, it is in the range of 0.25 J / cm ２ or more and 0.4 J / cm ２ or less. The adhesion strength was measured using the crack opening method, but the measurement method is not limited to this.

[0038] (Formation of laser modified portion) Next, referring to FIG. 4, the process (second process) of forming a laser modified portion will be described. The second process is a through-hole position where a through-hole penetrating the glass substrate 60 from the first surface 10a toward the second surface 60b is formed, and an individualization line position indicating a position where a separation groove for separating the multilayer wiring substrate 1 from the glass substrate 60 is formed. From the first surface 10a side of the glass substrate 60, a laser is irradiated to form a modified portion (laser modified portion 65). FIG. 4 is a cross-sectional view for explaining the process of forming a laser modified portion in the manufacturing method according to the first embodiment. In FIG. 4, the broken line indicates the laser modified portion 65. As shown in FIG. 4, the laminated structure 63 is irradiated with a laser from the first surface 10a side to form a laser modified portion 65. The laser modified portion 65 is formed at a position corresponding to the through-hole 11 in the core substrate 10. The laser modified portion 65 extends in the glass substrate 60, for example, in the vertical direction (z-axis direction), and can be formed at a desired position over substantially the entire surface of the glass substrate 60. At this time, the laser modified portion 65 may be formed so as to reach the first adhesive layer 62 and the first support 61.

[0039] In the first embodiment, by irradiating the glass substrate 60 with the first support 61 stacked on top of it with a laser, it becomes possible to broaden the processing conditions (process window) for laser irradiation and to form a laser-modified portion 65 at a desired position on the glass substrate 60.

[0040] If a resin adhesive layer is used as the first adhesive layer 62, laser irradiation may cause cracks in the resin of the adhesive, and when the first support 61 is peeled from the glass substrate 60, the adhesive resin may remain on the glass substrate 60. If such adhesive resin remains on the glass substrate 60, it may cause problems in the subsequent through-hole formation process by hydrofluoric acid etching. For example, it may lead to the occurrence of surface irregularities on the glass substrate 60. For this reason, it is preferable to use an interface containing hydroxyl groups rather than a resin adhesive layer for bonding the glass substrate 60 and the first support 61.

[0041] Figure 5 is a diagram illustrating the formation locations of the laser-modified portion 65 in the manufacturing method according to the first embodiment. Figure 5(a) is a plan view of the glass substrate 60 as seen from the z-axis positive direction, which is the first surface 10a side, and Figure 5(b) is an example showing an enlarged view of a part of the glass substrate 60. Here, the dashed line indicates the fragmentation line 64. The fragmentation line 64 indicates the position where the separation groove 17 is formed when separating the multilayer wiring board 1 from the glass substrate 60. The laser-modified portion 65 is formed along the fragmentation line 64 in addition to the through-hole position. The laser-modified portion 65 formed at the through-hole position is indicated by a black circle. Multiple multilayer wiring boards 1 are obtained by separating the glass substrate 60 along the fragmentation line 64.

[0042] Figure 5(c) shows another example, an enlarged view of a part of the glass substrate 60. As shown in Figure 5(c), when forming the laser-modified portion 65, it is also possible to form multiple laser-modified portions by shifting the laser irradiation position to form a fragmentation line 64. Figure 5(c) shows a case where two fragmentation lines 64 are formed in parallel.

[0043] (Formation of the First Wiring Layer) Next, with reference to Figure 6, the process of forming the first wiring layer 21 (the third process) will be described. The third process is to arrange a conductive member on the first surface side to form a first conductive part (through electrode connection part 41), arrange a resin member, and form the first wiring layer. The resin member is, for example, a member containing an insulating resin material. Figure 6 is a cross-sectional view illustrating the process of forming the first wiring layer in the manufacturing method according to the first embodiment. As shown here, a first wiring layer 21 including a conductive layer and an insulating layer is formed on the first surface 60a of the glass substrate 60 of the laminated structure 63. By arranging the conductive member on the first surface 60a of the glass substrate 60, a through electrode connection part 41 and wiring 16 are formed on the first surface 10a. A dielectric layer 14 and a capacitor electrode 13 are also formed on the through electrode connection part 41. The first wiring layer 21 includes the through electrode connection part 41, wiring 16, dielectric layer 14, and capacitor electrode 13.

[0044] Specifically, first, a seed layer is formed on the glass substrate 60. The seed layer is a film of conductive metal and is formed to a desired thickness. Examples of materials for the conductive metal film include Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO, IZO, AZO, ZnO, PZT, TiN, and Cu. ３ N ４ You can set it as appropriate.

[0045] The through-electrode connection portion 41 and the wiring 16 are formed, for example, by a semi-additive (SAP) method. In the semi-additive method, a photoresist is used to form the desired pattern. Generally, a dry film resist is used, but a liquid resist may also be used. After exposing and developing the resist to form the desired pattern, a plating film with a thickness of 2 μm to 20 μm is formed by electroplating. The unnecessary resist pattern is peeled off, and the seed layer is etched to form the through-electrode connection portion 41 located above the laser-modified portion 65 and the wiring 16 located between the laser-modified portion 65.

[0046] The dielectric layer 14 on the through-electrode connection portion 41 is formed using at least one of the following materials from the viewpoint of insulation and relative permittivity: alumina, silica, silicon nitride, tantalum oxide, titanium oxide, calcium titanate, barium titanate, and strontium titanate. The thickness of the dielectric layer 14 is preferably in the range of 10 nm to 5 μm. If the thickness of the dielectric layer 14 is 10 nm or less, insulation cannot be maintained and the capacitor function will not be exhibited. If the thickness of the dielectric layer 14 is 5 μm or more, the film deposition time is too long, making mass production difficult, and the process of removing unnecessary parts takes even more time. More preferably, the thickness of the dielectric layer 14 is in the range of 50 nm to 1 μm.

[0047] The capacitor electrode 13 is formed by dividing it into a lower electrode layer and an upper electrode layer. The lower electrode layer is formed using at least one of the following materials, Cu, Ni, Al, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu, from the viewpoints of adhesion and electrical conductivity. For example, Ti is excellent in terms of adhesion, electrical conductivity, ease of manufacture, and cost.

[0048] A seed metal layer is formed on the upper electrode of the capacitor electrode 13, and then an electroplating layer is formed. As the seed metal layer, at least one of the following can be used: Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, and Cu. From the viewpoint of simplifying subsequent etching removal, it is desirable to use Cu. The thickness of the seed metal layer is preferably in the range of 10 nm to 5 μm. If the thickness of the seed metal layer is less than 100 nm, there is a possibility of poor current conduction in the subsequent electroplating process. If the thickness of the seed metal layer exceeds 5 μm, etching removal will take a long time. More preferably, the thickness of the seed metal layer is in the range of 100 nm to 500 nm.

[0049] Subsequently, an electroplated layer is formed as the upper electrode of the capacitor electrode 13. Electroplated copper is simple, inexpensive, and has good electrical conductivity. In addition to electroplated copper, electroplated nickel, electroplated chromium, electroplated Pd, electroplated gold, electroplated rhodium, electroplated iridium, etc. may also be used. After the upper electrode is formed, the seed metal layer is removed. Wet etching, dry etching, etc., can be set as appropriate depending on the application.

[0050] Regarding the formation of the capacitor electrode 13, in conventional manufacturing methods for producing multilayer wiring boards using a substrate with pre-formed through-holes 11, it is not possible to deposit conductive material on the through-holes, so it was necessary to form the MIM structure while avoiding the through-holes. On the other hand, according to the manufacturing method of the first embodiment, since the wiring formation process and the capacitor electrode formation process are performed before the through-hole formation process, the capacitor electrode 13 can be formed near the through-hole and above the through-hole, in other words, without being restricted by the position of the through-hole. For example, it is possible to provide the capacitor electrode 13 directly above the through-hole. This makes it possible to shorten the transmission distance to the capacitor and avoid a decrease in transmission characteristics. Furthermore, by forming the lower electrode layer when forming the capacitor electrode 13, it is possible to reduce variations in capacitor capacitance.

[0051] Finally, the insulating resin layer 25 is formed. The insulating resin layer 25 is a component made of thermosetting resin, and its material includes at least one of epoxy resin, polyimide resin, and polyamide resin, and SiO ２ The material contains filler material and is preferably in liquid or film form. In the case of liquid resin, the insulating layer can be formed by spin coating, and in the case of film resin, by heating and pressurizing under vacuum using a vacuum laminator. The material of the insulating resin layer 25 can be appropriately selected as needed. However, when using a photosensitive insulating resin material, SiO is used to ensure photolithography. ２ Because filling with filler material becomes difficult, it is limited to non-photosensitive thermosetting resins.

[0052] (Adhesion of the second support) Next, the process of adhering the second support will be described with reference to Figure 7. Figure 7 is a cross-sectional view illustrating the process of adhering the second support in the manufacturing method according to the first embodiment. As shown in Figure 7, a second adhesive layer 71 is formed on the first wiring layer 21 of the laminated structure 63, and the second support 70 is adhered to the second adhesive layer 71.

[0053] The second adhesive layer 71 can be appropriately selected from a resin that absorbs light such as UV light and becomes peelable by generating heat, sublimation, or alteration, a resin that becomes peelable by foaming due to heat, or functional groups that temporarily fix the glass substrate 60 and the first support 61, similar to the first adhesive layer 62. However, it is preferable that it be formed from a different material than the first adhesive layer 62.

[0054] The second support 70 is preferably made of the same material as the glass substrate 60. If the glass substrate 60 is alkali-free glass, it is desirable that the second support 70 is also alkali-free glass. The thickness of the second support can be appropriately set according to the thickness of the glass substrate 60. However, it is desirable that the thickness be transportable, for example, in the range of 300 μm to 1500 μm.

[0055] (Peeling off the first support) Next, with reference to Figure 8, the step of peeling off the first support (the fourth step) will be described. The fourth step is the step of peeling off the first support 61 from the glass substrate 60. Figure 8 is a cross-sectional view illustrating the peeling step of the first support 61 in the manufacturing method according to the first embodiment. As shown here, the interface between the glass substrate 60 and the first adhesive layer 62 is peeled off, separating the first adhesive layer 62 and the first support 61 from the glass substrate 60.

[0056] To separate the first support 61 from the glass substrate 60, a peeling initiation point is formed by applying physical force to the side surface of the first adhesive layer 62, and the interface of the first adhesive layer 62 can be peeled off by applying force starting from this peeling initiation point. More specifically, the area on the side surface of the first adhesive layer 62 marked with a cutter or the like is designated as the peeling initiation point, and the glass substrate 60 and the first support 61 can be separated by applying force in a direction that pulls the first support 61 and the glass substrate apart. Note that applying the marking process while applying force to pull the first support 61 and the glass substrate apart will allow the peeling process to be carried out smoothly. Depending on the material used for the first adhesive layer 62, an appropriate peeling method will be selected from UV light irradiation, heat treatment, physical peeling, etc., according to the material used. In addition, if a residue of the first adhesive layer 62 remains on the glass substrate 60, plasma cleaning, ultrasonic cleaning, water washing, solvent cleaning using alcohol, etc. may be performed.

[0057] (Formation of through-holes by etching) Next, with reference to Figures 9 to 14, the process of forming through-holes by etching (the fifth step) will be explained. The fifth step is to remove the modified portion (laser modified portion 65) from the second surface 60b side by etching, thereby forming through-holes and separation grooves. Figure 9 is a cross-sectional view illustrating the process of forming through-holes by etching in the manufacturing method according to the first embodiment. Figure 9 shows the shape of the glass substrate 60 after hydrofluoric acid etching. By hydrofluoric acid etching, through-holes 11 and separation grooves 17, which will be described later, are formed simultaneously, and in the separation grooves 17, the insulating resin layer 25 is exposed. As shown here, the laser modified portion 65 is selectively removed by etching from the second surface 60b side of the glass substrate 60, thereby forming through-holes 11. In addition, the second surface 60b of the glass substrate 60 is etched to form a surface corresponding to the second surface 10b of the core substrate 10. Wet etching using an aqueous hydrofluoric acid solution is suitable for etching. The amount of etching with the aqueous hydrofluoric acid solution is set appropriately according to the thickness of the glass multilayer wiring substrate. For example, if the thickness T1 of the glass substrate 60 is 200 μm, the etching amount is preferably in the range of 50 μm to 175 μm. Although a structure in which the insulating resin layer 25 is exposed is shown here, the structure is not limited to this. If the seed layer of the first wiring layer 21 remains in the separation groove 17, the seed layer of the first wiring layer 21 will be exposed from the separation groove 17. The glass substrate 60 is also etched along with the etching of the laser-modified section 65. The thickness T2 of the glass substrate 60 after etching is preferably in the range of 50 μm to 2000 μm.

[0058] Next, Figure 10 is a bottom view when the separation groove 17 is formed. Figure 11 is a schematic enlarged view of a part of the bottom view of the separation groove. Figure 11 is a diagram showing the range 60S of Figure 10. Figure 12 is a schematic diagram showing the side view of the separation groove. Figure 13 is a schematic diagram showing the range 60S of Figure 10 viewed from the side. Figure 12 can be obtained, for example, by SEM (scanning electron microscope). As shown in Figure 12, on the side surface of the glass substrate 60, vertical ridges are formed where protrusions extending in the direction normal to the glass substrate 60 (z-axis direction) along the processing pitch of the laser modification section 65 for forming the separation groove 17 are visible in the xy-plane direction. Also, the solid lines shown in Figure 12 indicate the ridges of the uneven surface, consisting of vertical ridges and horizontal ridges perpendicular to the vertical ridges formed on the side surface of the glass substrate 60. As a result, a large number of roughly rectangular recesses are formed on the side surface of the glass substrate 60. The dimensions of these rectangles are such that, for example, if the laser-modified section 65 is processed with a pitch of 10 μm, the spacing R1 of the ridges formed on the lower surface of the separation groove 17 shown in Figure 11 or the spacing R1 of the ridges formed on the side surface shown in Figure 12 will be 10 μm or less. Depending on the spacing R1 of the ridges, the processing pitch of the laser-modified section 65 can be arbitrarily set. Also, on the upper surface of the separation groove 17 in Figure 11, the width of the irregularities formed along the ridges (hereinafter also referred to as "ridge PV" or "vertical and horizontal ridge PV" (Peak To Valley: PV). In other words, the distance between the convex and concave parts in the Y-axis direction) is approximately 10 μm or less.

[0059] Furthermore, as shown in Figure 12, the side surface 10c of the core substrate 10 has a plurality of substantially rectangular recesses consisting of a plurality of vertical and horizontal edges, the horizontal dimension of the rectangle being, for example, in the range of 5 μm to 20 μm, the vertical dimension being in the range of 2 μm to 25 μm, and the depth of the plurality of recesses being in the range of 0.5 μm to 11 μm.

[0060] The irregularities that appear on the surface of the glass substrate 60 where the separation groove 17 is formed are minute, and have the effect of improving the adhesion between the low water absorption resin 24 (described later) and the glass substrate 60. Figure 9 is a cross-sectional view of AA in Figure 10.

[0061] Figure 13 is a schematic diagram showing an enlarged view of the separation groove 17. Figure 13 is a cross-sectional view of BB in Figure 10. In the separation groove 17, as shown in Figure 13, the relationship between the processing width 17B at the bottom and the opening width 17T of the opening (processing width 17B at the bottom / opening width 17T) can be set to a range of 0.85 to 1.0 by changing the pitch spacing and number of laser-modified sections. By processing the processing width 17B at the bottom of the separation groove 17 to a desired width, the range of the inclined portion of the separation groove 17 caused by the difference between the processing width 17B and the opening width 17T changes. As a result, the amount of low water absorption resin 24 placed in the inclined portion in a process described later can be adjusted, making it possible to set the thickness of the low water absorption resin 24 covering the side surface of the multilayer wiring board after individualization to a desired thickness.

[0062] Figure 14 is a schematic, enlarged view of a portion of the bottom view of the separation groove 17. Figure 14 is a diagram showing region 17E of Figure 10. The insulating resin layer 25 exposed from between the separation grooves 17 has a transfer mark 65T of the laser-modified portion 65, creating minute irregularities. These irregularities create an anchoring effect when the low water absorption resin 24 is formed thereafter. As a result, the insulating resin layer 25 and the low water absorption resin 24 are integrally formed between the first wiring layer 21 and the second wiring layer 22, and the adhesion between the insulating resin layer 25 and the low water absorption resin 24 and the core substrate 10 is improved in the multilayer wiring substrate 1.

[0063] (Formation of through electrodes to formation of the second wiring layer) Next, the process from the formation of through electrodes to the formation of the second wiring layer will be described with reference to Figures 15 to 17. Figures 15 to 17 are cross-sectional views illustrating the process of forming the second wiring layer in the manufacturing method according to the first embodiment. As shown in Figures 15 to 17, a second wiring layer 22 including through electrodes 12, through electrode connection portions 42, and an insulating resin layer 25 is formed on the second surface 10b of the glass substrate 60. Each step will be described in detail.

[0064] (Formation of through-electrodes) Next, the process of forming through-electrodes (the sixth step) will be explained with reference to Figure 15. The sixth step is to introduce a conductive member into the through-hole 11 from the second surface 60b side and form a through-electrode 12 that connects the first conductive part and the second surface 60b. Figure 15 is a cross-sectional view illustrating the process of forming through-electrodes and through-electrode connections in the manufacturing method according to the first embodiment. To form the through-electrode 12 and through-electrode connections 42, first, a seed layer for power supply is formed, a pattern is formed with resist, and a plating process is performed to form a plating with a thickness of 2 μm to 20 μm. After that, the unnecessary resist pattern is peeled off and the seed layer is removed. As a result, the through-electrode 12 and through-electrode connections 42 are formed as shown in Figure 15. The through-electrode connections 42 can also be called an electrode that is electrically connected to the through-electrode 12. In addition, wiring having a predetermined shape is also formed, which is connected to the electrode that is electrically connected to the through-electrode 12.

[0065] ((Placement of Low Water Absorption Resin)) Next, with reference to Figure 16, the step of placing the low water absorption resin (the seventh step) will be described. The seventh step is the step of placing the low water absorption resin 24 in the separation groove 17. Figure 16 is a cross-sectional view illustrating the step of placing the low water absorption resin in the manufacturing method according to the first embodiment. As shown in Figure 16, the low water absorption resin 24 is placed in the separation groove 17. As the low water absorption resin 24, for example, an organic resin such as epoxy, polyimide, or acrylic resin with a water absorption rate in the range of 0.05% to 0.6% can be used. There is no particular method of placement; for example, if the organic resin is in liquid form such as varnish, the organic resin can be placed in the separation groove 17 by dispensing, and if the organic resin is in film form, the organic resin can be placed in the separation groove 17 by lamination.

[0066] Generally, because moisture is present in the atmosphere, glass exposed to the atmosphere may undergo hydrolysis, potentially reducing its strength. Furthermore, as mentioned above, when the glass substrate 60 is fragmented by dicing or other means, extremely minute cracks may occur on the sides of the diced glass substrate 60. After fragmentation, extremely minute cracks and the aforementioned reduction in glass strength occur simultaneously on the sides of the glass substrate 60, creating conditions conducive to the formation of microcracks.

[0067] In this invention, by forming separation grooves 17, it is possible to avoid directly fragmenting the glass by dicing or other methods described later, thereby suppressing the occurrence of extremely minute cracks. Furthermore, the sides of the glass substrate 60 are embedded with a low water absorption resin 24, which physically separates the glass from moisture in the air. In addition, the low water absorption resin 24 itself does not easily absorb water, thus suppressing hydrolysis of the glass and preventing a decrease in the strength of the glass. Moreover, in this invention, the resin of the low water absorption resin 24 penetrates even extremely minute cracks, so the low water absorption resin 24 has the effect of relieving the stress on the extremely minute cracks, making it possible to further suppress the occurrence of microcracks in the glass substrate 60.

[0068] ((Formation of the second wiring layer)) Next, with reference to Figure 17, the process of forming the second wiring layer (the eighth step) will be described. The eighth step is to place a resin member of the same type as the resin member on the second surface 60b side and on the upper surface of the low water absorption resin 24, and to form the second wiring layer 22 on the second surface 60b. Figure 17 is a cross-sectional view illustrating the process of forming the second wiring layer in the manufacturing method according to the first embodiment. After placing the low water absorption resin 24 in the separation groove 17, an insulating resin layer 25 is formed, and the second wiring layer 22 is formed. The insulating resin layer 25 is formed on the upper surface of the low water absorption resin 24 (the surface on the second surface 60b side of the glass substrate 60), and the resin constituting the insulating resin layer 25 is also filled inside the through electrode 12. In the first embodiment, the case in which the insulating resin layer 25 formed on the first wiring layer 21 and the second wiring layer 22 are formed from the same material is shown, but this disclosure is not limited to this case. Different insulating resin layers may be formed in the first wiring layer 21 and the second wiring layer 22.

[0069] (Peeling off the second support) Next, the process of separating the second support 70 will be described with reference to Figures 18 and 19. After the process of forming the second wiring layer, the peeling process of the second support 70 is performed. Figure 18 is a diagram illustrating the peeling process of the second support 70 in the manufacturing method according to the first embodiment. Figure 19 is a cross-sectional view illustrating the state after the peeling process of the second support 70 has been performed in the manufacturing method according to the first embodiment of the present invention. As shown in Figure 18, the interface between the first wiring layer 21 and the second support 70 is peeled off, and the second support 70 and the second adhesive layer 71 are separated. As a result, as shown in Figure 19, a glass substrate 60 is obtained in which the first wiring layer 21 is formed on the first surface 60a side and the second wiring layer 22 is formed on the second surface 60b side. When separating the second support 70 from the second wiring layer 22, an appropriate peeling method can be selected from UV light irradiation, heat treatment, physical peeling, etc., depending on the material used for the second adhesive layer 71. Furthermore, if residual material from the second adhesive layer 71 remains at the joint surface between the first wiring layer 21 and the second adhesive layer 71, plasma cleaning, ultrasonic cleaning, water washing, or solvent cleaning using alcohol may be performed.

[0070] (Formation of Build-Up Layer) Next, with reference to Figure 20, the process of forming a build-up layer, in other words, a laminated layer of the first wiring layer 21 and the second wiring layer 22, will be described. Figure 20 is a cross-sectional view illustrating the build-up layer formation process in the manufacturing method according to the first embodiment. As shown in Figure 20, a conductive electrode 31 for making the first wiring layer 21 on the first surface 10a side and a conductive electrode 32 for making the second wiring layer 22 on the second surface 10b side are formed on the first wiring layer 21 on the first surface 10a side and the second wiring layer 22 on the second surface 10b side of the glass substrate 60. The conductive electrodes 31 and 32 are formed by first forming vias in the insulating resin layer 25 with a laser, then forming a seed layer on the vias, and then using a semi-additive process (i.e., a series of processes including resist pattern formation, plating, resist peeling, seed layer removal, and insulating resin layer formation). The first wiring layer 21 and the second wiring layer 22 are stacked in layers of at least one, and the number of layers can be set as needed. In Figure 20, both the first wiring layer 21 and the second wiring layer 22 are stacked in layers of two.

[0071] Furthermore, the laser used to form the conductive electrodes 31 and 32 can be a different laser from the laser used to form the laser-modified portion 65. For example, it is desirable to use a pulsed laser such as a carbon dioxide laser or a UV-YAG laser, and a laser with a pulse width on the order of microseconds is suitable.

[0072] (Formation of connection pads) Next, the process of forming connection pads will be described with reference to Figure 21. Figure 21 is a cross-sectional view illustrating the process of forming connection pads in the manufacturing method according to the first embodiment. As shown in Figure 21, after forming an outer protective film such as solder resist 55 on the first wiring layer 21 and the second wiring layer 22, a bonding pad 51 for semiconductor elements is formed on the first wiring layer 21 and a bonding pad 53 for the substrate is formed on the second wiring layer 22. Next, the bonding pad 51 for semiconductor elements and the bonding pad 53 for the substrate are subjected to surface treatment such as Ni / Au, Ni / Pd / Au, IT, OSP (water-soluble preflux), and if necessary, bonding solder 52 for semiconductor elements and bonding solder 54 for the substrate are formed to complete the multilayer wiring substrate. Note that Ni / Au means that both Ni and Au are used, and Ni / Pd / Au means that any of Ni, Pd, and Au are used.

[0073] The structure shown in Figure 21 can also be described as a multilayer wiring base substrate as an intermediate product of the multilayer wiring board 1. That is, the multilayer wiring base substrate comprises a glass substrate 60 having a first surface 60a and a second surface 60b, at least one first wiring layer region which includes a wiring layer (first wiring layer 21) formed on the first surface 60a, at least one second wiring layer region which includes a wiring layer (second wiring layer 22) formed on the second surface 10b, a separation groove 17 that penetrates from the first surface 60a to the second surface 60b and separates at least one multilayer wiring board 1 including the first wiring layer region and the second wiring layer region into individual pieces, and a low water absorption resin 24 arranged in the separation groove 17 to bond adjacent multilayer wiring boards together. In the xy plane, the multilayer wiring board 1 has a rectangular shape as shown in Figures 5 and 10, for example, and the first wiring layer region and the second wiring layer region are regions that have the same rectangular shape as the multilayer wiring board 1.

[0074] (Individualization) Next, with reference to Figure 22, the process of separating (individuallyizing) the multilayer wiring board (the ninth step) will be explained. The ninth step is the process of separating the multilayer wiring board 1 by individualizing it according to the separation groove 17. Figure 22 is a cross-sectional view illustrating the individualization step in the manufacturing method according to the first embodiment. For individualization of the multilayer wiring board, as shown in Figure 22, individualization is performed along individualization lines formed by laser and hydrofluoric acid etching. Figure 22 shows a case where blade dicing using a blade 72 is assumed, but in addition to blade dicing, laser, scribe, etc. may also be used. Alternatively, individualization may be performed by combining blade dicing, laser and scribe. As shown in Figure 1, the sides of the individualized multilayer wiring board 1 are covered with a low water absorption resin 24.

[0075] (Flowchart of the manufacturing method according to the first embodiment) The steps described above are summarized in the flowchart. Figure 23 is a flowchart of the manufacturing method according to the first embodiment. Step S1 is the bonding step of the first support. The first support 61 is bonded to the base material substrate. In the first embodiment, it is illustrated that a first adhesive layer 62 containing hydroxyl groups is used. Step S2 is the formation step of the laser modified portion 65. The laser modified portion 65 is the starting point of the through hole 11 and the separation groove 17. The laser modified portion 65 is formed by irradiating the glass substrate 60 with a laser from the first surface 60a side opposite to the surface to which the first support 61 is bonded. Step S3 is the formation step of the first wiring layer 21. The first wiring layer 21 can be formed to include electrodes, wiring, capacitors, inductors, etc. Step S4 is the bonding step of the second support. The second support 70 is bonded on the first wiring layer 21. Step S5 is the peeling step of the first support. Step S6 is the process of forming through holes 11 by etching. The portion from which the laser-modified portion 65 has been removed will later become a through hole 11 or a separation groove 17. Step S7 is the process of forming through electrodes 12. Through electrodes 12 are formed in the through holes 11 of the base material substrate, and electrodes and wiring that are electrically connected to the through electrodes 12 are formed. Step S8 is the process of placing low water absorption resin 24. Low water absorption resin 24 is placed in the separation groove 17. Step S9 is the process of forming the second wiring layer. An insulating resin layer 25 is formed on the through electrodes 12 and electrodes and wiring that are electrically connected to the through electrodes 12, forming the second wiring layer 22. Step S10 is the process of peeling off the second support. The second support 70 is separated from the base material substrate. Step S11 is the process of forming the build-up layer. Electrodes and wiring are formed on the first wiring layer 21 and the second wiring layer 22. Step S12 is the process of forming the connection pads. After forming a protective film on the first wiring layer 21 and the second wiring layer 22, the connection pads are formed. Step S13 is the process of separating the components. The multilayer wiring board 1 is separated by dicing or the like on the base material substrate.

[0076] <First Modified Example> Next, the manufacturing method of the first modified example, which is a modified example of the first embodiment, will be described with reference to Figure 24. The first modified example differs from the first embodiment in that the insulating resin layer 25 is formed with a low water absorption resin 24 in the process of forming the second wiring layer. In the following description, the same reference numerals will be used for components that are basically the same as or equivalent to those in the first embodiment described above, but different reference numerals may be used to clarify the differences from the manufacturing method according to the first embodiment. In addition, the description of components that are the same as or equivalent to those in the first embodiment may be simplified or omitted.

[0077] (Formation of the second wiring layer) The process for forming the second wiring layer in the first modified example will be explained with reference to Figure 24. Figure 24 is a cross-sectional view illustrating the process for forming the second wiring layer in the manufacturing method according to the first modified example. Figure 24 shows the process corresponding to Figure 17 of the first embodiment. The processes from Figure 3 to Figure 17 of the first embodiment can also be applied to the first modified example. In the first modified example, a second wiring layer 22a including a through-electrode connection portion 42 and a low water absorption resin 24 is formed on the second surface 10b of the glass substrate 60.

[0078] Specifically, as shown in Figure 24, first, a separation groove 17 and a through hole 11 are formed on the second surface 10b of the glass substrate 60, and then a through electrode 12 and a through electrode connection portion 42 are formed. To form the through electrode 12 and the through electrode connection portion 42, similar to the process in the first embodiment, first, a seed layer for power supply is formed, a pattern is formed with resist, and then a plating treatment is performed to form a plating with a thickness of 2 μm to 20 μm. After that, the unnecessary resist pattern is peeled off, the seed layer is removed, and the through electrode 12 and the through electrode connection portion 42 are formed.

[0079] Next, the low water absorption resin 24 is filled into the recessed portions of the separation groove 17 and the through electrode 12, and the low water absorption resin 24 is arranged in layers on the second surface 60b of the glass substrate 60. The low water absorption resin 24 is used in place of the insulating resin layer 25 in the first embodiment. In the first modified example, the insulating resin layer 25 can be replaced with the low water absorption resin 24, and the steps shown in Figures 18 to 22 of the first embodiment can be applied.

[0080] As the material for the low water absorption resin 24, similar to the process in the first embodiment, it is possible to use an organic resin such as epoxy, polyimide, or acrylic resin with a water absorption rate in the range of 0.05% to 0.6%. The formation method is not particularly specified; for example, if the organic resin is in liquid form such as varnish, the organic resin can be formed in the separation groove 17 by a dispensing method, and if the organic resin is in film form, the organic resin can be formed in the separation groove 17 by a lamination method.

[0081] In the first modified example, the low water absorption resin 24 is made of a material having the same insulation performance and mechanical properties as the resin material constituting the insulating resin layer 25. The low water absorption resin 24 is placed in the through electrode 12 and the through electrode connection portion 42 to form the second wiring layer 22a. The low water absorption resin 24 is also filled inside the through electrode 12. In the first modified example, the low water absorption resin 24 placed in the separation groove 17 and the through electrode 12 and the low water absorption resin 24 formed in the second wiring layer 22a are shown to be made of the same material, but this disclosure is not limited to this case. The low water absorption resin 5 of different materials may be formed for the first wiring layer 21 and the second wiring layer 22a. As a method of formation, for example, a film-like organic resin is formed in the separation groove 17 by lamination.

[0082] In this process, the placement of the low water absorption resin 24 in the recesses of the separation groove 17 and through-electrode 12, and the placement of the low water absorption resin 24 as the second wiring layer 22 are performed all at once, making it possible to reduce the manufacturing process and manufacturing costs of the multilayer wiring board.

[0083] (Flowchart of the manufacturing method according to the first modified example) Figure 25 is a flowchart of the manufacturing method according to the first modified example. The differences between the first modified example and the first embodiment are as follows: In the first embodiment, as shown in Figure 23, before the process of forming the second wiring layer (step S9), a step of placing the low water absorption resin 24 in the separation groove 17 (step S8) is performed. On the other hand, in the first modified example, as shown in Figure 25, in the process of forming the second wiring layer (step 9a), the low water absorption resin 24 is placed in the separation groove 17, and the low water absorption resin 24 is formed on the through electrode 12 and the electrode and wiring that are electrically connected to the through electrode 12. Note that in the flowchart of the first modified example shown in Figure 25, the steps from the bonding process of the first support (step S1) to the formation of the through electrode (step S7) are the same as steps S1 to S7 of the first embodiment shown in Figure 23. Furthermore, the steps from the peeling step of the second support shown in Figure 25 (steps S10 to S13) are the same as steps S10 to S13 of the manufacturing method according to the first embodiment shown in Figure 23.

[0084] <Effects and Effects> According to the first embodiment and the first modified example of the present invention, even in a high-humidity environment, the side surface 10c of the core substrate 10 of the multilayer wiring board is protected, thereby preventing damage to the core substrate 10 and ensuring the reliability of the multilayer wiring board. Furthermore, according to the first modified example, since the process of placing the low water absorption resin into the separation groove 17 is performed as an integral process with the process of forming the second wiring layer, it is possible to reduce the manufacturing process and manufacturing costs of the multilayer wiring board.

[0085] <Manufacturing Method According to the Second Embodiment> The manufacturing method for a multilayer wiring board according to the second embodiment will be described below with reference to Figures 26 to 34. In the manufacturing method of the first embodiment, a glass substrate 60 was used, but the manufacturing method of the second embodiment differs in that a glass substrate with through electrodes and the like pre-formed is used. In the following description, basically the same or equivalent components as in the first embodiment will be denoted by the same reference numerals, however, different reference numerals may be used to clarify the differences from the manufacturing method according to the first embodiment. In addition, the description of components that are the same or equivalent as in the first embodiment may be simplified or omitted.

[0086] (Preparation of Glass Wiring Substrate) First, the process of preparing the glass wiring substrate will be explained with reference to Figure 26. Figure 26 is a cross-sectional view illustrating the preparation process of the glass wiring substrate in the manufacturing method according to the second embodiment. As shown in Figure 26, a glass wiring substrate (hereinafter also referred to as "glass wiring substrate") 160 is prepared, having a first surface 160a and a second surface 160b facing the first surface, with wiring formed on at least the first surface 160a and the second surface 160b. The glass wiring substrate 160 has substantially the same configuration as the glass substrate 60 of the first embodiment, but is used for convenience to show that it is different from the manufacturing method of the first embodiment.

[0087] The glass wiring substrate 160 has through holes formed that penetrate from the first surface 160a to the second surface 160b, and through electrodes 12 with metal conductivity formed inside the through holes. In addition, a through electrode connection portion (first conductive portion) 41 and wiring 16 are formed on the first surface 160a of the glass wiring substrate 160, and a dielectric layer 14 and capacitor electrodes 13 are also formed on the through electrode connection portion 41. In addition, a through electrode connection portion (second conductive portion) 42 is formed on the second surface 160b of the glass wiring substrate 160.

[0088] The glass wiring board 160 can be manufactured by, for example, forming a plurality of through-electrode connection portions 41 and wiring 16 on the first surface of a base material substrate, forming a plurality of through-electrode connection portions 42 on the second surface, and forming through-electrodes 12 that connect the through-electrode connection portions 41 and 42. Then, the glass wiring board 160 is separated from the base material substrate so that it includes the through-electrode connection portions 41 and 42, the through-electrode connections 42 that are included in a predetermined range, and a portion of the base material substrate. Multiple glass wiring boards 160 can be separated from a single base material substrate.

[0089] The thickness of the glass wiring substrate 160 is T1. Although this disclosure uses the glass wiring substrate 160 as an example, this disclosure is not limited to substrates using glass as the material. This disclosure can also be applied to substrates using materials other than glass.

[0090] Furthermore, the glass wiring substrate 160 is prepared in advance, already divided into individual pieces to the size of the product. The method of division is not specifically designated, and various methods such as blade dicing, laser cutting, and scribing can be selected as appropriate.

[0091] (Adhesion of the third support) Next, with reference to Figure 27, the process of adhering the glass wiring substrate 160 to the third support 73 (the first step of the second embodiment) will be described. The first step of the second embodiment is to adhere a plurality of wiring substrates (glass wiring substrates 160), which are wiring substrates in which a first conductive portion is formed on the first surface of a base material substrate, a second conductive portion is formed on the second surface, and the first conductive portion, the second conductive portion, and a part of the base material substrate are separated, to the support (third support 73) from the second surface 160b side of the plurality of wiring substrates. Figure 27 is a cross-sectional view illustrating the adhesion process of the third support 73 in the manufacturing method according to the second embodiment.

[0092] The glass wiring substrate 160 has a first surface 160a and a second surface 160b. As shown in Figure 27, the glass wiring substrate 160 is bonded to the third support 73 using a third adhesive layer 74 (not shown) to form a laminated structure 75 consisting of the glass wiring substrate 160, the third adhesive layer 74 (not shown), and the third support 73. Although Figure 27 shows the formation of one laminated structure 75, multiple glass wiring substrates 160 are arranged on the third adhesive layer 74 to form multiple laminated structures 75. The space formed between the glass wiring substrate 160 and the third support 73 will have the same configuration as the separation groove 17 in the first manufacturing method in a process described later, and is therefore called the separation groove 117 in the second manufacturing method. The width w2 of the separation groove 117 is set by the spacing between the glass wiring substrates 160. The width w2 is treated as the opening width in Table 1 described later. Figure 27 shows the case where the cross-sectional shape of the separation groove 117 is a square groove, but the cross-sectional shape of the separation groove 117 is determined by the shape of the side surface 160c of the glass wiring substrate 160, and this disclosure can also be applied to cases other than square grooves.

[0093] The third adhesive layer 74 (not shown) is an adhesive layer for temporarily fixing the glass wiring substrate 160 to the third support 73. The material of the third adhesive layer 74 (not shown) can be appropriately selected from resins that can be peeled off by absorbing light such as UV light, generating heat, sublimation, or altering, resins that can be peeled off by foaming due to heat, or functional groups, etc. To bond the glass wiring substrate 160 to the third support 73, for example, a mounter or the like can be used.

[0094] It is desirable that the third support 73 be made of the same material as the glass wiring substrate 160. If the material of the glass wiring substrate 160 is alkali-free glass, it is desirable that the material of the third support 73 is also alkali-free glass. The thickness of the third support 73 can be appropriately set according to the thickness T1 of the glass wiring substrate 160. However, it is desirable that the thickness be such that it can be transported during the manufacturing process. For example, if the thickness T1 of the glass wiring substrate 160 is in the range of 50 μm to 2000 μm, the thickness of the third support 73 can be set in the range of 300 μm to 1500 μm.

[0095] Furthermore, the third support 73 has a recess 76 on the placement surface of the glass wiring substrate 160 that has the same dimensions as the outer circumference of the glass wiring substrate 160. During bonding, the glass wiring substrate 160 is placed inside the recess 76 and bonded. The depth of the recess 76 is preferably 5% to 20% of the thickness (length in the z-axis direction) of the glass wiring substrate 160. By setting it within this range, the glass wiring substrate 160 can be bonded to the third support 73 with its side surface fixed in the recess 76, thus suppressing misalignment of the glass wiring substrates 160 after bonding compared to when there is no recess 76. If the depth (length in the z-axis direction) of the recess 76 is less than 5% of the thickness of the glass wiring substrate 160, the fixing in the recess 76 will be insufficient, and there is a risk that the side surface of the glass wiring substrate 160 will protrude from the recess 76 during bonding, making it difficult to suppress misalignment. On the other hand, if the depth of the recess 76 is greater than 20% of the thickness of the glass wiring substrate, when forming the low water absorption resin 24 on the side surface of the glass wiring substrate 160 (described later), the recess 76 will cover the side surface of the glass wiring substrate 160, making it impossible to sufficiently form the low water absorption resin 24.

[0096] (Placement of low water absorption resin) Next, with reference to Figure 28, the step of placing the low water absorption resin in the separation groove 117 (the second step of the second embodiment) will be described. The second step of the second embodiment is the step of placing the low water absorption resin 24 in the separation groove 117, which is the space formed between each side of the plurality of wiring boards (glass wiring boards 160) and the support (third support 73). Figure 28 is a cross-sectional view illustrating the placement step of the low water absorption resin 24 in the manufacturing method according to the second embodiment.

[0097] As shown in Figure 28, a low water absorption resin 24 is placed in a separation groove 117, which is a recessed space formed between the side surface of the glass wiring substrate 160 and the third support 73. Similar to the first manufacturing method, the low water absorption resin 24 is an organic resin such as epoxy, polyimide, or acrylic with a water absorption rate in the range of 0.05% to 0.6%. There is no particular method of placement; for example, if the organic resin is in liquid form such as varnish, the organic resin can be placed (filled) into the separation groove 117 by a dispensing method, and if the organic resin is in film form, the organic resin can be placed into the separation groove 117 by a lamination method.

[0098] (Formation of the first wiring layer) Next, with reference to Figure 29, the process of forming the first wiring layer on the upper surface of the glass wiring substrate 160 (the third process of the second embodiment) will be described. The third process of the second embodiment is to arrange resin members on the first surface of each of the plurality of wiring substrates (glass wiring substrates 160) and on the upper surface of the low water absorption resin 24, and to form the first wiring layer on the first surface of each of the plurality of wiring substrates. Figure 29 is a cross-sectional view illustrating the process of forming the first wiring layer 21 in the manufacturing method according to the second embodiment. By arranging the resin members as shown in Figure 29, an insulating resin layer 25 is formed on the upper surface of the low water absorption resin 24 and on the upper surface of the glass wiring substrate 160, and the first wiring layer 21 is formed.

[0099] (Peeling off the third support) Next, with reference to Figure 30, the step of peeling off the third support 73 (the fourth step of the second embodiment) will be described. The fourth step of the second embodiment is the step of peeling off the support (third support 73) from the plurality of wiring substrates (glass wiring substrates 160). The peeling step of the third support 73 is performed after the first wiring layer 21 formation step. Figure 30 is a cross-sectional view illustrating the peeling step of the third support 73 in the manufacturing method according to the second embodiment. As shown in Figure 30, the interface between the glass wiring substrate 160 and the third support 73 is peeled off, and the third support 73 and the third adhesive layer 74 (not shown) are separated.

[0100] When separating the third support 73 from the glass wiring substrate 160, an appropriate peeling method can be selected from UV light irradiation, heat treatment, physical peeling, etc., depending on the material used for the third adhesive layer 74 (not shown). Furthermore, if a residue of the third adhesive layer 74 (not shown) remains at the bonding surface between the glass wiring substrate 160 and the third adhesive layer 74 (not shown), plasma cleaning, ultrasonic cleaning, water washing, solvent cleaning using alcohol, etc., may be performed.

[0101] (Formation of the second wiring layer) Next, with reference to Figure 31, the step of forming a second wiring layer on the lower surface side of the glass wiring substrate 160 (the fifth step of the second embodiment) will be described. The fifth step of the second embodiment is the step of arranging a resin member of the same type as the resin member on the second surface side of each of the plurality of wiring substrates (glass wiring substrates 160) and on the lower surface of the low water absorption resin 24, thereby forming a second wiring layer 22 on the second surface of each of the plurality of wiring substrates. Figure 31 is a cross-sectional view illustrating the process of forming the second wiring layer 22 in the manufacturing method according to the second embodiment. As shown in Figure 31, an insulating resin layer 25 is formed on the lower surface of the low water absorption resin 24 and on the lower surface of the glass wiring substrate 160. As a result, a glass wiring substrate 160 is obtained in which the first wiring layer 21 is formed on the first surface 160a side and the second wiring layer 22 is formed on the second surface 160b side, as shown in Figure 31.

[0102] (Formation of Build-Up Layer) Next, with reference to Figure 32, the process of forming a build-up layer, in other words, a layer in which the first wiring layer 21 and the second wiring layer 22 are stacked, will be described. Figure 32 is a cross-sectional view illustrating the build-up layer formation process in the manufacturing method according to the second embodiment. The build-up layer formation process is substantially the same as the build-up layer formation process in the first manufacturing method shown in Figure 20, etc. As shown in Figure 32, a conductive electrode 31 for making the first wiring layer 21 on the first surface 160a side and a conductive electrode 32 for making the second wiring layer 22 on the second surface 160b side are formed on the first wiring layer 21 on the first surface 160a side and the second wiring layer 22 on the second surface 160b side of the glass wiring substrate 160. The conductive electrodes 31 and 32 are formed by first forming vias in the insulating resin layer 25 with a laser, then forming a seed layer on the vias, and then using a semi-additive process (i.e., a series of processes including resist pattern formation, plating, resist stripping, seed layer removal, and insulating resin layer formation). The first wiring layer 21 and the second wiring layer 22 are stacked in layers of at least one, and the number of layers can be set as needed. In Figure 32, both the first wiring layer 21 and the second wiring layer 22 are stacked in layers of two.

[0103] Furthermore, it is preferable to use pulsed lasers such as carbon dioxide lasers or UV-YAG lasers for forming the conductive electrodes 31 and 32, and lasers with a pulse width on the order of microseconds are suitable.

[0104] (Formation of connection pads) Next, the process of forming connection pads will be described with reference to Figure 33. Figure 33 is a diagram illustrating the process of forming connection pads in the manufacturing method according to the second embodiment. The process of forming connection pads is substantially the same as the process of forming connection pads in the first manufacturing method shown in Figure 21, etc. As shown in Figure 33, after forming an outer protective film such as solder resist 55 on the first wiring layer 21 and the second wiring layer 22, a bonding pad 51 for semiconductor elements is formed on the first wiring layer 21 and a bonding pad 53 for the substrate is formed on the second wiring layer 22. Surface treatment such as Ni / Au, Ni / Pd / Au, IT, OSP (water-soluble preflux) is applied to the bonding pad 51 for semiconductor elements and the bonding pad 53 for the substrate, and if necessary, bonding solder for semiconductor elements 52 and bonding solder for the substrate 54 are formed to complete the multilayer wiring substrate. Note that Ni / Au means that both Ni and Au are used, and Ni / Pd / Au means that any of Ni, Pd, and Au are used.

[0105] The structure shown in Figure 33 can also be described as a multilayer wiring base substrate as an intermediate product of the multilayer wiring board 1. That is, the multilayer wiring base substrate comprises a base substrate having a first surface 160a and a second surface 160b, at least one first wiring layer region which includes a wiring layer (first wiring layer 21) formed on the first surface 160a, at least one second wiring layer region which includes a wiring layer (second wiring layer 22) formed on the second surface 160b, a separation groove 117 that penetrates from the first surface 160a to the second surface 160b and separates at least one multilayer wiring board 1 including the first wiring layer region and the second wiring layer region into individual pieces, and a low water absorption resin 24 arranged in the separation groove 117 to bond adjacent multilayer wiring boards together. In the xy plane, the multilayer wiring substrate 1 has a rectangular shape, as shown in Figures 5 and 10, for example. The first wiring layer region and the second wiring layer region are regions that have the same rectangular shape as the multilayer wiring substrate 1.

[0106] (Individualization) Next, with reference to Figures 34 and 35, the process of individualizing the multilayer wiring board (the sixth step of the second embodiment) will be described. The sixth step is to separate the multiple multilayer wiring boards (glass wiring boards 160) by individualizing them according to the separation grooves 117. Figure 34 is a cross-sectional view illustrating the individualization step in the manufacturing method according to the second embodiment. For individualization of the multilayer wiring board, as shown in Figure 34, individualization is performed along the individualization line of the separation grooves 117. Figure 34 shows a case where blade dicing using a blade 72 is assumed, but in addition to blade dicing, lasers, scribes, etc. may also be used. Alternatively, blade dicing, lasers, and scribes may be combined to individualize the boards.

[0107] Figure 35 shows individualized multilayer wiring boards 1 manufactured in the second manufacturing method. ２ This is a cross-sectional view showing the multilayer wiring board 1. ２ This differs in that the shape of the side surface 160c (the part enclosed by the dotted line) of the glass wiring substrate 160, which is the core substrate, does not have a shape that is inclined at an angle θ1, like the side surface 10c of the core substrate 10 of the multilayer wiring substrate 1 in the first manufacturing method. In other respects, the multilayer wiring substrate 1 ２ It has substantially the same structure as the multilayer wiring board 1.

[0108] (Flowchart of the manufacturing method according to the second embodiment) The steps described above are summarized in the flowchart. Figure 36 is a flowchart of the manufacturing method according to the second embodiment. Step S21 is the bonding step of the third support 73. Multiple glass wiring substrates 160 are bonded to the third support 73. Step S22 is the placement step of the low water absorption resin. The low water absorption resin 24 is placed in the separation grooves 117 formed from each side surface of the multiple glass wiring substrates 160 and the upper surface of the third support 73. Step S23 is the formation step of the first wiring layer. An insulating resin layer 25 is formed on the upper surface of the low water absorption resin 24 and the upper surface of the glass wiring substrate 160 to form the first wiring layer 21. Step S24 is the peeling step of the third support. The interface between the glass wiring substrate 160 and the third support 73 is peeled off, separating the third support 73 and the third adhesive layer 74. Step S25 is the formation step of the second wiring layer. An insulating resin layer 25 is formed on the lower surface of the low water absorption resin 24 and the lower surface of the glass wiring substrate 160, and a second wiring layer 22 is formed. Step S26 is a build-up layer formation step. Electrodes and wiring are formed on the first wiring layer 21 and the second wiring layer 22. Step S27 is a connection pad formation step. After forming a protective film on the first wiring layer 21 and the second wiring layer 22, a connection pad is formed. Step S28 is a dicing step. Dicing is performed according to the separation groove 117, and a multilayer wiring substrate 1 ２ Separate them.

[0109] <Second Modification> Next, the manufacturing method of the second modification, which is a modification of the second embodiment, will be described with reference to Figure 37. The second modification differs from the second embodiment in that, in the process of forming the first insulating resin layer, a resin layer equivalent to the insulating resin layer 25 in the second embodiment is formed using a low water absorption resin 24. In the following description, basically the same reference numerals are used for components that are the same or equivalent as those in the first and second embodiments described above, but different reference numerals may be used to clarify the differences from the manufacturing methods according to the first and second embodiments. In addition, the description of components that are the same or equivalent as those in the first and second embodiments may be simplified or omitted.

[0110] (Formation of the first wiring layer) Referring to Figure 37, the process of forming the first wiring layer on the upper surface of the glass wiring substrate 160 will be described. Figure 37 is a cross-sectional view illustrating the process of forming the first wiring layer 21a in the manufacturing method according to the second modified example. Figure 37 shows the process corresponding to Figures 28 and 29 of the manufacturing method of the second embodiment. The process up to Figures 26 and 27 of the second embodiment can also be applied to the second modified example. As shown in Figure 37, the low water absorption resin 24 is placed on the separation groove 117 and the upper surface of the glass wiring substrate 160. The low water absorption resin 24 is placed in the recess of the separation groove 117, and the first wiring layer 21a including the low water absorption resin 24 is formed on the upper surface of the glass wiring substrate 160.

[0111] In the second modified example, the low water absorption resin 24 is made of a material having the same insulation performance and mechanical properties as the resin material constituting the insulating resin layer 25 of the second embodiment. As a method for forming the low water absorption resin 24, for example, a film-like organic resin is formed in the separation groove 17 by lamination. Furthermore, in the second embodiment, the two steps of placing the low water absorption resin 24 and forming the first wiring layer were performed sequentially, but in the second modified example, the two steps of placing the low water absorption resin 24 and forming the first wiring layer can be performed at once, making it possible to reduce the manufacturing process and manufacturing costs of the multilayer wiring board.

[0112] In the example shown herein, the separation groove 117 and the low water absorption resin 24 placed in the first wiring layer 21a are assumed to be made of the same material, but this disclosure is not limited to this. Different low water absorption resin materials may be used for the separation groove 117 and the first wiring layer 21a. In this case, the low water absorption resin placement step and the first wiring layer formation step are performed in order, similar to the second embodiment.

[0113] (Flowchart of the manufacturing method according to the second modified example) Figure 38 is a flowchart of the manufacturing method according to the second modified example. The differences between the second modified example and the second embodiment are as follows: In the second embodiment, as shown in Figure 28, after placing the low water absorption resin 24 in the separation groove 117, an insulating resin layer 25 is formed on the upper surface of the low water absorption resin 24 and the upper surface of the glass wiring substrate 160 to form the first wiring layer 21a (steps S22 and S23 in Figure 36). On the other hand, in the second modified example, as shown in Figure 38, in the process of forming the first wiring layer 21a, the placement of the low water absorption resin 24 in the separation groove 117 and the placement of the low water absorption resin 24 on the upper surface of the glass wiring substrate 160 are carried out at the same time (step S23a in Figure 38). In the flowchart of the second modified example shown in Figure 38, the bonding process of the third support (step S21) is the same as step S21 of the second embodiment shown in Figure 36. Furthermore, the steps from the peeling step of the third support shown in Figure 38 (steps S24 to S28) are the same as steps S24 to S28 of the manufacturing method according to the second embodiment shown in Figure 36.

[0114] <Effects and Effects> According to the second embodiment and second modified example of the present invention, even when the core substrate is thick in a high humidity environment, damage to the core substrate is avoided by protecting the side surface of the core substrate of the multilayer wiring board (side surface 160c of the glass wiring board 160), thereby preventing damage to the core substrate. ２ This makes it possible to ensure the reliability of the multilayer wiring substrate 1. ２ This makes it possible to reduce the manufacturing process and costs.

[0115] <First Embodiment, First Modification, Second Embodiment, Example relating to the Second Modification, Comparative Example> Next, the reliability of the multilayer wiring boards corresponding to the above embodiments and modifications was evaluated. For the examples and comparative examples, the side surface 10c of the core substrate 10 of the multilayer wiring board 1 (or multilayer wiring board 1) ２The mounting process was carried out so that the presence or absence of the low water absorption resin 24 on the side surface 160c of the glass wiring substrate 160 could be distinguished, and a temperature cycle test was performed. Table 1 shows the manufacturing conditions (presence or absence of separation grooves and method of forming separation grooves) of the examples and comparative examples, the overlap rate of through holes, the spacing of ridges and PV, items related to separation grooves (opening width, processing width of the bottom, opening width / processing width of the bottom (average)), the resin thickness of the low water absorption resin placed on the side surface of the core substrate, the water absorption rate of the low water absorption resin, and the results of the temperature cycle test. Here, regarding the item "Method of forming separation grooves", (laser modification + hydrofluoric acid etching) corresponds to the manufacturing method of the first embodiment and the first modified example, and (substrate arrangement) corresponds to the manufacturing method of the second embodiment and the second modified example.

[0116] Regarding the item "overlap rate," in Examples 1 to 3, the processing pitch of the laser-modified section was changed so that the overlap rate of the through-holes 11 in the glass substrate 60 formed by hydrofluoric acid etching was 40%, 65%, and 90%, respectively. Here, Figure 39 is a diagram illustrating the overlap rate of the laser-modified section 65 and the through-holes 11. The overlap rate, as shown in Figure 39, indicates the proportion to which the through-holes 11 overlap with adjacent through-holes 11 when the laser-modified section 65 is removed by hydrofluoric acid etching and the through-holes 11 are formed. A higher overlap rate indicates a higher proportion of the through-holes 11 overlapping with adjacent through-holes 11. Figure 39(a) shows the case where there are two laser-modified sections, and Figure 39(b) shows the case where multiple laser-modified sections are formed and a separation groove 17 is formed. As shown in Figure 39(a), in the separation groove 17, through-holes 11-1 are formed for the laser-modified section 65-1, and through-holes 11-2 are formed for the laser-modified section 65-2. The overlapping region between through-holes 11-1 and 11-2 is defined as DR. The overlap ratio corresponds to the size of the overlapping region DR relative to the size of through-hole 11-1 or through-hole 11-2. As shown in Figure 39(b), the separation groove 17 is formed by the formation of multiple laser-modified sections 65 and through-holes 11.

[0117] Furthermore, regarding the item "Water absorption rate of low water absorption resin," Examples 1 to 4 show multilayer wiring boards formed using multiple types of low water absorption resins, resulting in three water absorption rates: 0.05%, 0.3%, and 0.6%. The water absorption rate can be measured by the gravimetric method described in JIS C6481:1996. As a method for preparing a sample for measuring the water absorption rate, for example, first, the low water absorption resin used in each multilayer wiring board is placed on a carrier or printed circuit board, and curing and film formation are performed under the same conditions as the original low water absorption resin filling and curing process. After that, the carrier or printed circuit board is peeled off to obtain a plate-shaped low water absorption resin. The obtained plate-shaped low water absorption resin is used as a sample for measuring the water absorption rate.

[0118] Examples 1 to 3 correspond to the multilayer wiring board 1 shown in Figure 1. In Comparative Example 1, the processing pitch of the laser-modified portion in the separation groove 17 was set to a larger value compared to Examples 1 to 3, and processing was carried out so that the overlap rate of the through holes 11 formed by hydrofluoric acid etching was 30%. In Comparative Examples 2 and 3, processing was carried out with the same overlap rate as in Example 2, and a multilayer wiring board 1t was manufactured using a material in which the water absorption rate of the low water absorption resin 24 deviated from that of Examples 1 to 3.

[0119] Furthermore, Example 4 and Comparative Example 4 are multilayer wiring boards 1 shown in Figure 35. ２ This method addresses the following cases: in all cases, a glass wiring substrate 160 is created, bonded to a support, a multilayer wiring substrate structure is created, and then dicing is performed to create individual pieces.

[0120] In Table 1, the items "Opening Width," "Bottom Processing Width," "Bottom Processing Width / Opening Width (Average)," and "Core Substrate Side Resin Width (Average)" show the average values ​​and variations of the opening width at the top of the divided groove, the processing width at the bottom, the average value of the bottom processing width / top opening width, and the average value of the resin thickness on the side of the core substrate, when the upper opening width of the divided groove (opening width of the opening on the second surface side) was processed to be 300 μm. As an example of the measurement method, the side and top surfaces of the core substrate after hydrofluoric acid etching or fragmentation were observed using an SEM (scanning electron microscope), and each characteristic value was measured at an arbitrary location with a sample size of n=20 or more, and the average value was calculated. In addition, the items "Edge Spacing (Average)" and "Edge PV (Average)" show the values ​​measured for the edges that occur perpendicular to the first surface 10a and the second surface 10b of the core substrate 10. From Table 1, it can be seen that the edge spacing widens as the overlap rate decreases. Note that the item "Average resin width on the side of the core substrate" corresponds to the thickness wi in Figure 1 for Examples 1-3 and Comparative Examples 1-3, and to the thickness w2 in Figure 35 for Example 4 and Comparative Example 4.

[0121]

[0122] The smoothness of the separation grooves shown in Table 1 is explained below. As shown in Table 1, it can be seen that as the overlap rate and the spacing between ridges increase, the average machining width at the bottom decreases and the variation (standard deviation) σ increases. Furthermore, it was confirmed that as the overlap rate and the spacing between ridges increase, the PV of the ridges increases and the side surface of the separation groove becomes rougher. From the above, it is suggested that setting a wide overlap rate and ridge spacing makes the side surface of the separation groove rougher and reduces the smoothness of the side surface of the separation groove.

[0123] Next, the results of the temperature cycling test will be described. Generally, the occurrence of μ cracks is particularly noticeable when stress accumulates, especially when there is a large difference in the coefficient of linear expansion between the glass substrate (core substrate 10 or glass wiring substrate 160) and the wiring layer, or when there is a large temperature change. Therefore, in this disclosure, the quality of the multilayer wiring substrate was confirmed using a temperature cycling test. Furthermore, since μ cracks are affected by moisture in the atmosphere and the insulating resin layer 25, and are one of the causes of cracking of the glass substrate, the multilayer wiring substrate was held in a high-humidity environment before the temperature cycling test, and a moisture absorption treatment was performed on the glass substrate before the temperature cycling test was conducted.

[0124] As shown in Table 1, Comparative Example 1 passed the temperature cycling test up to 500 cycles, but cracks occurred after 600 cycles, resulting in failure. In Comparative Example 2, delamination occurred at the interface between the side surface of the core substrate and the low water absorption resin after 50 cycles, resulting in failure of the temperature cycling test. In Comparative Example 3, the temperature cycling test passed up to 1000 cycles, but cracks occurred after 1500 cycles, resulting in failure. In Comparative Example 4, cracks occurred after 50 cycles, resulting in failure of the temperature cycling test. In cases of failure, defects such as the occurrence of minute cracks and delamination at the interface between the side surface of the glass wiring substrate and the low water absorption resin were confirmed.

[0125] Furthermore, Examples 1, 2, 3, and 4 were able to pass the temperature cycling test even at 2000 cycles. In Comparative Example 1, separation grooves were formed in the same way as in Examples 1 to 3, but as shown in Table 1, the PV of the ridges was large. For this reason, for example, when dicing along the separation grooves to create individual pieces, the dicing blade partially contacted the glass substrate 60, causing grinding marks on the glass substrate 60, and as a result, microcracks were generated, which is thought to have caused the material to fail the temperature cycling test.

[0126] The dicing process along the separation groove, high humidity storage conditions, temperature cycle test conditions, and evaluation method are as follows: <Dicing Process> Blade used: R07-SD600-BB200-75 54 x 0.15A2 x 40 Equipment used: DAD322 <High Humidity Holding Conditions> Holding conditions: Temperature 60°C, humidity 60%RH, holding time: 40 hours <Temperature Cycle Test> Test conditions: A change from -55°C, RT (room temperature), to 125°C is considered one cycle, and each temperature is held for 30 minutes, and the cycle is repeated up to 2000 times. Observation method: The side surface of the substrate is observed with a metallurgical microscope at x100 and x500 magnification to evaluate whether or not there is fracture of the glass substrate and whether or not there is delamination at the interface between the low water absorption resin and the glass substrate.

[0127] From the above considerations, it was found that, with respect to the separation grooves and through holes, it is desirable that the overlap rate be in the range of 40% to 90%, the thickness of the low water absorption resin 24 on the side surface 10c of the core substrate 10 be 52.8 μm or more, the processing width / opening width of the bottom be in the range of 0.88 or more, the PV of the vertical or horizontal ridges be in the range of 1.8 μm to 10.6 μm, and the water absorption rate of the low water absorption resin 24 be in the range of 0.05% to 0.6%.

[0128] <Third Embodiment> The third embodiment differs from the above embodiments and modifications in that an inductor is formed in the first wiring layer. Figure 40 is a cross-sectional view showing a multilayer wiring board 100 according to the third embodiment. Figure 40(a) shows an overall cross-sectional view of the multilayer wiring board 100, and Figure 40(b) is a perspective view of a circuit element in the portion cl enclosed by the dashed line in Figure 40(a). In the following description, components that are the same or equivalent as those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0129] As shown in Figure 40(a), the first wiring layer 121 is composed of three wiring layers, and the second wiring layer 122 is also composed of three wiring layers. Furthermore, as shown in Figure 40(b), adjacent conductive electrodes 31 are connected via wiring 16 to form a coil. The coil is connected, for example, to a capacitor electrode 13 to exhibit the characteristics of an LC circuit.

[0130] As for the manufacturing method, for example, the manufacturing method of the first embodiment can be applied. The modification is that in the first wiring layer formation step (step S3 in Figure 23) and the build-up layer formation step (step S11 in Figure 23), the arrangement of the conductive electrodes 31 and the wiring 16 is set to form an inductor.

[0131] <Effects and Benefits> By protecting the sides of the core substrate 10 of the multilayer wiring board 100 with a low water absorption resin 24, damage to the core substrate 10 can be prevented even in high humidity environments, thereby ensuring the reliability of the multilayer wiring board. Furthermore, since the inductor is provided within the multilayer wiring board 100, the wiring distance can be shortened, and good transmission characteristics can be obtained.

[0132] <Fourth Embodiment> The fourth embodiment differs from the above embodiments and modifications in that the inside of the through electrode 12 is filled with a conductive material. Figure 41 is an enlarged cross-sectional view showing the structure of the through electrode in the multilayer wiring board according to the fourth embodiment. In the following description, the same or equivalent components as those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0133] The through electrode 120 is filled with a conductive material. The capacitor electrode 13 is positioned above the through electrode 120. As for the manufacturing method, for example, the manufacturing method of the first embodiment can be applied. The modification is that in the through electrode formation process (step S8 in Figure 23), the through hole 11 is filled with a conductive material.

[0134] <Effects and Effects> By creating a structure in which the through-hole electrode 120 is filled with a conductive material, the capacitor electrode 13 can be formed near the through-hole 11 or above the through-hole 11, in other words, without being restricted by the position of the through-hole 11. As in the fourth embodiment, it is also possible to provide the capacitor electrode 13 directly above the through-hole 11. This makes it possible to shorten the transmission distance to the capacitor and avoid a decrease in transmission characteristics. Furthermore, by forming a lower electrode layer when forming the capacitor electrode 13, it is possible to reduce variations in capacitor capacitance.

[0135] <Fifth Embodiment> The fifth embodiment differs from the above embodiments and modifications in that a hydrofluoric acid-resistant metal layer is used. Figure 42 is a cross-sectional view showing a multilayer wiring board 200 according to the fifth embodiment. Figure 42(a) shows an overall cross-sectional view of the multilayer wiring board, and Figure 42(b) is a cross-sectional view showing an enlarged view of the through-electrode structure. In the following description, components that are the same or equivalent as those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0136] The hydrofluoric acid-resistant metal layer 15 is placed between the glass substrate 60 and the seed layer. The hydrofluoric acid-resistant metal layer 15 is a metal layer containing at least one of chromium or nickel, and is formed by sputtering in a range of 10 nm to 1,000 nm.

[0137] As for the manufacturing method, for example, the manufacturing method of the first embodiment can be applied. The modification is that in the process of forming the first wiring layer (step S3 in Figure 23), a hydrofluoric acid-resistant metal layer 15 is formed as a seed layer. When the hydrofluoric acid-resistant metal layer 15 is used, the hydrofluoric acid-resistant metal layer 15 is exposed in addition to the insulating resin layer 25 shown in Figure 14.

[0138] <Effects and Effects> When forming the through-hole 11 shown in Figure 9 by hydrofluoric acid etching, it is necessary to appropriately control the etching amount so that etching stops on the 60a side of the glass substrate 60. On the other hand, in the fifth embodiment, since the hydrofluoric acid-resistant metal layer 15 is provided, etching stops at the hydrofluoric acid-resistant metal layer 15, making it possible to form a through-hole 11 with the desired shape without strictly controlling the etching amount.

[0139] <Sixth Embodiment> In the sixth embodiment, the intermediate product is treated as a multilayer wiring base substrate, which is the base substrate of the multilayer wiring board. Figure 43 is a schematic perspective view of the multilayer wiring board 1. Figure 44 is a schematic view of the multilayer wiring base substrate. In the following description, components that are the same as or equivalent to those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0140] Figure 43(a) shows a perspective view of the multilayer wiring board 1, and Figure 43(b) shows a perspective view of the core substrate 10 included in the multilayer wiring board 1. Figure 43 is a perspective view of the multilayer wiring board 1 of Figure 1, but for ease of understanding, the outlines of the core substrate 10, the first wiring layer 21, the second wiring layer 22, and the low water absorption resin 24 are schematically shown.

[0141] Furthermore, as shown in Figure 42(b), the core substrate 10 has a first surface 10a, a second surface 10b facing the first surface 10a, and a side surface 10c connecting the peripheral edge of the first surface 10a and the peripheral edge of the second surface 10b. The first surface 10a and the second surface 10b are parallel surfaces and are surrounded by the side surface 10c that connects the outer periphery (periphery) of the first surface 10a and the outer periphery (periphery) of the second surface 10b. Although the side surface 10c is described as being a flat surface, it may not be flat because it is a part formed by etching the separation groove 17 and a side surface of the fragmented glass wiring substrate.

[0142] Figure 44 is a perspective view of the structure shown in Figure 21. For ease of understanding, Figure 44 omits the configuration of connection pads, etc. It shows a structure that includes three parts corresponding to multilayer wiring boards 1. The multilayer wiring board 1 corresponds to the area enclosed by the dashed line, and in the zy plane, it is divided into the first wiring layer 21, the second wiring layer 22, and the core substrate 10, which are surrounded by the separation groove 17. In Figure 44, three parts corresponding to multilayer wiring boards 1 are shown, but the xy plane contains multiple parts corresponding to multilayer wiring boards. One of the multilayer wiring boards is indicated by an outline.

[0143] Furthermore, the structure shown in Figure 21 can also be described as a multilayer wiring base substrate as an intermediate product of the multilayer wiring board 1. That is, the multilayer wiring base substrate has a first surface 10a and a second surface 10b, and is a multilayer wiring base substrate containing a plurality of multilayer wiring boards, and has a first wiring layer which is a wiring layer formed on the first surface 10a, a second wiring layer which is a wiring layer formed on the second surface 10b, and separation grooves 17 used to separate the plurality of multilayer wiring boards into individual pieces, and the separation grooves 17 are filled with a low water absorption resin 24.

[0144] The scope of the present invention is not limited to the illustrative and described embodiments, but includes various modifications. For example, the above embodiments are described in detail for the purpose of clearly illustrating the present invention and are not necessarily limited to those having all the configurations described. Furthermore, it is possible to replace parts of the configuration of one embodiment with those of another embodiment, and to add configurations from other embodiments to the configuration of one embodiment. In addition, it is possible to add, delete, or replace parts of the configuration of each embodiment with those of other embodiments. Moreover, the scope also includes all embodiments that produce effects equivalent to those aimed at by the present invention.

[0145] For example, this disclosure shows the formation of through holes and separation grooves, but is not limited thereto. For example, through holes may not be formed, and only separation grooves may be formed.

[0146] The following describes embodiments that may constitute the present invention, but are not limited thereto. (Embodiment 1) A multilayer wiring substrate having a core substrate which is a glass substrate having a first surface, a second surface facing the first surface, and a side surface connecting the peripheral edge of the first surface and the peripheral edge of the second surface, a first wiring layer which is a wiring layer formed on the first surface, and a second wiring layer which is a wiring layer formed on the second surface, wherein the side surface is covered with a low water absorption resin having a water absorption rate of 0.05% or more and 0.6% or less. (Embodiment 2) The multilayer wiring substrate according to Embodiment 1, further comprising a seed layer and through electrodes which allow conductivity between the first surface and the second surface through through holes. (Embodiment 3) The multilayer wiring substrate according to Embodiment 1 or Embodiment 2, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the insulating resin layer is made of the same type of resin material as the resin material that constitutes the low water absorption resin covering the side surface. (Aspect 4) The multilayer wiring substrate according to any one of aspects 1 to 3, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the insulating resin layer is made of a different type of resin material than the resin material constituting the low water absorption resin covering the side surface. (Aspect 5) The multilayer wiring substrate according to any one of aspects 1 to 4, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the filler filling rate of the resin material constituting the low water absorption resin covering the side surface is higher than the filler filling rate of the resin material constituting the insulating resin layer. (Aspect 6) The multilayer wiring substrate according to any one of aspects 1 to 5, wherein the thickness of the low water absorption resin covering the side surface of the core substrate is 50 μm or more, the thickness of the core substrate is in the range of 50 μm or more and 2000 μm or less, and the low water absorption resin has a relative permittivity in the range of 3.1 or more and 3.5 or less, and a dielectric loss tangent in the range of 0.002 or more and 0.012 or less. (Aspect 7) The multilayer wiring board according to any one of aspects 1 to 6, wherein the side surface of the core substrate has a plurality of substantially rectangular recesses consisting of a plurality of vertical and horizontal edges, the horizontal dimension of the substantially rectangular surface is 5 μm or more and 20 μm or less, and the vertical dimension is 2 μm or more and 25 μm or less.(Aspect 8) The multilayer wiring board according to any one of aspects 1 to 7, wherein the PV of the vertical ridge or the horizontal ridge is 1.8 μm or more and 10.6 μm or less. (Aspect 9) The multilayer wiring board according to any one of aspects 1 to 8, wherein the depth of the plurality of recesses is 0.5 μm or more and 11 μm or less. (Aspect 10) The multilayer wiring board according to any one of aspects 1 to 9, wherein the thickness of the low water absorption resin on the side surface of the core substrate is 52.8 μm or more. (Aspect 11) The multilayer wiring board according to any one of aspects 1 to 10, wherein the side surface of the core substrate is an etched surface. (Aspect 12) A manufacturing method for manufacturing a multilayer wiring board using a base material substrate having a first surface and a second surface facing the first surface, comprising: a first step of bonding a support to the second surface of the base material substrate; a second step of irradiating a laser from the first surface side of the base material substrate to form a modified portion at a through-hole position which is the position where a through-hole penetrating from the first surface to the second surface is formed, and at a fragmentation line position which indicates the position of a separation groove for separating the multilayer wiring board from the base material substrate; a third step of forming a first conductive portion on the first surface side, arranging a resin member, and forming a first wiring layer; a fourth step of peeling the support from the base material substrate; a fifth step of removing the modified portion by etching from the second surface side to form the through-hole and the separation groove; a sixth step of introducing a conductive member into the through-hole from the second surface side to form a through electrode that connects the first conductive portion and the second surface; and a seventh step of arranging a low water absorption resin in the separation groove. A method for manufacturing a multilayer wiring substrate, comprising: an eighth step of arranging a resin member of the same type as the resin member on the second surface and the upper surface of the low water absorption resin, and forming a second wiring layer on the second surface; and a ninth step of separating the multilayer wiring substrate by separating it into individual pieces according to the separation grooves.(Aspect 13) A manufacturing method for manufacturing a multilayer wiring board using a base material substrate having a first surface and a second surface opposite to the first surface, comprising: a first step of bonding a plurality of wiring boards, each of which is a wiring board in which a first conductive portion is formed on the first surface of the base material substrate and a second conductive portion is formed on the second surface, and the first conductive portion, the second conductive portion, and a part of the base material substrate are separated, to a support from the second surface side; a second step of placing a low water absorption resin in a separation groove which is a space formed between each side surface of the plurality of wiring boards and the support; a third step of placing a resin member on the first surface side of each of the plurality of wiring boards and the upper surface of the low water absorption resin, and forming a first wiring layer on the first surface of each of the plurality of wiring boards; and a fourth step of peeling the support from the plurality of wiring boards. A method for manufacturing a multilayer wiring board, comprising: a fifth step of arranging a resin member of the same type as the resin member on the second surface side of each of the plurality of wiring boards and on the lower surface of the low water absorption resin, and forming a second wiring layer on the second surface of each of the plurality of wiring boards; and a sixth step of separating the plurality of multilayer wiring boards by separating them into individual pieces according to the separation grooves. (Aspect 14) A method for manufacturing a multilayer wiring board according to aspect 12 or aspect 13, wherein the sides of the individualized multilayer wiring boards are covered with the low water absorption resin. (Aspect 15) A method for manufacturing a multilayer wiring board according to any one of aspects 12 to 14, wherein the thickness of the base material substrate included in the multilayer wiring board is in the range of 50 μm or more and 2000 μm or less, the thickness of the low water absorption resin covering the side surface of the multilayer wiring board is 50 μm or more, the low water absorption resin has a relative permittivity in the range of 3.1 or more and 3.5 or less, a dielectric loss tangent in the range of 0.002 or more and 0.012 or less, and a water absorption rate in the range of 0.05% or more and 0.6% or less. (Aspect 16) A method for manufacturing a multilayer wiring board according to any one of aspects 12 to 15, wherein the overlap rate of the through holes is 40% or more and 90% or less. (Aspect 17) A method for manufacturing a multilayer wiring board according to any one of aspects 12 to 16, wherein the processing width / opening width of the bottom of the separation groove is 0.88 or more.(Aspect 18) A multilayer wiring base substrate having a first surface and a second surface; at least one first wiring layer region which includes a wiring layer formed on the first surface; at least one second wiring layer region which includes a wiring layer formed on the second surface; a separation groove which penetrates from the first surface to the second surface and separates at least one multilayer wiring substrate including the first wiring layer region and the second wiring layer region; and a low water absorption resin which is disposed in the separation groove and connects adjacent multilayer wiring substrates. (Aspect 19) A multilayer wiring base substrate having a first surface and a second surface and including a plurality of multilayer wiring substrates, comprising a first wiring layer which is a wiring layer formed on the first surface; a second wiring layer which is a wiring layer formed on the second surface; and a separation groove used to separate the plurality of multilayer wiring substrates, wherein the separation groove is filled with a low water absorption resin.

[0147] 1, 1 ２ ,100,200: Multilayer wiring board, 10: Core substrate, 11,11-1,11-2: Through holes, 12,120: Through electrodes, 13: Capacitor electrodes, 14: Dielectric layer, 15: Hydrofluoric acid resistant metal layer, 16: Wiring, 17: Separation groove, 17T: Opening width of separation groove, 17B: Processing width of the bottom of separation groove, 21,121,21a: First wiring layer, 22,122: Second wiring layer, 24: Low water absorption resin, 25: Insulating resin layer, 31,32: Conductive electrodes, 41,42: Through electrode connection part, 51: Semiconductor element 52: Bonding pad for sub-devices, 53: Bonding pad for substrates, 54: Bonding solder for substrates, 55: Solder resist, 60: Glass substrate, 61: First support, 62: First adhesive layer, 63, 75: Laminated structure, 65, 65-1, 65-2: Laser modified section, 65T: Transfer mark of laser modified section, 70: Second support, 71: Second adhesive layer, 72: Blade, 73: Third support, 74: Third adhesive layer, 75: Laminated structure, 76: Recess, 160: Glass wiring base substrate

Claims

1. A multilayer wiring substrate comprising: a core substrate which is a glass substrate having a first surface, a second surface facing the first surface, and a side surface connecting the peripheral edge of the first surface and the peripheral edge of the second surface; a first wiring layer which is a wiring layer formed on the first surface; and a second wiring layer which is a wiring layer formed on the second surface, wherein the side surface is covered with a low water absorption resin having a water absorption rate of 0.05% or more and 0.6% or less.

2. The multilayer wiring board according to claim 1, wherein the multilayer wiring board includes a seed layer and further has through electrodes that provide electrical conductivity between the first surface and the second surface through through holes.

3. The multilayer wiring substrate according to claim 1, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the insulating resin layer is made of the same type of resin material as the resin material that constitutes the low water absorption resin covering the side surface.

4. The multilayer wiring substrate according to claim 1, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the insulating resin layer is made of a different type of resin material from the resin material constituting the low water absorption resin covering the side surface.

5. The multilayer wiring substrate according to claim 1, wherein the first wiring layer and the second wiring layer include an insulating resin layer, and the filler filling rate of the resin material constituting the low water absorption resin covering the side surface is higher than the filler filling rate of the resin material constituting the insulating resin layer.

6. A multilayer wiring substrate according to any one of claims 3 to 5, wherein the thickness of the low water absorption resin covering the side surface of the core substrate is 50 μm or more, the thickness of the core substrate is in the range of 50 μm to 2000 μm, and the low water absorption resin has a relative permittivity in the range of 3.1 to 3.5 and a dielectric loss tangent in the range of 0.002 to 0.

012.

7. The multilayer wiring board according to claim 1, wherein the side surface of the core substrate has a plurality of substantially rectangular recesses formed by a plurality of vertical and horizontal edges, the lateral dimension of the substantially rectangular surface is 5 μm or more and 20 μm or less, and the vertical dimension is 2 μm or more and 25 μm or less.

8. The multilayer wiring board according to claim 7, wherein the PV of the longitudinal ridge or the transverse ridge is 1.8 μm or more and 10.6 μm or less.

9. The multilayer wiring board according to claim 7, wherein the depth of the plurality of recesses is 0.5 μm or more and 11 μm or less.

10. The multilayer wiring substrate according to claim 1, wherein the thickness of the low water absorption resin on the side surface of the core substrate is 52.8 μm or more.

11. The multilayer wiring board according to claim 1, wherein the side surface of the core substrate is an etched surface.

12. A manufacturing method for a multilayer wiring board using a base material substrate having a first surface and a second surface facing the first surface, comprising: a first step of bonding a support to the second surface of the base material substrate; a second step of irradiating a laser from the first surface side of the base material substrate to form a modified portion at a through-hole position which is the position where a through-hole penetrating from the first surface to the second surface is formed, and at a fragmentation line position which indicates the position of a separation groove for separating the multilayer wiring board from the base material substrate; a third step of forming a first conductive portion on the first surface side, arranging a resin member, and forming a first wiring layer; a fourth step of peeling the support from the base material substrate; a fifth step of removing the modified portion by etching from the second surface side to form the through-hole and the separation groove; a sixth step of introducing a conductive member into the through-hole from the second surface side to form a through electrode that connects the first conductive portion and the second surface; and a seventh step of arranging a low water absorption resin in the separation groove. A method for manufacturing a multilayer wiring substrate, comprising: an eighth step of arranging a resin member of the same type as the resin member on the second surface and the upper surface of the low water absorption resin, and forming a second wiring layer on the second surface; and a ninth step of separating the multilayer wiring substrate by separating it into individual pieces according to the separation grooves.

13. A manufacturing method for a multilayer wiring board using a base material substrate having a first surface and a second surface opposite to the first surface, comprising: a first step of bonding a plurality of wiring boards, each of which is a wiring board in which a first conductive portion is formed on the first surface of the base material substrate, a second conductive portion is formed on the second surface, and the first conductive portion, the second conductive portion, and a portion of the base material substrate are separated, to a support from the second surface side; a second step of placing a low water absorption resin in a separation groove, which is a space formed between each of the plurality of wiring boards and the support; a third step of placing a resin member on the first surface side of each of the plurality of wiring boards and on the upper surface of the low water absorption resin, and forming a first wiring layer on the first surface of each of the plurality of wiring boards; a fourth step of peeling the support from the plurality of wiring boards; and a fifth step of placing a resin member of the same type as the resin member on the second surface side of each of the plurality of wiring boards and on the lower surface of the low water absorption resin, and forming a second wiring layer on the second surface of each of the plurality of wiring boards. A method for manufacturing a multilayer wiring board, comprising: a sixth step of separating a plurality of multilayer wiring boards by separating them into individual pieces according to the separation grooves.

14. A method for manufacturing a multilayer wiring board according to claim 12 or claim 13, wherein the sides of the individualized multilayer wiring boards are covered with the low water absorption resin.

15. A method for manufacturing a multilayer wiring board according to claim 12 or claim 13, wherein the thickness of the base material substrate included in the multilayer wiring board is in the range of 50 μm or more and 2000 μm or less, the thickness of the low water absorption resin covering the side surface of the multilayer wiring board is 50 μm or more, the low water absorption resin has a relative permittivity in the range of 3.1 or more and 3.5 or less, a dielectric loss tangent in the range of 0.002 or more and 0.012 or less, and a water absorption rate in the range of 0.05% or more and 0.6% or less.

16. A method for manufacturing a multilayer wiring board according to claim 12, wherein the overlap rate of the through holes is 40% or more and 90% or less.

17. A method for manufacturing a multilayer wiring board according to claim 12, wherein the processing width / opening width of the bottom of the separation groove is 0.88 or more.

18. A multilayer wiring substrate having a base material substrate having a first surface and a second surface; at least one first wiring layer region which includes a wiring layer formed on the first surface; at least one second wiring layer region which includes a wiring layer formed on the second surface; a separation groove which penetrates from the first surface to the second surface and separates at least one multilayer wiring substrate including the first wiring layer region and the second wiring layer region into individual pieces; and a low water absorption resin which is disposed in the separation groove and connects adjacent multilayer wiring substrates to each other.

19. A multilayer wiring substrate having a first surface and a second surface, and including a plurality of multilayer wiring boards, wherein the substrate comprises: a first wiring layer which is a wiring layer formed on the first surface; a second wiring layer which is a wiring layer formed on the second surface; and separation grooves used for separating the plurality of multilayer wiring boards into individual pieces, wherein the separation grooves are filled with a low water absorption resin.

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