Dynamic control of minimum voltage for semiconductor devices

Abstract

Aspects of dynamic control of minimum voltage for semiconductor devices are disclosed. For example, a method for minimum voltage dynamic control includes receiving a predictive temperature and a predictive power consumption from a predictive model. The predictive temperature and the predictive power consumption are determined based on power consumption, performance state residency, and temperature of an element of a semiconductor device operating at an operation point. A temperature-based minimum voltage, determined based on the temperature of the element, and a power-consumption-based minimum voltage, determined based on the power consumption of the element, are received at a logic. The logic generates a minimum voltage determined based on the temperature-based minimum voltage, the predictive temperature, the predictive power consumption, the power-consumption-based minimum voltage, and the performance state residency of the element. The voltage of the element may be adjusted based on the minimum voltage generated by the logic.

Description

DYNAMIC CONTROL OF MINIMUM VOLTAGE FOR SEMICONDUCTOR DEVICESBACKGROUND

[0001] Semiconductor devices are widely used throughout the world in various electronic devices. For example, it is estimated that almost 80% of the world’s population owns a mobile phone, which is one type of an electronic device. One semiconductor device used within an electronic device is system-on-a-chip (SoC), which may include various elements, such as a central processing unit (CPU), a graphic processing unit (GPU), an accelerated processing unit (APU), an audio processing unit, and a tensor processing unit (TPU).

[0002] The use of various elements of a semiconductor device (e.g., CPU, GPU) within an electronic device consumes power from the energy source (e.g., a battery) of the electronic device. The semiconductor device may statically set a minimum voltage for the various elements to control the power consumption by the elements. However, a statically set voltage level may negatively affect the battery of the electronic device since powder consumption of the elements has not been optimized. For example, a static minimum voltage may negatively impact energy' efficiency by consuming unnecessary power w hen an element of the semiconductor device is in a low performance state residency. Fixed minimum voltage levels may also negatively’ impact thermal throttling behavior because the semiconductor device may become overheated during lower (e.g., idle) workload periods due to the fixed minimum voltage levels, which may be set unnecessarily too high.SUMMARY

[0003] This document describes systems and techniques directed at dynamic control of minimum voltage for semiconductor devices that may overcome or reduce the disadvantages of fixed (e.g., static) minimum voltages. For example, a predictive model may generate at least a predictive temperature and a predictive power consumption based on a temperature, a power consumption, and a performance state residency of an element of a semiconductor device. A logic receives a temperature-based minimum voltage, determined based on the temperature of the element, and a power-consumption-based minimum voltage, determined based on the power consumption of the element. The logic determines a minimum voltage for the element based the received temperature-based minimum voltage, the received power-consumption-based minimum voltage, the predictive temperature, the predictive power consumption, and the performance state residency of the element. The logic directs a controller to set a new operation point of the element based on the determined minimum voltage.

[0004] In some aspects, the techniques described herein relate to a method including receiving a first predictive temperature and a first predictive power consumption. The first predictive temperature and the first predictive power consumption are determined based on a first power consumption, a first performance state residency, and a first temperature of a first element operating at a first operation point with the first element being associated with a semiconductor device. The method includes receiving a first temperature-based minimum voltage determined based on at least the first temperature and receiving a first power-consumption-based minimum voltage determined based on at least the first power consumption. The method includes generating a first minimum voltage determined based on the received first temperature-based minimum voltage, the first predictive temperature, the first predictive power consumption, the first powerconsumption-based minimum voltage, and the first performance state residency. The method includes directing a first controller to set a second operation point, determined based on the first minimum voltage, of the first element, the second operation point differing from the first operation point.

[0005] In one implementation, a system directed at dynamic control of minimum voltage for semiconductor devices is disclosed. The system includes a first element of a semiconductor device, the first element having a first power consumption, a first performance state residency, and a first temperature at a first operation point of the first element. The system includes a first predictive model coupled with the first element. The first predictive model is configured to generate a first predictive temperature and a first predictive power consumption based on the first power consumption, the first performance state residency, and the first temperature of the first element operating at the first operation point. The system includes a logic coupled with the first element and with the first predictive model. The logic is configured to receive a first temperaturebased minimum voltage and a first power-consumption-based minimum voltage. The logic is configured to generate a first minimum voltage determined based on the received first temperature-based minimum voltage, the received first power-consumption-based minimum voltage, the first predictive temperature, the first predictive power consumption, and the first performance state residency. The logic is configured to direct the first element to operate at a second operation point.

[0006] This Summary is provided to introduce simplified concepts of systems and methods for dynamic control of minimum voltage for semiconductor devices, the concepts of which are further described below in the Detailed Description and Drawings. This Summary is not intended to identify essential features of the claimed subject matter, nor is it intended for use in determining the scope of the claimed subject matter.BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The details of one or more aspects of systems and techniques directed at dynamic control of minimum voltage for semiconductor devices are described in this document with reference to the following drawings, in which the use of same numbers in different instances may indicate similar features or components.

[0008] FIGs. 1-1 through 1-4 illustrate example systems in which aspects of dynamic control of minimum voltage for semiconductor devices can be implemented.

[0009] FIG. 2 illustrates an example system in which aspects of dynamic control of minimum voltage can be implemented that includes a predictive model and logic to control multiple elements of a semiconductor device.

[0010] FIG. 3 illustrates an example system in which aspects of dynamic control of minimum voltage can be implemented that includes logic and multiple predictive models to control multiple elements of a semiconductor device.

[0011] FIG. 4 illustrates an example operating environment in which aspects of dynamic control of minimum voltage for semiconductor devices can be implemented.

[0012] FIG. 5 illustrates an integrated circuit component in which aspects of dynamic control of minimum voltage for semiconductor devices can be implemented.

[0013] FIG. 6 illustrates an example electronic device having internal hardware configurations for dynamic control of minimum voltage for semiconductor devices in accordance with one or more implementations.

[0014] FIG. 7 is a flow chart of a method of an aspect of dy namic control of minimum voltage for semiconductor devices.DETAILED DESCRIPTIONOverview

[0015] A semiconductor device may include a fixed (e g., static) minimum voltage applied to elements (e.g.. CPU, GPU, TPU) of the semiconductor device within an electronic device, the elements consuming power from an energy source (e g., a battery, power supply) of the electronic device. The fixed minimum voltage may be used to limit the voltage an element receives from the energy source of the electronic device. The fixed minimum voltage may be used to control the overall power consumption by the semiconductor device.

[0016] The fixed minimum voltage may be determined based on the ordinary operation of the semiconductor device, which may not be ideal for other operating states of the semiconductor device. For example, the semiconductor device may unnecessarily consume power in the event an element is in an operation state that would consume less power than the power provided by thefixed minimum voltage. A fixed minimum voltage may negatively affect the performance of an electronic device if the fixed minimum voltage is set lower than a voltage required for a current operation state of the semiconductor device. A statically (e.g., fixed) minimum voltage may negatively affect the battery of the electronic device since power consumption of the elements is not optimized. As yet another example, thermal throttling of a semiconductor device may be negatively impacted in the event the minimum voltage is set too high. The fixed minimum voltage may not be optimized over the lifetime of an electronic device. For example, performance of a semiconductor device within an electronic device may decrease over time. A fixed minimum voltage does not take into account the potential reduction of performance of a semiconductor device over time.

[0017] To this end, this document describes systems and techniques directed at dynamic control of minimum voltage for semiconductor devices.

[0018] In aspects, the techniques described herein relate to generating a minimum voltage for an element of a semiconductor device. The minimum voltage is generated, by logic, based on a temperature-based minimum voltage, a predictive temperature for the element, a predictive power consumption for the element, a power-consumption-based minimum voltage, and a performance state residency of the element. The performance state residency of the element is the history of the performance state of the element. A predictive model may provide the predictive temperature for the element and the predictive power consumption for the element based on a recent temperature of the element, a recent power consumption of the element, and a recent performance state residency of the element. The recent temperature, power consumption, and performance state residency may be real-time operating properties of the element based on an operation point of the element.

[0019] The predictive model may provide the predictive temperature and the predictive power consumption to a logic. The temperature-based minimum voltage may be partially determined based on the temperature of the element. The temperature-based minimum voltage may also be determined based on a temperature target and a temperature timescale generated by the predictive model. A temperature controller may be configured to provide the temperature-based minimum voltage to the logic. The power-consumption-based minimum voltage may be partially determined based on the power consumption of the element. The power-consumption-based minimum voltage may also be determined based on a power consumption target and a power consumption timescale generated by the predictive model. A power controller may be configured to provide the power-consumption-based minimum voltage to the logic.

[0020] The voltage of the element may be adjusted based on the minimum voltage generated by the logic. In one implementation, the logic is configured to direct a controller to set a new operation point of the element based on the minimum voltage generated by the logic. The new operation point may be determined by a dynamic voltage and frequency scaling (DVFS) table coupled to the controller. The new operation point may increase a voltage of the operating properties of the element if the minimum voltage generated by the logic is higher than the realtime operating voltage of the element. The new operating point may decrease the voltage of the operating properties of the element if the minimum voltage generated by the logic is lower than the real-time operating voltage of the element.

[0021] The following discussion describes operating environments, techniques that may be employed in the operating environments, and example methods. Although techniques using and apparatuses for dynamic control of minimum voltage for semiconductor devices are described, it is to be understood that the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as example implementations and reference is made to the operating environment by way of example only.Example Systems and Operational Schemes

[0022] A logic and predictive model are coupled with an element of a semiconductor device, and the logic is configured to determine a dynamic minimum threshold based on predictive input from the predictive model. The predictive input from the predictive model is based on a current temperature, a cunent power consumption and a cunent performance state residency of the element. The predictive model generates at least a predictive temperature and a predictive power consumption for the element. The predictive model generates the predictive temperature based in part on the cunent temperature and the history' of the temperature of the element for various operation points of the element. The predictive model generates the predictive power consumption based in part on the cunent power consumption of the element and the history of power consumption of the element for various operation points of the element. The logic generates a dynamic minimum voltage for the element based on the predictive input from the predictive model, a received temperature-based minimum voltage, a received power- consumption-based minimum voltage, and the current performance state residency of the element. The logic may be configured to direct the operation of the element based on the dynamic minimum voltage generated by the logic. In another implementation, the logic may direct a controller to set a new operation point for the element based on the dynamic minimum voltage generated by the logic.

[0023] The received temperature-based minimum voltage may be received from a temperature controller coupled with the logic, and the received power-consumption-based minimum voltage may be received from a power controller coupled with the logic. The temperature controller may determine the temperature-based minimum voltage based in part on the cunent temperature of the element as well as a temperature target and temperature timescale provided by the predictive model. The power controller may determine the power-consumption-based minimum voltage based in part on the current power consumption of the element as well as power consumption target and power consumption timescale provided by the predictive model.

[0024] The predictive model may generate other predictive inputs (e.g., a temperature target, a temperature timescale, a power consumption target, a power consumption) based on the current temperature, the current power consumption, and the current performance state residency of the element. For example, the predictive model may generate a temperature target and temperature timescale based on the present temperature of the element and the present performance state of the element as well as a history7of the temperature and performance state (e.g., performance state residency) of the element for various operation points of the element. The target temperature is a desired temperature of the element over a specified time period (e.g., temperature timescale). Likewise, the predictive model may generate a power consumption target and power consumption timescale based on the present power consumption and the present performance state of the element as well as a history of the power consumption and performance state (e.g., performance state residency) of the element for various operation points of the element. The target power consumption is a desired power consumption of the element over a specified time period (e.g., power consumption timescale). The temperature controller may generate the received temperature-based minimum voltage based on the current temperature of the element and predictive inputs (e.g., a temperature target, a temperature timescale) from the predictive model. The power controller may generate the received power-consumption-based minimum voltage based on the current power consumption of the element and predictive inputs (e.g., a power consumption target, a power consumption) from the predictive model.

[0025] FIG. 1-1 illustrates a system 100 that implements aspects of minimum voltage dynamic control for a semiconductor device. The system 100 includes an element 102 of a semiconductor device that has a temperature 104. a power consumption 106, and a performance state residency 108. The element 102 may be any component of the semiconductor device that increases in temperature 104 and consumes power (e.g., power consumption 106) from an energy7source of an electronic device connected to the semiconductor device depending on the performance state residency 108 of the element 102. For example, the element 102 may be aprocessor that may increase in temperature 104 and / or power consumption 106 when processing as opposed to being in an idle state. The processor may be a CPU, GPU, TPU, or the like. The element 102 may instead be a non-processing element, such as a sensor or display. For example, the sensor may be an optical sensor, radar sensor, proximity sensor, or the like. The element 102 may be any component of a semiconductor device that causes changes to the temperature 104 and / or power consumption 106 due to an operation point (e.g., performance state residency 108) of the element 102.

[0026] The system 100 includes a predictive model 110 coupled with the element 102. The temperature 104, power consumption 106, and performance state residency 108 of the element 102 are communicated to the predictive model 110. The predictive model 110 generates various predictive inputs based on the temperature 104, power consumption 106, and performance state residency 108 of the element 102. For example, the predictive model 110 may generate a predictive temperature (Predictive Temp 112) and a predictive power consumption (Predictive PC 114) of the element 102 based on the operating properties (e.g., temperature 104, power consumption 106, and performance state residency 108) of the element 102. The predictive model 110 may be any model that is configured to generate predictive inputs based on operating properties received from the element 102. For example, the predictive model 110 may be a machine-learned model or may be a model that utilizes artificial intelligence. The machine- learned model may be a standard neural-network-based model with corresponding layers required for processing input features like fixed-side vectors, text embeddings, or variable length sequences. The machine-learned model may be implemented as one or more of a support vector machine (SVM). a recurrent neural network (RNN), a convolutional neural network (CNN), a dense neural network (DNN), one or more heuristics, other machine-learning techniques, a combination thereof, and so forth.

[0027] The system 100 includes logic 116 coupled with the predictive model 110 and the element 102. The logic 116 receives the predictive inputs (e.g., Predictive Temp 112, Predictive PC 114) from the predictive model 110. The logic 116 also receives a temperature-based minimum voltage (Temp-Based Min V 118), a power-consumption-based minimum voltage (PC-Based Min V 120), and the performance state residency 108 of the element 102. The logic 116 is configured to generate a dynamic minimum voltage 122 based on the received Predictive Temp 112, Predictive PC 114. Temp-Based Min V 118, PC-Based Min V 120, and performance state residency 108 of the element 102. The logic 116 may be configured to direct the element 102 to operate at a new operation point (e.g., performance state residency) based on the dynamic minimum voltage 122.

[0028] The logic 116 may be any component of the semiconductor device that is configured to generate a dynamic minimum voltage 122 based on received inputs. For example, the logic 116 may be a decision tree, an algorithmic logic, a rule engine, a flow chart, or a combination thereof. The logic 116 may be a lookup table combined with software that receives the inputs and determines the minimum voltage 122 based on values in the lookup table. The values are selected based on inputs received by the software. Another system 100-1 that implements aspects of minimum voltage dynamic control for a semiconductor device is shown in FIG. 1-2.

[0029] FIG. 1-2 illustrates a system 100-1 that includes an element 102 of a semiconductor device, the element 102 having a temperature 104, a power consumption 106, and a performance state residency 108 for various operation points of the element 102. The element 102 may be any component of the semiconductor device that increases in temperature 104 due to operation and consumes power (e.g., power consumption 106) from an energy source of an electronic device connected to the semiconductor device.

[0030] The system 100-1 includes a predictive model 1 10 coupled with the element 102. The predictive model 110 may use a machine-learned model and / or artificial intelligence to generate various predictive inputs (e.g., Predictive Temp 112, Predictive PC 114) based on the operating properties of the element 102. For example, the temperature 104, power consumption 106, and performance state residency 108 of the element 102 are communicated to the predictive model 110 and the predictive model 110 generates various predictive inputs based on the received temperature 104, power consumption 106, and performance state residency 108. For example, the predictive model 110 may generate a predictive temperature (Predictive Temp 112) and a predictive power consumption (Predictive PC 114) of the element 102 based on the operating properties (e.g., temperature 104, pow er consumption 106, and performance state residency 108) of the element 102. The predictive model 110 may also generate a temperature target (Temp Target 124), a temperature timescale (Temp Timescale 126), a power consumption target (PC Target 128), and a power consumption timescale (PC Timescale 130) based on the operating properties of the element 102.

[0031] A temperature-based minimum voltage (Temp-Based Min V 118) may be determined based on the temperature 104 of the element 102 and the Temp Target 124 and Temp Timescale 126 generated by the predictive model 110. A power-consumption-based minimum voltage (PC-Based Min V 120) may be determined based on the power consumption 106 of the element and the PC Target 128 and PC Timescale 130 generated by the predictive model 110. The Temp-Based Min V 118 and the PC-Based Min V 120 are communicated to a logic 116 ofthe system 100-1. The Predictive Temp 112 and the Predictive PC 1 14 generated by the predictive model 110 are also communicated to the logic 116.

[0032] The logic 116 is configured to generate a dynamic minimum voltage 122 based on the Predictive Temp 112 and Predictive PC 114, received from the predictive model 110, the received Temp-Based Min V 118. the received PC-Based Min V 120, and the performance state residency 108 of the element 102. The logic 116 may be configured to direct the element 102 to operate at a new operation point (e.g., performance state residency) based on the dynamic minimum voltage 122. The voltage of the element 102 may be adjusted based on the dynamic minimum voltage 122 generated by the logic 116. The logic 116, in combination with the predictive model 110, may dynamically control the minimum voltage of various elements 102 of a semiconductor device as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. Another system 100-2 that implements aspects of minimum voltage dynamic control for a semiconductor device is shown in FIG. 1-3.

[0033] FIG. 1 -3 illustrates a system 100-2 that includes an element 102 of a semiconductor device coupled with a predictive model 110 and logic 116. As discussed above, the predictive model 110 generates various predictive inputs (e.g., Predictive Temp 112, Predictive PC 114, Temp Target 124. Temp Timescale 126, PC Target 128, PC Timescale 130) based on the temperature 104. power consumption 106, and performance state residency 108 of the element 102. The predictive model 110 communicates a portion of the predictive inputs (e.g., Predictive Temp 112, Predictive PC 114) to the logic 116. The predictive model 110 communicates another portion (e.g., Temp Target 124, Temp Timescale 126) to a temperature controller (Temp Controller 132). The Temp Controller 132 generates a Temp-Based Min V 118 determined based on the received Temp Target 124 and Temp Timescale 126 as well as the temperature 104 of the element 102 and communicates the Temp-Based Min V 118 to the logic 116. The predictive model 110 communicates yet another portion (e.g., PC Target 128, PC Timescale 130) to a pow er controller 134. The power controller 134 generates a PC-Based Min V 120 determined based on the received PC Target 128 and PC Timescale 130 as well as the power consumption 106 of the element 102 and communicates the PC-Based Min V 120 to the logic 1 16.

[0034] As discussed above, the logic 116 determines a dynamic minimum voltage 122 based on the Predictive Temp 112 and Predictive PC 114, received from the predictive model 110, the Temp-Based Min V 118 received from the Temp Controller 132, the PC-Based Min V 120 received from the power controller 134, and the performance state residency 108 of the element 102. The logic 116 may be configured to direct the element 102 to operate at a new operation point (e.g., performance state residency) based on the dynamic minimum voltage 122. The logic 116, in combination with the predictive model 110, dynamically controls the minimum voltage ofvarious elements 102 of a semiconductor device. Another system 100-3 that implements aspects of minimum voltage dynamic control for a semiconductor device is shown in FIG. 1-4.

[0035] FIG. 1 -4 illustrates a system 100-3 that includes an element 102 of a semiconductor device coupled wi th a predictive model 110. logic 116, a temperature controller 132, and a power controller 134. As discussed above, the predictive model 110 generates various predictive inputs (e.g., Predictive Temp 112, Predictive PC 114, Temp Target 124, Temp Timescale 126, PC Target 128, PC Timescale 130) based on the temperature 104, power consumption 106, and performance state residency 108 of the element 102. The predictive model 110 communicates a portion of the predictive inputs (e.g.. Predictive Temp 112. Predictive PC 114) to the logic 116. The Temp Controller 132 generates a Temp-Based Min V 118 based on predictive inputs (e.g.. Temp Target 124, Temp Timescale 126) received from the predictive model 110 as well as the temperature 104 of the element 102. The power controller 134 generates a PC-Based Min V 120 determined based on predictive inputs (e.g., PC Target 128, PC Timescale 130) received from the predictive model 110 as well as the power consumption 106 of the element 102.

[0036] The logic 116 of the system 100-3 determines a dynamic minimum voltage 122 based on the Predictive Temp 112, the Predictive PC 114, the Temp-Based Min V 118, the PC-Based Min V 120, and the perfonnance state residency 108 of the element 102. The dynamic minimum voltage 122 may be communicated to a controller 136 coupled to the logic 116 and the element 102. The temperature 104 of the element 102 and the power consumption 106 of the element 102 are communicated to the controller 136.

[0037] The dynamic minimum voltage 122 may also be communicated to a dynamic voltage and frequency scaling table (DFVS table 138) also coupled with the logic 116 and the element 102. The logic 116 may be configured to direct the controller 136 to set a new operation point for the element 102 based on the dynamic minimum voltage 122. For example, the controller 136, based on the dynamic minimum voltage 122, the temperature 104 of the element 102, and the power consumption 106 of the element 102, communicates a row selection 140 to the DVFS table 138 based on the dynamic minimum voltage 122. The row selection 140 communicated to the DVFS table 138 may select a new operation point 142 that is communicated to the element 102. The new operation point 142 is determined based on the row selection 140 in combination with the dynamic minimum voltage 122. The dynamic minimum voltage 122 determines which entry within a row, selected by the row selection 140, is the new operation point 142. The operation point 142 determines the operation frequency of the element 102, which will determine the new power consumption 106, temperature 104, and performance state residency 108 of the element 102. The systems 100 through 100-3 shown in FIGS. 1-1 through 1-4 include a single element 102 coupled with the logic 116 and predictive model 110 for illustrative purposes. Thenumber, size, configuration, and location of the various elements (e.g., element 102, predictive model 110, logic 116, Temp Controller 132, power controller 134, controller 136, DVFS table 138) may be varied as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. For example, more than one element 102 may be coupled to the logic 116. FIG. 2 shows a system 200 that includes more than one element 102.

[0038] FIG. 2 illustrates a system 200 that includes a first element 102-1 of a semiconductor device coupled with a predictive model 110, logic 116, a first temperature controller 132-1, a first power controller 134-1, a first controller 136-1, and a first DVFS table 138-1. The first element 102-1 has a first temperature 104-1, a first power consumption 106-1, and a first performance state residency 108-1 while operating at a first operation point. The first temperature 104-1 of the first element 102-1 is communicated to the predictive model 110, the first temperature controller 132-1, and the first controller 136-1. The first power consumption 106-1 of the first element 102-1 is communicated to the predictive model 110. the first power controller 134-1, and the first controller 136-1. The first performance state residency 108-1 of the first element 102-1 is communicated to the predictive model 110 and the logic 116.

[0039] The predictive model 110 provides a first predictive temperature (Pred Temp 112-1) and a first predictive power consumption (Pred PC 114-1) to the logic 116 as discussed herein. The predictive model 110 provides a first temperature target (Temp Target 124-1) and a first temperature timescale (Temp TS 126-1) to the first Temp Controller 132-1, which provides a first Temp-Based Min V 118-1 to the logic 116 determined based on the first Temp Target 124- 1, the first Temp TS 126-1, and the first temperature 104-1 of the first element 102-1. The predictive model 110 provides a first power consumption target (PC Target 128-1) and a first power consumption timescale (PC TS 130-1) to the first power controller 134-1, which provides a first PC-Based Min V 120-1 to the logic 116 determined based on the first PC Target 128-1, the first PC TS 130-1, and the first power consumption 106-1 of the first element 102-1.

[0040] The logic 116 generates a first dynamic minimum voltage 122-1 determined based on the first performance state residency 108-1 of the first element 102-1 and the first Pred Temp 112-1 and first Pred PC 114-1 received from the predictive model 1 10, the first Temp-Based Min V 118-1 received from the first Temp Controller 132-1, and the first PC-Based Min V 120-1 received from the first Power Controller 134-1. The first dynamic minimum voltage 122-1 is communicated from the logic 116 to the first controller 136-1 and the first DVFS table 138-1. Based on the first dynamic minimum voltage 122-1, the first temperature 104-1, and the first power consumption 106-1, the first controller 136-1 communicates a first-row selection 140-1 to the first DVFS table 138-1. The first-row selection 140-1 determines a new operation point (e.g., a second operation point 142-1) that is communicated to the first element 102-1. The secondoperation point 142-1 differs from the first operation point of the first element 102-1. Thus, the logic 116, in combination with the predictive model 110, dynamically controls the minimum voltage of the first element 102-1.

[0041] The system 200 includes a second element 102-2 of the semiconductor device coupled with the predictive model 110. the logic 116, a second temperature controller 132-2, a second power controller 134-2, a second controller 136-2, and a second DVFS table 138-2. The second element 102-2 has a second temperature 104-2, a second power consumption 106-2, and a second performance state residency 108-2 while operating at a third operation point. The second temperature 104-2 of the second element 102-2 is communicated to the predictive model 110, the second temperature controller 132-2, and the second controller 136-2. The second power consumption 106-2 of the second element 102-2 is communicated to the predictive model 110, the second power controller 134-2, and the second controller 136-2. The second performance state residency 108-2 of the second element 102-2 is communicated to the predictive model 110 and the logic 116.

[0042] The predictive model 110 provides a second predictive temperature (Pred Temp 112-2) and a second predictive power consumption (Pred PC 114-2) to the logic 116 as discussed herein. The predictive model 110 provides a second temperature target (Temp Target 124-2) and a second temperature timescale (Temp TS 126-2) to the second Temp Controller 132-2, which provides a second Temp-Based Min V 118-2 to the logic 116 determined based on the second Temp Target 124-2, the second Temp TS 126-2, and the second temperature 104-2 of the second element 102-2. The predictive model provides a second power consumption target (PC Target 128-2) and a second power consumption timescale (PC TS 130-2) to the second power controller 134-2, which provides a second PC-Based Min V 120-2 to the logic 116 determined based on the second PC Target 128-2, the second PC TS 130-2, and the second power consumption 106-2 of the second element 102-2.

[0043] The logic 116 generates a second dynamic minimum voltage 122-2 determined based on the second performance state residency 108-2 of the second element 102-2 and the second Pred Temp 112-2 and second Pred PC 1 14-2 received from the predictive model 110, the second Temp-Based Min V 118-2 received from the second Temp Controller 132-2, and the second PC-Based Min V 120-2 received from the second Power Controller 134-2. The second dynamic minimum voltage 122-2 is communicated from the logic 116 to the second controller 136-2 and the second DVFS table 138-2. Based on the second dynamic minimum voltage 122-2, the second temperature 104-2, and the second power consumption 106-2, the second controller 136-2 communicates a second-row selection 140-2 to the second DVFS table 138-2. The second-row selection 140-2 determines a new operation point (e.g., a fourth operation point 142-2) that is communicated to the second element 102-2. The fourth operation point 142-2 differs from the third operation point of the second element 102-2. Thus, the logic 116, in combination with the predictive model 110, is configured to dynamically control the minimum voltage of more than one element (e g., first element 102-1, second element 102-2). The system 200 may be configured to dynamically control the minimum voltage for one, two, or more elements 102 of a semiconductor device as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. FIG. 3 shows an implementation of another system 300 configured to dynamically control the minimum voltage of more than one element (e g., first element 102-1, second element 102-2).

[0044] FIG. 3 illustrates a system 300 that includes a first element 102-1 of a semiconductor device coupled with a first predictive model 110-1, logic 116, a first temperature controller 132-1, a first power controller 134-1, a first controller 136-1, and a first DVFS table 138-1. The first element 102-1 has a first temperature 104-1, a first power consumption 106-1, and a first performance state residency 108-1 while operating at a first operation point. The first temperature 104-1 of the first element 102-1 is communicated to the first predictive model 110-1, the first temperature controller 132-1, and the first controller 136-1. The first power consumption 106-1 of the first element 102-1 is communicated to the first predictive model 110-1, the first power controller 134-1, and the first controller 136-1. The first performance state residency 108- 1 of the first element 102-1 is communicated to the first predictive model 110-1 and the logic 116.

[0045] The first predictive model 110-1 provides a first Pred Temp 112-1 (shown in FIG. 2) and a first Pred PC 114-1 (shown in FIG. 2) to the logic 116 as discussed herein. Likewise, the first predictive model 110-1 provides a first Temp Target 124-1 (shown in FIG. 2) and a first Temp TS 126-1 (shown in FIG. 2) to the first Temp Controller 132-1 and provides a first PC Target 128-1 (shown in FIG. 2) and a first PC TS 130-1 (shown in FIG. 2) to the first Power Controller 134-1. The logic 116 generates a first dynamic minimum voltage 122-1 determined based on the first performance state residency 108-1 of the first element 102-1 and the first Pred Temp 112-1 and first Pred PC 114-1 received from the first predictive model 110-1, the first Temp- Based Min V 118-1 received from the first Temp Controller 132-1, and the first PC-Based Min V 120-1 received from the first Power Controller 134-1. The first dynamic minimum voltage 122- 1 is communicated from the logic 116 to the first controller 136-1 and the first DVFS table 138-1 and a new operation point (e.g., a second operation point 142-1) is communicated to the first element 102-1 as discussed above.

[0046] The system 300 includes a second element 102-2 of the semiconductor device coupled with a second predictive model 110-2, the logic 116, a second temperature controller 132- 2, a second power controller 134-2, a second controller 136-2, and a second DVFS table 138-2.The second element 102-2 has a second temperature 104-2, a second power consumption 106-2, and a second performance state residency 108-2 while operating at a third operation point. The second temperature 104-2 of the second element 102-2 is communicated to the second predictive model 110-2, the second temperature controller 132-2, and the second controller 136-2. The second power consumption 106-2 of the second element 102-2 is communicated to the second predictive model 110-2, the second power controller 134-2, and the second controller 136-2. The second performance state residency 108-2 of the second element 102-2 is communicated to the second predictive model 110-2 and the logic 116.

[0047] The second predictive model 110-2 provides a second Pred Temp 112-2 (shown in FIG. 2) and a second Pred PC 114-2 (shown in FIG. 2) to the logic 116 as discussed herein. Likewise, the second predictive model 110-2 provides a second Temp Target 124-2 (shown in FIG. 2) and a second Temp TS 126-2 (shown in FIG. 2) to the second Temp Controller 132-2 and provides a second PC Target 128-2 (shown in FIG. 2) and a second PC TS 130-2 (shown in FIG. 2) to the second Power Controller 134-2. The logic 116 generates a second dynamic minimum voltage 122-2 determined based on the second performance state residency 108-2 of the second element 102-2 and the second Pred Temp 112-2 and second Pred PC 114-2 received from the second predictive model 110-2, the second Temp-Based Min V 118-2 received from the second Temp Controller 132-2, and the second PC-Based Min V 120-2 received from the second Power Controller 134-2. The second dynamic minimum voltage 122-2 is communicated from the logic 116 to the second controller 136-2 and the second DVFS table 138-2 and a new operation point (e.g., a fourth operation point 142-2) is communicated to the second element 102-2 as discussed above. The system 300 may include a predictive model (e.g., first predictive model 110-1, second predictive model 110-2) for each element (e.g., element 102-1, element 102-2) of a semiconductor device. In other implementations, a predictive model (e.g., predictive model 110) may be coupled with one or more elements (e.g., element 102) as would be appreciated by one of ordinary7skill in the art having the benefit of this disclosure. The systems (e.g., system 100, system 100-1, system 100-2, system 100-3, system 200. system 300) disclosed herein each implement various aspects of dynamic control of minimum voltage for semiconductor devices as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.Example Environments and Electronic Devices

[0048] FIG. 4 illustrates an example operating environment 400 in which aspects of dynamic control of minimum voltage for semiconductor devices can be implemented. As illustrated, an SoC integrated circuit (IC) device 402 is mounted to a printed circuit board (PCB) 404, which may be included as part of a computing device that implements one or more securityprotocols. As non-limiting examples, the computing device may be a smartphone 406, a personal digital assistant 408, a tablet 410, a laptop 412, or a workstation 414.

[0049] The SoC IC device 402 may include various elements 102 (e.g., GPU, CPU, TPU) that consume power from an energy source (e g., a battery’) coupled with the SoC IC device 402. The draw of power may negatively affect the lifetime of the battery and / or cause a temperature event (e.g., a sudden increase in temperature) within the SoC IC device 402. For example, a static minimum voltage of the SoC IC device 402 may cause an application, on an electronic device, in a reduced performance to consume more energy than necessary. A static minimum voltage does not optimize the consumption of power by applications on the SoC IC device 402. The SoC IC device 402 may include predictive models 110 that are configured to predict a future temperature (e.g., Predictive Temp 112) and future power consumption (e.g., Predictive PC 114) of an element 102 based on the temperature 104, power consumption 106, and performance state residency 108 of the element 102. The predictive models 110 may monitor the temperature 104, power consumption 106, and performance state residency 108 of the element 102 over various timescales (e.g., a one-hour period, a twenty-four (24) hour period, a forty-eight (48) hour period, a week, a month, a year, or the like). The predictive models 110 may use machine learning to generate the future temperature and future power consumption of the element 102.

[0050] The predictive models 110 may be configured to generate a temperature target 124, temperature timescale 126, power consumption target 128, and power consumption timescale 130. The SoC IC device 402 may include a temperature-based minimum voltage 118 and a power-consumption-based minimum voltage 120. The temperature-based minimum voltage 118 may be generated based on the temperature 104 of the element 102 as well as the temperature target 124 and temperature timescale 126. The power-consumption-based minimum voltage 120 may be generated based on the power consumption 106 of the element 102 as well as the power consumption target 128 and the power consumption timescale 130. The SoC IC device 402 may include logic 116 configured to determine a minimum voltage 122 based on at least the temperature-based minimum voltage 118. the power-consumption-based minimum voltage 120, the predictive temperature 112, the predictive power consumption 114, and the performance state residency 108 of the element 102.

[0051] Although the SoC IC device 402 is described in the context of a single SoC IC device including the predictive models 110, elements 102, temperature-based minimum voltages 118, power-consumption-based minimum voltages 120, and logic 116, a combination of discrete IC devices may perform the same functions. For example, a discrete processor IC device (e.g., a processor IC device having predictive models 110, elements 102, temperature-based minimum voltages 118, power-consumption-based minimum voltages 120, and logic 116) may work incombination with a discrete non-volatile memory IC device having the elements to perform one or more functions described herein.

[0052] FIG. 5 illustrates an integrated circuit component implemented as an SoC 500 that can implement various aspects of temperature-based performance control for semiconductor devices. The SoC 500 may be a single chip including components that are fabricated on the same semiconductor substrate. Alternatively, the SoC 500 may be a number of such chips that are epoxied together. The SoC 500 can be implemented in any suitable device, such as a smartphone, a cellular phone, a netbook, a tablet computer, a server, a wireless router, a network-attached storage, a camera, a smart appliance, a printer, a set-top box, or any other suitable type of device. Although described with reference to an SoC, the entities of FIG. 5 may also be implemented as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or the like.

[0053] The SoC 500 can be integrated with electronic circuitry’, including the components described in the operating system listed herein. The SoC 500 can also include an integrated data bus (not shown) that couples the various components of the SoC 500 for data communication between the components. The integrated data bus or other components of the SoC 500 may be exposed or accessed through an external port, such as a joint test action group (JTAG) port. For example, components of the SoC 500 may be tested, configured, or programmed (e.g., flashed) through the external port at different stages of manufacture.

[0054] In this example, the SoC 500 includes computer-readable media 502, one or more processors 504, one or more predictive models 110, one or more elements 102, one or more temperature-based minimum voltages 118. one or more power-consumption-based minimum voltages 120, at least one logic 116, and I / O units 506. The one or more predictive models 1 10 and logic 116 may be configured to dynamically generate a minimum voltage to optimize a dynamic minimum voltage 122 of one or more elements 102 of the SoC 500. The one or more predictive models 110 may generate a temperature target 124, temperature timescale 126, power consumption target 128. and power consumption timescale 130. The computer-readable media 502 may be stored in computer-readable storage media, including one or more non-transitory storage devices such as a random-access memory (RAM), dynamic random access memory (DRAM), non-volatile random access memory' (NVRAM), or static random access memory' (SRAM), read-only memory (ROM), or flash memory’, a hard drive, a solid-state drive (SSD), or any type of media suitable for storing electronic instructions, each coupled with a computer system bus.

[0055] The computer-readable media 502 of the SoC 500 may include executable code for the dynamic generation of a minimum voltage. One or more of the processor(s) 504 operablycoupled to computer-readable storage media having computer-readable media 502 may execute instructions of dynamic generation of a minimum voltage of a semiconductor device.

[0056] FIG. 6 illustrates an example environment 600 of an example electronic device 602 that includes dynamic control of minimum voltage for semiconductor devices in accordance with one or more implementations. The electronic device 602 may include additional components and interfaces omitted from FIG. 6 for the sake of clarify. The electronic device 602 is illustrated with various non-limiting example electronic devices 602, including wireless earbuds 602-1, a smart display associated with a home-automation and control system 602-2, a desktop computer 602-3, a tablet 602-4, a laptop 602-5. a television 602-6, a computing watch 602-7, computing glasses 602-8, a gaming system 602-9, a microwave 602-10, a smart thermostat interface 602-11, and an automobile having computing capabilities 602-12. Other devices may also be used, such as wired earbuds, a security camera, a trackpad, a drawing pad, a netbook, an e-reader, other forms of home-automation and control systems, a wall display, a virtual-reality headset, another vehicle (e.g., an e-bike or plane), and other home appliances, to name just a few examples. Note that the electronic device 602 may be wearable, non-wearable but mobile, or relatively immobile (e.g., desktops and appliances), all without departing from the scope of the present teachings.

[0057] The electronic device 602 includes a housing 604, which defines at least one internal cavity within which one or more of a plurality of electronic components may be disposed. In implementations, a mechanical frame may define one or more portions of the housing 604. As an example, a mechanical frame can include plastic or metallic walls that define portions of the housing 604. In additional implementations, a mechanical frame may support one or more portions of the housing 604. As an example, one or more exterior housing components (e.g., plastic panels) can be attached to the mechanical frame (e.g., a chassis). In so doing, the mechanical frame physically supports the one or more exterior housing components, which define portions of the housing 604. In implementations, the mechanical frame and / or the exterior housing components may be composed of crystalline or non-crystalline solids. In implementations, the housing 604 may be sealed through the inclusion of one or more displays (e.g., at least one display 616), defining at least one internal cavity.

[0058] The electronic device 602 may further include one or more processors 606. The processor(s) 606 can include, as non-limiting examples, an SoC, an application processor (AP), a CPU. or a GPU. The processor(s) 606 generally execute commands and processes utilized by the electronic device 602 and an operating system installed thereon. For example, the processor(s) 606 may perform operations to display graphics of the electronic device 602 on the one or more displays 616 and can perform other specific computational tasks.

[0059] The electronic device 602 may also include computer-readable storage media (CRM) 608. The CRM 608 may be a suitable storage device configured to store device data of the electronic device 602, user data, and multimedia data. The CRM 608 may store an operating system 610 that generally manages hardware and software resources (e.g., the applications) of the electronic device 602 and provides common services for applications stored on the CRM 608. The operating system 610 and the applications are generally executable by the processor(s) 606 to enable communications and user interaction with the electronic device 602. One or more processors 606, such as a GPU, perform operations to display graphics of the electronic device 602 on the one or more displays 616 and can perform other specific computational tasks. The processors 606 can be single-core or multiple-core processors.

[0060] The electronic device 602 may also include input / output (I / O) ports 612. The I / O ports 612 allow the electronic device 602 to interact with other devices or users. The I / O ports 612 may include any combination of internal or external ports, such as universal serial bus (USB) ports, audio ports, serial advanced technology attachment (SATA) ports, peripheral component interconnect standard (PCI)-express based ports or card-slots, secure digital input / output (SDIO) slots, and / or other legacy ports.

[0061] The electronic device 602 may further include one or more sensors 614. The sensor(s) 614 can include any of a variety of sensors, such as an audio sensor (e.g., a microphone), a touch-input sensor (e.g., a touchscreen), an image-capture device (e.g., a camera, video-camera), proximity sensors (e.g., capacitive sensors), an under-display fingerprint sensor, or an ambient light sensor (e.g., photodetector). In implementations, the electronic device 602 includes one or more of a front-facing sensor(s) and a rear-facing sensor(s).

[0062] The electronic device 602 may include the one or more displays 616, one or more cover layers 618, and one or more display panels 620. The cover lay er(s) 618 may be implemented as any of a variety of transparent materials including polymers (e.g., plastic, acry lic) or glasses.

[0063] The electronic device 602 further includes a battery 622. In implementations, the battery 622 is a rechargeable battery that is configured to store and supply electrical energy. The rechargeable battery 622 may be any suitable rechargeable battery, such as a lithium-ion (Li-ion) battery.Example Methods

[0064] An example method is described below with reference to the flow chart of FIG. 7. FIG. 7 is a flow chart that illustrates a method 700 for dynamic control of minimum voltage for semiconductor devices, which includes operations 702 through 714. At step 702, a first predictive temperature and a first predictive power consumption are received. The first predictivetemperature and the first predictive power consumption are determined based on a first power consumption, a first performance state residency, and a first temperature of a first element operating at a first operation point, the first element being associated with a semiconductor. For example, an element (e.g., element 102) operates at a first operation point, the element (e.g., element 102) having a first temperature (e.g., temperature 104), a first power consumption (e.g., power consumption 106), and a first performance state residency (e.g., performance state residency 108). A predictive model (e.g., predictive model 110) generates a first predictive temperature (e.g., Predictive Temp 112) and a first predictive power consumption (e.g., Predictive PC 114) based on the first temperature (e.g.. temperature 104), the first power consumption (e.g., power consumption 106), and the first performance state residency (e.g., performance state residency 108) of the element (e.g., element 102).

[0065] At step 704, a first temperature-based minimum voltage, based on at least the first temperature, is received. For example, a first temperature-based minimum voltage (e.g., Temp- Based Min V 118) is received by a logic (e.g., logic 116) and the first temperature-based minimum voltage (e g., Temp-Based Min V 118) is based on at least a temperature (e g., temperature 104) of the element (e.g., element 102).

[0066] At step 706, a first power-consumption-based minimum voltage, based on at least the first power consumption, is received. For example, a first power-consumption-based minimum voltage (e.g., PC-Based Min V 120) is received by a logic (e.g., logic 116) and the first power-consumption-based minimum voltage (e.g., PC-Based Min V 120) is based on at least a power consumption (e.g., power consumption 106) of the element (e.g., element 102).

[0067] At step 708, a first minimum voltage is generated, the first minimum voltage is determined based on the first performance state residency and the received first temperature-based minimum voltage, first predictive temperature, first predictive power consumption and first power-consumption-based minimum voltage. For example, a first minimum voltage (e.g., minimum voltage 122) is generated by the logic (e.g., logic 116). The first minimum voltage (e.g., minimum voltage 122) is determined based on the received first temperature-based minimum voltage (e.g., Temp-Based Min V 118), the first predictive temperature (e.g., Predictive Temp 112), the first predictive power consumption (e.g., Predictive PC 114), the first power-consumption-based minimum voltage (e.g., PC-Based Min V 120), and the first performance state residency (e.g., performance state residency 108).

[0068] At step 710, a first controller is directed to set a second operation point, determined based on the first minimum voltage, of the first element, the second operation point differing from the first operation point. For example, the logic (e.g., logic 116) directs a controller (e.g., controller 136) to set a second operation point, determined based on the first minimum voltage(e.g., minimum voltage 122), of the first element (e.g., element 102), the second operation point differing from the first operation point. In this way, the minimum voltage for an element may be dynamically determined based on the current temperature, current power consumption and current performance state residency of the element using a predictive model and logic.

[0069] For the method(s) described herein and the associated flow chart(s) and flow diagram(s), the orders in which operations are shown and / or described are not intended to be construed as a limitation. Instead, any number or combination of the described method operations can be combined in any order to implement a given method or an alternative method, including by combining operations from the flow chart or diagram and the earlier-described techniques into one or more methods. Operations may also be omitted from or added to the described methods. Further, described operations can be implemented in fully or partially overlapping manners.Example Aspects and Implementations of Dynamic Control of Minimum Voltage for Semiconductor Devices

[0070] In the following, some example aspects and implementations are described:

[0071] Example aspect 1. A method comprising: receiving a first predictive temperature and a first predictive power consumption the first predictive temperature and the first predictive power consumption determined based on a first power consumption a first performance state residency, and a first temperature of a first element operating at a first operation point, the first element being associated with a semiconductor device; receiving a first temperature-based minimum voltage determined based on at least the first temperature; receiving a first power-consumption-based minimum voltage determined based on at least the first power consumption; generating a first minimum voltage determined based on the received first temperature-based minimum voltage, the first predictive temperature, the first predictive power consumption the first power-consumption-based minimum voltage, and the first performance state residency; and directing a first controller to set a second operation point, the second operation point determined based on the first minimum voltage, of the first element, the second operation point differing from the first operation point.

[0072] Example aspect 2. The method of example aspect 1, wherein the method is performed by a logic coupled with the first element and the first controller.

[0073] Example aspect 3. The method of example aspect 2. wherein a first voltage of the first element corresponds to the first operation point and a second voltage of the first element corresponds to the second operation point.

[0074] Example aspect 4. The method of example aspect 3, wherein the first voltage is greater than the second voltage.

[0075] Example aspect 5. The method of example aspect 3, wherein the second voltage is greater than the first voltage.

[0076] Example aspect 6. The method of any one of example aspects 2 to 5, further comprising: receiving a first temperature target and a first temperature timescale, the first temperature target and the first temperature timescale generated by a first predictive model coupled with the logic, wherein the first temperature target and the first temperature timescale are determined based on the first temperature and the first performance state residency; receiving a first power consumption target and a first power consumption timescale, the first power consumption target and the first power consumption timescale generated by the first predictive model, the first power consumption target and the first power consumption timescale determined based on at least the first power consumption and the first performance state residency; and wherein the received first predictive temperature and first predictive power consumption are generated by the first predictive model.

[0077] Example aspect 7. The method of example aspect 6, wherein: the first power-consumption-based minimum voltage is generated by a first power consumption controller coupled with the first predictive model and the logic, the first power-consumption-based minimum voltage determined based on the first power consumption the first power consumption target, and the first power consumption timescale; and the first temperature-based minimum voltage is generated by a first temperature controller coupled with the first predictive model and the logic, the first temperature-based minimum voltage determined based on the first temperature, the first temperature target, and the first temperature timescale.

[0078] Example aspect 8. The method of example aspect 7. wherein directing the first controller to set the second operation point further comprises: providing, by the logic, the first minimum voltage to the first controller, the first controller receiving the first power consumption and the first temperature of the first element; providing, by the logic, the first minimum voltage to a first dynamic voltage and frequency scaling (DVFS) table coupled to the first controller and the first element; and providing a first-row selection, by the first controller, of the first DVFS table, wherein the first DVFS table selects the second operation point of the first element determined based on the first minimum voltage and the first-row selection.

[0079] Example aspect 9. The method of example aspect 7 or 8, further comprising: receiving, by the logic, a second predictive temperature and a second predictive power consumption generated by the first predictive model, the second predictive temperature and the second predictive power consumption determined based on a second power consumption a second performance state residency, and a second temperature of a second element operating at a third operation point, the second element being associated with the semiconductor device; generating,by the first predictive model, a second temperature target and a second temperature timescale, the second temperature target and the second temperature timescale determined based on at least the second temperature and the second performance state residency; generating, by the first predictive model, a second power consumption target and a second power consumption timescale, the second power consumption target and the second power consumption timescale determined based on at least the second power consumption and the second performance state residency; receiving, by the logic, a second temperature-based minimum voltage generated by a second temperature controller coupled with the first predictive model and the logic, the second temperature-based minimum voltage determined based on the second temperature, the second temperature target, and the second temperature timescale; receiving, by the logic, a second power-consumption-based minimum voltage generated by a second power consumption controller coupled with the first predictive model and the logic, the second power consumption-based minimum voltage determined based on at least the second power consumption the second power consumption target and the second power consumption timescale; generating, by the logic, a second minimum voltage determined based on the received second temperature-based minimum voltage, the second predictive temperature, the second predictive power consumption the second power-consumption- based minimum voltage, and the second performance state residency; and directing a second controller, coupled with the logic and the second element, to set a fourth operation point, the fourth operation point determined based on the second minimum voltage of the second element.

[0080] Example aspect 10. The method of example aspect 9, wherein a third voltage of the second element corresponds to the third operation point and a fourth voltage of the second element corresponds to the fourth operation point, the third voltage differing from the fourth voltage.

[0081] Example aspect 11. The method of example aspect 10, wherein directing the second controller to set the fourth operation point further comprises: providing, by the logic, the second minimum voltage to the second controller, the second controller receiving the second power consumption and the second temperature of the second element; providing, by the logic, the second minimum voltage to a second dynamic voltage and frequency scaling (DVFS) table coupled to the second controller and the second element; and providing a second-row selection, by the second controller, of the second DVFS table, wherein the second DVFS table selects the fourth operation point of the second element determined based on the second minimum voltage and the second-row selection.

[0082] Example aspect 12. The method of example aspect 7, further comprising: receiving, by the logic, a second predictive temperature and a second predictive power consumption generated by a second predictive model coupled with the logic, the second predictivetemperature and the second predictive power consumption determined based on a second power consumption a second performance state residency, and a second temperature of a second element associated with a semiconductor device, and a second temperature of a second element operating at a third operation point, the second element being associated with the semiconductor device; generating, by the second predictive model, a second temperature target and a second temperature timescale, the second temperature target and the second temperature timescale are determined based on at least the second temperature and the second performance state residency; generating, by the second predictive model, a second power consumption target and a second power consumption timescale, the second power consumption target and the second power consumption timescale determined based on at least the second power consumption and the second performance state residency; receiving, by the logic, a second temperature-based minimum voltage generated by a second temperature controller coupled with the second predictive model and the logic, the second temperature-based minimum voltage determined based on the second temperature, the second temperature target, and the second temperature timescale; receiving, by the logic, a second power-consumption-based minimum voltage generated by a second power consumption controller coupled with the second predictive model and the logic, the second power-consumption-based minimum voltage determined based on at least the second power consumption the second power consumption target and the second power consumption timescale; generating, by the logic, a second minimum voltage determined based on the received second temperature-based minimum voltage, the second predictive temperature, the second predictive power consumption the second power-consumption-based minimum voltage, and the second performance state residency; and directing a second controller, coupled with the logic and the second element, to set a fourth operation point, determined based on the second minimum voltage, of the second element.

[0083] Example aspect 13. The method of example aspect 12, wherein a third voltage of the second element corresponds to the third operation point and a fourth voltage of the second element corresponds to the fourth operation point, the third voltage differing from the fourth voltage.

[0084] Example aspect 14. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of example aspects 1 to 13.

[0085] Example aspect 15. An apparatus configured to perfonn the method of any one of example aspects 1 to 13.

[0086] Example aspect 16. A system comprising: a first element of a semiconductor device, the first element including a first power consumption a first performance state residency, and a first temperature at a first operation point of the first element; a first predictive modelcoupled with the first element, the first predictive model configured to generate a first predictive temperature and a first predictive power consumption based on the first power consumption the first performance state residency, and the first temperature of the first element operating at the first operation point; and a logic coupled with the first element and with the first predictive model, the logic configured to receive a first temperature-based minimum voltage and a first power-consumption-based minimum voltage, the logic configured to generate a first minimum voltage determined based on the received first temperature-based minimum voltage, the received first power-consumption-based minimum voltage, the first predictive temperature, the first predictive power consumption and the first performance state residency and to direct the first element to operate at a second operation point.

[0087] Example aspect 17. The system of example aspect 16, wherein: the first predictive model is configured to further generate a first temperature target, a first temperature timescale, a first power consumption target, and a first power consumption timescale determined based on the first power consumption the first performance state residency, and the first temperature of the first element operating at the first operation point.

[0088] Example aspect 18. The system of example aspect 17, wherein: the first temperature-based minimum voltage is determined based on the first temperature of the first element operating at the first operation point, the first temperature target, and the first temperature timescale; and the first power-consumption-based minimum voltage is determined based on the first power consumption of the first element operating at the first operation point, the first power consumption target, and the first power consumption timescale.

[0089] Example aspect 19. The system of example aspect 18, further comprising: a first temperature controller coupled with the first predictive model and the logic, the first temperature controller configured to generate the first temperature-based minimum voltage; and a first power controller coupled with the first predictive model and the logic, the first power controller configured to generate the first power-consumption-based minimum voltage.

[0090] Example aspect 20. The system of example aspect 19, further comprising: a first controller coupled with the logic; and a first dynamic voltage and frequency scaling (DVFS) table coupled with the logic, the first controller, and the first element, the first controller configured to provide a first-row selection to the first DVFS table based on the first minimum voltage, from the logic, and the first DVFS table configured to direct the first element to operate at the second operation point based on the received first minimum voltage, from the logic, and the received first- row selection from the first controller.

[0091] Example aspect 21. The system of any one of example aspects 16 through 20, further comprising: a second element of the semiconductor device, the second element includinga second power consumption a second performance state residency, and a second temperature at a third operation point of the second element; the first predictive model coupled with the second element, the first predictive model configured to generate a second predictive temperature and a second predictive power consumption based on the second power consumption the second performance state residency, and the second temperature of the second element operating at the third operation point; and the logic coupled with the second element and with the first predictive model, the logic configured to receive a second temperature-based minimum voltage and a second power-consumption-based minimum voltage, the logic configured to generate a second minimum voltage determined based on the received second temperature-based minimum voltage, the received second power-consumption-based minimum voltage, the second predictive temperature, the second predictive power consumption and the second performance state residency and to direct the second element to operate at a fourth operation point.

[0092] Example aspect 22. The system of any one of example aspects 16 through 21, wherein: the first predictive model is configured to further generate a second temperature target, a second temperature timescale, a second power consumption target, and a second power consumption timescale determined based on the second power consumption the second performance state residency, and the second temperature of the first element operating at the third operation point.

[0093] Example aspect 23. The system of any one of example aspects 16 through 22, wherein: the second temperature-based minimum voltage is determined based on the second temperature of the second element operating at the third operation point, the second temperature target, and the second temperature timescale; and the second power-consumption-based minimum voltage is determined based on the second power consumption of the second element operating at the third operation point, the second power consumption target, and the second power consumption timescale.

[0094] Example aspect 24. The system of any one of example aspects 16 through 23, further comprising: a second temperature controller coupled with the first predictive model and the logic, the second temperature controller configured to generate the second temperature-based minimum voltage; and a second power controller coupled with the first predictive model and the logic, the second power controller configured to generate the second power-consumption-based minimum voltage.

[0095] Example aspect 25. The system of any one of example aspects 16 through 24, further comprising: a second controller coupled with the logic; and a second dynamic voltage and frequency scaling (DVFS) table coupled with the logic, the second controller, and the second element, the second controller configured to provide a second-row selection to the second DVFStable based on the second minimum voltage, from the logic, and the second DVFS table configured to direct the second element to operate at the fourth operation point based on the received second minimum voltage, from the logic, and the received second-row selection from the second controller.

[0096] Example aspect 26. The system of any one of example aspects 16 through 20, further comprising: a second element of the semiconductor device, the second element including a second power consumption a second performance state residency, and a second temperature at a third operation point of the second element; a second predictive model coupled with the second element, the second predictive model configured to generate a second predictive temperature and a second predictive power consumption based on the second power consumption the second performance state residency, and the second temperature of the second element operating at the third operation point; and the logic coupled with the second element and with the second predictive model, the logic configured to receive a second temperature-based minimum voltage and a second power-consumption-based minimum voltage, the logic configured to generate a second minimum voltage determined based on the received second temperature-based minimum voltage, the received second power-consumption-based minimum voltage, the second predictive temperature, the second predictive power consumption and the second performance state residency and to direct the second element to operate at a fourth operation point.

[0097] Example aspect 27. The system of any one of example aspects 16 through 20 and 26, wherein: the second predictive model is configured to further generate a second temperature target, a second temperature timescale, a second power consumption target, and a second power consumption timescale determined based on the second power consumption the second performance state residency, and the second temperature of the second element operating at the third operation point.

[0098] Example aspect 28. The system of any one of example aspects 16 through 20, 26, and 27, wherein: the second temperature-based minimum voltage is determined based on the second temperature of the second element operating at the third operation point, the second temperature target, and the second temperature timescale; and the second power-consumption-based minimum voltage is determined based on the second power consumption of the second element operating at the third operation point, the second power consumption target, and the second power consumption timescale.

[0099] Example aspect 29. The system of any one of example aspects 16 through 20 and 26 through 28, further comprising: a second temperature controller coupled with the second predictive model and the logic, the second temperature controller configured to generate the second temperature-based minimum voltage; and a second power controller coupled with thesecond predictive model and the logic, the second power controller configured to generate the second power-consumption-based minimum voltage.

[0100] Example aspect 30. The system of any one of example aspects 16 through 20 and 26 through 29, further comprising: a second controller coupled with the logic; and a second dynamic voltage and frequency scaling (DVFS) table coupled with the logic, the second controller, and the second element, the second controller configured to provide a second-row selection to the second DVFS table based on the second minimum voltage, from the logic, and the second DVFS table configured to direct the second element to operate at the fourth operation point based on the received second minimum voltage, from the logic, and the received second-row selection from the second controller.Conclusion

[0101] Unless context dictates otherwise, use herein of the word “or” may be considered use of an “inclusive or,” or a term that permits inclusion or application of one or more items that are linked by the word “or” (e.g., a phrase “A or B” may be interpreted as permitting just “A,” as permitting just “B,” or as permitting both “A” and “B”). Also, as used herein, a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. For instance, “at least one of a, b, or c” can cover a, b. c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c, or any other ordering of a, b, and c). Further, items represented in the accompanying figures and terms discussed herein may be indicative of one or more items or terms, and thus reference may be made interchangeably to single or plural forms of the items and terms in this written description.

[0102] Although implementations for dynamic control of minimum voltage for semiconductor devices have been described in language specific to certain features and / or methods, the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as example implementations for dynamic control of minimum voltage for semiconductor devices.

Claims

CLAIMSWhat is claimed is:

1. A method comprising: receiving a first predictive temperature and a first predictive power consumption, the first predictive temperature and the first predictive power consumption determined based on a first power consumption, a first performance state residency, and a first temperature of a first element operating at a first operation point, the first element being associated with a semiconductor device; receiving a first temperature-based minimum voltage determined based on at least the first temperature; receiving a first power-consumption-based minimum voltage determined based on at least the first power consumption; generating a first minimum voltage determined based on the received first temperature-based minimum voltage, the first predictive temperature, the first predictive power consumption, the first power-consumption-based minimum voltage, and the first performance state residency; and directing a first controller to set a second operation point, the second operation point determined based on the first minimum voltage, of the first element, the second operation point differing from the first operation point.

2. The method of claim 1, wherein the method is performed by a logic coupled with the first element and the first controller.

3. The method of claim 2, wherein a first voltage of the first element corresponds to the first operation point and a second voltage of the first element corresponds to the second operation point.

4. The method of claim 3, wherein the first voltage is greater than the second voltage.

5. The method of claim 3, wherein the second voltage is greater than the first voltage.

6. The method of any one of claims 2 to 5, further comprising: receiving a first temperature target and a first temperature timescale, the first temperature target and the first temperature timescale generated by a first predictive model coupled with the logic, wherein the first temperature target and the first temperature timescale are determined based on the first temperature and the first performance state residency; receiving a first power consumption target and a first power consumption timescale, the first power consumption target and the first power consumption timescale generated by the first predictive model, the first power consumption target and the first power consumption timescale determined based on at least the first power consumption and the first performance state residency; and wherein the received first predictive temperature and first predictive power consumption are generated by the first predictive model.

7. The method of claim 6, wherein: the first power-consumption-based minimum voltage is generated by a first power consumption controller coupled with the first predictive model and the logic, the first power-consumption-based minimum voltage determined based on the first power consumption, the first power consumption target, and the first power consumption timescale; and the first temperature-based minimum voltage is generated by a first temperature controller coupled with the first predictive model and the logic, the first temperature-based minimum voltage determined based on the first temperature, the first temperature target, and the first temperature timescale.

8. The method of claim 7, wherein directing the first controller to set the second operation point further comprises: providing, by the logic, the first minimum voltage to the first controller, the first controller receiving the first power consumption and the first temperature of the first element; providing, by the logic, the first minimum voltage to a first dynamic voltage and frequency scaling (DVFS) table coupled to the first controller and the first element; and providing a first-row selection, by the first controller, of the first DVFS table, wherein the first DVFS table selects the second operation point of the first element determined based on the first minimum voltage and the first-row selection.

9. The method of claim 7 or 8, further comprising: receiving, by the logic, a second predictive temperature and a second predictive power consumption generated by the first predictive model, the second predictive temperature and the second predictive power consumption determined based on a second power consumption, a second performance state residency, and a second temperature of a second element operating at a third operation point, the second element being associated with the semiconductor device; generating, by the first predictive model, a second temperature target and a second temperature timescale, the second temperature target and the second temperature timescale determined based on at least the second temperature and the second performance state residency; generating, by the first predictive model, a second power consumption target and a second power consumption timescale, the second power consumption target and the second power consumption timescale determined based on at least the second power consumption and the second performance state residency; receiving, by the logic, a second temperature-based minimum voltage generated by a second temperature controller coupled with the first predictive model and the logic, the second temperature-based minimum voltage determined based on the second temperature, the second temperature target, and the second temperature timescale; receiving, by the logic, a second power-consumption-based minimum voltage generated by a second power consumption controller coupled with the first predictive model and the logic, the second power-consumption-based minimum voltage determined based on at least the second power consumption, the second power consumption target, and the second power consumption timescale; generating, by the logic, a second minimum voltage determined based on the received second temperature-based minimum voltage, the second predictive temperature, the second predictive power consumption, the second power-consumption-based minimum voltage, and the second performance state residency; and directing a second controller, coupled with the logic and the second element, to set a fourth operation point, the fourth operation point determined based on the second minimum voltage of the second element.

10. The method of claim 9. wherein a third voltage of the second element corresponds to the third operation point and a fourth voltage of the second element corresponds to the fourth operation point, the third voltage differing from the fourth voltage.

11. The method of claim 10, wherein directing the second controller to set the fourth operation point further comprises: providing, by the logic, the second minimum voltage to the second controller, the second controller receiving the second power consumption and the second temperature of the second element; providing, by the logic, the second minimum voltage to a second dynamic voltage and frequency scaling (DVFS) table coupled to the second controller and the second element; and providing a second-row selection, by the second controller, of the second DVFS table, wherein the second DVFS table selects the fourth operation point of the second element determined based on the second minimum voltage and the second-row selection.

12. The method of claim 7, further comprising: receiving, by the logic, a second predictive temperature and a second predictive power consumption generated by a second predictive model coupled with the logic, the second predictive temperature and the second predictive power consumption determined based on a second power consumption, a second performance state residency, and a second temperature of a second element associated with a semiconductor device, and a second temperature of a second element operating at a third operation point, the second element being associated with the semiconductor device; generating, by the second predictive model, a second temperature target and a second temperature timescale, the second temperature target and the second temperature timescale determined based on at least the second temperature and the second performance state residency; generating, by the second predictive model, a second power consumption target and a second power consumption timescale, the second power consumption target and the second power consumption timescale determined based on at least the second power consumption and the second performance state residency; receiving, by the logic, a second temperature-based minimum voltage generated by a second temperature controller coupled with the second predictive model and the logic, the second temperature-based minimum voltage determined based on the second temperature, the second temperature target, and the second temperature timescale; receiving, by the logic, a second power-consumption-based minimum voltage generated by a second power consumption controller coupled with the second predictive model and the logic, the second power-consumption-based minimum voltage determined based on at least the second power consumption, the second power consumption target, and the second power consumption timescale; generating, by the logic, a second minimum voltage determined based on the received second temperature-based minimum voltage, the second predictive temperature, the second predictive power consumption, the second power-consumption-based minimum voltage, and the second performance state residency; and directing a second controller, coupled with the logic and the second element, to set a fourth operation point, determined based on the second minimum voltage, of the second element.

13. The method of claim 12, wherein a third voltage of the second element corresponds to the third operation point and a fourth voltage of the second element corresponds to the fourth operation point, the third voltage differing from the fourth voltage.

14. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of claims 1 to 13.

15. An apparatus configured to perform the method of any one of claims 1 to 13.

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