Ethernet Physical Layer Device Having An Integrated Physical Coding And Forward Error Correction Sub-Layers

Abstract

Disclosed are Ethernet physical layer devices (e.g., a transceiver, a receiver and a transmitter) with integrated physical coding and forward error correction sub-layers. Each physical layer device includes a physical coding sub-layer (PCS), a forward error correction sub-layer (FEC) and integration block(s). Each integration block halts, for some number of clock cycles, a data stream in portionsof a data path (e.g., portions of a transmitter (TX) data path or portions a receiver (RX) data path) within the PCS and the FEC in order to compensate for processing of that data stream by a data processor (e.g., a code word mark (CWM) inserter or a CWM remover) contained in the portion of the data path within the FEC. Use of such integration block(s) eliminates the need for redundant componentsin the PCS and FEC, thereby reducing latency, costs and chip area consumption. Also disclosed are associated methods.

Description

technical field [0001] The present invention relates to an Ethernet physical layer device, and more particularly, to an Ethernet physical layer device with an integrated physical coding and forward error correction sublayer. Background technique [0002] The Open Systems Interconnection (OSI) model characterizes and standardizes communication functions in network link applications. No matter what kind of network link technology, this OSI model has the following layers: physical layer, data link layer, network layer, transport layer, conversation layer, presentation layer and application layer. "Ethernet" refers to a family of network link technologies commonly used in, for example, Local Area Networks (LANs) and Metropolitan Area Networks (MANs). Different Ethernet network link technologies are defined by the Ethernet frame transfer rate (for example: in gigabits per second (Gb / s)), these different Ethernet network link technologies are governed by the Institute of Electric...

AI Technical Summary

Problems solved by technology

However, depending on the Ethernet network link technology in question, the architecture of a particular OSI model layer (e.g., physical layer) may change and improvements are expected (e.g., to reduce latency, cost, and / or chip area consumption)

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