Circuit structure for charging box, charging box, Bluetooth headset and smart glasses

Abstract

The circuit structure for a charging box provided by the present invention is used for independently charging and / or communicating two loads placed in the charging box, including: a charging module, a communication module, a common control module, a first electrical contact point, and a second electrical contact point; the charging module includes a voltage input terminal, a first switch unit, and a second switch unit, and the second end of the first switch unit and the second end of the second switch unit are respectively connected to the first electrical contact point and the second electrical contact point; the communication module includes a signal input terminal, a third switch unit, and a fourth switch unit, and the second end of the third switch unit and the second end of the fourth switch unit are respectively connected to the first electrical contact point and the second electrical contact point; the common control module controls the on and off of the first switch unit, the second switch unit, the third switch unit, and the fourth switch unit respectively.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to a circuit structure for a charging box, a charging box, a Bluetooth headset, and smart glasses. Background Art

[0002] Popular consumer electronics products such as TWS earphones or smart glasses often require a storage and charging box. This type of box can also charge the left and right earphones or the left and right temples or exchange information at the same time. However, the electrical contact points (Pogo pins) for interaction on the box are limited. Generally, each earphone or temple has two contacts (one for power and signal, and one for the common ground pin). This requires a circuit in the box to manage the corresponding contacts to achieve safe, reliable and cost-controlled time-sharing external power supply and time-sharing communication with the outside world.

[0003] In the prior art, discrete circuits are used to implement this. The discrete circuits are respectively connected to the contacts POGO1 and POGO2 of the left and right earphones (or the left and right temples of the smart glasses). In fact, they are directly short-circuited together in the circuit. Therefore, the system supplies power to VIN, and the power supply on VIN, such as 5V DC voltage, will directly charge the left and right earphones (or the left and right temples of the smart glasses (if the batteries of the left and right temples are independent) at the same time. In addition, when the power supply to VIN is removed, a suitable driving voltage is input to conduct the channel between the signal input end and the contacts POGO1 and POGO2, and the COMM signal will communicate with the left and right earphones (or the left and right temples (if the control functions of the left and right temples are independent)) through the contacts POGO1 and POGO2 at the same time; the contacts POGO1 and POGO2 of the above scheme are short-circuited together for use, which also results in that the devices connected to the two contacts must be connected to the charging power supply or the communication signal at the same time, which will increase the difficulty of charging management and signal interaction management of the box and the external device. Summary of the invention

[0004] The present invention provides an integrated circuit structure with independent power supply and communication, a charging box, a true wireless stereo Bluetooth headset and smart glasses, which solves the problem that an external device must be connected to a charging power source or a communication signal at the same time.

[0005] According to a first aspect of the present invention, there is provided a circuit structure for a charging box, for independently charging and / or communicating two loads placed in the charging box, comprising: a charging module, a communication module, a common control module, a first electrical contact point, and a second electrical contact point;

[0006] The charging module comprises a voltage input terminal, a first switch unit and a second switch unit, the voltage input terminal is connected to a first terminal of the first switch unit and a first terminal of the second switch unit, and a second terminal of the first switch unit and a second terminal of the second switch unit are connected to the first electrical contact point and the second electrical contact point respectively;

[0007] The communication module comprises a signal input terminal, a third switch unit and a fourth switch unit, the signal input terminal is connected to a first terminal of the third switch unit and a first terminal of the fourth switch unit, and a second terminal of the third switch unit and a second terminal of the fourth switch unit are connected to the first electrical contact point and the second electrical contact point respectively;

[0008] The first end of the common control module is connected to the voltage input end; the second end, the third end, the fourth end and the fifth end of the common control module are respectively connected to the control end of the first switch unit, the control end of the second switch unit, the control end of the third switch unit and the control end of the fourth switch unit, so as to respectively control the on and off of the first switch unit, the second switch unit, the third switch unit and the fourth switch unit; the common control module also includes a reference voltage and command input end and a first ground end;

[0009] Wherein, the charging module is used to: control the first electrical contact point and the second electrical contact point to access voltage through the first switch unit and the second switch unit;

[0010] The communication module is used to: control the first electrical contact point and the second electrical contact point to communicate and interact with the signal input end through the third switch unit and the fourth switch unit;

[0011] The common control module is used to independently control the on and off of the first switch unit, the second switch unit, the third switch unit, and the fourth switch unit to control the charging and / or communication of the first electrical contact point and the second electrical contact point;

[0012] The first electrical contact point is used to: charge the first load or execute a communication command;

[0013] The second electrical contact point is used to: charge the second load or execute a communication command;

[0014] The reference voltage and command input terminal is used to input control commands and reference voltage;

[0015] The signal input end is used for communication signal interaction.

[0016] Optionally, the first switch unit includes a first NMOS tube, the second switch unit includes a second NMOS tube, the drain of the first NMOS tube and the drain of the second NMOS tube are connected to the voltage input terminal, the source of the first NMOS tube is connected to the first electrical contact point, and the gate of the first NMOS tube is connected to the second terminal of the common control module; the third terminal of the common control module is connected to the gate of the second NMOS tube, and the source of the second NMOS tube is connected to the second electrical contact point;

[0017] Wherein, the first NMOS tube is used to: control the connection between the voltage input terminal and the first electrical contact point;

[0018] The second NMOS transistor is used to control the connection between the voltage input terminal and the second electrical contact point.

[0019] Optionally, the charging module also includes a capacitor and a second ground terminal; the first end of the capacitor is connected to the voltage input terminal, and the second end of the capacitor is connected to the second ground terminal.

[0020] Optionally, the first NMOS transistor includes a first substrate switching switch and a second substrate switching switch, wherein a first end of the first substrate switching switch is connected to a drain of the first NMOS transistor, a second end of the first substrate switching switch and a first end of the second substrate switching switch are both connected to a substrate of the first NMOS transistor, and a second end of the second substrate switching switch is connected to a source of the first NMOS transistor;

[0021] The first substrate switching switch and the second substrate switching switch are used for:

[0022] When the voltage at the voltage input terminal is lower than the voltage at the first electrical contact point, the first substrate switching switch is closed and the second substrate switching switch is opened to cut off the circuit between the first electrical contact point and the voltage input terminal;

[0023] When the voltage at the voltage input terminal is higher than the voltage at the first electrical contact point, the first substrate switching switch is opened and the second substrate switching switch is closed to disconnect the circuit from the voltage input terminal to the first electrical contact point.

[0024] Optionally, the second NMOS transistor includes a third substrate switching switch and a fourth substrate switching switch, a first end of the third substrate switching switch is connected to the drain of the second NMOS transistor, a second end of the third substrate switching switch and a first end of the fourth substrate switching switch are both connected to the substrate of the second NMOS transistor, and a second end of the fourth substrate switching switch is connected to the source of the second NMOS transistor;

[0025] The third substrate switching switch and the fourth substrate switching switch are used for:

[0026] When the voltage at the voltage input terminal is lower than the voltage at the second electrical contact point, the third substrate switching switch is closed and the fourth substrate switching switch is opened, so as to cut off the circuit between the second electrical contact point and the voltage input terminal;

[0027] When the voltage at the voltage input terminal is higher than the voltage at the second electrical contact point, the third substrate switching switch is opened and the fourth substrate switching switch is closed to cut off the circuit between the voltage input terminal and the second electrical contact point.

[0028] Optionally, the third switch unit includes a third NMOS tube, and the fourth switch unit includes a fourth NMOS tube, the drain of the third NMOS tube and the drain of the fourth NMOS tube are both connected to the signal input end; the substrate of the third NMOS tube and the substrate of the fourth NMOS tube are both grounded; the source of the third NMOS tube is connected to the first electrical contact point, and the gate of the third NMOS tube is connected to the fourth end of the common control module; the source of the fourth NMOS tube is connected to the second electrical contact point, and the gate of the fourth NMOS tube is connected to the fifth end of the common control module;

[0029] The third NMOS tube is used to: control the connection between the signal input terminal and the first electrical contact point;

[0030] The fourth NMOS transistor is used to control the connection between the signal input terminal and the second electrical contact point.

[0031] Optionally, the communication module also includes a third resistor and a fifth switching switch, the first end of the fifth switching switch is connected to the reference voltage and the command input end, the second end of the fifth switching switch is connected to the first end of the third resistor, the control end of the fifth switching switch is connected to the sixth end of the common control module, and the second end of the third resistor is connected to the signal input end.

[0032] Optionally, the common control module includes a charge pump unit, a linear buck unit, and a logic control unit; wherein:

[0033] The charge pump unit is used to: output control signals to the gate of the first NMOS tube and the gate of the second NMOS tube through the second terminal and the third terminal respectively, so as to control the conduction and shutdown of the first NMOS tube and the second NMOS tube respectively;

[0034] The linear step-down unit is used to: step down the reference voltage and the reference voltage of the command input terminal to generate a logic high level voltage matching the first electrical contact point and / or the second electrical contact point, and the logic high level voltage is used to provide a logic high level reference to the first electrical contact point and / or the second electrical contact point when the first electrical contact point and / or the second electrical contact point communicate with the signal input terminal;

[0035] The logic control unit is used to receive the reference voltage and the control command issued by the command input terminal, so as to control the on and off of the fifth switching switch through the sixth terminal output control, and then provide a logic high level reference to the signal input terminal when communication occurs between the first electrical contact point and the signal input terminal and between the second electrical contact point and the signal input terminal.

[0036] Optionally, the common control module also includes a first PMOS tube and a first resistor, the drain of the first PMOS tube is connected to the first end of the linear buck unit, the drain of the first PMOS tube is also connected to the gate of the third NMOS tube, the gate of the first PMOS tube is connected to the common control module, the source of the first PMOS tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first electrical contact.

[0037] Optionally, the common control module also includes a second PMOS tube and a second resistor, the drain of the second PMOS tube is connected to the second end of the linear buck unit, the drain of the second PMOS tube is also connected to the gate of the fourth NMOS tube, the gate of the second PMOS tube is connected to the common control module, the source of the second PMOS tube is connected to the first end of the second resistor, and the second end of the second resistor is connected to the second electrical contact.

[0038] According to a second aspect of the present invention, a charging box is provided, comprising the circuit structure for the charging box described in the first aspect.

[0039] According to a third aspect of the present invention, there is provided a true wireless stereo Bluetooth headset, comprising the charging box described in the third aspect.

[0040] According to a fourth aspect of the present invention, there is provided a pair of smart glasses comprising the charging box described in the third aspect.

[0041] The circuit structure of the charging box provided by the present invention adopts six pins. By separating the first electrical contact contact and the second electrical contact contact, independent operation of each electrical contact contact is achieved. For example, when the first electrical contact contact is charging, the second electrical contact contact can communicate, avoiding the need for devices externally connected to the two electrical contact contacts to be connected to a charging power source or to communication signals at the same time. In addition, the present invention combines the command interface and the reference voltage interface into one to form the reference voltage and command input terminal, avoiding the need to use an extra external pin, further reducing the area occupied by the circuit board of the finished electronic product.

[0042] In a preferred embodiment, the NMOS tubes used in the first switch unit and the second switch unit of the present invention include two substrate switching switches, so that the substrate can be switched to the source or drain of the NMOS tube, further realizing the use of one NMOS tube to support a bidirectional shutdown function, and one NMOS tube also reduces the on-resistance of the channel from the voltage input terminal to the first electrical contact contact and the second electrical contact contact.

[0043] In other preferred embodiments, the third switch unit and the fourth switch unit of the present invention, by using an NMOS tube and short-circuiting the substrate of the NMOS tube directly to the ground level, i.e., GND, ensure that the level switching communication circuit channel from the signal input terminal to the first electrical contact point and the second electrical contact point can be completely bidirectionally shut down when the gate of a corresponding NMOS tube is connected to GND.

[0044] In addition, the present invention also connects the first resistor and the second resistor to the output voltage pin of the internal linear buck unit through the first PMOS tube and the second PMOS tube respectively, so that when the first PMOS tube and the second PMOS tube are turned on, the output voltage of the linear buck unit can be stabilized and the logic high level of the first electrical contact point and / or the second electrical contact point can be pulled up with very small voltage drop loss, and when the first PMOS tube and the second PMOS tube are turned off, the influence of the high voltage that may appear on the first electrical contact point and the second electrical contact point on the internal circuit module of the present invention can be well isolated. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0046] Figure 1 It is a schematic diagram of a circuit structure for a charging box that is different from the embodiment of the present invention;

[0047] Figure 2 Schematic diagram of the circuit structure of the charging box in one embodiment of the present invention Figure 1 ;

[0048] Figure 3 Schematic diagram of the circuit structure of the charging box in one embodiment of the present invention Figure 2 .

[0049] Description of reference numerals:

[0050] 1- Charging module;

[0051] 101-a first switch unit;

[0052] 1011-first NMOS tube;

[0053] 10111-first switching switch;

[0054] 10112-second switching switch;

[0055] 102- a second switch unit;

[0056] 1021- the second NMOS tube;

[0057] 10211-third switching switch;

[0058] 10212- fourth switch;

[0059] 103- voltage input terminal;

[0060] 104-capacitor;

[0061] 105- a second ground terminal;

[0062] 2- Communication module;

[0063] 201- a third switch unit;

[0064] 2011-The third NMOS tube;

[0065] 202- fourth switch unit;

[0066] 2021-the fourth NMOS tube;

[0067] 203- signal input terminal;

[0068] 204- reference voltage and command input terminal;

[0069] 205-a first ground terminal;

[0070] 206 - a third resistor;

[0071] 207-fifth switching switch;

[0072] 3- Public control module;

[0073] 301-first PMOS tube;

[0074] 302- a first resistor;

[0075] 303-second PMOS tube;

[0076] 304- a second resistor;

[0077] 4- a first electrical contact point;

[0078] 5 - Second electrical contact point. DETAILED DESCRIPTION

[0079] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0080] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0081] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0082] Before filing this application, the applicant conducted a thorough study on the circuit structure of the charging box and proposed a Figure 1 The circuit structure of the charging box shown in FIG. Figure 1In the circuit of the charging box shown in the figure, the two electrical contact points (i.e., POGO1 and POGO2) need to be connected to the charging power supply at the same time or must be connected to the communication signal at the same time. Figure 1 As shown, the circuit structure of the charging box includes: a PMOS tube P1, 3 NMOS tubes N1, N2, N3, a diode D1, a linear regulator LDO, 3 resistors R1, R2, R3, and a capacitor C1;

[0083] Please refer to Figure 1 , the voltage input terminal VIN is connected to the first end of the capacitor C1, the second end of the capacitor C1 is grounded, the voltage input terminal VIN is also connected to the drain of P1, the source of P1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the gate of P1, the gate of P1 is also connected to the drain of N1, the source of N1 is grounded, the gate of N1 is connected to the enable control terminal EN, the source of P1 is also connected to two electrical contact points (i.e., POGO1 and POGO2), POGO1 and POGO2 are short-circuited together, POGO1 and POGO2 are also connected to the first end of R2, the second end of R2 The first end of the linear regulator (i.e., LDO) is connected to the cathode of the diode D1, the anode of D1 is connected to the gate of N2, the source of N2 is connected to the first end of R2, the drain of N2 is connected to the drain of N3, the source of N3 is connected to the first end of R3, the source of N3 is also connected to the signal input terminal COMM, the second end of R3 is connected to the gate of N3, the gate of N3 is connected to the first end of the linear regulator (i.e., LDO) and the second reference voltage input terminal VREF2, the second end of the linear regulator (i.e., LDO) is connected to the first reference voltage output terminal VREF1, and the first reference voltage output terminal VREF1 is also connected to the gate of N2.

[0084] Specific Figure 1 In the scheme shown, since a capacitor, such as capacitor C1, must be connected to the voltage input terminal VIN, the main function of P1 here is to isolate the influence of the isolation capacitor C1 on the communication signals on POGO1 and POGO2 when P1 is turned off.

[0085] The shutdown of P1 is achieved through N1 and R1. Specifically, when a logic ground level GND is given to the enable control terminal EN, N1 is turned off, and P1 is disconnected at this time; conversely, when a logic high level is given to the enable control terminal EN, N1 is turned on, and P1 is turned on.

[0086] Regarding the charging function, when the following conditions are met at the same time: P1 is turned on, the voltage input terminal VIN has a voltage that meets the requirements, and N2 and N3 are turned off; the VIN voltage can be given to the contacts POGO1 and POGO2 for charging the rear-end loads, such as headphones, glasses and other devices.

[0087] Regarding the communication function, when P1 is disconnected and the voltage at the voltage input terminal VIN is removed (that is, the voltage at the voltage input terminal VIN is zero), the anode of the body diode of P1 is connected to the capacitor, and the cathode contact point of the body diode of P1 (POGO1 or POGO2) ensures that when N2 and N3 turn on the communication channel between the signal input terminal COMM and POGO1 / POGO2, the capacitor C1 will not affect their normal communication.

[0088] For the communication channel formed by N2 and N3 in series, the voltage of the second reference voltage input terminal VREF2 is consistent with the logic high level voltage of the communication signal of the signal input terminal COMM; the voltage of the second reference voltage input terminal VREF2 outputs the first reference voltage through the linear regulator LDO and the first reference voltage output terminal VREF1, and the voltage of the first reference voltage output terminal VREF1 is consistent with the logic high level voltage of the communication signals of POGO1 and POGO2. The resistor R3 is used to pull the logic high level of the signal input terminal COMM to be consistent with the voltage of the second reference voltage input terminal VREF2; and the resistor R2 is used to pull the logic high level of the POGO1 / POGO2 pin to be consistent with the voltage of the first reference voltage output terminal VREF1.

[0089] The diode D1 utilizes the reverse cutoff function of the diode to prevent the circuit related to the first reference voltage output terminal VREF1 from being damaged when the voltage input terminal VIN has a higher DC voltage than the first reference voltage output terminal VREF1. When the voltage of the second reference voltage input terminal VREF2 is zero (i.e., the ground level GND), the voltage of VREF1 is also zero, that is, the series channel of N2 and N3 can be completely shut down in both directions.

[0090] Specifically, devices N2, N3, R2, R3, D1 and LDO form a channel between the signal input terminal COMM and POGO1 / POGO2 that can be bidirectionally shut down and can also communicate bidirectionally with level switching; specifically, bidirectional shutoff is performed when the second reference voltage input terminal VREF2 is GND; when the second reference voltage input terminal VREF2 is at a high level and consistent with the logic high level of the signal input terminal COMM, and the second reference voltage input terminal VREF2 generates the required first reference voltage through the linear regulator LDO to be consistent with the logic high level of the communication signal of the device connected to POGO1 or POGO2, compatible bidirectional communication is achieved even if the logic high levels of the signal input terminal COMM and POGO1 / POGO2 are different.

[0091] It can be seen that the above solution is a discrete solution built with 9 devices (except the capacitor that needs to be hung on the power pin VIN), which occupies a large area of ​​​​the circuit board. It will also increase the difficulty of device management and procurement. In addition, in order to control costs and use fewer circuits, the external devices of the above solution, such as the contacts POGO1 and POGO2 of the left and right earphones (or the left and right temples), are short-circuited together for use. This also results in the two external devices of the contacts must be connected to the charging power supply at the same time or must be connected to the communication signal at the same time, which will increase the difficulty of charging management and signal interaction management of the box and external devices.

[0092] also, Figure 1 There are several defects in the circuit:

[0093] 1. P1 can only be shut down in one direction. When the contact needs to be switched to the communication scenario, in addition to shutting down P1, the voltage on VIN needs to be removed so that VIN is pulled to the ground level.

[0094] 2. N2 and N3 are connected in series to form a channel in order to achieve bidirectional shutdown, which increases the circuit cost and area.

[0095] 3. After the LDO (linear regulator) is selected, the output voltage VREF1 of the LDO (linear regulator) is fixed, and the circuit cannot flexibly configure the voltage of VREF1 to match the different logic high levels of the interface communication signals of different external devices (such as headphones).

[0096] 4. In order to prevent high voltage on contacts POGO1 and POGO2 from damaging the circuit at VREF1, a diode D1 is added. However, if there is a large current on D1, the forward voltage drop of D1 will be relatively large, which may make the VREF1 voltage unable to match the logic high level voltage required by POGO1 or POGO2 during communication after the forward voltage drop of the diode.

[0097] In view of this, the present invention proposes a new circuit structure for a charging box, using Figure 1 The same number of chip pins achieves Figure 1 More comprehensive functionality of a discrete solution.

[0098] Regarding the solution of the present invention, the specific description is as follows:

[0099] Please refer to Figure 2 The present invention provides a circuit structure for a charging box, which is used to independently charge and / or communicate two loads placed in the charging box, including: a charging module 1, a communication module 2, a common control module 3, a first electrical contact point 4, and a second electrical contact point 5.

[0100] In which, the charging module 1 includes a voltage input terminal 103, a first switch unit 101 and a second switch unit 102, the voltage input terminal 103 is connected to the first end of the first switch unit 101 and the first end of the second switch unit 102, the second end of the first switch unit 101 and the second end of the second switch unit 102 are respectively connected to the first electrical contact 4 and the second electrical contact 5.

[0101] Among them, the communication module 2 includes a signal input terminal 203, a third switch unit 201 and a fourth switch unit 202, the signal input terminal 203 is connected to the first end of the third switch unit 201 and the first end of the fourth switch unit 202, the second end of the third switch unit 201 and the second end of the fourth switch unit 202 are respectively connected to the first electrical contact 4 and the second electrical contact 5.

[0102] Among them, the first end of the common control module 3 is connected to the voltage input end 103; the second end, the third end, the fourth end and the fifth end of the common control module 3 are respectively connected to the control end of the first switch unit 101, the control end of the second switch unit 102, the control end of the third switch unit 201 and the control end of the fourth switch unit 202, so as to respectively control the on and off of the first switch unit 101, the second switch unit 102, the third switch unit 201 and the fourth switch unit 202; the common control module 3 also includes a reference voltage and command input end 204 and a first ground end 205.

[0103] The charging module 1 is used to control the first electrical contact point 4 and the second electrical contact point 5 to access voltage through the first switch unit 101 and the second switch unit 102 .

[0104] The communication module 2 is used to control the first electrical contact point 4 and the second electrical contact point 5 to communicate with the signal input terminal 203 through the third switch unit 201 and the fourth switch unit 202 .

[0105] Among them, the common control module 3 is used to independently control the on and off of the first switch unit 101, the second switch unit 102, the third switch unit 201 and the fourth switch unit 202 to control the charging and / or communication of the first electrical contact 4 and the second electrical contact 5.

[0106] The first electrical contact 4 is used to charge the first load or execute a communication command.

[0107] The second electrical contact 5 is used to charge the second load or execute a communication command.

[0108] The reference voltage and command input terminal 204 is used to input control commands and reference voltages.

[0109] The signal input terminal 203 is used for communication signal interaction.

[0110] In one embodiment, the first electrical contact point 4 charges the first load, and the second electrical contact point 5 executes a communication command to the second load.

[0111] In other embodiments, the first electrical contact point 4 executes a communication command to the first load, and the second electrical contact point 5 charges the second load.

[0112] In addition, the embodiments in which the first electrical contact point 4 and the second electrical contact point 5 simultaneously realize the charging function or simultaneously realize the communication function are prior arts, and will not be described in detail in the present invention.

[0113] It can be seen that in the above scheme, the first electrical contact 4 and the second electrical contact 5 are separated to independently connect to external devices (such as headphones or smart glasses), so as to realize independent control of the charging and communication of the left and right headphones or the left and right temples. At the same time, the reference voltage and command input terminal can be used to receive the command information of the circuit chip of the present invention, and can also be used to receive the logic high level pull-up voltage required for the communication signal of the signal input terminal; because in the circuit architecture of the charging box system, the signal input terminal and the reference voltage and command input terminal are connected to the input and output IO port of the charging box processor, so the reference voltage and command input terminal provide the pull-up logic high level required for the communication of the signal input terminal, which can ensure that the logic high level voltage meets the requirements of the signal input terminal (because the high level voltages of the two IO ports of the same processor can be selected to be consistent), and can also avoid the trouble of using other power supplies or other IO ports to pull up the signal input terminal. In addition, one reference voltage and command input terminal realizes two functions, further saving the cost of the circuit and the area of ​​the circuit board.

[0114] For details about the first switch unit 101 and the second switch unit 102, please refer to Figure 3, the first switch unit 101 includes a first NMOS tube 1011 (i.e., N1), the second switch unit 102 includes a second NMOS tube 1021 (i.e., N2), the drain of the first NMOS tube 1011 (i.e., N1) and the drain of the second NMOS tube 1021 (i.e., N2) are connected to the voltage input terminal 103 (i.e., VIN), the source of the first NMOS tube 1011 (i.e., N1) is connected to the first electrical contact point 4 (i.e., POGO1), and the gate of the first NMOS tube 1011 (i.e., N1) is connected to the second end of the common control module 3; the third end of the common control module 3 is connected to the gate of the second NMOS tube 1021 (i.e., N2), and the source of the second NMOS tube 1021 (i.e., N2) is connected to the second electrical contact point 5 (i.e., POGO2);

[0115] The first NMOS transistor (ie N1 ) 1011 is used to control the connection between the voltage input terminal 103 (ie VIN) and the first electrical contact point 4 (ie POGO1 ).

[0116] The second NMOS transistor 1021 (ie, N2) is used to control the connection between the voltage input terminal 103 (ie, VIN) and the second electrical contact point 5 (ie, POGO2).

[0117] The charging module 1 further includes a capacitor 104 (ie, C1) and a second ground terminal 105; the first end of the capacitor 104 (ie, C1) is connected to the voltage input terminal 103 (ie, VIN), and the second end of the capacitor (ie, C1) 104 is connected to the second ground terminal 105.

[0118] In one example, the first NMOS transistor 1011 (ie, N1) and the second NMOS transistor 1021 (ie, N2) may also be substrate-switchable PMOS transistors combined with corresponding circuits.

[0119] Regarding the first NMOS tube 1011 (ie N1), please continue to refer to Figure 3 , the first NMOS transistor 1011 (i.e., N1) includes a first substrate switching switch 10111 (i.e., S1) and a second substrate switching switch 10112 (i.e., S2), a first end of the first substrate switching switch 10111 (i.e., S1) is connected to the drain of the first NMOS transistor 1011 (i.e., N1), a second end of the first substrate switching switch 10111 (i.e., S1) and a first end of the second substrate switching switch 10112 (i.e., S2) are both connected to the substrate of the first NMOS transistor 1011 (i.e., N1), and a second end of the second substrate switching switch 10112 (i.e., S2) is connected to the source of the first NMOS transistor 1011 (i.e., N1);

[0120] The first substrate switching switch 10111 (ie, S1) and the second substrate switching switch 10112 (ie, S2) are used for:

[0121] When the voltage at the voltage input terminal 103 (i.e., VIN) is lower than the voltage at the first electrical contact point 4 (i.e., POGO1), the first substrate switching switch 10111 (i.e., S1) is closed, and the second substrate switching switch 10112 (i.e., S2) is opened, so as to cut off the circuit between the first electrical contact point 4 (i.e., POGO1) and the voltage input terminal 103 (i.e., VIN);

[0122] When the voltage at the voltage input terminal 103 (i.e., VIN) is higher than the voltage at the first electrical contact point 4 (i.e., POGO1), the first substrate switching switch 10111 (i.e., S1) is disconnected and the second substrate switching switch 10112 (i.e., S2) is closed to achieve the disconnection between the voltage input terminal 103 (i.e., VIN) and the first electrical contact point circuit 4 (i.e., POGO1).

[0123] In a specific embodiment, when the first substrate switching switch 10111 (i.e., S1) is disconnected and the second substrate switching switch 10112 (i.e., S2) is closed, the body diode at the drain end of the first NMOS tube 1011 (i.e., N1) is connected to the circuit, the body diode at the source end of the first NMOS tube 1011 (i.e., N1) is short-circuited, and the cathode of the body diode at the drain end of the first NMOS tube 1011 (i.e., N1) is connected to the voltage input terminal 103 (i.e., VIN). Since the voltage at the voltage input terminal 103 (i.e., VIN) at this time is higher than the voltage at the first electrical contact point 4 (i.e., POGO1), the voltage at the voltage input terminal 103 (i.e., VIN) cannot be transmitted to the first electrical contact point 4 (i.e., POGO1), thereby achieving the disconnection between the circuit from the voltage input terminal 103 (i.e., VIN) to the first electrical contact point 4 (i.e., POGO1).

[0124] In other embodiments, when the first substrate switching switch 10111 (i.e., S1) is closed and the second substrate switching switch 10112 (i.e., S2) is opened, the body diode at the source end of the first NMOS tube 1011 (i.e., N1) is connected to the circuit, the body diode at the drain end of the first NMOS tube 1011 (i.e., N1) is short-circuited, and the anode of the body diode at the drain end of the first NMOS tube 1011 (i.e., N1) is connected to the voltage input terminal 103 (i.e., VIN). Since the voltage at the voltage input terminal 103 (i.e., VIN) at this time is lower than the voltage at the first electrical contact point 4 (i.e., POGO1), the voltage at the first electrical contact point 4 (i.e., POGO1) cannot be transmitted to the voltage input terminal 103 (i.e., VIN), thereby achieving the disconnection of the circuit between the first electrical contact point 4 (i.e., POGO1) and the voltage input terminal 103 (i.e., VIN).

[0125] Regarding the second NMOS tube 1021 (ie, N2), please continue to refer to Figure 3 , the second NMOS transistor 1021 (i.e., N2) includes a third substrate switching switch 10211 (i.e., S3) and a fourth substrate switching switch 10212 (i.e., S4), a first end of the third substrate switching switch 10211 (i.e., S3) is connected to the drain of the second NMOS transistor 1021 (i.e., N2), a second end of the third substrate switching switch 10211 (i.e., S3) and a first end of the fourth substrate switching switch 10212 (i.e., S4) are both connected to the substrate of the second NMOS transistor 1021 (i.e., N2), and a second end of the fourth substrate switching switch 10212 (i.e., S4) is connected to the source of the second NMOS transistor 1021 (i.e., N2);

[0126] The third substrate switching switch 10211 (ie, S3) and the fourth substrate switching switch 10212 (ie, S4) are used for:

[0127] When the voltage at the voltage input terminal 103 (i.e., VIN) is lower than the voltage at the second electrical contact point 5 (i.e., POGO2), the third substrate switching switch 10211 (i.e., S3) is closed, and the fourth substrate switching switch 10212 (i.e., S4) is opened, so as to cut off the circuit between the second electrical contact point 5 (i.e., POGO2) and the voltage input terminal 103 (i.e., VIN);

[0128] When the voltage at the voltage input terminal 103 (i.e., VIN) is higher than the voltage at the second electrical contact point 5 (i.e., POGO2), the third substrate switching switch 10211 (i.e., S3) is disconnected and the fourth substrate switching switch 10212 (i.e., S4) is closed to cut off the circuit between the voltage input terminal 103 (i.e., VIN) and the second electrical contact point 5 (i.e., POGO2).

[0129] In a specific embodiment, when the third substrate switching switch 10211 (i.e., S3) is disconnected and the fourth substrate switching switch 10212 (i.e., S4) is closed, the body diode at the source end of the second NMOS tube 1021 (i.e., N2) is connected to the circuit, the body diode at the drain end of the second NMOS tube 1021 (i.e., N2) is short-circuited, and the cathode of the body diode at the source end of the second NMOS tube 1021 (i.e., N2) is connected to the voltage input terminal 103 (i.e., VIN). Since the voltage at the voltage input terminal 103 (i.e., VIN) at this time is higher than the voltage at the second electrical contact point 5 (i.e., POGO2), the voltage at the voltage input terminal 103 (i.e., VIN) cannot be transmitted to the second electrical contact point 5 (i.e., POGO2), thereby realizing the disconnection between the circuit from the voltage input terminal 103 (i.e., VIN) to the first electrical contact point 4 (i.e., POGO1).

[0130] In other embodiments, when the third substrate switching switch 10211 (i.e., S3) is closed and the fourth substrate switching switch 10212 (i.e., S4) is opened, the body diode at the drain end of the second NMOS tube 1021 (i.e., N2) is connected to the circuit, the body diode at the source end of the second NMOS tube 1021 (i.e., N2) is short-circuited, and the anode of the body diode at the drain end of the second NMOS tube 1021 (i.e., N2) is connected to the voltage input terminal 103 (i.e., VIN). Since the voltage at the voltage input terminal 103 (i.e., VIN) at this time is lower than the voltage at the second electrical contact point 5 (i.e., POGO2), the voltage at the second electrical contact point 5 (i.e., POGO2) cannot be transmitted to the voltage input terminal 103 (i.e., VIN), thereby achieving the disconnection of the circuit between the second electrical contact point 5 (i.e., POGO2) and the voltage input terminal 103 (i.e., VIN).

[0131] The above scheme uses an NMOS tube whose substrate can be switched to the source or drain (i.e., the first NMOS tube 1011 and the second NMOS tube 1021), thereby realizing the use of one NMOS tube to support the bidirectional shutdown function, further preventing the problem of body diode leakage of the NMOS transistor, and one NMOS tube also reduces the on-resistance of the channel from the voltage input terminal to the first electrical contact contact and the second electrical contact contact, avoiding the need for two PMOS or NMOS tubes to be connected in series back to back to realize the bidirectional shutdown function, further saving circuit cost and area.

[0132] Regarding the third switch unit 201 and the fourth switch unit 202, please continue to refer to Figure 3 , the third switch unit 201 includes a third NMOS tube 2011 (i.e., N3), the fourth switch unit 202 includes a fourth NMOS tube 2021 (i.e., N4), the drain of the third NMOS tube 2011 (i.e., N3) and the drain of the fourth NMOS tube 2021 (i.e., N4) are both connected to the signal input terminal 203 (i.e., COMM); the substrate of the third NMOS tube 2011 (i.e., N3) and the substrate of the fourth NMOS tube 2021 (i.e., N4) are both grounded; the source of the third NMOS tube 2011 (i.e., N3) is connected to the first electrical contact point 4 (i.e., POGO1), and the gate of the third NMOS tube 2011 (i.e., N3) is connected to the fourth terminal of the common control module 3; the source of the fourth NMOS tube 2021 (i.e., N4) is connected to the second electrical contact point 5 (i.e., POGO2), and the gate of the fourth NMOS tube 2021 (i.e., N4) is connected to the fifth terminal of the common control module 3;

[0133] The third NMOS transistor 2011 (ie, N3) is used to: control the connection between the signal input terminal 203 (ie, COMM) and the first electrical contact point 4 (ie, POGO1);

[0134] The fourth NMOS transistor 2021 (ie, N4) is used to control the connection between the signal input terminal 203 (ie, COMM) and the second electrical contact point 5 (ie, POGO2).

[0135] In the above scheme, since the substrates of the third NMOS tube 2011 (i.e., N3) and the fourth NMOS tube 2021 (i.e., N4) are directly short-connected to the ground, the level switching communication circuit channel from the signal input terminal 203 (i.e., COMM) to the first electrical contact 4 (i.e., POGO1) and the second electrical contact 5 (i.e., POGO2) can be completely bidirectionally shut off when the gate of the corresponding single NMOS tube is connected to GND, avoiding the need for two PMOS or NMOS tubes to be connected in series back to back to realize the bidirectional shutoff function, further saving circuit cost and area.

[0136] For communication module 2, please continue to refer to Figure 3 The communication module 2 also includes a third resistor 206 (i.e., R3) and a fifth switch 207 (i.e., S5), a first end of the fifth switch 207 (i.e., S5) is connected to the reference voltage and command input terminal 204 (i.e., CMD&VREF), a second end of the fifth switch 207 (i.e., S5) is connected to the first end of the third resistor 206 (i.e., R3), a control end of the fifth switch 207 (i.e., S5) is connected to the sixth end of the common control module 3, and a second end of the third resistor 206 (i.e., R3) is connected to the signal input terminal 203 (i.e., COMM).

[0137] In one example, the resistance of the third resistor 206 (ie, R3) is greater than 5K ohms.

[0138] Of course, the present invention is not limited thereto, and other value ranges of the third resistor 206 (ie, R3 ) are also within the protection scope of the present invention.

[0139] In the above scheme, since the third resistor 206 (i.e., R3) has a certain resistance value and the fifth switching switch 207 (i.e., S5) can be controlled to be disconnected when necessary, the reference voltage and command input terminal 204 (i.e., CMD&VREF) can also be ensured not to be affected by the signal input terminal 203 (i.e., COMM) when executing the command interaction function of chip control.

[0140] For common control module 3, please continue to refer to Figure 3 , the common control module includes a charge pump unit (CP), a linear step-down unit (LDO), and a logic control unit (Logic); wherein:

[0141] The charge pump unit (CP) is used to: output control signals to the gate of the first NMOS transistor 1011 (N1) and the gate of the second NMOS transistor 1021 (N2) through the second terminal and the third terminal, respectively, so as to control the conduction and shutdown of the first NMOS transistor 1011 (N1) and the second NMOS transistor 1021 (N2) respectively;

[0142] The linear step-down unit (i.e., LDO) is used to step down the reference voltage and the reference voltage of the command input terminal 204 (i.e., CMD&VREF) to generate a logic high level voltage matching the first electrical contact 4 (i.e., POGO1) and / or the second electrical contact 5 (i.e., POGO2).

[0143] The logic high level voltage is used to provide a logic high level reference to the first electrical contact point 4 (i.e., POGO1) and / or the second electrical contact point 5 (i.e., POGO2) during communication between the first electrical contact point 4 (i.e., POGO1) and / or the second electrical contact point 5 (i.e., POGO2) and the signal input terminal 203 (i.e., COMM);

[0144] The logic control unit (i.e., Logic) is used to: receive the reference voltage and the control command issued by the command input terminal 204 (i.e., CMD&VREF), so as to output the control to the control terminal of the fifth switch 207 (i.e., S5) through the sixth terminal, control the on and off of the fifth switch 207 (i.e., S5), and further provide a logic high level reference to the signal input terminal 203 (i.e., COMM) when the first electrical contact point 4 (i.e., POGO1) and the signal input terminal 203 (i.e., COMM) and the second electrical contact point 5 (i.e., POGO2) and the signal input terminal 203 (i.e., COMM) communicate with each other.

[0145] Regarding the logic control unit (i.e., Logic), in a specific embodiment, the logic control unit can control the fifth switching switch 207 (i.e., S5) to be disconnected when receiving a control command, so as to prevent the signal input terminal 203 (i.e., COMM) from affecting the reference voltage and command input terminal 204 (i.e., CMD&VREF) functions.

[0146] Among them, the logic control unit (i.e., Logic) can independently control the first end or the second end of the output of the linear step-down unit (i.e., LDO) for the matching logic high-level pull-up voltage required for the signal transmission of the first electrical contact 4 (i.e., POGO1) or the second electrical contact 5 (i.e., POGO2), or can output a ground level voltage (the first and second ends of the LDO are also connected to the gates of N3 and N4, respectively) for controlling the third NMOS tube 2011 (i.e., N3) or the fourth NMOS tube 2021 (i.e., N4) to be completely disconnected in both directions.

[0147] Regarding the linear buck unit, in a specific embodiment, the linear buck unit steps down the reference voltage and the reference voltage of the command input terminal 204 (i.e., CMD&VREF) (a voltage consistent with the logic high level voltage of the communication signal transmitted through the signal input terminal 203COMM) to generate a voltage consistent with the logic high level voltage of the communication signal transmitted through the first electrical contact 4 (i.e., POGO1) or the second electrical contact 5 (i.e., POGO2).

[0148] In one embodiment, the common control module 3 further includes a first PMOS tube 301 (i.e., P1) and a first resistor 302 (i.e., R1), the drain of the first PMOS tube 301 (i.e., P1) is connected to the first end of the linear step-down unit (i.e., LDO), the drain of the first PMOS tube 301 (i.e., P1) is also connected to the gate of the third NMOS tube 2011 (i.e., N3), the gate of the first PMOS tube 301 (i.e., P1) is connected to the common control module 3, the source of the first PMOS tube 301 (i.e., P1) is connected to the first end of the first resistor 302 (i.e., R1), and the second end of the first resistor 302 (i.e., R1) is connected to the first electrical contact 4 (i.e., POGO1).

[0149] In other embodiments, the common control module further includes a second PMOS tube 303 (i.e., P2) and a second resistor 304 (i.e., R2), the drain of the second PMOS tube 303 (i.e., P2) is connected to the second end of the linear step-down unit (i.e., LDO), the drain of the second PMOS tube 303 (i.e., P2) is also connected to the gate of the fourth NMOS tube 2021 (i.e., N4), the gate of the second PMOS tube 303 (i.e., P2) is connected to the common control module 3, the source of the second PMOS tube 303 (i.e., P2) is connected to the first end of the second resistor 304 (i.e., R2), and the second end of the second resistor 304 (i.e., R2) is connected to the second electrical contact 5 (i.e., POGO2).

[0150] Among them, the input voltage of the linear step-down unit (i.e., LDO) comes from the reference voltage and command input terminal 204 (i.e., CMD&VREF), and the input voltage of the linear step-down unit (i.e., LDO) is output to the drain of the first PMOS tube 301 (i.e., P1) (i.e., the gate of N3) and / or the drain of the second PMOS tube 303 (i.e., P2) (i.e., the gate of N4).

[0151] In an example, the first PMOS transistor 301 (ie, P1) and the second PMOS transistor 303 (ie, P2) may also be implemented by using NMOS transistors in combination with corresponding driving circuits.

[0152] In a preferred embodiment, when the gate of the third NMOS tube 2011 (i.e., N3) is connected to a voltage consistent with the logic high level corresponding to the communication signal of the first electrical contact 4 (i.e., POGO1), and at this time the first PMOS tube 301 (i.e., P1) is turned on, the first resistor 302 (i.e., R1) is pulled up to the logic high level voltage corresponding to the communication signal of the first electrical contact 4 (i.e., POGO1), the fifth switching switch 207 (i.e., S5) is turned on, and the third resistor 206 (i.e., R3) is pulled up to the logic high level voltage corresponding to the signal input terminal 203 (i.e., COMM), then at this time, the communication channel supporting level conversion between the first electrical contact 4 (i.e., POGO1) and the signal input terminal 203 (i.e., COMM) can transmit bidirectional communication signals.

[0153] In other embodiments, when the gate of the fourth NMOS tube 2021 (i.e., N4) is connected to a voltage consistent with the logic high level corresponding to the communication signal of the second electrical contact 5 (i.e., POGO2), and at this time the second PMOS tube 303 (i.e., P2) is turned on, the second resistor 304 (i.e., R2) is pulled up to the logic high level voltage corresponding to the communication signal of the second electrical contact 5 (i.e., POGO2), the fifth switching switch 207 (i.e., S5) is turned on, and the third resistor 206 (i.e., R3) is pulled up to the logic high level voltage corresponding to the signal input terminal 203 (i.e., COMM), then at this time, the communication channel supporting level conversion between the second electrical contact 5 (i.e., POGO2) and the signal input terminal 203 (i.e., COMM) can transmit bidirectional communication signals.

[0154] In the above scheme, the first PMOS tube 301 (i.e., P1) and the second PMOS tube 303 (i.e., P2) are used to respectively connect the first resistor 302 (i.e., R1) and the second resistor 304 (i.e., R2) to the output voltage pin of the internal linear step-down unit (i.e., LDO), so that when the first PMOS tube 301 (i.e., P1) and the second PMOS tube 303 (i.e., P2) are turned on, the reference voltage and the reference voltage of the command input terminal 204 (i.e., CMD&VREF) can be stepped down, and when the first PMOS tube 301 (i.e., P1) and the second PMOS tube 303 (i.e., P2) are turned off, the influence of the high voltage that may appear on the first electrical contact point 4 (i.e., POGO1) and the second electrical contact point 5 (i.e., POGO2) on the internal circuit module of the present invention can be well isolated.

[0155] In addition, the first PMOS transistor 301 (ie, P1) and the second PMOS transistor 303 (ie, P2) are used to replace Figure 1The diode D1 of the circuit can make the pull-up voltage of the first electrical contact point 4 (ie, POGO1) and the second electrical contact point 5 (ie, POGO2) more stable when transmitting communication signals.

[0156] The present invention also provides a charging box, comprising the above-mentioned circuit structure for the charging box.

[0157] The present invention also provides a true wireless stereo Bluetooth headset, comprising the charging box described above.

[0158] The present invention also provides a pair of smart glasses, comprising the charging box described above.

[0159] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit structure for a charging box, used to independently charge and / or communicate two loads placed in the charging box, characterized in that: include: A charging module, a communication module, a common control module, a first electrical contact point, and a second electrical contact point; The charging module comprises a voltage input terminal, a first switch unit and a second switch unit, the voltage input terminal is connected to a first terminal of the first switch unit and a first terminal of the second switch unit, and a second terminal of the first switch unit and a second terminal of the second switch unit are connected to the first electrical contact point and the second electrical contact point respectively; The communication module comprises a signal input terminal, a third switch unit and a fourth switch unit, the signal input terminal is connected to a first terminal of the third switch unit and a first terminal of the fourth switch unit, and a second terminal of the third switch unit and a second terminal of the fourth switch unit are connected to the first electrical contact point and the second electrical contact point respectively; The first end of the common control module is connected to the voltage input end; the second end, the third end, the fourth end and the fifth end of the common control module are respectively connected to the control end of the first switch unit, the control end of the second switch unit, the control end of the third switch unit and the control end of the fourth switch unit, so as to respectively control the on and off of the first switch unit, the second switch unit, the third switch unit and the fourth switch unit; the common control module also includes a reference voltage and command input end and a first ground end; Wherein, the charging module is used to: control the first electrical contact point and the second electrical contact point to access voltage through the first switch unit and the second switch unit; The communication module is used to: control the first electrical contact point and the second electrical contact point to communicate and interact with the signal input end through the third switch unit and the fourth switch unit; The common control module is used to independently control the on and off of the first switch unit, the second switch unit, the third switch unit, and the fourth switch unit to control the charging and / or communication of the first electrical contact point and the second electrical contact point; The first electrical contact point is used to: charge the first load or execute a communication command; The second electrical contact point is used to: charge the second load or execute a communication command; The reference voltage and command input terminal is used to input control commands and reference voltage; The signal input end is used for communication signal interaction.

2. The circuit structure for a charging box according to claim 1, characterized in that: The first switch unit includes a first NMOS tube, and the second switch unit includes a second NMOS tube. The drain of the first NMOS tube and the drain of the second NMOS tube are connected to the voltage input terminal, the source of the first NMOS tube is connected to the first electrical contact point, and the gate of the first NMOS tube is connected to the second terminal of the common control module; the third terminal of the common control module is connected to the gate of the second NMOS tube, and the source of the second NMOS tube is connected to the second electrical contact point; Wherein, the first NMOS tube is used to: control the connection between the voltage input terminal and the first electrical contact point; The second NMOS transistor is used to control the connection between the voltage input terminal and the second electrical contact point.

3. The circuit structure for a charging box according to claim 2, characterized in that: The charging module also includes a capacitor and a second ground terminal; the first end of the capacitor is connected to the voltage input terminal, and the second end of the capacitor is connected to the second ground terminal.

4. The circuit structure for a charging box according to claim 3, characterized in that: The first NMOS transistor includes a first substrate switching switch and a second substrate switching switch, wherein a first end of the first substrate switching switch is connected to a drain of the first NMOS transistor, a second end of the first substrate switching switch and a first end of the second substrate switching switch are both connected to a substrate of the first NMOS transistor, and a second end of the second substrate switching switch is connected to a source of the first NMOS transistor; The first substrate switching switch and the second substrate switching switch are used for: When the voltage at the voltage input terminal is lower than the voltage at the first electrical contact point, the first substrate switching switch is closed and the second substrate switching switch is opened to cut off the circuit between the first electrical contact point and the voltage input terminal; When the voltage at the voltage input terminal is higher than the voltage at the first electrical contact point, the first substrate switching switch is opened and the second substrate switching switch is closed to disconnect the circuit from the voltage input terminal to the first electrical contact point.

5. The circuit structure for a charging box according to claim 4, characterized in that: The second NMOS transistor includes a third substrate switching switch and a fourth substrate switching switch, wherein a first end of the third substrate switching switch is connected to a drain of the second NMOS transistor, a second end of the third substrate switching switch and a first end of the fourth substrate switching switch are both connected to a substrate of the second NMOS transistor, and a second end of the fourth substrate switching switch is connected to a source of the second NMOS transistor; The third substrate switching switch and the fourth substrate switching switch are used for: When the voltage at the voltage input terminal is lower than the voltage at the second electrical contact point, the third substrate switching switch is closed and the fourth substrate switching switch is opened, so as to cut off the circuit between the second electrical contact point and the voltage input terminal; When the voltage at the voltage input terminal is higher than the voltage at the second electrical contact point, the third substrate switching switch is opened and the fourth substrate switching switch is closed to cut off the circuit between the voltage input terminal and the second electrical contact point.

6. The circuit structure for a charging box according to claim 5, characterized in that: The third switch unit includes a third NMOS tube, and the fourth switch unit includes a fourth NMOS tube, the drain of the third NMOS tube and the drain of the fourth NMOS tube are both connected to the signal input end; the substrate of the third NMOS tube and the substrate of the fourth NMOS tube are both grounded; the source of the third NMOS tube is connected to the first electrical contact point, and the gate of the third NMOS tube is connected to the fourth end of the common control module; the source of the fourth NMOS tube is connected to the second electrical contact point, and the gate of the fourth NMOS tube is connected to the fifth end of the common control module; The third NMOS tube is used to: control the connection between the signal input terminal and the first electrical contact point; The fourth NMOS transistor is used to control the connection between the signal input terminal and the second electrical contact point.

7. The circuit structure for a charging box according to claim 6, characterized in that: The communication module also includes a third resistor and a fifth switching switch, the first end of the fifth switching switch is connected to the reference voltage and the command input end, the second end of the fifth switching switch is connected to the first end of the third resistor, the control end of the fifth switching switch is connected to the sixth end of the common control module, and the second end of the third resistor is connected to the signal input end.

8. The circuit structure for a charging box according to claim 7, characterized in that: The common control module includes a charge pump unit, a linear step-down unit, and a logic control unit; wherein: The charge pump unit is used to: output control signals to the gate of the first NMOS tube and the gate of the second NMOS tube respectively through the second end of the common control module and the third end of the common control module, so as to control the conduction and shutdown of the first NMOS tube and the second NMOS tube respectively; The linear step-down unit is used to: step down the reference voltage and the reference voltage of the command input terminal to generate a logic high level voltage matching the first electrical contact point and / or the second electrical contact point, and the logic high level voltage is used to provide a logic high level reference to the first electrical contact point and / or the second electrical contact point when the first electrical contact point and / or the second electrical contact point communicate with the signal input terminal; The logic control unit is used to receive the reference voltage and the control command issued by the command input terminal, so as to control the on and off of the fifth switching switch through the sixth terminal output control, and then provide a logic high level reference to the signal input terminal when communication occurs between the first electrical contact point and the signal input terminal and between the second electrical contact point and the signal input terminal.

9. The circuit structure for a charging box according to claim 8, characterized in that: The common control module also includes a first PMOS tube and a first resistor, the drain of the first PMOS tube is connected to the first end of the linear buck unit, the drain of the first PMOS tube is also connected to the gate of the third NMOS tube, the gate of the first PMOS tube is connected to the common control module, the source of the first PMOS tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first electrical contact point.

10. The circuit structure for a charging box according to claim 9, characterized in that: The common control module also includes a second PMOS tube and a second resistor, the drain of the second PMOS tube is connected to the second end of the linear buck unit, the drain of the second PMOS tube is also connected to the gate of the fourth NMOS tube, the gate of the second PMOS tube is connected to the common control module, the source of the second PMOS tube is connected to the first end of the second resistor, and the second end of the second resistor is connected to the second electrical contact point.

11. A charging box, characterized in that: A circuit structure for a charging box comprising any one of claims 1-10.

12. A true wireless stereo Bluetooth headset, characterized in that: Including the charging box described in claim 11.

13. A smart glasses, characterized in that: Including the charging box described in claim 11.

Images