A fast recovery diode based on composite multi-ring region and its preparation method

Abstract

The invention discloses a fast recovery diode based on a composite multi-ring region in the field of semiconductor device technology, comprising: a cathode metal layer, an N+ substrate, an N buffer layer, an N-drift region, an oxide layer, a barrier alloy, a metal field plate and a passivation layer, a lightly doped P-region is arranged in the upper part of the N-drift region, a cell region and each field ring region are respectively provided with a doped P+ region, a heavily doped N+ region is arranged in the cut-off ring, each doped P+ region and a heavily doped N+ region are both arranged in the lightly doped P-region, and each doped P+ region and a heavily doped N+ region are also provided with a heavily doped P+ region; wherein, the concentration of the lower part of the lightly doped P-region, the concentration of each doped P+ region, the heavily doped N+ region and the heavily doped P+ region are all distributed in a quadratic function with the midpoint of the window of the corresponding cell region or ring region as the center. The fast recovery diode can greatly increase the reverse withstand voltage capability, reduce reverse leakage, and effectively ensure its reliable operation through the composite multi-field ring structure.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor devices, and in particular to a fast recovery diode based on a composite multi-ring region and a preparation method thereof. Background Art

[0002] Fast recovery diodes are widely used in power electronic systems as switching devices, usually in various high-frequency power circuits such as aerospace, automotive electronics, industrial control, and rail transportation. On the one hand, as the operating frequency and performance of various switching devices continue to increase, higher requirements are placed on the diodes connected in parallel. The diodes must have higher voltage resistance, fast turn-on and turn-off capabilities, and good soft recovery characteristics to avoid the impact of oscillation on the circuit. On the other hand, since the application often has a long operating time and high operating temperature, the diode chip must have excellent reliability to work stably in harsh circuit environments.

[0003] At present, fast recovery diodes always have problems such as insufficient withstand voltage, excessive forward voltage drop and leakage current, and reliability and stability that need to be improved, which are restricting the development and application of fast recovery diodes. Therefore, it is necessary to improve and optimize the traditional structural model to solve the above problems, thereby driving the progress and improvement of the entire industry and giving fast recovery diodes a broader development space. Summary of the invention

[0004] The present application provides a fast recovery diode based on a composite multi-ring region and a preparation method thereof, thereby solving the problems of low reverse withstand voltage, large forward voltage drop, and poor softness that occur in the current application of fast recovery diodes, effectively improving their reliability and stability, and ensuring that the fast recovery diode can work for a long time in harsh environments.

[0005] The embodiment of the present application provides a fast recovery diode based on a composite multi-ring region, including:

[0006] N+ substrate;

[0007] An N buffer layer, disposed above the N+ substrate;

[0008] An N-drift region, disposed above the N buffer layer;

[0009] A cell region and a ring region are located on the upper part of the N-drift region, the ring region includes a plurality of field rings and a cut-off ring, the plurality of field rings and the cut-off ring are arranged concentrically with the cell region and are distributed at intervals, and the cut-off ring is located at the outer periphery of the outermost field ring;

[0010] An oxide layer, disposed above the N-drift region, the oxide layer being provided with windows corresponding to the cell region and the ring region;

[0011] A lightly doped P-region, disposed in the N-drift region;

[0012] The cell region and each of the field ring regions are respectively provided with a doped P+ region, the cut-off ring is provided with a heavily doped N+ region, each of the doped P+ region and the heavily doped N+ region is provided in the lightly doped P- region, and each of the doped P+ region and the heavily doped N+ region is further provided with a heavily doped P+ region;

[0013] A barrier alloy is disposed above each of the cell regions and the ring region;

[0014] A metal field plate disposed above the oxide layer and the barrier alloy;

[0015] A passivation layer is disposed above the metal field plate;

[0016] A cathode metal layer, disposed below the N+ substrate;

[0017] Among them, the lower concentration of the lightly doped P-region is distributed as a quadratic function with the midpoint of the window of each of the cell regions and the ring region as the center, and the concentration of each of the doped P+ region, the heavily doped N+ region and the heavily doped P+ region is distributed as a quadratic function with the midpoint of the window of the corresponding cell region or the ring region as the center.

[0018] The beneficial effects of the above embodiments are: the lightly doped P-region structure of the fast recovery diode makes the electric field distribution present a gradient change, which can effectively improve the withstand voltage and obtain better soft recovery capability; by forming a composite multi-field ring structure through doping the P+ region and the heavily doped P+ region, this structure can greatly increase the reverse withstand voltage capability of the device, reduce reverse leakage, and effectively ensure its reliable operation.

[0019] Based on the above embodiments, the present application can be further improved as follows:

[0020] In one embodiment of the present application, the resistivity of the N+ substrate is 0.002-0.006Ω.cm, and the thickness is 80-250μm; the doping concentration of the N buffer layer is about 1e 16 ~1e 19 cm -3 , with a thickness of 10 to 40 μm; the doping concentration of the N-drift region is about 10 12 cm -3 ~10 15 cm -3 , thickness 100-200μm. The fast recovery diode forms an N+ / N / N-type PT structure through an N+ substrate, an N buffer layer, and an N-drift region, and sets the concentration and thickness distribution so that the electric field is reasonably distributed while also reducing the forward voltage drop.

[0021] In one of the embodiments of the present application, the oxide layer is silicon oxide and has a thickness of 2 to 5 μm.

[0022] In one embodiment of the present application, the doping impurities of the lightly doped P- region are B ions, the doping impurities of each of the doped P+ region and the heavily doped N+ region are B and Ph ions, the doping impurities of the heavily doped P+ region are As ions, the concentration of the doped P+ region is higher than that of the lightly doped P- region, and the concentration of the heavily doped P+ region is higher than that of the doped P+ region. The fast recovery diode adopts the above-mentioned doping impurities and concentration relationship, so that the electric field distribution, current density and other effects of the heavily doped P+ region are better, and the composite structure formed by the combination has a better withstand voltage effect.

[0023] In one embodiment of the present application, the concentration of the lower portion of the lightly doped P-region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=2ax 2 +d function distribution, in the cell region, f(x) = 0.2ax 2 +d function distribution. The fast recovery diode adopts the above function distribution to achieve a better electric field distribution effect in the lightly doped P-region.

[0024] In one embodiment of the present application, the concentration of the doped P+ region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=4bx 2 +d function distribution, in the cell area, f(x) = 0.4bx 2 +d function distribution, the heavily doped N+ region concentration is centered at the midpoint of the window corresponding to the ring region, and in the ring region it is f(x)=4bx 2 +d function distribution; the heavily doped P+ region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=5cx 2 +d function distribution, in the cell area, f(x) = 0.5cx 2 +d function distribution. The above coefficients a, b, c and constant d are all related to parameters such as ion implantation energy. At the same time, the distances between the field rings are approximately equal, and the distances between the main junction and the field rings are distributed in an arithmetic manner. The fast recovery diode adopts the above functional distribution to make the electric field distribution and current density of the heavily doped P+ region better, and the composite structure formed by the combination has a better withstand voltage effect.

[0025] In one embodiment of the present application, the barrier alloy is made of Pt-Si. The Pt-Si barrier alloy of the fast recovery diode covers the window positions of the cell region and the ring region, thereby reducing the contact resistance.

[0026] In one embodiment of the present application, the metal field plate is made of Al and has a thickness of 4 to 8 μm. The metal field plate of the fast recovery diode and its composite multi-field ring structure together constitute the terminal design of the chip, which further improves the voltage resistance of the chip and reduces the impact of impurity charges on the chip, ensuring its stable and reliable operation.

[0027] In one embodiment of the present application, the passivation layer includes a Si layer located above the metal field plate. 3 N 4 layer and located in the Si 3 N 4 The fast recovery diode adopts a double-layer passivation structure, the first passivation layer is Si 3 N 4 , belongs to inorganic material, thickness is The second passivation layer is PI, which is an organic material with a thickness of 1 to 10 μm; the double-layer passivation (Si 3 N 4 +PI) structure can not only enhance the electrical performance, but also play a role in anti-corrosion and anti-pollution, ensuring the overall reliability and stability of the chip.

[0028] In one embodiment of the present application, the cathode metal layer is a Ti / Ni / Ag three-layer metal structure. The cathode metal layer of the fast recovery diode is a Ti / Ni / Ag multilayer metal structure formed by evaporation and multilayer corrosion, and has good ohmic contact characteristics.

[0029] The present application also provides a method for preparing the above-mentioned fast recovery diode, comprising the following steps:

[0030] S1: performing an epitaxial growth on the N+ substrate to form the N buffer layer;

[0031] S2: performing a secondary epitaxial growth on the N buffer layer to form the N-drift region;

[0032] S3: Under high temperature conditions, growing the oxide layer on the N-drift region, and performing photolithography and etching to open windows in the cell region and each of the ring regions;

[0033] S3: Perform B ion implantation at the center of each window, perform high temperature annealing, and form the lightly doped P-region with the midpoint of each window as the center and the concentration distributed in a quadratic function, and the field ring and the cutoff ring are f(x)=2ax. 2 +d function distribution, in the cell region, f(x) = 0.2ax 2 +d function distribution;

[0034] S4: Perform a second B and Ph ion implantation at the center of each window, wherein the windows of the cell region and the field ring are P-type doping implants, and the windows of the cut-off ring are N-type doping implants, and perform rapid thermal annealing to form the doped P+ region and the heavily doped N+ region with the concentration distributed in a quadratic function with the midpoint of each window as the center, and the field ring and the cut-off ring are f(x)=4bx 2 +d function distribution, in the cell area, f(x) = 0.4bx 2 +d function distribution;

[0035] S5: Perform a third P-type doping injection at the center of each window, with As ions as the doping impurity. After high-temperature annealing, a heavily doped P+ region with a concentration distributed as a quadratic function is formed with the midpoint of each window as the center. The field ring and the cutoff ring are f(x) = 5cx 2 +d function distribution, in the cell area, f(x) = 0.5cx 2 +d function distribution;

[0036] S6: sputtering metal Pt on the windows of the oxide layer and the cell region and the ring region, forming the Pt-Si barrier alloy in the cell region and the ring region under high temperature vacuum conditions, and corroding excess metal on the oxide layer;

[0037] S7: evaporating the metal Al so that it adheres to the surface of the chip to form the metal field plate on the front side;

[0038] S8: Depositing Si on the chip surface 3 N 4 layer, and then forming a PI layer through a coating process to form the passivation layer;

[0039] S9: Perform evaporation and multi-layer etching on the back side of the N+ substrate to form the cathode metal layer made of Ti / Ni / Ag.

[0040] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0041] 1. The fast recovery diode has an N+ / N / N-type PT structure, which is formed by N+ substrate, N buffer layer and N-drift region. While the electric field is reasonably distributed, the forward voltage drop is also reduced;

[0042] 2. The fast recovery diode has a lightly doped P-region with a quadratic function distribution, and the electric field distribution presents a gradient change, which can effectively improve the withstand voltage and obtain better soft recovery ability;

[0043] 3. The composite multi-field ring structure of the fast recovery diode can greatly increase the reverse withstand voltage capability of the device, reduce reverse leakage, and effectively ensure its reliable operation;

[0044] 4. The Pt-Si barrier alloy of the fast recovery diode is formed by sputtering metal Pt at the ring area window (main junction, field ring, cut-off ring), which can effectively reduce the contact resistance;

[0045] 5. The terminal design of the front metal field plate + composite multi-field ring structure of the fast recovery diode forms a front metal field plate on the chip surface by evaporating the metal Al, and together with the previous composite multi-field ring structure, it constitutes the terminal design of the chip, which further improves the voltage resistance of the chip and reduces the influence of impurity charge on the chip, ensuring its stable and reliable operation;

[0046] 6. The double-layer passivation structure of the fast recovery diode is formed by depositing the first inorganic passivation layer Si 3 N 4 Together with the second organic material passivation layer PI formed by coating and other processes, it forms a double-layer passivation structure of the chip, which can not only effectively enhance the electrical performance of the chip, but also play a role in anti-corrosion and anti-pollution, ensuring the overall reliability and stability of the chip;

[0047] 7. The Ti / Ni / Ag cathode metal layer structure of the fast recovery diode is formed by evaporation and multi-layer corrosion in the N+ region, which ensures that it has good ohmic contact characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for the specific embodiments or the description of the prior art. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn according to the actual scale.

[0049] Figure 1 A schematic diagram of the structure of a fast recovery diode based on a composite multi-ring region in an embodiment;

[0050] Figure 2 Schematic diagram of an intermediate product of a method for preparing a fast recovery diode in an embodiment Figure 1 ;

[0051] Figure 3 Schematic diagram of an intermediate product of a method for preparing a fast recovery diode in an embodiment Figure 2 .

[0052] Among them, 1. N+ substrate, 2. N buffer layer, 3. N- drift region, 4. oxide layer, 5. lightly doped P- region, 6. doped P+ region, 7. heavily doped N+ region, 8. heavily doped P+ region, 9. barrier alloy, 10. metal field plate, 11. passivation layer, 12. cathode metal layer. DETAILED DESCRIPTION

[0053] The present invention is further explained below in conjunction with specific implementation methods. It should be understood that these implementation methods are only used to illustrate the present invention and are not used to limit the scope of the present invention. After reading the present invention, various equivalent forms of modifications to the present invention by those skilled in the art all fall within the scope defined by the claims attached to this application.

[0054] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0055] In the description of the present invention, it should be noted that the terms "vertical", "peripheral surface" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or the orientations or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, terms such as "vertical" do not mean that the component is required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0056] In the description of the present invention, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in the present invention and the features of different embodiments or examples without contradiction.

[0057] The embodiments of the present application provide a fast recovery diode based on a composite multi-ring region and a preparation method thereof, thereby solving the problems of low reverse withstand voltage, large forward voltage drop, and poor softness that occur in the current application of fast recovery diodes, effectively improving their reliability and stability, and ensuring that the fast recovery diode can work for a long time in harsh environments.

[0058] The technical solution in the embodiment of the present application is to solve the above problems, and the overall idea is as follows:

[0059] Embodiment 1:

[0060] like Figure 1 As shown, a fast recovery diode based on a composite multi-ring region comprises:

[0061] N+ substrate 1, the resistivity of N+ substrate 1 is 0.002-0.006Ω.cm, and the thickness is 80-250μm;

[0062] N buffer layer 2 is arranged on top of N+ substrate 1, and the doping concentration of N buffer layer 2 is about 1e 16 ~1e 19 cm -3 , thickness is 10~40μm;

[0063] The N-drift region 3 is disposed above the N buffer layer 2, and the doping concentration of the N-drift region 3 is about 10 12 cm -3 ~10 15 cm -3 , thickness 100~200μm;

[0064] The cell region and the ring region are located on the upper part of the N-drift region 3. The ring region includes a plurality of field rings and a cut-off ring. The plurality of field rings and the cut-off ring are arranged concentrically with the cell region and are distributed at intervals. The cut-off ring is located at the periphery of the outermost field ring.

[0065] The oxide layer 4 is disposed above the N-drift region 3. Windows corresponding to the cell region and the ring region are opened on the oxide layer 4. The oxide layer 4 is silicon oxide with a thickness of 2 to 5 μm.

[0066] A lightly doped P-region 5 is disposed in the N-drift region 3;

[0067] A doped P+ region 6 is provided in the cell region and each field ring region, a heavily doped N+ region 7 is provided in the cut-off ring, each doped P+ region 6 and heavily doped N+ region 7 is provided in a lightly doped P- region 5, and each doped P+ region 6 and heavily doped N+ region 7 is further provided with a heavily doped P+ region 8;

[0068] Barrier alloy 9, arranged above each cell region and ring region;

[0069] A metal field plate 10 is disposed above the oxide layer 4 and the barrier alloy 9;

[0070] A passivation layer 11 is disposed above the metal field plate 10;

[0071] A cathode metal layer 12 is disposed below the N+ substrate 1;

[0072] Among them, the concentration of the lower part of the lightly doped P-region 5 is distributed in a quadratic function with the midpoint of the window of each cell region and the ring region as the center, and the concentration of each doped P+ region 6, heavily doped N+ region 7 and heavily doped P+ region 8 is distributed in a quadratic function with the midpoint of the window of the corresponding cell region or ring region as the center.

[0073] The lightly doped P-region 5 structure of the fast recovery diode makes the electric field distribution present a gradient change, which can effectively improve the withstand voltage and obtain better soft recovery ability; a composite multi-field ring structure is formed by doping the P+ region 6 and the heavily doped P+ region 8, which can greatly increase the reverse withstand voltage capability of the device, reduce reverse leakage, and effectively ensure its reliable operation; the fast recovery diode forms an N+ / N / N-type PT structure through the N+ substrate 1, the N buffer layer 2, and the N-drift region 3, and sets the concentration and thickness distribution, so that the electric field is reasonably distributed while also lowering the forward voltage drop.

[0074] Furthermore, the doping impurities of the lightly doped P-region 5 are B ions, the doping impurities of each doped P+ region 6 and the heavily doped N+ region 7 are B and Ph ions, the doping impurities of the heavily doped P+ region 8 are As ions, the concentration of the doped P+ region 6 is higher than that of the lightly doped P-region 5, and the concentration of the heavily doped P+ region 8 is higher than that of the doped P+ region 6. The fast recovery diode adopts the above-mentioned doping impurities and concentration relationship, so that the electric field distribution and current density of the heavily doped P+ region 8 are better, and the composite structure formed by the combination has a better withstand voltage effect.

[0075] Furthermore, the barrier alloy 9 is made of Pt-Si. The Pt-Si barrier alloy 9 of the fast recovery diode covers the window positions of the cell region and the ring region, which plays a role in reducing the contact resistance.

[0076] Furthermore, the metal field plate 10 is made of Al and has a thickness of 4 to 8 μm. The metal field plate 10 of the fast recovery diode and its composite multi-field ring structure together constitute the terminal design of the chip, which further improves the voltage resistance of the chip and also reduces the influence of impurity charges on the chip, ensuring its stable and reliable operation.

[0077] Furthermore, the passivation layer 11 includes a Si layer located above the metal field plate 10. 3 N 4 Layer and located in Si 3 N 4 The fast recovery diode adopts a double-layer passivation structure, the first passivation layer is Si 3 N 4 , belongs to inorganic material, thickness is The second passivation layer is PI, which is an organic material with a thickness of 1 to 10 μm; the double-layer passivation (Si 3 N 4+PI) structure can not only enhance the electrical performance, but also play a role in anti-corrosion and anti-pollution, ensuring the overall reliability and stability of the chip.

[0078] Furthermore, the cathode metal layer 12 is a Ti / Ni / Ag three-layer metal structure. The cathode metal layer 12 of the fast recovery diode is a Ti / Ni / Ag multi-layer metal structure formed by evaporation and multi-layer corrosion, and has good ohmic contact characteristics.

[0079] Based on the above embodiment 1, the concentration of the lower part of the lightly doped P-region 5 is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=2ax 2 +d function distribution, in the cell area is f(x) = 0.2ax 2 +d function distribution. The fast recovery diode adopts the above function distribution to achieve a better electric field distribution effect in the lightly doped P-region 5.

[0080] Furthermore, the concentration of the doped P+ region 6 is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=4bx 2 +d function distribution, in the cell area is f(x) = 0.4bx 2 +d function distribution, the concentration of heavily doped N+ region 7 is centered at the midpoint of the window in the corresponding ring area, and in the ring area it is f(x)=4bx 2 +d function distribution; the heavily doped P+ region 8 is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region it is f(x)=5cx 2 +d function distribution, in the cell area is f(x) = 0.5cx 2 +d function distribution. The above coefficients a, b, c and constant d are all related to parameters such as ion implantation energy. At the same time, the distances between the field rings are approximately equal, and the distances between the main junction and the field rings are distributed in an arithmetic manner. The fast recovery diode adopts the above functional distribution to make the electric field distribution and current density of the heavily doped P+ region 8 better, and the composite structure formed by the combination has a better withstand voltage effect.

[0081] It should be noted that the quadratic function distribution mentioned above does not actually mean that the concentration distribution must strictly conform to the quadratic function curve, but only means that the concentration distribution is as close as possible to the corresponding quadratic function curve to achieve better results.

[0082] Embodiment 2:

[0083] A method for preparing a fast recovery diode based on a composite multi-ring region comprises the following steps:

[0084] S1: performing an epitaxial growth on the N+ substrate 1 to form an N buffer layer 2;

[0085] S2: performing secondary epitaxial growth on the N buffer layer 2 to form an N-drift region 3;

[0086] S3: Under high temperature conditions, high-purity hydrogen, oxygen, etc. are introduced to grow an oxide layer 4 of a certain thickness on the N-drift region 3 through hydrogen-oxygen synthesis, and photolithography, etching, etc. are performed to open windows in the cell region and each ring region;

[0087] S3: B ion implantation is performed once at the center of each window, and high temperature annealing is performed under specific conditions to form a lightly doped P-region 5 with a quadratic function distribution centered at the midpoint of each window. The field ring and the cutoff ring are approximately f(x)=2ax 2 +d function distribution, the main ring (cell area) is approximately f(x) = 0.2ax 2 +d function distribution;

[0088] S4: Perform a second B and Ph ion implantation at the center of each window, where the cell area and field ring window are P-type doping implants, and the cut-off ring window is N-type doping implants, and perform rapid thermal annealing to form a doped P+ region 6 and a heavily doped N+ region 7 with a certain concentration gradient. The field ring and the cut-off ring are approximately f(x)=4bx 2 +d function distribution, the main ring (cell area) is approximately f(x) = 0.4bx 2 +d function distribution;

[0089] S5: Then, a third P-type doping injection is performed again at the center of each window, and the doping impurity is As ions. After high-temperature annealing, a heavily doped P+ region 8 with a specific concentration gradient distribution is formed. The field ring and the cutoff ring are approximately f(x)=5cx 2 +d function distribution, the main ring (cell area) is approximately f(x) = 0.5cx 2 +d function distribution, such as Figure 2 As shown; the above coefficients a, b, c and constant d are all related to parameters such as ion implantation energy;

[0090] S6: sputtering metal Pt on the oxide layer 4 and the exposed N-drift region 3 (cell region, ring region window position), forming a Pt-Si barrier alloy 9 at the window (cell region, ring region) under high temperature vacuum conditions, and corroding the excess metal on the oxide layer 4;

[0091] S7: By evaporating the vaporized metal Al, it is attached to the surface of the chip to form a front metal field plate 10 structure, such as Figure 3 As shown;

[0092] S8: Si is formed on the chip surface through deposition and other processes 3 N 4The first inorganic material passivation layer 11 is formed by a coating process, and a PI layer having a certain thickness is formed by a coating process, which is the second organic material passivation layer 11;

[0093] S9: Finally, evaporation and multi-layer etching are performed in the N+ region 7 to form a Ti / Ni / Ag cathode metal layer 12 structure with ohmic contact characteristics, which is the cathode region, such as Figure 1 shown.

[0094] The technical solutions in the above embodiments of the present application have at least the following technical effects or advantages:

[0095] 1. The fast recovery diode has an N+ / N / N-type PT structure, which is formed by N+ substrate, N buffer layer and N-drift region. While the electric field is reasonably distributed, the forward voltage drop is also reduced;

[0096] 2. The fast recovery diode has a lightly doped P-region with a quadratic function distribution, and the electric field distribution presents a gradient change, which can effectively improve the withstand voltage and obtain better soft recovery ability;

[0097] 3. The composite multi-field ring structure of the fast recovery diode can greatly increase the reverse withstand voltage capability of the device, reduce reverse leakage, and effectively ensure its reliable operation;

[0098] 4. The Pt-Si barrier alloy of the fast recovery diode is formed by sputtering metal Pt at the ring area window (main junction, field ring, cut-off ring), which can effectively reduce the contact resistance;

[0099] 5. The terminal design of the front metal field plate + composite multi-field ring structure of the fast recovery diode forms a front metal field plate on the chip surface by evaporating the metal Al, and together with the previous composite multi-field ring structure, it constitutes the terminal design of the chip, which further improves the voltage resistance of the chip and reduces the influence of impurity charge on the chip, ensuring its stable and reliable operation;

[0100] 6. The double-layer passivation structure of the fast recovery diode is formed by depositing the first inorganic passivation layer Si 3 N 4 Together with the second organic material passivation layer PI formed by coating and other processes, it forms a double-layer passivation structure of the chip, which can not only effectively enhance the electrical performance of the chip, but also play a role in anti-corrosion and anti-pollution, ensuring the overall reliability and stability of the chip;

[0101] 7. The Ti / Ni / Ag cathode metal layer structure of the fast recovery diode is formed by evaporation and multi-layer corrosion in the N+ region, which ensures that it has good ohmic contact characteristics.

[0102] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A fast recovery diode based on a composite multi-ring region, characterized in that: include: N+ substrate; An N buffer layer, disposed above the N+ substrate; An N-drift region, disposed above the N buffer layer; A cell region and a ring region are located on the upper part of the N-drift region, the ring region includes a plurality of field rings and a cut-off ring, the plurality of field rings and the cut-off ring are arranged concentrically with the cell region and are distributed at intervals, and the cut-off ring is located at the outer periphery of the outermost field ring; An oxide layer, disposed above the N-drift region, the oxide layer being provided with windows corresponding to the cell region and the ring region; A lightly doped P-region, disposed in the N-drift region; The cell region and each of the field ring regions are respectively provided with a doped P+ region, the cut-off ring is provided with a heavily doped N+ region, each of the doped P+ region and the heavily doped N+ region is provided in the lightly doped P- region, and each of the doped P+ region and the heavily doped N+ region is further provided with a heavily doped P+ region; A barrier alloy is disposed above each of the cell regions and the ring region; A metal field plate disposed above the oxide layer and the barrier alloy; A passivation layer is disposed above the metal field plate; A cathode metal layer, disposed below the N+ substrate; Among them, the lower concentration of the lightly doped P-region is distributed as a quadratic function with the midpoint of the window of each of the cell regions and the ring region as the center, and the concentration of each of the doped P+ region, the heavily doped N+ region and the heavily doped P+ region is distributed as a quadratic function with the midpoint of the window of the corresponding cell region or the ring region as the center.

2. The fast recovery diode according to claim 1, characterized in that: The resistivity of the N+ substrate is 0.002-0.006Ω.cm, and the thickness is 80-250μm; the doping concentration of the N buffer layer is 1e 16 ~1e 19 cm -3 , with a thickness of 10~40μm; the doping concentration of the N-drift region is 10 12 cm -3 ~10 15 cm -3 , thickness 100~200μm.

3. The fast recovery diode according to claim 1, characterized in that: The doping impurities of the lightly doped P-region are B ions, the doping impurities of each of the doped P+ region and the heavily doped N+ region are B and P ions, the concentration of the doped P+ region is higher than that of the lightly doped P-region, and the concentration of the heavily doped P+ region is higher than that of the doped P+ region.

4. The fast recovery diode according to claim 3, characterized in that: The concentration of the lower part of the lightly doped P-region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, it is f(x)=2ax 2 +d function distribution, in the cell area is f(x) = 0.2ax 2 +d function distribution.

5. The fast recovery diode according to claim 4, characterized in that: The concentration of the doped P+ region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=4bx 2 +d function distribution, in the cell area, f(x) = 0.4bx 2 +d function distribution, the heavily doped N+ region concentration is centered at the midpoint of the window corresponding to the ring region, and in the ring region it is f(x)=4bx 2 +d function distribution; the heavily doped P+ region is centered at the midpoint of the window corresponding to the cell region and the ring region, and in the ring region, f(x)=5cx 2 +d function distribution, in the cell area, f(x) = 0.5cx 2 +d function distribution.

6. The fast recovery diode according to claim 1, characterized in that: The barrier alloy material is Pt-Si.

7. The fast recovery diode according to claim 3, characterized in that: The metal field plate is made of Al and has a thickness of 4-8 μm.

8. The fast recovery diode according to claim 1, characterized in that: The passivation layer includes a Si 3 N 4 layer located above the metal field plate and a PI layer located above the Si 3 N 4 layer.

9. The fast recovery diode according to claim 1, characterized in that: The cathode metal layer is a three-layer metal structure of Ti / Ni / Ag.

10. A method for preparing a fast recovery diode according to any one of claims 1 to 9, comprising the following steps: S1: performing an epitaxial growth on the N+ substrate to form the N buffer layer; S2: performing a secondary epitaxial growth on the N buffer layer to form the N-drift region; S3: growing the oxide layer on the N-drift region, and performing photolithography and etching to open windows of the cell region and each of the ring regions; S3: Perform B ion implantation once at the center of each window, perform annealing, and form the lightly doped P-region with the midpoint of each window as the center and the concentration distributed as a quadratic function, and the field ring and the cutoff ring are f(x)=2ax 2 +d function distribution, in the cell area is f(x) = 0.2ax 2 +d function distribution; S4: Perform a second B and P ion implantation at the center of each window, wherein the windows of the cell region and the field ring are P-type doping implanted, and the windows of the cut-off ring are N-type doping implanted, and perform rapid thermal annealing to form the doped P+ region and the heavily doped N+ region with the concentration distributed in a quadratic function with the midpoint of each window as the center, and the field ring and the cut-off ring are f(x)=4bx 2 +d function distribution, in the cell area, f(x) = 0.4bx 2 +d function distribution; S5: Perform a third P-type doping injection at the center of each window, and after annealing, form a heavily doped P+ region with a concentration distributed as a quadratic function with the midpoint of each window as the center, and the field ring and the cutoff ring are f(x) = 5cx 2 +d function distribution, in the cell area, f(x) = 0.5cx 2 +d function distribution; S6: sputtering metal Pt on the windows of the oxide layer and the cell region and the ring region to form the barrier alloy in the cell region and the ring region, and corroding the excess metal on the oxide layer; S7: evaporating the metal Al so that it adheres to the surface of the chip to form the metal field plate on the front side; S8: depositing a Si3N4 layer on the surface of the chip, and then forming a PI layer through a coating process to form the passivation layer; S9: Perform evaporation and multi-layer etching on the back side of the N+ substrate to form the cathode metal layer made of Ti / Ni / Ag.

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