Heterojunction memristor with adjustable and controllable large-range conductivity and preparation method of heterojunction memristor
By designing the structure of heterogeneous memristors, using the functional layer of PTAA and F4-TCNQ and the aluminum top electrode, the problems of small stability and adjustable conductance of organic memristors are solved, achieving high stability and large range The conductance is adjustable, which promotes the development of artificial neural networks.
Patent Information
- Application Number
- CN202411246056.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-06
- Publication Date
- 2024-12-06
AI Technical Summary
Existing organic memristors have problems such as poor stability, small adjustable conductance range and poor linearity, which limits their accuracy when simulating complex synaptic behaviors.
A heteromemristor is designed, with a structure consisting of conductive glass, indium tin oxide bottom electrode, a functional layer composed of p-type organic semiconductor PTAA and p-type dopant F4-TCNQ and an aluminum top electrode, and is spin-coated. Preparation to achieve large-scale controllable conductivity.
It improves the stability and adjustable conductance range of the device, reduces the operating voltage, realizes long-term stable operation in an air environment, simulates synaptic plasticity, and provides high-precision artificial neural network prototype devices.
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Figure CN119095474A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of organic electronics and information technology, and more specifically, relates to a heterojunction memristor with adjustable conductance over a wide range and a preparation method thereof. Background Art
[0002] In traditional digital computers, data processing and storage units are physically separated, and the performance of digital computers has improved with the use of CMOS technology. However, the processing of big data analysis is a major challenge for current computing systems because they face limitations such as high energy requirements and low processing speeds due to the von Neumann architecture. To overcome these limitations, researchers are actively exploring the hardware of neuromorphic computing, aiming to create smaller, faster, and more energy-efficient computing systems based on biological neural networks. Memristors, as two-terminal devices with the ability to mimic biological functions, show potential for application in neuromorphic computing and are the main candidates in this regard. In memristors, based on the adjustable and storable conductive states dependent on the operation history, some important learning and memory laws based on the Hebb learning rule and the pulse timing-dependent plasticity rule framework are simulated. Organic materials have the advantages of simple film formation, low cost, flexible and stretchable, and biocompatibility. More importantly, their electronic properties can be regulated by molecular design. However, there are some challenges with organic memristors, such as poor device stability, a small adjustable range of conductance, poor linearity, and few resistance states in their learning behavior under pulses, which results in poor accuracy in simulating complex synaptic behaviors.
[0003] Therefore, there is an urgent need to design a heterojunction memristor with a wide range of controllable conductance and a preparation method thereof. Summary of the invention
[0004] Purpose of the invention: In view of the technical problems existing in the existing organic memristors, the present invention proposes a heterojunction memristor with a wide range of adjustable conductance, and prepares an organic memristor with a wide range of adjustable conductance. It effectively solves the problems of poor stability, small adjustable conductance range, poor linearity, etc. of organic memristors, which is conducive to promoting the research progress of organic memristors.
[0005] The technical solution of the present invention is as follows: a heterojunction memristor with adjustable conductance over a wide range, whose structure consists of four parts from bottom to top: a substrate, a bottom electrode, a functional layer and a top electrode, wherein the substrate is conductive glass, the bottom electrode is indium tin oxide ITO, the functional layer is a bulk heterojunction composed of a p-type organic semiconductor PTAA and a p-type dopant F4-TCNQ, the p-type organic semiconductor material PTAA and the p-type dopant F4-TCNQ are spin-coated from a miscible solution, and the top electrode is aluminum.
[0006] As a preferred solution, the thickness of the bottom electrode is 185 nm.
[0007] As a preferred solution, the thickness of the top electrode is 90-100 nm.
[0008] As a preferred solution, the thickness of the functional layer is 30 nm.
[0009] The present invention also provides a method for preparing a heterojunction memristor with adjustable conductance over a wide range, comprising the following steps:
[0010] Step 1: Prepare the organic functional layer PTAA:F4-TCNQ solution: dissolve 3 mg PTAA and 5 mg F4-TCNQ materials in 1 ml tetrahydrofuran, and stir magnetically at 30°C for more than 12 hours to completely dissolve them;
[0011] Step 2: growing a layer of bottom electrode ITO on the surface of the base conductive glass, and sequentially using an ITO glass cleaning agent and deionized water ultrasonic cleaning and drying;
[0012] Step 3: subject the sample dried in step 2 to ultraviolet ozone treatment for 10 minutes;
[0013] Step 4: Use a pipette to spin coat the PTAA:F4-TCNQ solution from step 1 onto the sample from step 3;
[0014] Step 5: Place the sample spin-coated in step 4 in an oven at 50° C. and anneal for 10 minutes; after annealing, the thickness of the prepared functional layer is 30 nm.
[0015] Step 6: Place the sample processed in step 5 into the vacuum evaporation system and evacuate the chamber until the pressure is less than 5×10 -4 After Pa, the aluminum top electrode was evaporated;
[0016] Step 7: After the evaporation is completed, the vacuum state is maintained until the top electrode is cooled to room temperature, thereby obtaining a heterojunction memristor with a wide range of adjustable conductance.
[0017] As a preferred solution, in step 2, after the ITO glass cleaning agent is cleaned, it is cleaned twice with deionized water, and the ultrasonic cleaning time of the ITO glass cleaning agent and deionized water is 30 minutes. The drying condition is 60 minutes at 120°C.
[0018] As a preferred solution, the speed and time of the spin coating in step 4 are 500rpm / 5s-3000rpm / 30s.
[0019] As a preferred solution, the spin coating in step 4 is to take 110 μl of PTAA:F4-TCNQ solution with a pipette and vertically drop it onto the sample.
[0020] As a preferred solution, the oxide film attached to the aluminum top electrode in step six is removed by using ethanol before evaporation.
[0021] According to another aspect of the present invention, there is provided a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for preparing a heterojunction memristor with a wide range of controllable conductance of the present invention.
[0022] According to another aspect of the present invention, there is provided a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method for preparing a heterojunction memristor with a wide range of controllable conductance of the present invention when executing the program.
[0023] Compared with the prior art, the present invention has at least the following beneficial effects:
[0024] 1. The present invention has the characteristics of simple structural design and easy preparation. The solution processing method adopted by the present invention is different from the prior art (film scooping, vapor deposition film, etc.) in that the solution is used for spin coating.
[0025] 2. The present invention effectively solves the problem of small adjustable range of conductivity of single-layer PTAA devices. By using PTAA:F4-TCNQ bulk heterojunction, the conductivity can reach 10 -6 -10 -3 The adjustable range of A and linearity are significantly improved.
[0026] 3. The present invention has the characteristics of low operating voltage and high stability. The prepared organic memristor has low operating voltage (minimum 6.5V), stable read-write-erase cycle of more than 150s, and still has good device performance after being placed in the air for one month.
[0027] 4. The present invention can simulate synaptic plasticity and re-synaptic plasticity, providing technical reserves and reliable prototype devices for highly stable artificial neural networks.
[0028] 5. The structure of the present invention is easy to design, the process is simple, the yield is high, and it has universal applicability. It has opened up a new material strategy for reliable artificial synapses with adjustable linear large-range conductivity to operate stably in an air environment, providing technical reserves for building high-stability and high-precision artificial neural networks, thereby promoting the development of artificial intelligence devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present invention, but are not intended to limit the present invention.
[0030] Figure 1 A schematic diagram of the structure of a heterojunction memristor with a wide range of controllable conductance prepared by the present invention;
[0031] Figure 2 It is a structural diagram of p-type organic material PTAA and p-type dopant F4-TCNQ;
[0032] Figure 3 AFM surface morphology of the functional layer of the heterojunction memristor device with wide-range controllable conductance prepared in Example 2.
[0033] Figure 4 The positive and negative current-voltage diagrams of the single-layer PTAA slow-changing memristor device lacking F4-TCNQ prepared in Example 1;
[0034] Figure 5 The positive and negative current-voltage diagrams of the heterojunction memristor device with wide-range controllable conductance prepared in Example 2;
[0035] Figure 6 The positive and negative "read, write, erase" cycle curves of the heterojunction memristor device with wide-range controllable conductance prepared in Example 2;
[0036] Figure 7 The conductance of the single-layer PTAA slow-changing memristor device lacking F4-TCNQ prepared in Example 1 under continuous negative voltage scanning;
[0037] Figure 8 The conductance of the heterojunction memristor device with wide-range controllable conductance prepared in Example 2 under continuous negative voltage scanning;
[0038] Fig. 9 The synaptic plasticity simulated by the heterojunction memristor device with wide range of controllable conductance prepared in Example 2;
[0039] Fig.10 The fitting curves of double-pulse facilitation and double-pulse suppression simulated by the heterojunction memristor device with wide-range controllable conductance prepared in Example 2. DETAILED DESCRIPTION
[0040] To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the embodiments of the present invention will be described clearly and completely in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them.
[0041] Unless otherwise defined, technical or scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which the invention belongs.
[0042] The following is combined with Figure 1-10 The specific embodiments of the present invention are described in detail with examples.
[0043] Embodiment 1:
[0044] The present invention provides a heterojunction memristor with a wide range of adjustable conductance and a preparation method thereof, wherein the structure is as follows Figure 1 As shown, it includes: a top electrode, a functional layer, a bottom electrode and a substrate, and is a vertical structure as a whole, wherein the functional layer is composed of a p-type organic material PTAA and a p-type dopant F4-TCNQ, and the thickness of the PTAA:F4-TCNQ functional layer is 30nm.
[0045] The specific steps of the preparation method are:
[0046] (1) Selecting conductive glass as a substrate, forming a layer of indium tin oxide with a thickness of 185 nm on the conductive glass to form ITO conductive glass, and washing the ITO conductive glass with an ITO cleaning agent and deionized water for 30 minutes, then drying it with nitrogen and placing it in an oven at 120° C. for 60 minutes for drying;
[0047] (2) treating the dried ITO conductive glass with UV ozone for 15 min;
[0048] (3) Using a pipette, spin-coat a PTAA solution dissolved in tetrahydrofuran onto the ITO conductive glass to form a film, and anneal in an oven at 50° C. for 30 min.
[0049] (4) Place the ITO conductive glass with film-forming into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be less than 5×10 - 4 Pa, start evaporating metal aluminum electrode, the aluminum thickness is 90-100nm; the thickness of the film is measured by a step profiler and further confirmed by a scanning electron microscope.
[0050] (5) After the evaporation experiment is completed, the metal electrode is cooled to room temperature in a vacuum chamber to obtain a slow-changing memristor. The chamber is then opened to take out the sample and conduct relevant tests on the electrical properties of the memristor sample.
[0051] Example 2
[0052] (1) Selecting conductive glass as a substrate, forming a layer of indium tin oxide with a thickness of 185 nm on the conductive glass to form ITO conductive glass, and washing the ITO conductive glass with an ITO cleaning agent and deionized water for 30 minutes, then drying it with nitrogen and placing it in an oven at 120° C. for 60 minutes for drying;
[0053] (2) treating the dried ITO conductive glass with UV ozone for 15 min;
[0054] (3) Using a pipette, a PTAA:F4-TCNQ solution dissolved in tetrahydrofuran was spin-coated on the ITO conductive glass to form a film, and then annealed in an oven at 50° C. for 30 min.
[0055] (4) Place the ITO conductive glass with film-forming into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be less than 5×10 - 4 Pa, start evaporating metal aluminum electrode, the aluminum thickness is 90-100nm; the thickness of the film is measured by a step profiler and further confirmed by a scanning electron microscope;
[0056] (5) After the evaporation experiment is completed, the metal electrode is cooled to room temperature in a vacuum chamber to obtain a slow-changing memristor. The chamber is then opened to take out the sample and conduct relevant tests on the electrical properties of the memristor sample.
[0057] See also Figure 3 , which is the AFM morphology image of the film of Example 2. From the image, it can be found that the root mean square roughness Rq of the film made by spin coating the PTAA:F4-TCNQ solution is 1.31nm, indicating that the surface of the film is relatively smooth, which is conducive to reducing defects, thereby resulting in a lower operating voltage.
[0058] See also Figure 4 and Figure 5 , are respectively the positive and negative current-voltage curves of the single-layer PTAA memristor lacking F4-TCNQ prepared in Example 1 and the PTAA:F4-TCNQ bulk heterojunction memristor prepared in Example 2, Figure 5 As shown, the device can achieve a relatively low operating voltage, a negative response current of the device, a greater number of cycles, can reach more conductance states, and has a wider controllable range of conductance.
[0059] See also Figure 7 and Figure 8 Compared with the single-layer PTAA memristor lacking F4-TCNQ prepared in Example 1, the heterojunction memristor with a wide range of adjustable conductance prepared in Example 2 has a larger adjustable conductance range and better linearity under continuous negative voltage scanning, thereby improving the accuracy of neural network learning.
[0060] See also Fig. 9 The heterojunction memristor with a wide range of adjustable conductance prepared in Example 2 is tested using electric pulses with different pulse amplitudes, different pulse frequencies, and different pulse widths, which can simulate synaptic plasticity.
[0061] See also Fig.10The double pulse facilitation PPF and double pulse suppression PPD curves of the device were fitted and calculated, and the double pulse facilitation index fitting curve and double pulse suppression index fitting curve were obtained, which proved that the memristor has excellent performance in positive enhancement and negative suppression.
[0062] In summary, the present invention relates to a heterojunction memristor with a wide range of adjustable conductance. The electrical performance of the device is improved, and an effective path is opened up for improving neuromorphic computing. In addition, the sandwich structure of the device is easy to design, the process operation is simple, the yield rate is high, and it has universal applicability.
[0063] The examples described in the present invention are merely descriptions of the preferred implementation modes of the present invention, and are not intended to limit the concept and scope of the present invention. Without departing from the design concept of the present invention, various modifications and improvements made to the technical solutions of the present invention by engineers and technicians in this field should all fall within the protection scope of the present invention.
Claims
1. A heterojunction memristor with wide-range controllable conductance, characterized in that: include: A top electrode, a functional layer, a bottom electrode and a substrate are sequentially arranged, wherein the top electrode, the functional layer, the bottom electrode and the substrate are perpendicular to each other; The functional layer is composed of a p-type organic material PTAA and a p-type dopant F4-TCNQ.
2. The heterojunction memristor with wide-range controllable conductance according to claim 1, characterized in that: The thickness of the PTAA:F4-TCNQ functional layer is 30 nm.
3. The heterojunction memristor with wide-range controllable conductance according to claim 1, characterized in that: The substrate is made of glass, the bottom electrode is made of indium tin oxide, and the top electrode is made of aluminum.
4. A method for preparing a heterojunction memristor with a wide range of adjustable conductance, characterized in that: The steps include: Step 1: Prepare the organic functional layer PTAA:F4-TCNQ solution: dissolve 3 mg PTAA and 5 mg F4-TCNQ materials in 1 ml tetrahydrofuran, and stir magnetically at 30°C for more than 12 hours to completely dissolve them; Step 2: growing a layer of bottom electrode ITO on the surface of the base conductive glass, and sequentially using an ITO glass cleaning agent and deionized water ultrasonic cleaning and drying; Step 3: Treat the sample dried in step 2 with UV ozone for 10 min; Step 4: Use a pipette to spin coat the PTAA:F4-TCNQ solution from step 1 onto the sample from step 3; Step 5: Place the sample spin-coated in step 4 in an oven at 50° C. and anneal for 10 minutes; after annealing, the thickness of the prepared functional layer is 30 nm. Step 6: Place the sample processed in step 5 into the vacuum evaporation system, evacuate the chamber until the pressure is lower than 5×10-4Pa, and then start evaporating the aluminum top electrode; Step 7: After the evaporation is completed, the vacuum state is maintained until the top electrode is cooled to room temperature, thereby obtaining a heterojunction memristor with a wide range of adjustable conductance.
5. The method according to claim 4, characterized in that In step 2, after the ITO glass cleaning agent is used for cleaning, it is then cleaned twice with deionized water, and the ultrasonic cleaning time of the ITO glass cleaning agent and deionized water is 30 minutes. The drying condition is 60 minutes at 120°C.
6. The method according to claim 4, characterized in that The speed and time of spin coating in step 4 are 500 rpm / 5s-3000 rpm / 30s.
7. The method according to claim 6, characterized in that In step 4, spin coating is performed by taking 110 μl of PTAA:F4-TCNQ solution with a pipette and vertically dropping it onto the sample.
8. The method according to claim 4, characterized in that In step six, the aluminum top electrode is coated with ethanol to remove the attached oxide film before evaporation.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps in the method for preparing a heterojunction memristor with wide-range controllable conductance are implemented as described in any one of claims 4 to 8.
10. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps in the method for preparing a heterojunction memristor with wide-range controllable conductance as claimed in any one of claims 4 to 8 are implemented.
