Inverter and leakage current suppression method in self-checking process of relay of inverter

Abstract

The invention provides an inverter and a leakage current suppression method in a relay self-checking process thereof, and the method comprises the steps: controlling an inverter circuit to output an inverter voltage synchronous with a power grid voltage when one of a main relay and a slave relay of a null line branch is closed, and enabling the null line branch to be switched on because the null line branch is not switched on; no current path exists between the input end of the inverter circuit and the ground, and almost no current passes through the two first capacitors, so that the leakage current is very small. And when the voltage values at the two ends of the relay of which the null line branch is disconnected are within the target range, the main relay and the slave relay of the null line branch are controlled to be closed, so that the impact current generated when the relays are closed can be reduced. Therefore, the leakage current of the inverter can be effectively reduced, misoperation of the leakage current protector is prevented, and the working stability of the inverter is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of inverters, and in particular relates to a method for suppressing leakage current during a self-check process of an inverter and a relay thereof. Background Art

[0002] In the related art, in order to protect the inverter and the power grid, a relay is set between the AC side of the inverter and the power grid to control the flow of power from the inverter to the power grid. In order to ensure the performance and stability of the inverter and the power grid, the relay will be self-checked when the inverter is working. During the self-check process, the leakage current may increase suddenly, triggering the leakage current protector to trip, which will affect the normal operation of the inverter. If the current protection threshold of the leakage current protector is increased, its protection effect will be affected. Therefore, it is very necessary to suppress the leakage current during the relay self-check process. Summary of the invention

[0003] The embodiment of the present application provides a method for suppressing leakage current during the self-test process of an inverter and its relay, which can suppress the leakage current during the self-test process of the relay and prevent the leakage current protector from malfunctioning.

[0004] In a first aspect, the present application provides a method for suppressing leakage current during a relay self-test process of an inverter, the inverter comprising an inverter circuit, a live branch, a neutral branch, two first capacitors and two second capacitors, the input end of the inverter circuit being used to connect a DC power supply, the output end of the inverter circuit being connected to a power grid via the live branch and the neutral branch; the live branch and the neutral branch both comprising a main relay and a slave relay connected in series; the first ends of the two first capacitors are respectively connected to an input positive terminal and an input negative terminal of the inverter circuit, and the second ends of the two first capacitors are grounded; the first ends of the two second capacitors are respectively connected between the live branch and the neutral branch and the output end of the inverter circuit, and the second ends of the second capacitors are grounded; the leakage current suppression method comprises: when one of the main relay and the slave relay of the neutral branch is closed, controlling the inverter circuit to output an inverter voltage synchronized with the power grid voltage; when the voltage values ​​at both ends of the disconnected relay in the neutral branch are within a target range, controlling the main relay and the slave relay of the neutral branch to close; wherein the target range includes a minimum voltage value.

[0005] In the embodiment of the present application, when one of the main relay and the slave relay of the zero line branch is closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage. At this time, since the zero line branch is not turned on, there is no current path between the input end of the inverter circuit and the ground, and almost no current passes through the two first capacitors, so that the leakage current is very small. When the voltage value at both ends of the relay disconnected in the zero line branch is within the target range, the main relay and the slave relay of the zero line branch are controlled to be closed, which can reduce the impact current generated when the relay is closed. Therefore, the embodiment of the present application can effectively reduce the leakage current of the inverter, prevent the leakage current protector from malfunctioning, and thus improve the stability of the inverter operation.

[0006] In one possible implementation, when the main relay and one of the slave relays of the neutral line branch are closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage, including: when the main relay of the neutral line branch is disconnected and the slave relay is closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage.

[0007] In one possible implementation, when the main relay and one of the slave relays of the neutral branch are closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage, including: when the main relay of the neutral branch is closed and the slave relay is disconnected, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage.

[0008] In one possible implementation, when the voltage value across the disconnected relay in the neutral line branch is within a target range, the main relay and the slave relay of the neutral line branch are controlled to be closed, including: when the voltage value is within the target range, the main relay and the slave relay of the neutral line branch are controlled to be closed after a preset delay time.

[0009] In a possible implementation, before the main relay and the slave relay controlling the neutral line branch are closed, the leakage current suppression method further includes: obtaining an inverter phase of the inverter voltage; and determining whether the voltage value is within a target range according to the inverter phase.

[0010] In a possible implementation, when one of the main relay and the slave relay of the neutral branch is closed, one of the main relay and the slave relay of the live branch is closed.

[0011] In a possible implementation, after controlling the main relay and the slave relay of the neutral line branch to be closed, the leakage current suppression method further includes: controlling the main relay and the slave relay of the live line branch to be closed.

[0012] In a second aspect, the present application provides an inverter, comprising an inverter circuit, a control circuit, a live branch, a neutral branch, two first capacitors and two second capacitors, the input end of the inverter circuit is used to connect a DC power supply, and the output end of the inverter circuit is connected to a power grid through the live branch and the neutral branch; the live branch and the neutral branch both include a main relay and a slave relay connected in series; the first ends of the two first capacitors are respectively connected to the input positive terminal and the input negative terminal of the inverter circuit, and the second ends of the two first capacitors are grounded; the first ends of the two second capacitors are respectively connected between the live branch and the neutral branch and the output end of the inverter circuit, and the second ends of the second capacitors are grounded; the control circuit is connected to the main relay and the slave relay of the neutral branch; wherein the control circuit is used to: when one of the main relay and the slave relay of the neutral branch is closed, control the inverter circuit to output an inverter voltage synchronized with the power grid voltage; when the voltage value at both ends of the disconnected relay in the neutral branch is within a target range, control the main relay and the slave relay of the neutral branch to be closed; wherein the target range includes the minimum value of the voltage value.

[0013] In one possible implementation, the live branch and the neutral branch also include an inductor respectively, the first end of the inductor is connected to the output end of the inverter circuit, the second end of the inductor is correspondingly connected to the first end of the main relay, the second end of the main relay is correspondingly connected to the first end of the slave relay, and the second end of the slave relay is connected to the power grid; the first end of the second capacitor is correspondingly connected to the second end of the inductor.

[0014] In a possible implementation, the inverter further includes a DC bus and a bus capacitor, the input end of the inverter circuit is connected to a DC power source via the DC bus, and the bus capacitor is connected to the DC bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the circuit structure of the inverter provided in an embodiment of the present application.

[0016] Figure 2 Schematic diagram of a leakage current loop generated by an inverter provided in an embodiment of the present application.

[0017] Figure 3 Schematic diagram of a leakage current loop generated by an inverter provided in another embodiment of the present application.

[0018] Figure 4 Schematic diagram of a leakage current loop generated by an inverter provided in another embodiment of the present application.

[0019] Figure 5 It is a flow chart of the leakage current suppression method provided in the embodiment of the present application.

[0020] Figure 6 It is a partial flow chart of a leakage current suppression method provided in another embodiment of the present application.

[0021] Figure 7 It is a schematic diagram of the current loop of the inverter circuit when the inverter voltage provided in the embodiment of the present application is in the positive half cycle.

[0022] Figure 8 It is a schematic diagram of the current loop of the inverter circuit when the inverter voltage provided in the embodiment of the present application is in the negative half cycle.

[0023] Fig. 9 It is a voltage waveform diagram of the voltage value at both ends of the disconnected second main relay, the inverter voltage and the voltage of the negative DC bus to the ground in a specific example of the present application. DETAILED DESCRIPTION

[0024] It should be noted that the terms "first" and "second" in the specification, claims and drawings of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. In the specification, claims and drawings of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "multiple" in the specification, claims and drawings of the present application refers to two or more than two.

[0025] It is understandable that the connection relationship described in the present application refers to direct or indirect connection. For example, A is connected to B or A is electrically connected to B, which can be either A and B are directly connected or A and B are indirectly connected through one or more other electrical components, for example, A and C are directly connected, and C and B are directly connected, so that A and B are connected through C.

[0026] It should also be noted that the method disclosed in the embodiments of the present application or the method shown in the flowchart includes one or more steps for implementing the method. Without departing from the scope of the claims, the execution order of multiple steps can be interchangeable with each other, and some of the steps can also be deleted.

[0027] Some embodiments will be described below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0028] In the inverter, a relay is set between the AC side of the inverter and the grid to control the flow of power from the inverter to the mains grid. In order to achieve safety redundancy, a double relay is also set between the inverter and the mains grid. In order to ensure the performance and stability of the inverter and the grid, the relay will be self-checked when the inverter is working. During the self-check process, the leakage current may increase suddenly, triggering the leakage current protector to trip, which will affect the normal operation of the inverter. If the current protection threshold of the leakage current protector is increased, its protection effect will be affected. Therefore, it is very necessary to suppress the leakage current during the relay self-check process.

[0029] See also Figure 1 , Figure 1 A schematic diagram of the circuit structure of the inverter 100 provided in an embodiment of the present application is shown.

[0030] The inverter 100 includes an inverter circuit 110 , a control circuit 120 , a live branch 130 / L, a neutral branch 140 / N, two first capacitors C1 and two second capacitors C2 .

[0031] The input end of the inverter circuit 110 is used to connect to the DC power supply 200, and the output end of the inverter circuit 110 is connected to the power grid 300 through the live branch 130 / L and the neutral branch 140 / N. In the embodiment of the present application, the DC power supply 200 can be a photovoltaic component, an energy storage battery, etc., wherein the photovoltaic component can be a solar cell package, a photovoltaic panel, etc. Among them, when the DC power supply 200 is a photovoltaic component, the input end of the inverter circuit 110 can be connected to the photovoltaic component through a DC / DC conversion circuit (not shown).

[0032] The live branch 130 / L and the neutral branch 140 / N each include a main relay (S1, S3) and a slave relay (S2, S4) connected in series. The first ends of the two first capacitors C1 are respectively connected to the positive input terminal and the negative input terminal of the inverter circuit 110, and the second ends of the two first capacitors C1 are grounded. The first ends of the two second capacitors C2 are respectively connected between the live branch 130 / L and the neutral branch 140 / N and the output terminal and of the inverter circuit 110, and the second ends of the second capacitors C2 are grounded. The control circuit 120 is connected to the main relay (S1, S3) and the slave relay (S2, S4).

[0033] The control circuit 120 can be used to control the main relay (S1, S3) and the slave relay (S2, S4) to close and open before the inverter 100 is connected to the grid, so as to perform self-test on the main relay (S1, S3) and the slave relay (S2, S4).

[0034] In the embodiment of the present application, the control circuit 120 may include a microcontroller unit (MCU), an energy management system (EMS), and the like.

[0035] It should be noted that, during the relay self-test of the inverter, the control circuit 120 can control the main relays (S1, S3) of the live branch 130 / L and the neutral branch 140 / N to close and the slave relays (S2, S4) to disconnect. At this time, the control circuit 120 can determine whether the slave relays (S2, S4) have a sticking fault based on the voltage information between the output end of the inverter circuit 110 and the power grid.

[0036] The control circuit 120 can also control the main relays (S1, S3) of the live branch 130 / L and the neutral branch 140 / N to be disconnected and the slave relays (S2, S4) to be closed. At this time, the control circuit 120 can determine whether the main relays (S1, S3) have a sticking fault based on the voltage information between the output end of the inverter circuit 110 and the power grid 300.

[0037] The control circuit 120 can also control the main relays (S1, S3) and the slave relays (S2, S4) of the live branch 130 / L and the neutral branch 140 / N to be closed. At this time, the control circuit 120 can determine whether the main relays (S1, S3) and the slave relays (S2, S4) have a disconnection fault based on the voltage information between the output end of the inverter circuit 110 and the power grid 300.

[0038] Please refer again Figure 1 In some embodiments, the live branch 130 / L and the neutral branch 140 / N may further include inductors (L1, L2). The first end of the inductor (L1, L2) is connected to the output end of the inverter circuit 110, the second end of the inductor (L1, L2) is correspondingly connected to the first end of the main relay (S1, S3), the second end of the main relay (S1, S3) is correspondingly connected to the first end of the slave relay (S2, S4), and the second end of the slave relay (S2, S4) is connected to the power grid 300. The first ends of the two second capacitors C2 are correspondingly connected to the second ends of the inductors (L1, L2).

[0039] Specifically, the first ends of the inductors (L1, L2) of the live branch 130 / L and the neutral branch 140 / N are respectively connected to the live output terminal and the neutral output terminal of the inverter circuit 110, and the second ends of the slave relays (S2, S4) of the live branch 130 / L and the neutral branch 140 / N are respectively connected to the live terminal and the neutral terminal of the power grid 300. The live branch 130 / L includes a first inductor L1, a first main relay S1 and a first slave relay S2, and the neutral branch 140 / N includes a second inductor L2, a second main relay S3 and a second slave relay S4. It can be understood that the first inductor L1 and the second inductor L2 are inductors of the same specification.

[0040] In this example, the inverter 100 is a single-phase inverter.

[0041] It is understandable that the inverter 100 may further include a DC bus (BUS+, BUS-) and a bus capacitor C3. The input end of the inverter circuit 110 is connected to the DC power supply 200 via the DC bus, and the bus capacitor C3 is connected to the DC bus.

[0042] Specifically, the positive input terminal of the inverter circuit 110 is connected to the positive electrode of the DC power supply 200 through the positive DC bus BUS+, and the negative input terminal of the inverter circuit 110 is connected to the negative electrode of the DC power supply 200 through the negative DC bus BUS-. The bus capacitor C3 is connected between the positive and negative DC buses. Among them, the first ends of the two first capacitors C1 are respectively connected to the positive DC bus BUS+ and the negative DC bus BUS-.

[0043] In some specific examples, two bus capacitors C3 may be provided, and the two bus capacitors C3 are connected in series between the positive and negative DC bus bars.

[0044] In some embodiments, the inverter 100 may further include an output capacitor C4, a first end of the output capacitor C4 is connected to the second end of the first inductor L1 on the live branch 130 / L, and a second end of the output capacitor C4 is connected to the second end of the second inductor L2 on the neutral branch 140 / N.

[0045] Specifically, the inverter circuit 110 includes a first switch tube Q1, a second switch tube Q2, a third switch tube Q3 and a fourth switch tube Q4.

[0046] The first end of the first switch tube Q1 and the first end of the third switch tube Q3 are both connected to the positive DC bus BUS+ and the first end of one of the first capacitors C1, the second end of the first switch tube Q1 is connected to the first end of the second switch tube Q2, the second end of the third switch tube Q3 is connected to the first end of the fourth switch tube Q4, and the second end of the second switch tube Q2 and the second end of the fourth switch tube Q4 are both connected to the negative DC bus BUS- and the first end of another first capacitor C1. The second end of the first switch tube Q1 is connected to the live branch 130 / L, and the second end of the third switch tube Q3 is connected to the neutral branch 140 / N. The control ends of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4 are all connected to the control circuit 120 so as to be controlled on and off by the control circuit 120.

[0047] Specifically, when the relay of the inverter 100 is in the self-test process, if the first main relay S1 and the first slave relay S2 on the live branch 130 / L are closed, at the moment when the first main relay S1 and the first slave relay S2 are closed, the power grid 300 will charge the second capacitor C2 connected to the live branch 130 / L through the closed first main relay S1 and the first slave relay S2, and then the live branch 130 / L will generate a leakage current. The leakage current loop is as follows: Figure 2 The magnitude of the leakage current is related to the capacitance of the second capacitor C2 connected to the live branch 130 / L and the grid voltage at the moment the relay is closed. The larger the capacitance of the second capacitor C2 and the larger the grid voltage at the moment the relay is closed, the greater the leakage current generated.

[0048] like Figure 3 As shown, during the relay self-test process of the inverter 100, if the second main relay S3 and the second slave relay S4 on the neutral branch 140 / N are closed, at the moment when the first switch tube Q1 and the fourth switch tube Q4 are turned on, the first inductor L1 and the second inductor L2 respectively divide the bus voltage by half, and the voltage of the first capacitor C1 connected to the negative DC bus BUS- is the same as the voltage of the second inductor L2, and the instantaneous voltage of the output capacitor C4 is still zero. At this time, the leakage current flows from the second slave relay S4 of the neutral branch 140 / N, the second main relay S3, the second inductor L2, through the fourth switch tube Q4 and the first capacitor C1 connected to the negative DC bus BUS- into the ground, and the leakage current loop is as shown in FIG. Figure 3 Shown by the dashed arrow.

[0049] like Figure 4As shown, at the moment when the second switch tube Q2 and the third switch tube Q3 are turned on, the first inductor L1 and the second inductor L2 also divide the bus voltage by half, and the voltage of the first capacitor C1 connected to the positive DC bus BUS+ is the same as the voltage of the second inductor L2, and the instantaneous voltage of the output capacitor C4 is still zero. At this time, the leakage current flows from the second slave relay S4, the second main relay S3, the second inductor L2 of the neutral line branch 140 / N through the third switch tube Q3 and the first capacitor C1 connected to the positive DC bus BUS+ into the ground, and the leakage current loop is as shown in FIG. Figure 4 Shown by the dashed arrow.

[0050] The leakage current generated during the relay self-test of the inverter 100 is likely to trigger the leakage current protector to malfunction, affecting the normal operation of the inverter 100. Of course, other types of inverters 100 (such as three-phase inverters) may also experience leakage current triggering the current protector to malfunction.

[0051] In view of this, an embodiment of the present application provides a method for suppressing leakage current during a self-test process of an inverter and a relay thereof, so as to suppress leakage current during a self-test process of the relay.

[0052] See also Figure 5 , Figure 5 The flowchart of the leakage current suppression method in the relay self-test process of the inverter provided by the embodiment of the present application is shown. In at least one embodiment, the leakage current suppression method is applied to the inverter 100 as described above, and the leakage current suppression method can be executed by the control circuit 120. For the convenience of description, the leakage current suppression method is applied to Figure 1 The inverter 100 shown is taken as an example for description.

[0053] like Figure 5 As shown, the leakage current suppression method specifically includes the following steps: S100: When the main relay and one of the slave relays of the neutral line branch are closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage.

[0054] Among them, during the relay self-test process of the inverter 100, the control circuit 120 will control one of the main relays (S1, S3) and the slave relays (S2, S4) of the live branch 130 / L and the neutral branch 140 / N to be disconnected and the other to be closed, so as to detect whether there is a sticking fault in each relay. When the control circuit 120 controls one of the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be disconnected and the other to be closed, the inverter circuit 110 is controlled to establish an inverter voltage synchronized with the grid voltage. At this time, since the neutral branch 140 / N is not turned on, there is no current path between the DC bus (BUS+, BUS-) and the ground, and almost no current flows through the two first capacitors C1. The effective value of the leakage current in this process is very small (for example, less than 30mA).

[0055] It can be understood that when one of the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N is closed, one of the first main relay S1 and the first slave relay S2 of the live branch 130 / L is closed, so that it is possible to simultaneously detect whether the relays on the live branch 130 / L and the neutral branch 140 / N have a sticking fault. Of course, during the relay self-test process, the control circuit 120 can also first control the first main relay S1 and the first slave relay S2 of the live branch 130 / L to be closed, and first detect whether the relay on the live branch 130 / L has a sticking fault. Then, the control circuit 120 controls one of the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed to detect whether the relay on the neutral branch 140 / N has a sticking fault.

[0056] S200: When the voltage value across the disconnected relay in the neutral line branch is within the target range, the main relay and the slave relay controlling the neutral line branch are both closed.

[0057] The target range includes the minimum value of the voltage value. It is understood that the target range may also include values ​​near the minimum value of the voltage value at both ends of the disconnected relay in the neutral branch 140 / N. The control circuit 120 may perform step S200 after the inverter voltage output by the inverter circuit 110 is stable.

[0058] When the voltage value at both ends of the relay disconnected in the neutral branch 140 / N by the control circuit 120 is within the target range, the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N are controlled to be closed, which can reduce the impact current generated when the relay is closed, and thus can also prevent the leakage current protector from malfunctioning. It can be understood that at this time, the control circuit 120 controls the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed, which can establish a reference point for the inverter circuit 110 and the power grid 300, so that the inverter circuit 110 can output an inverter voltage with a higher synchronization rate with the power grid voltage. Among them, in the process of the control circuit 120 controlling the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed, it can be detected whether the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N have a disconnection fault.

[0059] It can be seen that in the method for suppressing leakage current during the relay self-test of the embodiment of the present application, when one of the second main relay S3 and the second slave relay S4 of the neutral line branch 140 / N is closed, the inverter circuit 110 is controlled to output an inverter voltage synchronized with the grid voltage. At this time, there is no current path between the DC bus (BUS+, BUS-) and the ground, and almost no current flows through the two first capacitors C1. In other words, when the inverter 100 is detecting whether the relay has a sticking fault, the effective value of the leakage current in the inverter 100 is very small.

[0060] When the voltage value at both ends of the disconnected relay in the neutral branch 140 / N is within the target range, the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N are controlled to be closed, which can reduce the impact current generated when the relay is closed. In other words, in the process of the inverter 100 detecting whether the relay of the neutral branch 140 / N has a disconnection fault, the leakage current in the inverter 100 can also be effectively reduced.

[0061] Therefore, in the leakage current suppression method of the embodiment of the present application, during the process of the inverter 100 detecting whether the relay has a sticking fault and whether the relay of the neutral branch 140 / N has an open circuit fault, the leakage current of the inverter 100 can be effectively reduced, and the leakage current protector can be prevented from malfunctioning, thereby improving the working stability of the inverter 100.

[0062] In some embodiments, step S100 may include: when the second main relay S3 of the neutral line branch 140 / N is opened and the second slave relay S4 is closed, controlling the inverter circuit 110 to output an inverter voltage synchronized with the grid voltage.

[0063] In some other embodiments, step S100 may also include: when the second main relay S3 of the neutral line branch 140 / N is closed and the second slave relay S4 is open, controlling the inverter circuit 110 to output an inverter voltage synchronized with the grid voltage.

[0064] It is understandable that it takes a certain amount of time for the control circuit 120 to determine whether the voltage value of the disconnected relay in the neutral branch 140 / N is within the target range. In order to prevent the voltage value across the disconnected relay from actually being out of the target range when the control circuit 120 outputs a signal to control the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed, step S200 may include: When the voltage value is within the target range, the second main relay S3 and the second slave relay S4 of the neutral line branch 140 / N are controlled to be closed after a preset delay time.

[0065] The preset delay time can be determined based on whether the voltage value is within the target range, the change cycle of the voltage value of the relay, and the action time of the relay based on the control circuit 120, so as to ensure that when the control circuit 120 controls the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed, the voltage value at both ends of the disconnected relay is still within the target range.

[0066] It is understandable that after step S200, the leakage current suppression method may further include: controlling the first main relay S1 and the first slave relay S2 of the live branch 130 / L to be closed. At this time, the control circuit 120 may detect whether the relay on the live branch 130 / L has a disconnection fault. Since the inverter circuit 110 has previously established an inverter voltage synchronized with the grid voltage, the voltage difference between the grid 300 and the output end of the inverter circuit 110 becomes smaller, and the moment when the first main relay S1 and the first slave relay S2 of the live branch 130 / L are controlled to be closed can effectively reduce the generated inrush current, thereby effectively reducing the generated leakage current.

[0067] In this way, in the leakage current suppression method of the embodiment of the present application, during the process of the inverter 100 performing adhesion fault detection and disconnection fault detection on the relays on the live branch 130 / L and the neutral branch 140 / N, the leakage current generated in the inverter circuit 110 can be reduced to prevent the leakage current protector from malfunctioning.

[0068] It can be understood that after the first main relay S1 and the first slave relay S2 controlling the live branch 130 / L are closed, the live branch 130 / L and the neutral branch 140 / N of the inverter 100 are both turned on, and the inverter 100 can be connected to the grid.

[0069] See also Figure 6In some embodiments, before step S200, the leakage current suppression method further includes: S201. Obtain an inverter phase of an inverter voltage.

[0070] The control circuit 120 can obtain the inverter phase by detecting the inverter voltage. The control circuit 120 can determine the inverter phase according to the detected inverter voltage and the peak voltage of the inverter voltage. Since the inverter voltage is synchronized with the grid voltage, the peak voltage of the inverter voltage can be determined according to the peak voltage of the grid 300, and the peak voltage of the grid 300 can be determined according to the safety requirements of the grid 300. For example, if the rated voltage of the grid 300 is 220V, the corresponding peak voltage is 311V, so the inverter phase can be determined according to the detected actual inverter voltage and peak voltage.

[0071] Of course, in some embodiments, since the inverter voltage is synchronized with the grid voltage, the control circuit 120 can also determine the inverter phase by detecting the grid voltage.

[0072] S202: Determine whether the voltage values ​​at both ends of the disconnected relay in the neutral branch are within a target range according to the inverter phase.

[0073] It can be understood that there is a certain relationship between the voltage value at both ends of the disconnected relay in the neutral branch 140 / N and the inverter voltage, for example, the phase difference between the inverter phase and the phase of the voltage value at both ends of the disconnected relay is 180° or 0°. Therefore, the control circuit 120 can determine whether the voltage value at both ends of the disconnected relay in the neutral branch 140 / N is within the target range according to the inverter phase.

[0074] For example, when the control circuit 120 disconnects the main relays (S1, S3) of the live branch 130 / L and the neutral branch 140 / N and closes the slave relays (S2, S4), the inverter circuit 110 is controlled to output an inverter voltage synchronized with the grid voltage, and the voltage value at both ends of the second main relay S3 disconnected on the neutral branch 140 / N is 180° out of phase with the inverter voltage. It can be understood that since the inverter voltage is synchronized with the grid voltage, that is, the voltage value at both ends of the second main relay S3 disconnected on the neutral branch 140 / N is 180° out of phase with the inverter voltage.

[0075] Next, the example of controlling the inverter circuit 110 to output an inverter voltage synchronized with the grid voltage when the second main relay S3 of the neutral line branch 140 / N is disconnected and the second slave relay S4 is closed is taken as an example. Figure 7 , Figure 8 and Fig. 9 The leakage current suppression method according to the embodiment of the present application is described.

[0076] in, Figure 7The figure shows the current loop of the inverter circuit 110 when the inverter voltage is in the positive half cycle. Fig. 9 The figure shows the current loop of the inverter circuit 110 when the inverter voltage is in the negative half cycle. Fig. 9 The voltage waveform of the voltage value at both ends of the disconnected second main relay S3 and the inverter voltage is shown. Among them, waveform A is the waveform of the voltage value at both ends of the disconnected second main relay S3, waveform B is the waveform of the inverter voltage, and waveform C is the voltage of the negative DC bus BUS- to the ground.

[0077] like Figures 7 to 9 As shown, when the second main relay S3 of the neutral line branch 140 / N is disconnected, the second slave relay S4 is closed, and the inverter circuit 110 is controlled to output an inverter voltage synchronized with the grid voltage, since the second main relay S3 is disconnected, no path is formed in the inverter circuit 110, and the voltage of the negative DC bus BUS- to the ground (that is, the voltage on the first capacitor C1 on the negative DC bus BUS-) is close to zero (such as Fig. 9 The waveform C of the time period ① is shown. At this time, almost no current flows through the two first capacitors C1, and the effective value of the leakage current is very small. The inverter voltage takes the first end of the output capacitor C4 as a positive voltage and the second end of the output capacitor C4 as a negative voltage as the positive half cycle of the inverter voltage.

[0078] like Figure 7 As shown, when the first switch tube Q1 and the fourth switch tube Q4 in the inverter circuit 110 are turned on, since the second main relay S3 is disconnected, the inverter circuit 110 forms a loop (such as Figure 7 ), the inverter voltage is in the positive half cycle, and the grid voltage is also in the positive half cycle. Since the second slave relay S4 is closed to ground the second end of the second main relay S3, the voltage value across the second main relay S3 is the voltage of its first end to ground. The first end of the second main relay S3 is grounded via the second inductor L2, the fourth switch tube Q4 and the first inductor C1 on the negative DC bus BUS-. Therefore, the voltage across the second main relay S3 is also the voltage between the second inductor L2 and the first inductor C1. At this time, the voltage on the first capacitor C1 on the negative DC bus BUS- is close to zero (such as Fig. 9Waveform C in time period ①), the voltage across the second main relay S3 is the voltage of the second inductor L2. It can be seen that the voltage of the second inductor L2, that is, the voltage across the second main relay S3 is Vt=(Vbus-Vout) / 2, where Vbus is the input voltage of the inverter circuit 110, and Vout is the inverter voltage. It can be understood that according to Vt=(Vbus-Vout) / 2, when the inverter voltage is at the peak value (that is, the grid voltage is at the peak value), Vt is the minimum. Among them, the inverter voltage is the voltage across the output capacitor C4.

[0079] When the second switch tube Q2 and the third switch tube Q3 are turned on, since the second main relay S3 is turned off, the inverter circuit 110 forms a loop (such as Figure 8 ), the inverter voltage is in the negative half cycle, and the grid voltage is also in the negative half cycle. Since the second slave relay S4 is closed to ground the second end of the second main relay S3, the voltage value across the second main relay S3 is the voltage of its first end to ground. The first end of the second main relay S3 is grounded via the output inductor C4, the first inductor L1, the second switch tube Q2 and the first inductor C1 on the negative DC bus BUS-. Therefore, the voltage across the second main relay S3 is also the voltage between the output inductor C4, the first inductor L1 and the first inductor C1. At this time, the voltage on the first capacitor C1 on the negative DC bus BUS- is close to 0 (such as Fig. 9 Waveform C in time period ①), the voltage value across the second main relay S3 is the voltage between the output capacitor C4 and the first inductor L1, that is, the inverter voltage plus the voltage of the first inductor L1. It can be seen that the inverter voltage plus the voltage of the first inductor L1, that is, the voltage across the output capacitor C4 plus the voltage of the first inductor L1, if the reference voltage of the output capacitor C4 is positive at the top and negative at the bottom, the voltage across the second main relay S3 is Vt=-Vout+(Vbus-(-Vout)) / 2=(Vbus-Vout) / 2. It can be understood that when the inverter voltage is at a valley value (that is, the grid voltage is at a valley value), Vt is the largest.

[0080] It can be seen that when the inverter voltage is at a peak value, the voltage across the second main relay S3 disconnected on the neutral line branch 140 / N is the smallest. When the inverter voltage is at a valley value, the voltage across the second main relay S3 is the largest. Figure 8As shown in the voltage waveform, the phase difference between the inverter voltage and the voltage across the second main relay S3 is 180°. Therefore, the control circuit 120 can determine the inverter phase by detecting the inverter voltage, and then determine whether the voltage value across the second main relay S3 is within the target range, that is, whether it is near its minimum value according to the inverter phase. It can be understood that the minimum value of the voltage value across the second main relay S3 is zero.

[0081] Of course, the control circuit 120 can also control the inverter circuit 110 to output an inverter voltage synchronized with the grid voltage when the second main relay S3 of the neutral line branch 140 / N is closed and the second slave relay S4 is disconnected. At this time, the control circuit 120 can determine whether the voltage across the second slave relay S4 on the neutral line branch 140 / N is within the target range according to the inverter phase of the inverter voltage.

[0082] Then, when the voltage value across the second main relay S3 is within the target range, that is, near the minimum value (zero), the second main relay S3 and the second slave relay S4 of the neutral line branch 140 / N are both closed. Since the second end of the second slave relay S4 is grounded, the voltage across the second main relay S3 remains zero (e.g. Fig. 9 Waveform A in time period ②). Since the second main relay S3 and the second slave relay S4 are both controlled to be closed when the voltage value at both ends of the second main relay S3 is at the minimum value (zero), at the closing moment, the voltage difference between the second end of the second main relay S3 and the second end of the second slave relay S4 is very small, which can prevent the generation of surge current at the closing moment.

[0083] Among them, when the second main relay S3 and the second slave relay S4 are closed, the inverter voltage is at the peak value. At this time, the first switch tube Q1 and the fourth switch tube Q4 in the inverter circuit 110 are turned on, and the inverter voltage is in the positive half cycle. The inverter circuit 110 forms a loop (such as the positive DC bus BUS+, the first switch tube Q1, the first inductor L1, the output capacitor C4, the second inductor L2, the fourth switch tube Q4 and the negative DC bus BUS-) Figure 7 ). Since the second main relay S3 and the second slave relay S4 are closed, and the second end of the second slave relay S4 is grounded, the voltage of the negative DC bus BUS- to ground is the voltage of the second inductor L2. Since the voltage on the second inductor L2 is almost negligible when the inverter voltage is at its peak, the voltage of the negative DC bus BUS- to ground is almost zero at this time. Since the voltage of the negative DC bus BUS- to ground is also almost zero before the second main relay S3 and the second slave relay S4 are closed, the voltage fluctuation of the negative DC bus BUS- to ground is very small (such as Fig. 9 The junction of time period ① and time period ②) can prevent leakage current from occurring.

[0084] Then, the inverter voltage gradually decreases, and the voltage value on the second inductor L2 gradually increases. For the second inductor L2, the voltage at the second end is positive, and the voltage at the first end is negative, that is, the voltage of the negative DC bus BUS- to the ground is negative.

[0085] Afterwards, the second switch tube Q2 and the third switch tube Q3 in the inverter circuit 110 are turned on, and the inverter voltage is in the negative half cycle. Figure 8 As shown by the red dotted arrow, the inverter circuit 110 forms a loop via the positive DC bus BUS+, the third switch tube Q3, the second inductor L2, the output capacitor C4, the first inductor L1, the second switch tube Q2 and the negative DC bus BUS-. Since the second main relay S3 and the second slave relay S4 are both closed, and the second end of the second slave relay S4 is grounded, the voltage of the negative DC bus BUS- to the ground is the voltage between the output capacitor C4 and the first inductor L1, and the voltage of the first inductor L1 can be almost ignored, so the voltage of the negative DC bus BUS- to the ground is almost equal to the voltage across the output capacitor C4, that is, the inverter voltage output by the inverter circuit 110.

[0086] As can be seen from the above, after the second main relay S3 and the second slave relay S4 of the neutral line branch 140 / N are closed, the voltage of the negative DC bus BUS- to the ground forms a sine wave voltage with a peak value of zero and a valley value close to the valley value of the inverter voltage, and the change law of the voltage of the negative DC bus BUS- to the ground is close to that of the inverter voltage (such as Fig. 9 Waveform C of time period ②).

[0087] It can be understood that if the control circuit 120 closes the second main relay S3 of the neutral line branch 140 / N and disconnects the second slave relay S4, the inverter circuit 110 is controlled to output an inverter voltage synchronized with the power grid. Since the second main relay S3 is closed, the phase relationship between the voltage of the disconnected second slave relay S4 and the inverter voltage is the same as the phase relationship between the voltage of the disconnected second main relay S3 and the inverter voltage, and the embodiment of the present application will not be further described herein.

[0088] The embodiment of the present application further provides an inverter 100. The inverter 100 includes an inverter circuit 110, a control circuit 120, a live branch 130 / L, a neutral branch 140 / N, two first capacitors C1, and two second capacitors C2.

[0089] The input end of the inverter circuit 110 is used to connect the DC power supply 200, and the output end of the inverter circuit 110 is connected to the power grid 300 through the live branch 130 / L and the neutral branch 140 / N. The live branch 130 / L and the neutral branch 140 / N each include a main relay (S1, S3) and a slave relay (S2, S4) connected in series. The first ends of the two first capacitors C1 are respectively connected to the input positive terminal and the input negative terminal of the inverter circuit 110, and the second ends of the two first capacitors C1 are grounded. The first ends of the two second capacitors C2 are respectively connected between the live branch 130 / L and the neutral branch 140 / N and the output end of the inverter circuit 110, and the second end of the second capacitor C2 is grounded. The control circuit 120 is connected to the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N.

[0090] When one of the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N is closed, the control circuit 120 controls the inverter circuit 110 to output an inverter voltage synchronized with the grid voltage. When the voltage value across the disconnected relay in the neutral branch 140 / N is within the target range, the control circuit 120 controls the second main relay S3 and the second slave relay S4 of the neutral branch 140 / N to be closed.

[0091] The specific circuit structure of the inverter 100 provided in the embodiment of the present application is shown in FIG. Figure 1 And the aforementioned Figure 1 The description is not repeated here.

[0092] It can be understood that the control circuit 120 in the inverter 100 provided in the embodiment of the present application can be used to execute the aforementioned leakage current suppression method, and the beneficial effects that can be achieved by the inverter 100 provided in the embodiment of the present application can refer to the beneficial effects of the corresponding leakage current suppression method provided above, which will not be repeated here.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit them. In the actual application process, the entire content of the technical solutions described in any embodiment of the present application can be implemented, or some content can be added, or some content can be deleted, or some content can be changed / replaced. Although the present application is described in detail with reference to the preferred embodiments, it should be understood by those of ordinary skill in the art that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for suppressing leakage current during the relay self-test process of an inverter, characterized in that: The inverter comprises an inverter circuit, a live branch, a neutral branch, two first capacitors and two second capacitors; the input end of the inverter circuit is used to connect to a DC power supply, and the output end of the inverter circuit is connected to a power grid through the live branch and the neutral branch; the live branch and the neutral branch both comprise a main relay and a slave relay connected in series; the first ends of the two first capacitors are respectively connected to an input positive terminal and an input negative terminal of the inverter circuit, and the second ends of the two first capacitors are grounded; the first ends of the two second capacitors are respectively connected between the live branch and the neutral branch and the output end of the inverter circuit, and the second ends of the second capacitors are grounded; The leakage current suppression method comprises: When one of the main relay and the slave relay of the neutral line branch is closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage; When the voltage value across the disconnected relay in the neutral branch is within a target range, the master relay and the slave relay controlling the neutral branch are both closed; wherein the target range includes a minimum value of the voltage value.

2. The leakage current suppression method according to claim 1, characterized in that: When one of the main relay and the slave relay of the neutral line branch is closed, controlling the inverter circuit to output an inverter voltage synchronized with the grid voltage comprises: When the main relay of the neutral line branch is disconnected and the slave relay is closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage.

3. The leakage current suppression method according to claim 1, characterized in that: When one of the main relay and the slave relay of the neutral line branch is closed, controlling the inverter circuit to output an inverter voltage synchronized with the grid voltage comprises: When the main relay of the neutral line branch is closed and the slave relay is opened, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage.

4. The leakage current suppression method according to claim 1, characterized in that: When the voltage value at both ends of the disconnected relay in the neutral line branch is within the target range, controlling the main relay and the slave relay of the neutral line branch to be closed includes: When the voltage value is within the target range, the main relay and the slave relay of the neutral line branch are controlled to be closed after a preset delay time.

5. The leakage current suppression method according to claim 1, characterized in that: Before the main relay and the slave relay controlling the neutral line branch are both closed, the leakage current suppression method further includes: Acquiring an inverter phase of the inverter voltage; It is determined whether the voltage value is within the target range according to the inverter phase.

6. The leakage current suppression method according to claim 1, characterized in that: When the main relay and one of the slave relays of the neutral branch are closed, one of the main relay and one of the slave relays of the live branch are closed.

7. The leakage current suppression method according to any one of claims 1 to 6, characterized in that: After the main relay and the slave relay controlling the neutral line branch are both closed, the leakage current suppression method further includes: The main relay and the slave relay controlling the live branch are both closed.

8. An inverter, characterized in that: It comprises an inverter circuit, a control circuit, a live branch, a neutral branch, two first capacitors and two second capacitors, wherein the input end of the inverter circuit is used to connect to a DC power supply, and the output end of the inverter circuit is connected to a power grid through the live branch and the neutral branch; the live branch and the neutral branch both comprise a main relay and a slave relay connected in series; the first ends of the two first capacitors are respectively connected to the input positive terminal and the input negative terminal of the inverter circuit, and the second ends of the two first capacitors are grounded; the first ends of the two second capacitors are respectively connected between the live branch and the neutral branch and the output end of the inverter circuit, and the second ends of the second capacitors are grounded; The control circuit is connected to the master relay and the slave relay of the neutral branch; wherein the control circuit is used for: When one of the main relay and the slave relay of the neutral line branch is closed, the inverter circuit is controlled to output an inverter voltage synchronized with the grid voltage; When the voltage value across the disconnected relay in the neutral branch is within a target range, the master relay and the slave relay controlling the neutral branch are both closed; wherein the target range includes a minimum value of the voltage value.

9. The inverter according to claim 8, characterized in that: The live wire branch and the neutral wire branch also include an inductor respectively, the first end of the inductor is connected to the output end of the inverter circuit, the second end of the inductor is correspondingly connected to the first end of the main relay, the second end of the main relay is correspondingly connected to the first end of the slave relay, and the second end of the slave relay is connected to the power grid; the first end of the second capacitor is correspondingly connected to the second end of the inductor.

10. The inverter according to claim 8, characterized in that: It also includes a DC bus and a bus capacitor. The input end of the inverter circuit is connected to the DC power supply through the DC bus, and the bus capacitor is connected to the DC bus.

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