Apparatus and method for commissioning device

Abstract

The invention relates to the technical field of equipment debugging, in particular to a device and method for debugging equipment. The device comprises a controller which is configured to perform signal switching according to a debugging signal switching signal so as to output a debugging signal corresponding to the debugging signal switching signal; and the adapter plate is electrically coupled between the controller and a to-be-debugged terminal, and is configured to send the debugging signal switching signal to the controller according to the configuration of a user, receive the debugging signal from the controller, and send a target interface signal based on the debugging signal to the to-be-debugged terminal. On the premise of not adding an additional signal conversion chip, complete machine debugging without disassembling the machine can be realized; and the cost required for debugging the whole equipment is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of equipment debugging, and in particular to a device and method for debugging equipment. Background Art

[0002] During the debugging of the whole device, it is often necessary to set up an independent debugging interface on the device to receive the corresponding debugging signal through the debugging interface, which will cause the device to occupy a larger space and be difficult to place.

[0003] In order to avoid the above problems, most of the related technologies use other interfaces (e.g., USB interface, SD card interface, etc.) to receive debugging signals. However, when receiving debugging signals through other interfaces, it is often necessary to add a signal conversion chip to convert UART signals or JTAG signals into corresponding interface signals (e.g., USB signals). This will greatly increase the cost of device debugging. Summary of the invention

[0004] The present application provides an apparatus and method for debugging a device, which can achieve debugging of the entire device without disassembling the device without adding an additional signal conversion chip, thereby reducing the cost required for debugging the entire device.

[0005] In a first aspect, an embodiment of the present invention provides an apparatus for debugging a device. The apparatus includes: a controller configured to perform signal switching according to a debug signal switching signal to output a debug signal corresponding to the debug signal switching signal; and a switching board electrically coupled between the controller and a terminal to be debugged, and configured to send the debug signal switching signal to the controller according to a user's configuration, receive the debug signal from the controller, and send a target interface signal based on the debug signal to the terminal to be debugged.

[0006] In some embodiments, the controller includes a first signal interface, and the controller is configured to receive the debug signal switching signal via the first signal interface and output the debug signal via the first signal interface.

[0007] In some embodiments, the adapter board includes a multiplexer, a microcontroller unit, a second signal interface and a third signal interface; the second signal interface is configured to electrically couple the adapter board to the controller, and the third signal interface is configured to electrically couple the adapter board to the terminal to be debugged; the microcontroller unit is configured to enable the multiplexer according to the user's configuration, and send the debug signal switching signal to the controller after enabling, and control the multiplexer to switch to be electrically coupled with the third signal interface after the debug signal switching signal is sent.

[0008] In some embodiments, the third signal interface includes a USB interface, and the adapter board also includes a signal conversion chip; the signal conversion chip is electrically coupled to the multiplexer and the third signal interface, respectively, and the signal conversion chip is configured to convert the debug signal to convert the debug signal into a USB signal, and output the USB signal to the third signal interface.

[0009] In some embodiments, the controller includes a signal monitoring module, and the signal monitoring module is configured to monitor the signal input via the first signal interface to determine whether the signal input via the first signal interface includes a debugging signal switching signal.

[0010] In some embodiments, the controller further includes a debugging signal output port and a signal switching circuit, and the first signal interface is electrically coupled to the debugging signal output port and the signal monitoring module respectively through the signal switching circuit.

[0011] In some embodiments, the debug signal output port includes a UART debug signal output port and a JTAG debug signal output port.

[0012] In a second aspect, an embodiment of the present invention proposes a method for debugging a device. The method includes: a controller acquires a signal sent from an adapter board; the controller determines whether the signal from the adapter board contains a debug signal switching signal; if the signal from the adapter board contains a debug signal switching signal, the controller switches the signal according to the debug signal switching signal to output a debug signal corresponding to the debug signal switching signal; and the adapter board sends a target interface signal based on the debug signal to a terminal to be debugged.

[0013] In some embodiments, the signal sent from the adapter board is a USB signal, wherein the controller determines whether the signal from the adapter board contains a debug signal switching signal, including: monitoring the SE1 / SE0 cycle signal packet in the USB signal to determine which debug signal switching signal is contained in the SE1 / SE0 cycle signal packet.

[0014] In some embodiments, determining which debug signal switching signal is included in the SE1 / SE0 periodic signal packet includes: counting SE1 signals based on the SE1 / SE0 periodic signal packet; determining whether the number of SE1 signals reaches a first count threshold and the termination signal packet is the first signal packet, wherein the DP signal of the first signal packet is at a low level and the DM signal of the first signal packet is at a high level; and if so, determining that the SE1 / SE0 periodic signal packet includes a UART debug signal switching signal.

[0015] In some embodiments, outputting a debug signal corresponding to the debug signal switching signal includes: outputting a UART debug signal, and sending a target interface signal based on the debug signal to the terminal to be debugged by the adapter board includes: sending a USB signal based on the UART debug signal to the terminal to be debugged.

[0016] In some embodiments, determining which debug signal switching signal is included in the SE1 / SE0 cycle signal packet includes: counting SE1 signals based on the SE1 / SE0 cycle signal packet; determining whether the number of SE1 signals reaches a second count threshold and the termination signal packet is a second signal packet, wherein the DP signal of the second signal packet is high and the DM signal of the second signal packet is low; and if so, determining that the SE1 / SE0 cycle signal packet includes a JTAG debug signal switching signal.

[0017] In some embodiments, outputting a debug signal corresponding to the debug signal switching signal includes: outputting a JTAG debug signal, and sending a target interface signal based on the debug signal to the terminal to be debugged by the adapter board includes: sending a USB signal based on the JTAG debug signal to the terminal to be debugged.

[0018] According to an embodiment of the present disclosure, first, the adapter board is electrically coupled between the controller and the terminal to be debugged, and is configured to send a debug signal switching signal to the controller according to the user's configuration, receive a debug signal from the controller, and send a target interface signal based on the debug signal to the terminal to be debugged; it can be understood that the adapter board is only used for signal switching and sending of debug signal switching signals, and does not perform signal format conversion, then, the controller is configured to switch the signal according to the debug signal switching signal to output a debug signal corresponding to the debug signal switching signal; in this way, only simple circuit changes are needed to complete the debugging of the entire machine without disassembling the machine; at the same time, the cost of the adapter board is greatly reduced compared to the signal conversion chip; that is to say, the cost and modification difficulty of the entire machine debugging process are reduced.

[0019] The above-mentioned records related to the invention content are only an overview of the technical solution of the present application. In order to enable ordinary technicians in the field to more clearly understand the technical solution of the present application, and then implement it according to the text of the specification and the contents recorded in the drawings, and to make the above-mentioned purpose and other purposes, features and advantages of the present application easier to understand, the following is an explanation in combination with the specific implementation mode and drawings of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings are only used to illustrate the principles, implementation methods, applications, characteristics and effects of the specific embodiments of the present application and other related contents, and shall not be considered as limitations of the present application.

[0021] Figure 1 A block diagram of an apparatus for debugging a device according to an embodiment of the present invention;

[0022] Figure 2 A block diagram of an apparatus for debugging a device according to an embodiment of the present invention;

[0023] Figure 3 is a schematic diagram of the structure of a switching circuit inside a controller according to an embodiment of the present invention;

[0024] Figure 4 Schematic diagram of a SE1 / SE0 periodic signal packet according to an embodiment of the present invention;

[0025] Figure 5 is a schematic diagram of the structure of an adapter plate according to an embodiment of the present invention;

[0026] Figure 6 The figure is a flow chart of a method for debugging a device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to explain in detail the possible application scenarios, technical principles, specific schemes that can be implemented, and the purposes and effects that can be achieved, the following is a detailed description of the specific embodiments listed in conjunction with the accompanying drawings. The embodiments described herein are only used to more clearly illustrate the technical solutions of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0028] Reference to "embodiment" herein means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present application. The term "embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment, nor does it particularly limit its independence or association with other embodiments. In principle, in the present application, as long as there is no technical contradiction or conflict, the various technical features mentioned in the embodiments can be combined in any way to form a corresponding implementable technical solution.

[0029] Unless otherwise defined, the technical terms used in this document have the same meanings as those generally understood by those skilled in the art to which this application belongs; the use of relevant terms in this document is only for describing specific embodiments and is not intended to limit this application.

[0030] In the description of this application, the term "and / or" is an expression used to describe the logical relationship between objects, indicating that three relationships may exist, for example, A and / or B, which means: A exists, B exists, and A and B exist at the same time. In addition, the character " / " in this article generally indicates that the objects before and after are in an "or" logical relationship.

[0031] In the present application, terms such as “first” and “second” are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship of quantity, priority or sequence between these entities or operations.

[0032] Without further limitations, in this application, the words "include", "comprises", "has" or other similar expressions used in the sentences are intended to cover non-exclusive inclusion. These expressions do not exclude the presence of additional elements in the process, method or product including the elements, so that the process, method or product including a series of elements may include not only those limited elements, but also other elements not explicitly listed, or also include elements inherent to such process, method or product.

[0033] In this application, expressions such as "greater than", "less than", "exceed" and the like are understood to exclude the number itself; expressions such as "above", "below", "within" and the like are understood to include the number itself. In addition, in the description of the embodiments of this application, "multiple" means more than two (including two), and similar expressions related to "multiple" are also understood in this way, such as "multiple groups", "multiple times", etc., unless otherwise clearly and specifically limited.

[0034] As mentioned in the background technology, the whole machine debugging method needs to add a signal conversion chip to convert the UART signal or JTAG signal into the corresponding interface signal, which will greatly increase the cost of equipment debugging.

[0035] According to the apparatus for debugging equipment disclosed in the present application; first, the adapter board is configured to send a debug signal switching signal to the controller according to the user's configuration. It can be understood that the adapter board is only used for signal switching and sending of debug signal switching signals, and does not perform signal format conversion; then, the controller is configured to switch the signal according to the debug signal switching signal to output the debug signal through the first signal interface; in this way, only simple circuit changes are needed to complete the debugging of the entire machine without disassembling the machine; at the same time, the cost of the adapter board is greatly reduced compared to the signal conversion chip; that is to say, the cost and modification difficulty of the entire machine debugging process are reduced.

[0036] See also Figure 1 , Figure 1 FIG. 1 is a block diagram of an apparatus for debugging a device according to an embodiment of the present invention. Figure 1 As shown, the device for debugging equipment includes: a controller 10 and an adapter board 20.

[0037] The controller 10 is configured to perform signal switching according to the debug signal switching signal to output a debug signal corresponding to the debug signal switching signal.

[0038] The adapter board 20 is electrically coupled between the controller 10 and the terminal to be debugged. The adapter board 20 is configured to send a debug signal switching signal to the controller 10 according to the user's configuration, receive a debug signal from the controller 10, and send a target interface signal based on the debug signal to the terminal to be debugged.

[0039] Figure 2 Schematic diagram of a block diagram of an apparatus for debugging a device according to an embodiment of the present invention. Figure 2 As shown, the controller 10 includes a first signal interface 11 , and the controller 10 is configured to receive a debugging signal switching signal via the first signal interface 11 , and output a debugging signal via the first signal interface 11 .

[0040] In some embodiments, Figure 2 As shown, the adapter board 20 includes a multiplexer 21, a micro control unit 22, a second signal interface 23 and a third signal interface 24. The second signal interface 23 is configured to electrically couple the adapter board 20 to the controller 10. The third signal interface 24 is configured to electrically couple the adapter board 20 to the terminal to be debugged. The micro control unit 22 is configured to select the multiplexer 21 according to the user's configuration, and send a debug signal switching signal to the controller 10 after selecting, and control the multiplexer 21 to switch to be electrically coupled with the third signal interface 24 after the debug signal switching signal is sent.

[0041] In some embodiments, the third signal interface 24 includes a USB interface, and the adapter board 20 further includes a signal conversion chip 25. The signal conversion chip 25 is electrically coupled to the multiplexer 21 and the third signal interface 24, respectively, and the signal conversion chip 25 is configured to convert the debug signal to convert the debug signal into a USB signal, and output the USB signal to the third signal interface 24.

[0042] As an example, when the debugging signal is a UART signal, the corresponding UART interface may not be configured on the external test terminal. In this case, the UART debugging signal is converted into a USB signal through the signal conversion chip, and the external test terminal can receive the debugging signal through its own USB interface, further improving the convenience of the whole machine test.

[0043] In some embodiments, the controller 10 includes a signal monitoring module 12. The signal monitoring module 12 is configured to monitor the signal input via the first signal interface 11 to determine whether the signal input via the first signal interface 11 includes a debugging signal switching signal.

[0044] In some embodiments, the controller 10 further includes a debugging signal output port 13 and a signal switching circuit 14. The first signal interface 11 is electrically coupled to the debugging signal output port and the signal monitoring module 12 through the signal switching circuit 14, respectively.

[0045] In some embodiments, the debug signal output port includes a UART debug signal output port and a JTAG debug signal output port.

[0046] Figure 3 FIG. 1 is a schematic diagram of a switching circuit structure inside a controller according to an embodiment of the present invention. As an example, Figure 3 As shown, USB_DPPIN and USB_DMPIN are two pins of the first signal interface. As shown in the figure, the first signal interface is connected to the debug interface (UART interface and JTAG interface) and USB (USB controller, a signal monitoring module is provided on the controller) through multiple MUXs (multiplexers). In this way, by monitoring the signals of USB_DPPIN and USB_DMPIN, the interface determines whether signal switching is currently required according to the monitoring structure. If so, the corresponding debug signal is output through the first signal interface through the above-mentioned switching circuit. Specifically, it can be determined whether signal switching is currently required through the SE1 / SE0 cycle signal in the USB signal.

[0047] Figure 4 This is a schematic diagram of the SE1 / SE0 periodic signal. Figure 4 As shown, preferably, the hardware continuously samples the DP / DM signal within a certain period of time and samples N SE1 / SE0 periodic signal packets. If the sequence encoding of the SE1 / SE0 periodic signal packet satisfies the predetermined sequence for switching to UART (it can be understood that the sequence is the number of SE1 counted by the USB controller, which represents the number of SE0 flips between SE1, and is also the number of DP / DM flips) and the last is the J signal packet, it means that the current signal contains a debug signal switching signal, and the debug signal switching signal is to switch to the UART debug signal, wherein the DP in the J signal packet is low level and the DM is high level. If the sequence encoding of the SE1 / SE0 periodic signal packet satisfies the predetermined sequence for switching to JTAG and the last is the K signal packet, it means that the current signal contains a debug signal switching signal, and the debug signal switching signal is to switch to the JTAG debug signal, wherein the DP in the K signal packet is high level and the DM is low level.

[0048] In addition, it should be noted that Figure 3A second first signal interface (i.e., GPIO interface) is also added in the upper right corner. It can be understood that in some scenarios, the debugging process may need to use the normal functions of the USB interface at the same time. At this time, if the USB interface is occupied, debugging will not be possible. In this case, the GPIO interface can be used to output the debugging signal while keeping the USB interface in normal use. In this way, it can be avoided that debugging cannot be performed due to the USB interface being occupied.

[0049] Figure 5 Schematic diagram of an adapter plate according to an embodiment of the present invention. As a specific embodiment of the present invention, Figure 5 As shown, the adapter board includes a multiplexer (for example: FSUSB744:1MUX), which is respectively connected to the second signal interface (the USB interface on the left, used to connect to the controller, such as the SOC chip), the JTAG interface, the signal conversion chip (the signal conversion chip is optional, and is used to convert the UART debugging signal sent by the SOC chip into a USB signal; if the external test terminal has a UART interface, the chip is not required) and the micro control unit (for example, an MCU chip).

[0050] During use, first, the microcontroller unit selects the FSUSB signal switching circuit through the SEL signal, so that the DP / DM of the microcontroller unit can be directly connected to the SOC (that is, after the signal is selected, the microcontroller unit does not directly send a signal to the SOC via the FSUSB, but only allows the FSUSB to connect the USB signal of the microcontroller unit with the USB signal of the SOC, and the signal itself is not processed by the FSUSB). In addition, a debug signal switching signal is sent to the SOC through the connection, so that the SOC switches the signal according to the debug signal switching signal after receiving the debug signal switching signal. Next, assuming that the debug signal switching signal is a UART debug signal switching signal, the microcontroller unit controls the SEL signal to make the FSUSB switching circuit export the UART debug signal output by the SOC to TX / TR through the FSUSB to achieve UART debugging. If the debug signal switching signal is a JTAG debug signal switching signal, the microcontroller unit controls the SEL signal to make the FSUSB switching circuit export the JTAG debug signal output by the SOC to the JTAG interface through the FSUSB to achieve JTAG debugging.

[0051] It should be noted that if the USB interface is switched to UART, if the adapter board is removed, the SOC needs to restore all the MUX in its own switching circuit to USB signal output. The detection mechanism uses the UART RX signal. Because the Tx / Rx of the UART signal output from the chip is high in the IDLE state, and Rx is pulled up by the pull-up resistor of the adapter board. If the adapter board is disconnected, the pull-up resistor disappears, and from the SOC perspective, the Rx signal will become low. At this time, the UART controller of the chip believes that the USB to UART function has been removed (this is determined by another UART controller besides the USB controller. After the UART controller inside the SOC determines that the adapter board has been removed, it generates a hardware signal to the SOC, which will Figure 2 All the MUXs are reset, so that the USB port outputs the default USB function signal. ), notify the SOC to complete the recovery and output of the USB signal. If the USB interface is switched to JTAG, it is necessary to remove JTAG to restore the USB port function. The recovery mechanism is to configure the SOC internal registers when connecting with JTAG, restore the SOC's own MUX signal selection to the USB function, and then remove the adapter board. After the adapter board is removed, the SOC's USB port outputs a normal USB signal, which does not include debugging functions, such as a USB flash drive.

[0052] In addition, due to the low power consumption requirement of the SOC chip, by default, when no USB device is connected, the USB controller turns off the system clock, so that the DP / DM signal is not detected. At this time, the SE1 / SE0 sequence cannot be sampled. In the SOC design, when the USB controller is not connected to a device and the system clock is turned off, a very low-frequency clock is provided to the DP / DM detection module of the USB controller to meet the detection requirements without introducing excessive power consumption. Figure 3 The pull-up and pull-down drive resistances of the DP / DM of the microcontroller chip on the adapter board embodiment need to be adjustable to meet the impedance matching of the DP / DM of the USB signals inside different SOC chips, ensure that the emitted SE1 / SE0 can be correctly sampled, and improve the compatibility of the adapter board and SOC. As a flexibility for functional expansion, all the aforementioned SE1 / SE0 sequences can be reserved in register groups inside the SOC in addition to the predefined chip design, and different sequences can be fully specified by software for different switching models. The hardware unit is responsible for reading the software settings from the registers and executing them with reference.

[0053] To summarize, according to the embodiments of the present disclosure, first, the adapter board is electrically coupled between the controller and the terminal to be debugged, and is configured to send a debug signal switching signal to the controller according to the user's configuration, receive a debug signal from the controller, and send a target interface signal based on the debug signal to the terminal to be debugged; it can be understood that the adapter board is only used for signal switching and sending of debug signal switching signals, and does not perform signal format conversion, then, the controller is configured to switch the signal according to the debug signal switching signal to output a debug signal corresponding to the debug signal switching signal; in this way, only simple circuit changes are needed to complete the debugging of the entire machine without disassembling the machine; at the same time, the cost of the adapter board is greatly reduced compared to the signal conversion chip; that is to say, the cost and modification difficulty of the entire machine debugging process are reduced.

[0054] In order to implement the above embodiment, the second aspect of the present invention provides a method for debugging a device, such as Figure 6 As shown, the method for debugging a device includes the following steps S601 to S604.

[0055] Step S601: The controller obtains a signal sent from the adapter board.

[0056] Step S602: The controller determines whether the signal from the adapter board includes a debugging signal switching signal.

[0057] Step S603: If the signal from the adapter board includes a debugging signal switching signal, the controller performs signal switching according to the debugging signal switching signal to output a debugging signal corresponding to the debugging signal switching signal.

[0058] Step S604: the adapter board sends a target interface signal based on the debugging signal to the terminal to be debugged.

[0059] In some embodiments, the signal sent from the adapter board is a USB signal, wherein the controller determines whether the signal from the adapter board contains a debug signal switching signal, including: monitoring the SE1 / SE0 cycle signal packet in the USB signal to determine which debug signal switching signal is contained in the SE1 / SE0 cycle signal packet.

[0060] In some embodiments, determining which debug signal switching signal is included in the SE1 / SE0 periodic signal packet includes: counting the SE1 signal based on the SE1 / SE0 periodic signal packet; determining whether the number of SE1 signals reaches a first count threshold and the termination signal packet is the first signal packet, wherein the DP signal of the first signal packet is at a low level and the DM signal of the first signal packet is at a high level; and if so, determining that the SE1 / SE0 periodic signal packet includes the UART debug signal switching signal.

[0061] In some embodiments, outputting a debugging signal corresponding to the debugging signal switching signal includes: outputting a UART debugging signal, and sending a target interface signal based on the debugging signal to the terminal to be debugged by the adapter board includes: sending a USB signal based on the UART debugging signal to the terminal to be debugged.

[0062] In some embodiments, determining which debug signal switching signal is included in the SE1 / SE0 cycle signal packet includes: counting the SE1 signal based on the SE1 / SE0 cycle signal packet; determining whether the number of SE1 signals reaches a second count threshold and the termination signal packet is the second signal packet, wherein the DP signal of the second signal packet is high and the DM signal of the second signal packet is low; and if so, determining that the SE1 / SE0 cycle signal packet includes the JTAG debug signal switching signal.

[0063] In some embodiments, outputting a debug signal corresponding to a debug signal switching signal includes: outputting a JTAG debug signal, and sending a target interface signal based on the debug signal to the terminal to be debugged by the adapter board includes: sending a USB signal based on the JTAG debug signal to the terminal to be debugged.

[0064] In addition, it should be noted that the above description on the apparatus for debugging a device is also applicable to the method for debugging a device, and will not be described in detail here.

[0065] It should be noted that although the above embodiments have been described in the specification and drawings of this application, this does not limit the scope of patent protection of this application. All technical solutions generated by replacing or modifying equivalent structures or equivalent processes based on the essential concept of this application using the contents recorded in the specification and drawings of this application, as well as directly or indirectly implementing the technical solutions of the above embodiments in other related technical fields, are included in the scope of patent protection of this application.

Claims

1. A device for debugging a device, characterized in that: include: a controller configured to perform signal switching according to a debug signal switching signal to output a debug signal corresponding to the debug signal switching signal; as well as The adapter board is electrically coupled between the controller and the terminal to be debugged, and is configured to send the debug signal switching signal to the controller according to the user's configuration, receive the debug signal from the controller, and send a target interface signal based on the debug signal to the terminal to be debugged.

2. The device according to claim 1, characterized in that The controller includes a first signal interface, and the controller is configured to receive the debug signal switching signal via the first signal interface and output the debug signal via the first signal interface.

3. The device according to claim 1, characterized in that The adapter board includes a multiplexer, a micro control unit, a second signal interface and a third signal interface; The second signal interface is configured to electrically couple the adapter board to the controller, and the third signal interface is configured to electrically couple the adapter board to the terminal to be debugged; The micro control unit is configured to enable the multiplexer according to the user's configuration, and send the debug signal switching signal to the controller after enabling, and control the multiplexer to switch to be electrically coupled with the third signal interface after the debug signal switching signal is sent.

4. The device according to claim 3, characterized in that The third signal interface includes a USB interface, and the adapter board also includes a signal conversion chip; The signal conversion chip is electrically coupled to the multiplexer and the third signal interface respectively, and is configured to convert the debug signal to convert the debug signal into a USB signal, and output the USB signal to the third signal interface.

5. The device according to claim 1, characterized in that The controller includes a signal monitoring module, and the signal monitoring module is configured to monitor the signal input through the first signal interface to determine whether the signal input through the first signal interface includes a debugging signal switching signal.

6. The device according to claim 5, characterized in that The controller further comprises a debugging signal output port and a signal switching circuit, and the first signal interface is electrically coupled to the debugging signal output port and the signal monitoring module respectively through the signal switching circuit.

7. The device according to claim 6, characterized in that The debugging signal output port includes a UART debugging signal output port and a JTAG debugging signal output port.

8. A method for debugging a device, characterized in that: include: The controller obtains the signal sent from the adapter board; The controller determines whether the signal from the adapter board includes a debugging signal switching signal; If the signal from the adapter board includes a debugging signal switching signal, the controller performs signal switching according to the debugging signal switching signal to output a debugging signal corresponding to the debugging signal switching signal; as well as The adapter board sends a target interface signal based on the debugging signal to the terminal to be debugged.

9. The method according to claim 8, characterized in that The signal sent from the adapter board is a USB signal, wherein the controller determines whether the signal from the adapter board includes a debugging signal switching signal, including: The SE1 / SE0 periodic signal packet in the USB signal is monitored to determine which debug signal switching signal is included in the SE1 / SE0 periodic signal packet.

10. The method according to claim 9, characterized in that Determining which debug signal switching signal is included in the SE1 / SE0 periodic signal packet includes: Counting the SE1 signal based on the SE1 / SE0 periodic signal packet; Determine whether the number of SE1 signals reaches a first number threshold and the termination signal packet is a first signal packet, wherein the DP signal of the first signal packet is at a low level and the DM signal of the first signal packet is at a high level; and If yes, it is determined that the SE1 / SE0 periodic signal packet contains a UART debug signal switching signal.

11. The method according to claim 10, characterized in that Outputting a debugging signal corresponding to the debugging signal switching signal includes: outputting a UART debugging signal, The target interface signal based on the debugging signal is sent by the adapter board to the terminal to be debugged, including: sending a USB signal based on the UART debugging signal to the terminal to be debugged.

12. The method according to claim 9, characterized in that Determining which debug signal switching signal is included in the SE1 / SE0 periodic signal packet includes: Counting the SE1 signal based on the SE1 / SE0 periodic signal packet; Determine whether the number of SE1 signals reaches a second number threshold and the termination signal packet is a second signal packet, wherein the DP signal of the second signal packet is at a high level and the DM signal of the second signal packet is at a low level; and If yes, it is determined that the SE1 / SE0 cycle signal packet contains a JTAG debug signal switching signal.

13. The method according to claim 12, characterized in that Outputting a debugging signal corresponding to the debugging signal switching signal includes: outputting a JTAG debugging signal, The target interface signal based on the debugging signal is sent by the adapter board to the terminal to be debugged, including: sending a USB signal based on the JTAG debugging signal to the terminal to be debugged.

Images