Manufacturing method of solar cell and solar cell
By dividing areas on the back of the solar cell and forming a tunneled dielectric layer and a doped conductive layer by laser etching, the problem of large contact resistance between the electrode and the battery body is solved, and the photoelectric conversion efficiency and internal reflection effect of the solar cell are improved.
Patent Information
- Application Number
- CN202411389885.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2044-09-30
AI Technical Summary
The battery back electrode of existing solar cells has a large contact resistance between the battery body and the battery body, which affects the photoelectric conversion efficiency.
By dividing the first region and the second region on the back of the solar cell, the borosilicate glass layer of the first region is removed by laser etching, and the borosilicate glass layer of the second region is retained, forming a tunnel dielectric layer and a doped conductive layer. A suede structure is formed in the second region to increase the electrode contact area and reduce the resistance.
It improves the photoelectric conversion efficiency of solar cells, enhances the passivation effect and internal reflection effect on the back, and improves the utilization rate of sunlight.
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Figure CN119300521A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a method for manufacturing a solar cell and a solar cell. Background Art
[0002] Solar cells can directly convert solar radiation energy into electrical energy, mainly based on the photovoltaic effect of crystalline silicon, that is, when the photons of sunlight are absorbed by semiconductor crystalline silicon, electron-hole pairs are generated. When these electron-hole pairs reach the pn junction composed of p-type crystalline silicon and n-type crystalline silicon, they are separated to both sides of the pn junction by the junction electric field. When an external load is connected, photocurrent is formed and electrical energy is output.
[0003] In order to improve the passivation effect and internal reflection effect on the back of the existing solar cell, the suede structure on the back of the cell is removed, resulting in a large contact resistance between the electrode on the back of the cell and the cell body, which affects the photoelectric conversion efficiency of the solar cell. Summary of the invention
[0004] The present application provides a method for manufacturing a solar cell and a solar cell, which are used to solve the technical problem that the contact resistance between the electrode on the back of the cell and the cell body is large, which affects the photoelectric conversion efficiency of the solar cell.
[0005] An embodiment of the present application provides a method for manufacturing a solar cell, wherein the back side of the solar cell has a first area and a second area, and an electrode of the solar cell is disposed in the second area;
[0006] The method for manufacturing the solar cell comprises:
[0007] Texturing the battery cells;
[0008] Boron diffusion is performed on the battery cell;
[0009] Laser etching the first region;
[0010] performing tank cleaning on the first area;
[0011] The second zone is chain cleaned.
[0012] In a possible design, in the step of laser etching the first region, the power of the laser etching is 40W to 60W.
[0013] In a possible design, in the step of laser etching the first region, the speed of the laser etching is 40 m / s to 70 m / s.
[0014] In a possible design, after the step of chain etching the second region, the method for manufacturing a solar cell further includes:
[0015] A tunnel dielectric layer and a doped conductive layer are formed on the back side of the cell.
[0016] In a possible design, in the step of forming a tunnel dielectric layer and a doped conductive layer on the back side of the cell, a deposition time t for depositing the doped conductive layer satisfies: 1500s≤t≤1800s.
[0017] A solar cell provided in an embodiment of the present application is prepared by the above-mentioned method for manufacturing a solar cell; the back side of the solar cell has a first area and a second area, and the second area is provided with an electrode;
[0018] The solar cell comprises: a substrate, an emitter, a tunneling dielectric layer and a doped conductive layer. The emitter is arranged on the front side of the substrate, and the tunneling dielectric layer and the doped conductive layer are arranged on the back side of the substrate in sequence.
[0019] In a possible design, the flatness of the doped conductive layer in the second region is smaller than that in the first region.
[0020] In a possible design, the flatness of the tunnel dielectric layer in the second region is smaller than that in the first region.
[0021] In a possible design, the flatness of the back surface of the substrate in the second region is less than that in the first region.
[0022] In a possible design, the thickness d of the doped conductive layer satisfies: 110 nm≤d≤130 nm.
[0023] In the present application, the back side of the cell is selectively etched by laser to remove the borosilicate glass layer in the first area and retain the borosilicate glass layer in the second area, so that the first area of the cell is cleaned and polished in the subsequent preparation steps, thereby achieving better passivation effect on the back side of the cell, less recombination generated on the back side of the cell, and enhanced internal reflection on the back side of the cell, thereby increasing the utilization rate of sunlight. At the same time, the borosilicate glass layer in the second area of the cell can protect the velvet structure of the second area in the subsequent preparation steps, so that the tunneling dielectric layer and the doped conductive layer in the second area also have a velvet structure, thereby increasing the contact area between the second electrode and the doped conductive layer, reducing the resistance at the contact between the second electrode and the doped conductive layer, and thereby improving the photoelectric conversion efficiency of the solar cell.
[0024] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 A flow chart of a method for manufacturing a solar cell provided in the present application;
[0026] Figure 2 A schematic diagram of the structure of a solar cell provided in this application in a specific embodiment;
[0027] Figure 3 for Figure 1 A schematic diagram of the structure of a battery cell that has not been processed in the flowchart;
[0028] Figure 4 For Figure 3 Schematic diagram of the structure of the battery cell after texturing;
[0029] Figure 5 For Figure 4 Schematic diagram of the structure of the battery cell after boron diffusion;
[0030] Figure 6 For Figure 5 Schematic diagram of the structure of the battery cell after laser etching;
[0031] Figure 7 For Figure 6 Schematic diagram of the structure of the battery cell after chain cleaning;
[0032] Figure 8 For Figure 7 A schematic diagram of the structure after a tunnel dielectric layer and a doped conductive layer are formed on the back of the cell;
[0033] Fig. 9 For Figure 8 Schematic diagram of the structure after etching the glass produced on the front side of the battery cell;
[0034] Fig.10 For Fig. 9 Schematic diagram of the structure after the passivation layer is formed on the front and back sides of the battery cell.
[0035] Reference numerals:
[0036] 1- Solar cell;
[0037] 1a-Second area;
[0038] 11 - base;
[0039] 12-emitter;
[0040] 13- tunnel dielectric layer;
[0041] 14- doped conductive layer;
[0042] 15- first passivation layer;
[0043] 16 - Second passivation layer.
[0044] 17- a first electrode;
[0045] 18- Second electrode.
[0046] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application. DETAILED DESCRIPTION
[0047] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0048] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0049] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.
[0050] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0051] It should be noted that the directional words such as "upper", "lower", "left", and "right" described in the embodiments of the present application are described at the angles shown in the accompanying drawings and should not be understood as limiting the embodiments of the present application. In addition, in the context, it is also necessary to understand that when it is mentioned that an element is connected to another element "upper" or "lower", it can not only be directly connected to another element "upper" or "lower", but also indirectly connected to another element "upper" or "lower" through an intermediate element.
[0052] The present application embodiment provides a solar cell, such as Figure 1As shown, the solar cell 1 includes: a substrate 11, an emitter 12, a tunneling dielectric layer 13 and a doped conductive layer 14, wherein the emitter 12 is arranged on the front side of the substrate 11, and the tunneling dielectric layer 13 and the doped conductive layer 14 are arranged on the back side of the substrate 11 in sequence. The front side of the substrate 11 refers to the surface of the substrate 11 facing the light-receiving side of the solar cell 1, and the back side of the substrate 11 refers to the surface of the substrate 11 facing the backlight side of the solar cell 1.
[0053] The substrate 11 and the emitter 12 can form a PN junction structure together. The tunneling dielectric layer 13 can serve as a tunneling layer for the majority carriers and chemically passivate the substrate 11 to reduce interface states. The doped conductive layer 14 can form energy band bending, achieve selective transmission of carriers, and reduce carrier recombination losses.
[0054] A first passivation layer 15 is disposed on the side of the emitter 12 away from the substrate 11, and the first passivation layer 15 passivates the surface of the emitter 12 away from the substrate 11. A second passivation layer 16 is disposed on the side of the doped conductive layer 14 away from the substrate 11, and the second passivation layer 16 passivates the surface of the doped conductive layer 14 away from the substrate 11, thereby reducing the recombination speed of the carriers of the emitter 12 and the doped conductive layer 14, and improving the photoelectric conversion efficiency of the solar cell 1. In addition, the solar cell 1 also includes: a first electrode 17 connected to the emitter 12 and a second electrode 18 connected to the doped conductive layer 14.
[0055] like Figure 1 As shown, the back side of the solar cell 1 has a first area and a second area 1a, the second area 1a is provided with a second electrode 18, the width of the second area 1a is greater than the width of the second electrode 18, so that the second electrode 18 can be located in the second area 1a, and the first area is the area on the back side of the solar cell 1 except the second area 1a.
[0056] Furthermore, the flatness of the doped conductive layer 14 in the second region 1a is less than that in the first region, that is, the doped conductive layer 14 is relatively uneven in the second region 1a, and relatively flat in the first region. The doped conductive layer 14 is relatively uneven in the second region 1a, which can increase the contact area between the second electrode 18 and the doped conductive layer 14, and reduce the resistance at the contact point between the second electrode 18 and the doped conductive layer 14. The doped conductive layer 14 is relatively flat in the first region, which can increase its internal reflection of sunlight, increase the utilization rate of solar energy to sunlight, and thus improve the photoelectric conversion efficiency of the solar cell 1.
[0057] The flatness of the tunnel dielectric layer 13 in the second region 1a is less than that in the first region, that is, the tunnel dielectric layer 13 is relatively uneven in the second region 1a, and relatively flat in the first region. The unevenness of the tunnel dielectric layer 13 in the second region 1a is close to the unevenness of the doped conductive layer 14 in the second region 1a, so that the thickness of the tunnel dielectric layer 13 and the doped conductive layer 14 in the second region 1a are relatively uniform. The tunnel dielectric layer 13 is relatively flat in the first region, so that the tunnel dielectric layer 13 has a better passivation effect on the substrate 11, and at the same time, the internal reflection of the tunnel dielectric layer 13 to sunlight is increased, which is beneficial to improve the photoelectric conversion efficiency of the solar cell 1.
[0058] The flatness of the second passivation layer 16 in the second region 1a is less than that in the first region, that is, the second passivation layer 16 is relatively uneven in the second region 1a and relatively flat in the first region, so that the overall thickness of the second passivation layer 16 is relatively uniform, and the passivation effect on the doped conductive layer 14 is better.
[0059] Furthermore, the flatness of the substrate 11 in the second region 1a is less than that in the first region, that is, the substrate 11 is relatively uneven in the second region 1a, and relatively flat in the first region. The substrate 11 is relatively uneven in the second region 1a, which can facilitate the deposition of the relatively uneven tunnel dielectric layer 13, the doped conductive layer 14, and the second passivation layer 16 in the second region 1a; the substrate 11 is relatively flat in the first region, which can facilitate the deposition of the relatively flat tunnel dielectric layer 13, the doped conductive layer 14, and the second passivation layer 16 in the first region.
[0060] Specifically, the substrate 11 may be an N-type substrate or a P-type substrate. The N-type substrate mainly includes a silicon substrate, and the N-type substrate is further doped with an N-type element, and the N-type element may specifically be a pentavalent element such as phosphorus, arsenic or antimony. The P-type substrate mainly includes a silicon substrate, and the P-type substrate is further doped with a P-type element, and the P-type element may specifically be a trivalent element such as boron, indium or gallium.
[0061] The present application also provides a method for manufacturing a solar cell. Figure 2 As shown, taking the preparation of a TopCon cell with an N-type substrate as an example, the manufacturing method of the solar cell 1 includes:
[0062] S1: Texturing the battery cell.
[0063] In this step, if Figure 3 and Figure 4As shown, texturing is to form an undulating, uneven velvet structure on the light-receiving surface and the backlight surface of the cell to reduce the reflection of sunlight by the manufactured solar cell 1, increase the absorption rate of sunlight by the manufactured solar cell 1, and further improve the photoelectric conversion efficiency of the solar cell 1.
[0064] S2: Diffusion of boron into the cell.
[0065] In this step, if Figure 5 As shown, the cell is placed in a diffusion furnace so that boron atoms enter the cell, a PN junction structure is formed on the cell, and a borosilicate glass layer is formed on the surface of the cell.
[0066] S3: Laser etching the first area.
[0067] In this step, if Figure 6 As shown, a high-power laser can be used to etch and remove the borosilicate glass layer in the first region, and selectively retain the borosilicate glass layer in the second region 1a. Laser etching has the advantages of high precision, good etching uniformity, and high surface flatness after etching.
[0068] S4: performing tank cleaning on the first area.
[0069] In this step, the tank cleaning can remove dirt such as the surface oxide layer of the cell in the first area, remove the damage caused by laser etching to the first area, and polish the cell in the first area. The borosilicate glass layer in the second area 1a can protect the velvet structure of the second area 1a from being damaged during the tank cleaning.
[0070] S5: Chain cleaning is performed on the second area 1a.
[0071] In this step, if Figure 7 As shown, the chain cleaning can remove the borosilicate glass layer of the second region 1 a .
[0072] S6: forming a tunnel dielectric layer 13 and a doped conductive layer 14 on the back side of the cell.
[0073] In this step, if Figure 8As shown, the tunnel dielectric layer 13 and the doped conductive layer 14 can be prepared by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD). Since the first region is relatively flat, the tunnel dielectric layer 13 and the doped conductive layer 14 formed in the first region are also relatively flat; since the second region 1a has a velvet structure, the tunnel dielectric layer 13 and the doped conductive layer 14 formed in the second region 1a also have a velvet structure. In addition, as Fig. 9 As shown, in the process of forming the tunnel dielectric layer 13 and the doped conductive layer 14 on the back side of the cell, the coated polysilicon and phosphosilicate glass layers will also be formed on the front side of the cell. In order to prevent the coated polysilicon and phosphosilicate glass layers from affecting the performance of the solar cell 1, they need to be removed.
[0074] S7: forming a passivation layer on the front and back sides of the battery cell.
[0075] In this step, if Fig.10 As shown, the passivation layer can be formed on the front and back of the cell by atomic layer deposition (ALD). Among them, the passivation layer deposited on the front of the cell is the first passivation layer 15, and the passivation layer deposited on the back of the cell is the second passivation layer 16. Since the first area on the back of the cell is relatively flat, the second passivation layer 16 formed in the first area is also relatively flat; since the second area 1a on the back of the cell has a velvet structure, the second passivation layer 16 formed in the second area 1a also has a velvet structure. Specifically, the passivation layer is generally an aluminum oxide layer.
[0076] S8: Screen printing electrodes on the battery cell and sintering.
[0077] In this step, the electrode printed on the front of the cell is the first electrode 17, and the electrode printed on the back of the cell is the second electrode 18. The electrode includes a fine grid and a main grid, the fine grid is used to collect the current generated on the cell, and the main grid is used to collect the current in the fine grid. High-temperature sintering of the electrode can make the electrode form a good ohmic contact with the battery.
[0078] In this embodiment, the back side of the cell is selectively etched by laser to remove the borosilicate glass layer in the first area and retain the borosilicate glass layer in the second area 1a, so that the first area of the cell is cleaned and polished in the subsequent preparation steps, thereby achieving better passivation effect on the back side of the cell, less recombination on the back side of the cell, and enhanced internal reflection on the back side of the cell, thereby increasing the utilization rate of sunlight. At the same time, the borosilicate glass layer in the second area 1a of the cell can protect the velvet structure of the second area 1a in the subsequent preparation steps, so that the tunneling dielectric layer 13 and the doped conductive layer 14 in the second area 1a also have a velvet structure, thereby increasing the contact area between the second electrode 18 and the doped conductive layer 14, reducing the resistance at the contact between the second electrode 18 and the doped conductive layer 14, and thereby improving the photoelectric conversion efficiency of the solar cell 1.
[0079] Specifically, the tank-type equipment for tank cleaning includes at least: a first cleaning tank, a first water washing tank, a polishing tank, a second water washing tank, a second cleaning tank, a third water washing tank, a third cleaning tank, a fourth water washing tank, and a first drying tank.
[0080] Among them, the first cleaning tank has an alkaline solution, which can react with the surface oxide layer of the battery cell, but cannot react with borosilicate glass, so the first cleaning tank will not etch the second area 1a. Optionally, the alkaline solution can be a potassium hydroxide solution. The first water washing tank is used to remove the alkaline solution in the first cleaning tank remaining on the battery cell. The polishing tank can chemically polish the battery cell. The second water washing tank is used to remove the solution in the polishing tank remaining on the battery cell. The second cleaning tank also has an alkaline solution, which can remove oxides, grease and impurities attached to the battery cell, and can also remove the solution in the polishing tank attached to the battery cell that cannot be cleaned by the second water washing tank. The third water washing tank is used to remove the alkaline solution in the second cleaning tank remaining on the battery cell. The third cleaning tank has an acidic solution, which can further remove grease and impurities attached to the battery cell, and can also remove the solution in the second cleaning tank attached to the battery cell that cannot be cleaned by the third water tank. The fourth water washing tank is used to remove the acidic solution in the third cleaning tank remaining on the battery cell. The first drying tank is used to dry the moisture on the battery cell.
[0081] Specifically, the chain cleaning equipment includes at least a fourth cleaning tank, a fifth water washing tank and a second drying tank. The fourth cleaning tank contains a hydrofluoric acid solution, which can react with borosilicate glass to remove the borosilicate glass layer in the second area 1a on the battery cell. The fifth cleaning tank is used to remove the hydrofluoric acid solution in the fourth cleaning tank remaining on the battery cell. The second drying tank is used to dry the moisture on the battery cell.
[0082] Further, in step S3: laser etching the first region, the power of the laser etching is 40 W to 60 W. For example, the power of the laser etching may be 40 W, 43 W, 45 W, 48 W, 50 W, 52 W, 55 W, 57 W, 60 W, etc.
[0083] The power of laser etching should not be too large or too small. If the power of laser etching is too small (for example, less than 40W), the laser etching speed will be slow, the efficiency will be low, and even the etching will fail. If the power of laser etching is too large (for example, greater than 40W), the etching thickness will be large, causing greater damage to the battery cell. Therefore, the power of laser etching should be selected within an appropriate range.
[0084] Furthermore, in step S3: laser etching the first area, the speed of laser etching is: 40m / s to 70m / s. For example, the speed of laser etching can be: 40m / s, 45m / s, 48m / s, 50m / s, 53m / s, 58m / s, 60m / s, 64m / s, 67m / s, 70m / s, etc.
[0085] The speed of laser etching should not be too fast or too slow. If the speed of laser etching is too fast (for example, greater than 70 m / s), the etching uniformity will be reduced and the surface flatness after etching will be poor; if the speed of laser etching is too slow (for example, less than 40 m / s), the time required for laser etching will be increased and the efficiency of laser etching will be reduced. Therefore, the speed of laser etching should be selected within an appropriate range.
[0086] In addition, in step S3: laser etching the first area, the spot size of the laser etching is: 200μm-400μm. For example, the spot size can be: 200μm, 220μm, 245μm, 278μm, 300μm, 329μm, 358μm, 384μm, 400μm, etc.
[0087] The spot size of laser etching should be selected within an appropriate range to ensure high efficiency of laser etching and good uniformity and flatness of the etched surface.
[0088] In a specific implementation, in step S6: forming the tunnel dielectric layer 13 and the doped conductive layer 14 on the back side of the cell, the deposition time t of the doped conductive layer 14 satisfies: 1500s≤t≤1800s. For example, the deposition time t may be 1500s, 1530s, 1550s, 1580s, 1600s, 1630s, 1680s, 1700s, 1750s, 1800s, etc.
[0089] The thickness of the doped conductive layer 14 formed can be controlled by controlling the deposition time. The deposition time t for depositing the doped conductive layer 14 should not be too long or too short. If the deposition time t is too long (e.g., longer than 1800s), the deposited doped conductive layer 14 will be too thick, thereby increasing the parasitic absorption of sunlight by the doped conductive layer 14 and reducing the photoelectric conversion efficiency of the solar cell 1. If the deposition time t is too short (e.g., shorter than 1500s), the deposited doped conductive layer 14 will be too thin, thereby increasing the recombination and resistance in the doped conductive layer 14 and reducing the photoelectric conversion efficiency of the solar cell 1. Therefore, the deposition time t for depositing the doped conductive layer 14 should be selected within an appropriate range.
[0090] Specifically, the thickness d of the doped conductive layer 14 satisfies: 110 nm≤d≤130 nm. For example, the thickness d of the doped conductive layer 14 may be 110 nm, 112 nm, 115 nm, 118 nm, 120 nm, 124 nm, 128 nm, 130 nm, etc.
[0091] The thickness d of the doped conductive layer 14 should not be too thick or too thin. If the thickness d of the doped conductive layer 14 is too thick (for example, thicker than 130 nm), the parasitic absorption of sunlight by the doped conductive layer 14 will increase, and the photoelectric conversion efficiency of the solar cell 1 will decrease. If the thickness d of the doped conductive layer 14 is too thin (for example, thinner than 110 nm), the recombination in the doped conductive layer 14 will increase, the resistance will increase, and the photoelectric conversion efficiency of the solar cell 1 will decrease. Therefore, the thickness d of the doped conductive layer 14 should be controlled within an appropriate range.
[0092] In addition, since the surface flatness of the first region after laser etching on the cell is relatively high, the film color difference of the solar cell 1 caused by the uneven deposition thickness of the tunnel dielectric layer 13 and the doped conductive layer 14 can be improved.
[0093] In a specific embodiment, the ratio of the width of the second region 1a to the width of the second electrode 18 satisfies: 5 to 15. For example, the ratio of the width of the second region 1a to the width of the second electrode 18 can be 5, 6.5, 8, 9, 10.5, 12, 13, 14.5, 15, etc.
[0094] The ratio of the width of the second region 1a to the width of the second electrode 18 should be selected within an appropriate range so that the contact area between the second electrode 18 and the doped conductive layer 14 is larger and the resistance at the contact point between the two is smaller. At the same time, the size of the first region is as large as possible to achieve better passivation effect on the back of the cell, less recombination on the back of the cell, stronger internal reflection on the back of the cell, increased utilization of sunlight, and higher photoelectric conversion efficiency of the solar cell 1.
[0095] Preferably, the width of the second electrode 18 satisfies: 15 μm to 35 μm, and the width of the second region 1a satisfies: 150 μm to 350 μm.
[0096] This is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A method for manufacturing a solar cell, characterized in that: The back side of the solar cell (1) comprises a first region and a second region (1a), and the second electrode (18) of the solar cell (1) is arranged in the second region (1a); The manufacturing method of the solar cell (1) comprises: Texturing the battery cells; Boron diffusion is performed on the battery cell; Laser etching the first region; performing tank cleaning on the first area; The second zone (1a) is subjected to chain cleaning.
2. The method for manufacturing a solar cell according to claim 1, characterized in that: In the step of laser etching the first region, the power of the laser etching is 40W to 60W.
3. The method for manufacturing a solar cell according to claim 1, characterized in that: In the step of laser etching the first region, the speed of the laser etching is 40 m / s to 70 m / s.
4. The method for manufacturing a solar cell according to claim 1, characterized in that: After the step of chain etching the second region (1a), the method for manufacturing the solar cell (1) further comprises: A tunneling dielectric layer (13) and a doped conductive layer (14) are formed on the back side of the cell.
5. The method for manufacturing a solar cell according to claim 4, characterized in that: In the step of forming a tunnel dielectric layer (13) and a doped conductive layer (14) on the back side of the cell, a deposition time t for depositing the doped conductive layer (14) satisfies: 1500s≤t≤1800s.
6. A solar cell, characterized in that: The solar cell (1) is prepared by the method for manufacturing a solar cell according to any one of claims 1 to 5; the back side of the solar cell (1) comprises a first region and a second region (1a), and the second region (1a) is provided with a second electrode (18); The solar cell (1) comprises: a substrate (11), an emitter (12), a tunneling dielectric layer (13) and a doped conductive layer (14), wherein the emitter (12) is arranged on the front side of the substrate (11), and the tunneling dielectric layer (13) and the doped conductive layer (14) are arranged in sequence on the back side of the substrate (11).
7. The solar cell according to claim 6, characterized in that: The flatness of the doped conductive layer (14) in the second region (1a) is smaller than that in the first region.
8. The solar cell according to claim 6, characterized in that: The flatness of the tunnel dielectric layer (13) in the second region (1a) is smaller than that in the first region.
9. The solar cell according to claim 6, characterized in that: The flatness of the back side of the substrate (11) in the second region (1a) is smaller than that in the first region.
10. The solar cell according to claim 6, characterized in that: The thickness d of the doped conductive layer (14) satisfies: 110nm≤d≤130nm.
Citation Information
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