Dynamic characteristic multi-parameter characterization system, method and equipment of power field effect transistor and medium

Abstract

The invention discloses a dynamic characteristic multi-parameter characterization system and method of a power field effect transistor, and relates to the technical field of electrical variable measurement. Comprising the following steps: automatically adjusting input voltage, current and frequency according to the type and application scene of a power FET to be tested, and ensuring that a test system adapts to dynamic characteristics of different FETs; activating a high-frequency optimization mode and applying a broadband signal compensation algorithm, a bandwidth enhancement algorithm and a signal denoising algorithm to enable the signals to keep accuracy and definition in a high-frequency range; on the premise of ensuring the test precision, a low-power consumption mode is started, and power consumption is adjusted through dynamic power consumption management; comprehensive analysis of data is carried out, and parameter feedback optimization is carried out. According to the invention, high-precision, high-efficiency and multi-dimensional optimized dynamic performance test of the power FET is realized, and the test reliability and applicability are remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of measuring electric variables, and in particular to a system, method, device and medium for characterizing the dynamic characteristics of a power field effect transistor using multiple parameters. Background Art

[0002] Power field effect transistors (power FETs) are widely used in modern power electronics and communication equipment, and their dynamic characteristics are of great significance for optimizing device performance and design. Existing test methods usually encounter noise problems in high-frequency response and excessive power consumption during the test, which limits the feasibility of high-precision testing. In order to meet the needs of practical applications, especially in power electronic devices, how to obtain accurate dynamic characteristics at high frequencies while maintaining low power consumption of the test equipment has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] In view of the problems existing in the above background technology, a multi-parameter characterization system and method for dynamic characteristics of a power field effect transistor are proposed in the present invention.

[0004] Therefore, the problem to be solved by the present invention is how to introduce low power consumption mode design and optimization strategy in high frequency dynamic response testing, solve the high frequency noise interference and high power consumption problems existing in traditional testing methods, and improve the accuracy and efficiency of the test.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0006] In the first aspect, an embodiment of the present invention provides a multi-parameter characterization method for the dynamic characteristics of a power field effect transistor, which includes automatically adjusting the input voltage, current and frequency according to the type and application scenario of the power FET to be tested to ensure that the test system adapts to the dynamic characteristics of different FETs; activating the high-frequency optimization mode and applying broadband signal compensation, bandwidth enhancement and signal denoising algorithms to maintain the accuracy and clarity of the signal within the high-frequency range; while ensuring the test accuracy, starting the low-power mode and adjusting the power consumption through dynamic power consumption management; conducting a comprehensive analysis of the data and performing parameter feedback optimization.

[0007] As a preferred solution of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor described in the present invention, the activation of the high-frequency optimization mode and the application of broadband signal compensation, bandwidth enhancement and signal denoising algorithms include the following steps: adjusting the gain of the broadband signal source and the frequency and amplitude of the output signal according to the dynamic response of the power FET to adapt the high-frequency characteristics of the power FET; expanding the bandwidth of the test signal within the frequency response range; introducing an adaptive denoising algorithm to perform real-time analysis of the spectrum data to remove high-frequency noise interference while retaining useful signal characteristics; combining comprehensive analysis in the time domain and frequency domain to dynamically correct the phase and amplitude errors of the signal.

[0008] As a preferred solution of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor of the present invention, the introduction of the adaptive denoising algorithm and the real-time analysis of the spectrum data include: using a spectrum analyzer to monitor the received signal in real time to identify the main noise components and distribution characteristics in the high frequency band; applying a wavelet transform algorithm to decompose the spectrum signal into components of different frequency bands and suppress the noise in the high frequency part: in, is the continuous wavelet transform of the signal, is the original signal, is the mother wavelet function, The mother wavelet function By scaling factor and translation parameters The sub-wavelet function generated after transformation is is a time variable; an adaptive filter is introduced to dynamically adjust the filter parameters according to the noise characteristics. The formula is as follows: in, is the denoised signal, is the input signal, is the filter weight, is the interference signal component, is the total number of sampling points of the signal, For the sampling points; the denoised signal is jointly reconstructed in the frequency domain and time domain.

[0009] As a preferred solution of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor described in the present invention, the comprehensive analysis combined with the time domain and the frequency domain to dynamically correct the phase and amplitude errors of the signal includes: measuring the phase and amplitude errors of the signal in the frequency domain; acquiring the signal waveform in the time domain, comparing the difference between the input signal and the output signal, and determining the delay and amplitude change; performing a reverse correction on the measured phase offset, and adjusting the signal source gain to compensate for the amplitude attenuation to ensure that the signal amplitude is consistent with the target value; and verifying the corrected signal by a spectrum analyzer and an oscilloscope to ensure that the signal meets the high-fidelity standard in both the time domain and the frequency domain.

[0010] As a preferred scheme of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor described in the present invention, wherein: the starting of the low power mode and adjusting the power consumption through dynamic power consumption management include: when starting the low power mode, limiting the high power working state and dynamically optimizing the power consumption; limiting the duration of the high power state according to the working conditions to avoid the long-term operation of the equipment in a critical state; real-time tracking of the power consumption of the power FET, and automatically adjusting the power parameters when it is detected that the power consumption exceeds the preset threshold.

[0011] As a preferred solution of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor of the present invention, wherein: the dynamic optimization of power consumption includes: power efficiency for: in, is the power FET output power, Input power to the power FET; dynamically optimize power consumption as follows: in, For optimized power consumption, is the temperature penalty coefficient, is the junction temperature of the power FET, is the ambient temperature, is the real-time power consumption of the power FET.

[0012] As a preferred solution of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor of the present invention, the comprehensive analysis of data and parameter feedback optimization include the following steps: collecting test data, including static parameters, dynamic characteristic data and power consumption data; performing multi-dimensional characteristic analysis on the test data to evaluate performance indicators and application adaptability; constructing multi-parameter adaptability indicators: in, , , is the weight coefficient, indicating the degree of attention paid to different performances. The larger the value, the better the dynamic performance of the FET. is the switching speed rise time, It is a signal distortion indicator; based on the analysis results, feedback is provided to optimize the test conditions and parameters.

[0013] In the second aspect, an embodiment of the present invention provides a multi-parameter characterization system for the dynamic characteristics of a power field effect transistor, which includes: an input parameter adjustment module, which is used to automatically adjust the input voltage, current and frequency according to the type and application scenario of the power FET to be tested, so as to ensure that the test system adapts to the dynamic characteristics of different FETs; a high-frequency signal optimization module, which is used to activate the high-frequency optimization mode and apply broadband signal compensation, bandwidth enhancement and signal denoising algorithms to maintain the accuracy and clarity of the signal within the high-frequency range; a power management and energy-saving module, which is used to start the low-power mode while ensuring the test accuracy, and adjust the power consumption through dynamic power consumption management; a data analysis and optimization module, which is used to perform comprehensive analysis of the data and perform parameter feedback optimization.

[0014] In a third aspect, an embodiment of the present invention provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, wherein: when the computer program instructions are executed by the processor, the steps of the multi-parameter characterization method of the dynamic characteristics of the power field effect transistor as described in the first aspect of the present invention are implemented.

[0015] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program instructions are executed by a processor, the steps of the multi-parameter characterization method for dynamic characteristics of a power field effect transistor as described in the first aspect of the present invention are implemented.

[0016] The beneficial effects of the present invention are as follows: the present invention dynamically adjusts the test input voltage, current and frequency according to the type and application scenario of the power FET to ensure that the test conditions match the FET characteristics, and further combines the high-frequency optimization mode to optimize the adaptability and high fidelity of the high-frequency test signal through broadband compensation, denoising algorithm and phase correction technology; in low-power mode, dynamic power consumption management and energy-saving algorithms are implemented to prevent equipment overheating and improve power efficiency; comprehensive analysis of test data, optimization of test parameters and conditions through closed-loop feedback, to ensure the performance adaptability of FET in different application scenarios, and generate a comprehensive performance report to provide guidance for device selection and system design; overall, the invention realizes high-precision, high-efficiency and multi-dimensionally optimized power FET dynamic performance testing, significantly improving test reliability and applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 Flow chart of the multi-parameter characterization method for the dynamic characteristics of power field effect transistors.

[0019] Figure 2 This is the structural diagram of the multi-parameter characterization system for the dynamic characteristics of power field effect transistors. DETAILED DESCRIPTION

[0020] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings.

[0021] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0022] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0023] Example 1 Reference Figure 1~Figure 2 , which is the first embodiment of the present invention, and which provides a multi-parameter characterization method for dynamic characteristics of a power field effect transistor, comprising: S1: Automatically adjust the input voltage, current and frequency according to the type and application scenario of the power FET to be tested to ensure that the test system adapts to the dynamic characteristics of different FETs, among which the field effect transistor is FET.

[0024] First, you need to configure a high-frequency signal generator, measuring instruments and power field-effect transistor samples to ensure that the temperature, humidity and other conditions of the test environment are stable and meet the test requirements.

[0025] In order to ensure the test accuracy, the temperature and humidity of the test environment must be strictly controlled to prevent the external environment from interfering with the performance of the FET. Usually the ambient temperature should be maintained at 25°C ± 2°C and the humidity should be controlled between 40% and 60%.

[0026] Before starting the test, calibrate all test equipment to ensure the accuracy of the measuring instruments and signal sources and eliminate the errors caused by the equipment itself. Use a known standard signal source or standard reference load for calibration to ensure the accuracy of the test data.

[0027] Furthermore, the input parameters are selected according to the FET type and characteristics: the input voltage, current and frequency are automatically adjusted by preliminary testing of the static parameters of the FET (such as threshold voltage, maximum current, etc.). The automated system adjusts the test voltage and current according to the FET's operating mode and load requirements to ensure that the test conditions match the FET's operating characteristics.

[0028] The most suitable operating frequency and test mode are automatically selected according to different application scenarios (such as power electronic systems, communication systems, etc.). For example, for high-frequency switching FETs, the system automatically adjusts the frequency to a range of tens of MHz to hundreds of MHz; for low-frequency power FETs, the frequency range is adjusted to the kHz level, and the current is adjusted according to the power requirements.

[0029] S2: Activates high-frequency optimization mode, applying broadband signal compensation, bandwidth enhancement, and signal denoising algorithms to ensure signal accuracy and clarity in the high-frequency range.

[0030] S2.1: Adjust the gain of the broadband signal source and the frequency and amplitude of the output signal according to the dynamic response of the power FET to adapt to the high-frequency characteristics of the power FET and ensure that the test signal is not distorted within the operating frequency range.

[0031] Specifically, preliminary tests were performed to obtain the dynamic response characteristics of the power FET under different input conditions, and its frequency response range and gain variation were recorded;

[0032] Using the measured response characteristics as input, the gain, frequency, and amplitude of the broadband signal source are adjusted to ensure that the input signal matches the high-frequency characteristics of the FET;

[0033] The adjusted signal is tested to verify whether the distortion of the signal within the target frequency range meets the requirements. If not, the calibration is repeated.

[0034] S2.2: Expand the bandwidth of the test signal within the frequency response range and optimize the high-frequency adaptability of the signal.

[0035] Determine the required frequency range (e.g., tens of MHz to hundreds of MHz) based on the dynamic characteristics of the FET and the target application scenario; select a broadband filter and dynamically adjust its passband range to cover the target frequency range while suppressing out-of-band noise.

[0036] The broadband test signal is generated by frequency superposition technology to ensure uniform distribution of frequency components, and phase compensation is performed on the high-frequency part to prevent signal distortion caused by phase shift.

[0037] Perform spectrum analysis on the expanded bandwidth signal to verify its frequency coverage and amplitude consistency.

[0038] S2.3: Introduce an adaptive denoising algorithm to perform real-time analysis on spectrum data to remove high-frequency noise interference while retaining useful signal features.

[0039] Specifically, a spectrum analyzer is used to monitor the received signal in real time to identify the main noise components and their distribution characteristics in the high frequency band.

[0040] Removing high frequency noise interference includes: Apply the wavelet transform algorithm to decompose the spectrum signal into components of different frequency bands, and suppress the noise in the high-frequency part: in, is the continuous wavelet transform of the signal, is the original signal, is the mother wavelet function, The mother wavelet function By scaling factor and translation parameters The sub-wavelet function generated after transformation is is the time variable;

[0041] An adaptive filter is introduced to dynamically adjust the filter parameters (such as cutoff frequency and bandwidth) according to the noise characteristics. The formula is as follows: in, is the denoised signal, is the input signal, is the filter weight, is the interference signal component, is the total number of sampling points of the signal, For the sampling points.

[0042] The denoised signal is reconstructed jointly in the frequency domain and time domain to ensure the integrity of the useful signal features, and the signal quality before and after denoising is compared. If the loss of useful signal features is large, the weight parameters of the denoising algorithm are adjusted.

[0043] S2.4: Combined with comprehensive analysis in the time domain and frequency domain, the phase and amplitude errors of the signal are dynamically corrected to ensure high fidelity of the test data.

[0044] Specifically, the phase and amplitude errors of the signal are measured in the frequency domain; the signal waveform is collected in the time domain, the difference between the input signal and the output signal is compared, and the delay and amplitude change are determined;

[0045] The measured phase offset is corrected inversely and the signal source gain is adjusted to compensate for the amplitude attenuation to ensure that the signal amplitude is consistent with the target value.

[0046] The corrected signal is verified by a spectrum analyzer and an oscilloscope to ensure that the signal meets high fidelity standards in both the time domain and the frequency domain.

[0047] S3: While ensuring test accuracy, start low power mode and adjust power consumption through dynamic power management to avoid excessive power load and overheating of equipment.

[0048] Preferably, when the low power consumption mode is activated, power efficiency is maximized by limiting high power working states.

[0049] Among them, power efficiency for: in, is the power FET output power, Input power to the power FET;

[0050] Dynamic power optimization is performed as follows: in, For optimized power consumption, is the temperature penalty coefficient, is the junction temperature of the power FET, is the ambient temperature, is the real-time power consumption of the power FET.

[0051] Furthermore, an energy-saving algorithm is introduced to limit the duration of high-power state according to working conditions to avoid long-term operation of the equipment in critical state. When in high-power state, a dynamic time limit factor is introduced. : in, is the trade-off parameter between power and time, is the operating time of the current high power state, The maximum duration allowed for high power.

[0052] Furthermore, the power consumption of the power FET is tracked in real time. When it is detected that the power consumption exceeds the preset threshold, the system automatically adjusts the power parameters to prevent the device from overheating.

[0053] Specifically, the power change rate is monitored: when When , adaptive adjustment is triggered: in, is the power change rate, is the change rate threshold, To adjust the rate factor.

[0054] S4: Conduct comprehensive data analysis and perform parameter feedback optimization.

[0055] S4.1: Collect the test data generated in steps S1 to S3, including static parameters (such as threshold voltage , leakage current ), dynamic characteristic data (such as switching speed (rise / fall time) , , frequency response , signal distortion indicators (harmonic distortion rate THD) and power consumption data (input power and output power wait).

[0056] S4.2: Perform multi-dimensional characteristic analysis on the test data to evaluate its performance indicators and application suitability.

[0057] Specifically, construct a multi-parameter adaptability index: in, , , is the weight coefficient, indicating the degree of attention paid to different performances. The larger it is, the better the dynamic performance of the FET is.

[0058] Optional, according to distribution and identify the main performance limiting factors (such as slow switching speed or low efficiency).

[0059] S4.3: Based on the analysis results, provide feedback to optimize test conditions and parameters.

[0060] If the signal is distorted or the response deviates from expectations at certain test frequencies, the input frequency and signal amplitude are automatically adjusted and retested to form a closed-loop optimization process:

[0061] Specifically, if it is detected , then adjust the input signal amplitude : in, is the distortion correction coefficient, is the input signal amplitude before modification, is the modified input signal amplitude, The maximum harmonic distortion rate is set.

[0062] like , then optimize the input voltage and frequency: in, is the optimized input voltage, is the original input voltage, is the input voltage adjustment, is the optimized signal frequency, is the original signal frequency, is the signal frequency adjustment amount.

[0063] Further, rerun steps S1 to S3 according to the optimized input parameters to verify the improvement effect and update the , ensuring dynamic performance optimization.

[0064] If it is detected that the performance of the power FET does not meet the requirements of a specific application scenario, the system prompts you to optimize the design or replace the device.

[0065] S4.4: Generate a comprehensive characteristic report of the power FET, including static and dynamic characteristic indicators, energy consumption evaluation results, and optimization suggestions to support subsequent device selection and system design.

[0066] Furthermore, the present embodiment also provides a multi-parameter characterization system for the dynamic characteristics of a power field effect transistor, including an input parameter adjustment module, which is used to automatically adjust the input voltage, current and frequency according to the type and application scenario of the power FET to be tested, so as to ensure that the test system adapts to the dynamic characteristics of different FETs; a high-frequency signal optimization module, which is used to activate the high-frequency optimization mode and apply broadband signal compensation, bandwidth enhancement and signal denoising algorithms to keep the signal accurate and clear within the high-frequency range; a power management and energy-saving module, which is used to start the low-power mode while ensuring the test accuracy, and adjust the power consumption through dynamic power consumption management; a data analysis and optimization module, which is used to perform comprehensive analysis of the data and perform parameter feedback optimization.

[0067] This embodiment also provides a computer device, which is suitable for the case of a multi-parameter characterization method for the dynamic characteristics of a power field effect transistor, including a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute computer-executable instructions to implement the multi-parameter characterization method for the dynamic characteristics of a power field effect transistor proposed in the above embodiment.

[0068] The computer device may be a terminal, and the computer device includes a processor, a memory, a communication interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be achieved through WIFI, an operator network, NFC (near field communication) or other technologies. The display screen of the computer device may be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device may be a touch layer covered on the display screen, or a key, trackball or touchpad provided on the housing of the computer device, or an external keyboard, touchpad or mouse, etc.

[0069] This embodiment also provides a storage medium on which a computer program is stored. When the program is executed by a processor, the method for realizing the multi-parameter characterization of the dynamic characteristics of a power field effect transistor as proposed in the above embodiment is implemented.

[0070] In summary, the present invention dynamically adjusts the test input voltage, current and frequency according to the type and application scenario of the power FET to ensure that the test conditions match the FET characteristics, and further combines the high-frequency optimization mode to optimize the adaptability and high fidelity of the high-frequency test signal through broadband compensation, denoising algorithm and phase correction technology; in low-power mode, dynamic power consumption management and energy-saving algorithms are implemented to prevent equipment overheating and improve power efficiency; comprehensive analysis of test data, optimization of test parameters and conditions through closed-loop feedback, to ensure the performance adaptability of FET in different application scenarios, and generate a comprehensive performance report to provide guidance for device selection and system design; overall, the invention realizes high-precision, high-efficiency and multi-dimensionally optimized dynamic performance testing of power FETs, significantly improving test reliability and applicability.

[0071] Example 2 Referring to Table 1, which is a second embodiment of the present invention, this embodiment provides a multi-parameter characterization method for dynamic characteristics of a power field effect transistor. In order to verify the beneficial effects of the present invention, a scientific demonstration is carried out through simulation experiments.

[0072] The experimental goal is to verify the accuracy and practicality of the multi-parameter characterization method of the power field effect transistor (FET) dynamic characteristics of the present invention. The experimental preparation is as follows:

[0073] Laboratory environmental conditions: The temperature is maintained at 25°C±1°C, and the humidity is 45%-55%, which is controlled by constant temperature and humidity equipment to avoid interference of the external environment on FET performance.

[0074] Equipment configuration: high-frequency signal generator (supporting frequency range 10kHz~1GHz), spectrum analyzer, digital oscilloscope, automated test software platform, and power FET samples that meet the specifications (model: FET-2024).

[0075] Calibration steps: Use standard signal source and reference load to calibrate the signal generator and measuring instrument. Use reference voltage source (5V) and standard impedance (50Ω) to ensure the benchmark accuracy of the equipment.

[0076] The test steps are as follows: According to the specifications of FET-2024 (static threshold voltage 4.5V, maximum current 50A), the input voltage range is initially set to 2V~8V, the current is 5A~40A, and the frequency is 1MHz~200MHz. The test system automatically adjusts the input frequency to 100MHz according to the application scenario (high-frequency communication module).

[0077] The system activates the broadband signal compensation module and uses a dynamic gain adjustment algorithm to control signal distortion within 0.5%. Using wavelet denoising and dynamic phase compensation algorithms, the generated signal spectrum bandwidth ranges from 95MHz to 105MHz, and the signal amplitude error is less than 0.3%.

[0078] Real-time monitoring of FET sample power consumption and junction temperature changes. When power consumption exceeds 20W or junction temperature rises to 80°C, the system automatically reduces the signal amplitude and dynamically adjusts the power efficiency to more than 85%.

[0079] The system records dynamic response data (switching speed, frequency response) and power efficiency data. For high-distortion input conditions, the input signal amplitude and frequency are automatically adjusted and retested to form a closed-loop optimization. The following is the experimental data table:

[0080] Table 1 Experimental data table

[0081] As can be seen from Table 1, before optimization, the dynamic response characteristics gradually decrease with the increase of frequency, showing the defect of unstable response to high-frequency signals. After optimization, the response efficiency is improved by 10%~30% in the high frequency band, showing the effectiveness of broadband optimization compensation. Before optimization, the signal distortion rate in the high frequency band (>100 MHz) is generally 10%~20%, while after optimization, the distortion rate drops to below 5%, indicating that the denoising and phase correction algorithms have greatly improved the signal fidelity. Before optimization, the power consumption increases significantly under high frequency and high power conditions (>20 W), while after optimization, the power consumption decreases by 20%~40% under the same conditions, effectively solving the power management problem. Before optimization, the adaptability score is concentrated in 50~70 points, and the dynamic performance adaptability is poor. After optimization, the score is concentrated in 80~95 points, the adaptability is significantly improved, and the scope of application is wider.

[0082] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A multi-parameter characterization method for dynamic characteristics of a power field effect transistor, characterized in that: The characterization method comprises: Automatically adjust input voltage, current and frequency according to the type and application scenario of the power FET to be tested to ensure that the test system adapts to the dynamic characteristics of different FETs; Activate high-frequency optimization mode and apply wideband signal compensation, bandwidth enhancement, and signal de-noising algorithms to keep the signal accurate and clear in the high-frequency range; On the premise of ensuring test accuracy, start low power mode and adjust power consumption through dynamic power management; Conduct comprehensive data analysis and perform parameter feedback optimization.

2. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 1, characterized in that: The activating high frequency optimization mode and applying broadband signal compensation, bandwidth enhancement and signal denoising algorithms comprises the following steps: According to the dynamic response of the power FET, the gain of the broadband signal source and the frequency and amplitude of the output signal are adjusted to adapt to the high-frequency characteristics of the power FET; Extend the bandwidth of the test signal within the frequency response range; Introducing an adaptive denoising algorithm to perform real-time analysis on spectrum data, removing high-frequency noise interference while retaining useful signal features; Combined with comprehensive analysis in the time domain and frequency domain, the phase and amplitude errors of the signal are dynamically corrected.

3. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 2, characterized in that: The introduction of the adaptive denoising algorithm to perform real-time analysis on the spectrum data includes: Use a spectrum analyzer to monitor the received signal in real time and identify the main noise components and distribution characteristics in the high frequency band; Apply the wavelet transform algorithm to decompose the spectrum signal into components of different frequency bands, and suppress the noise in the high-frequency part: ， in, is the continuous wavelet transform of the signal, is the original signal, is the mother wavelet function, The mother wavelet function By scaling factor and translation parameters The sub-wavelet function generated after transformation is is the time variable; An adaptive filter is introduced to dynamically adjust the filter parameters according to the noise characteristics. The formula is as follows: ， in, is the denoised signal, is the input signal, is the filter weight, is the interference signal component, is the total number of sampling points of the signal, For the sampling points; The denoised signal is reconstructed jointly in frequency domain and time domain.

4. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 3, characterized in that: The phase and amplitude errors of the dynamic correction signal by combining comprehensive analysis in the time domain and the frequency domain include: Measure the phase and amplitude errors of a signal in the frequency domain; Acquire signal waveforms in the time domain, compare the difference between input and output signals, and determine the delay and amplitude changes; Perform reverse correction on the measured phase offset and adjust the signal source gain to compensate for the amplitude attenuation to ensure that the signal amplitude is consistent with the target value; The corrected signal is verified by a spectrum analyzer and an oscilloscope to ensure that the signal meets high fidelity standards in both the time domain and the frequency domain.

5. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 4, characterized in that: The starting of the low power consumption mode and adjusting the power consumption by dynamic power consumption management comprises: When low power mode is enabled, high power working state is limited to dynamically optimize power consumption; Limit the duration of high power state according to working conditions to avoid long-term operation of equipment in critical state; Track the power consumption of the power FET in real time and automatically adjust the power parameters when it is detected that the power consumption exceeds the preset threshold.

6. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 5, characterized in that: The dynamically optimizing power consumption includes: Power efficiency for: ， in, is the power FET output power, Input power to the power FET; Dynamic optimization of power consumption is as follows: ， in, For optimized power consumption, is the temperature penalty coefficient, is the junction temperature of the power FET, is the ambient temperature, is the real-time power consumption of the power FET.

7. The multi-parameter characterization method for dynamic characteristics of a power field effect transistor according to claim 6, characterized in that: The comprehensive analysis of data and parameter feedback optimization include the following steps: Collect test data, including static parameters, dynamic characteristics data and power consumption data; Perform multi-dimensional characteristic analysis on the test data to evaluate performance indicators and application adaptability: Constructing multi-parameter fitness indicators: ， in, , , is the weight coefficient, indicating the degree of attention paid to different performances. The larger the value, the better the dynamic performance of the FET. is the switching speed rise time, is the signal distortion indicator; Based on the analysis results, feedback is provided to optimize the test conditions and parameters.

8. A system for characterizing the dynamic characteristics of a power field effect transistor using multiple parameters, based on the method for characterizing the dynamic characteristics of a power field effect transistor according to any one of claims 1 to 7, characterized in that: Also includes, Input parameter adjustment module, which is used to automatically adjust the input voltage, current and frequency according to the type and application scenario of the power FET to be tested, ensuring that the test system adapts to the dynamic characteristics of different FETs; High-frequency signal optimization module, which is used to activate the high-frequency optimization mode and apply broadband signal compensation, bandwidth enhancement and signal denoising algorithms to keep the signal accurate and clear in the high-frequency range; The power management and energy saving module is used to start the low power consumption mode while ensuring the test accuracy and adjust the power consumption through dynamic power consumption management; The data analysis and optimization module is used to conduct comprehensive data analysis and parameter feedback optimization.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the multi-parameter characterization method for dynamic characteristics of a power field effect transistor as described in any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the multi-parameter characterization method for dynamic characteristics of a power field effect transistor as described in any one of claims 1 to 7 are implemented.

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