Pattern multi-row matching method and device of ATE (Automatic Train Equipment)

Abstract

The invention provides a pattern multi-row matching method and device for ATE equipment, and the method comprises the steps: determining a cyclic pattern sequence comprising a plurality of rows of target patterns based on the number of matched rows when a first to-be-tested pattern carrying a LOOPMATCH instruction is recognized after a test is started; lOOPMATCH circulation is executed on the basis of the circulation Pattern sequence, and in each LOOPMATCH circulation, the Pattern matching result of the target Pattern in each row is determined; when all Pattern matching results pass in one cycle, jumping out of the LOOPMATCH cycle and determining that the cycle Pattern sequence test passes, otherwise, continuing to circulate to the maximum cycle number and then determining that the cycle Pattern sequence test does not pass; according to the technical scheme of the embodiment of the invention, when the first to-be-tested Pattern carrying the LOOPMATCH instruction is detected, multiple rows of target Patterns are constructed for loop testing, and LOOPMATCH loop is jumped out after any complete matching succeeds, so that the depth of the Pattern sequence can be effectively reduced, multi-row synchronous multi-time level matching is realized, the test resource overhead is reduced, and the test efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of chip testing technology, and in particular to a pattern multi-row matching method and device of ATE equipment. Background Art

[0002] In the process of chip testing development, the use of Pattern for building in self test is becoming more and more widespread. In traditional testing methods, the functions that can be realized by the pattern of ATE equipment are relatively simple, and generally only single-line single match (Pattern Compare) can be achieved. Although the functions that can be realized by the pattern of some advanced ATE equipment include microinstruction functions, generally only single-line multiple matches (IMATCH function) can be achieved.

[0003] In complex test scenarios with multiple-row synchronous multiple-level matching that occurs after a non-fixed time, the outputs of multiple rows of patterns that need to be executed continuously must be satisfied at the same time, but the test chip may have different outputs when the same row of pattern input is used. For example, the input of pattern 1010 may be HHH, HLL, or LHL in multiple tests, which results in a certain probability of multiple-row synchronous multiple-level matching. If the current single-row multiple-matching solution is used, the next row must be verified after one row meets the conditions, which takes up a lot of pattern depth and test resources, and must be exited after all matching operations are completed, resulting in low resource utilization efficiency of ATE test equipment. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a pattern multi-line matching method and device for ATE equipment, which can achieve multi-line synchronous multiple level matching and automatically jump out after successful matching, thereby reducing test resource overhead and improving test efficiency.

[0005] In a first aspect, an embodiment of the present invention provides a pattern multi-row matching method of an ATE device, which is applied to a test system, wherein the test system includes an ATE device and a first board, and the ATE device is communicatively connected with the first board. The method includes:

[0006] Writing the pattern sequence to be tested into the first board through the ATE device, and sending a test instruction to the first board to start a pattern test, wherein the pattern sequence to be tested includes at least one row of the first pattern to be tested and multiple rows of the second pattern to be tested, the first pattern to be tested and the second pattern to be tested both include input information and comparison information, the input information records multiple input symbols, the comparison information records at least one comparison symbol, and the first pattern to be tested also carries a LOOPMATCH instruction, and the LOOPMATCH instruction records the number of matching rows and the maximum number of loops;

[0007] When the first pattern to be tested is executed, a loop pattern sequence is determined based on the number of matching rows, wherein the loop pattern sequence includes multiple rows of target patterns, the first pattern to be tested is the first row of the target pattern, and the remaining multiple rows of the target pattern are multiple consecutive rows of the second pattern to be tested that are located after the first pattern to be tested;

[0008] The first board executes a LOOPMATCH loop based on the loop pattern sequence. In each LOOPMATCH loop, the first board obtains corresponding response output information based on the input information of each row of the target pattern, and compares the response output information and the comparison information of the target pattern in the same row to obtain a pattern matching result, wherein the response output information includes a multi-bit output symbol, and the number of bits of the output symbol is the same as the number of bits of the comparison symbol;

[0009] In each LOOPMATCH cycle, when the pattern matching result of at least one row of the target pattern indicates that the match fails, the next LOOPMATCH cycle is executed by the first board;

[0010] When it is detected in one LOOPMATCH cycle that all the Pattern matching results indicate that the matching is passed, the first board determines the test result of the cyclic Pattern sequence as a test pass and exits the LOOPMATCH cycle.

[0011] According to some embodiments of the present invention, the first board executes a LOOPMATCH loop based on the loop Pattern sequence, comprising:

[0012] Allocate the target memory block in the board memory;

[0013] Write the number of matching rows, the maximum number of loops, and the input information of each row of the target Pattern into the target memory block;

[0014] The LOOPMATCH loop is executed based on the content recorded in the target memory block.

[0015] According to some embodiments of the present invention, after the first board executes the next LOOPMATCH cycle, the method further includes:

[0016] When the number of LOOPMATCH cycles reaches the maximum number of cycles, the first board determines the test result of the loop Pattern sequence as a test failure and exits the LOOPMATCH cycle.

[0017] According to some embodiments of the present invention, after the first board determines the test result of the loop Pattern sequence as a test pass and exits the LOOPMATCH loop, or after the first board determines the test result of the loop Pattern sequence as a test fail and exits the LOOPMATCH loop, the method further includes:

[0018] Continue to perform pattern testing of the Pattern sequence to be tested;

[0019] When a new first pattern to be tested is executed, a new cyclic pattern sequence is constructed based on the number of matching rows carried by the new first pattern to be tested;

[0020] The LOOPMATCH loop is executed based on the new loop Pattern sequence to determine a test result of the loop Pattern sequence.

[0021] According to some embodiments of the present invention, the test system further includes a second board, the ATE device and the first board are respectively connected to the second board in communication, the first board obtains the corresponding response output information based on the input information of each row of the target Pattern, and obtains the pattern matching result based on the comparison of the response output information and the comparison information of the target Pattern in the same row, including:

[0022] When the ATE device is configured in a cross-board mode, writing the pattern sequence to be tested into the first board and the second board;

[0023] Execute the input information of the target pattern through the first board card, and obtain the response output information corresponding to the target pattern through the second board card;

[0024] The second board determines the pattern matching result by experiencing the comparison information based on the response output information.

[0025] According to some embodiments of the present invention, the first board determines the test result of the loop Pattern sequence as a test pass and exits the LOOPMATCH loop, including:

[0026] When the second board determines that all the pattern matching results indicate a successful match, sending an exit loop signal to the first board;

[0027] The first board determines the test result of the loop Pattern sequence as a test pass, exits the LOOPMATCH loop, and sends an exit confirmation signal to the second board.

[0028] According to some embodiments of the present invention, after sending the exit loop signal to the first board, the method further includes:

[0029] Continue to execute the LOOPMATCH loop by the second board;

[0030] When the new response output information is obtained, the new pattern matching result is not determined;

[0031] When the exit confirmation signal is obtained, the LOOPMATCH loop is exited.

[0032] In a second aspect, an embodiment of the present invention provides a pattern multi-row matching device for an ATE device, comprising at least one control processor and a memory for communicating with the at least one control processor; the memory stores instructions executable by the at least one control processor, and the instructions are executed by the at least one control processor so that the at least one control processor can execute the pattern multi-row matching method for the ATE device as described in the first aspect above.

[0033] In a third aspect, an embodiment of the present invention provides an electronic device, comprising the pattern multi-row matching device of the ATE device as described in the second aspect above.

[0034] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the pattern multi-row matching method of the ATE device as described in the first aspect above.

[0035] The pattern multi-row matching method of the ATE device according to the embodiment of the present invention has at least the following beneficial effects: at least one row of the first pattern to be tested and multiple rows of the second pattern to be tested are written into the first board by the ATE device, and a test instruction is sent to the first board to start the pattern test; when the first pattern to be tested is executed, a loop pattern sequence is determined based on the number of matching rows, wherein the loop pattern sequence includes multiple rows of target patterns, the first pattern to be tested is the first row of the target pattern, and the remaining multiple rows of the target pattern are multiple consecutive rows of the second pattern to be tested located after the first pattern to be tested; the first board executes LOOPMA based on the loop pattern sequence TCH loop, in each LOOPMATCH loop, the first board obtains the corresponding response output information based on the input information of each row of the target Pattern, and obtains the Pattern matching result based on the comparison of the response output information and the comparison information of the same row of the target Pattern; in each LOOPMATCH loop, when the pattern matching result of at least one row of the target Pattern indicates that the match fails, the next LOOPMATCH loop is executed by the first board; when it is detected in a LOOPMATCH loop that all the Pattern matching results indicate that the match passes, the first board determines the test result of the cyclic Pattern sequence as a test pass and exits the LOOPMATCH loop. According to the technical solution of the embodiment of the present invention, when the first pattern to be tested carrying the LOOPMATCH instruction is detected, a multi-line target pattern is constructed for loop testing. When all target patterns are tested through a LOOPMATCH loop, the LOOPMATCH loop is jumped out and subsequent tests are performed. This can effectively reduce the depth of the Pattern sequence, realize multi-line synchronous multiple level matching, reduce test resource overhead, and improve test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a flow chart of a pattern multi-row matching method of an ATE device provided by an embodiment of the present invention;

[0037] Figure 2 is a schematic diagram of a cyclic Pattern sequence provided by another embodiment of the present invention;

[0038] Figure 3 is a flow chart of cross-board collaboration provided by another embodiment of the present invention;

[0039] Figure 4 It is a structural diagram of a pattern multi-row matching device of an ATE device provided by another embodiment of the present invention. DETAILED DESCRIPTION

[0040] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0041] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0042] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0043] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0044] The embodiment of the present invention provides a pattern multi-line matching method and device of ATE equipment, wherein the pattern multi-line matching method of ATE equipment comprises: writing at least one line of a first pattern to be tested and multiple lines of a second pattern to be tested into a first board card through the ATE equipment, and sending a test instruction to the first board card to start a pattern test; when the first pattern to be tested is executed, determining a cyclic pattern sequence based on the number of matching lines, wherein the cyclic pattern sequence includes multiple lines of target patterns, the first pattern to be tested is the first line of the target pattern, and the remaining multiple lines of the target pattern are multiple consecutive lines of the second pattern to be tested located after the first pattern to be tested; the first board card performs a test based on the cyclic pattern. The first board executes a LOOPMATCH cycle in sequence. In each LOOPMATCH cycle, the first board obtains corresponding response output information based on the input information of each row of the target Pattern, and obtains a pattern matching result based on the response output information and the comparison information of the same row of the target Pattern. In each LOOPMATCH cycle, when the pattern matching result of at least one row of the target Pattern indicates that the match fails, the next LOOPMATCH cycle is executed by the first board. When it is detected in a LOOPMATCH cycle that all the pattern matching results indicate that the match passes, the first board determines the test result of the cyclic pattern sequence as a test pass and exits the LOOPMATCH cycle. According to the technical solution of the embodiment of the present invention, when the first pattern to be tested carrying the LOOPMATCH instruction is detected, a multi-line target pattern is constructed for loop testing. When all target patterns are tested through a LOOPMATCH loop, the LOOPMATCH loop is jumped out and subsequent tests are performed. This can effectively reduce the depth of the Pattern sequence, realize multi-line synchronous multiple level matching, reduce test resource overhead, and improve test efficiency.

[0045] The technical solution of the embodiment of the present invention is further described below in conjunction with the accompanying drawings.

[0046] Reference Figure 1 , Figure 1 A flowchart of a pattern multi-line matching method of an ATE device provided in an embodiment of the present invention, the pattern multi-line matching method of the ATE device includes but is not limited to the following steps:

[0047] S11, writing the pattern sequence to be tested into the first board through the ATE device, and sending a test instruction to the first board to start the pattern test, wherein the pattern sequence to be tested includes at least one row of the first pattern to be tested and multiple rows of the second pattern to be tested, the first pattern to be tested and the second pattern to be tested both include input information and comparison information, the input information records multiple input symbols, the comparison information records at least one comparison symbol, and the first pattern to be tested also carries a LOOPMATCH instruction, and the LOOPMATCH instruction records the number of matching rows and the maximum number of loops;

[0048] S12, when executing the first pattern to be tested, determining a loop pattern sequence based on the number of matching rows, wherein the loop pattern sequence includes multiple rows of target patterns, the first pattern to be tested is the first row of the target pattern, and the remaining multiple rows of the target pattern are multiple consecutive rows of the second pattern to be tested located after the first pattern to be tested;

[0049] S13, the first board executes a LOOPMATCH loop based on the loop pattern sequence. In each LOOPMATCH loop, the first board obtains corresponding response output information based on the input information of each row of the target pattern, and compares the response output information and the comparison information of the same row of the target pattern to obtain a pattern matching result, wherein the response output information includes a multi-bit output symbol, and the number of bits of the output symbol is the same as the number of bits of the comparison symbol;

[0050] S14, in each LOOPMATCH cycle, when the pattern matching result of at least one row of the target pattern indicates that the match fails, the next LOOPMATCH cycle is executed through the first board;

[0051] S15, when it is detected in one LOOPMATCH cycle that all the pattern matching results indicate that the matching is passed, the first board determines the test result of the loop pattern sequence as a test pass and exits the LOOPMATCH cycle.

[0052] Before starting the test, you can write a pattern sequence file according to the correct circuit behavior of DataSheet, and use the matching FastDragon host computer software to compile the pattern sequence file that uses the multi-line synchronous multiple level matching function. After the compilation is successful, use the host computer software to download it to the memory of the ATE device, and use the function instruction to perform the pattern execution stimulus. Writing the pattern to the ATE device is a technology well known to those skilled in the art, so it will not be elaborated here.

[0053] It should be noted that the pattern sequence to be tested in this embodiment includes a first pattern to be tested and a second pattern to be tested. Figure 2 As shown, the first pattern to be tested and the second pattern to be tested both include input information 10 and comparison information 20, the input information 10 includes multiple input symbols, the input symbol can be "0" or "1", the comparison information 20 includes at least one comparison symbol, the comparison symbol can be "H" representing a high level or "L" representing a low level, etc. The input symbol and the comparison symbol can be selected according to the symbols supported by the Pattern, and this embodiment does not limit the specific symbols.

[0054] It should be noted that if Figure 2 As shown, the number of input symbols of the input information 10 of each row of Pattern can be the same or different, and the number of comparison symbols of the comparison information is determined according to the difference between the length of Pattern and the input information 10, for example Figure 2 The input information 10 of all the patterns shown includes a 4-bit input symbol, and the comparison information includes a 3-bit comparison symbol. For example, when the input symbol is 7 bits, there may be no comparison symbol. This embodiment does not limit the number of symbols in each row of the pattern, and it can be selected according to actual needs.

[0055] It should be noted that the ATE device and the first board usually include multiple board channels, so the ATE device can be connected to multiple first boards, each chip channel of the first board is connected to a target chip, and when testing, one target chip runs a row of the first pattern to be tested or the second pattern to be tested, thereby achieving parallel operation. The principle of chip running pattern is a technology well known to those skilled in the art, and will not be elaborated here.

[0056] It should be noted that, in this embodiment, a LOOPMATCH instruction is added to the first pattern to be tested. The LOOPMATCH instruction includes the number of matching rows and the maximum number of loops, such as Figure 2As shown, the LOOPMATCH instruction 30 is "LOOPMATCH8 1000", the number of matching rows is 8, and the maximum number of loops is 1000. After running to the first pattern to be tested, 7 second patterns to be tested are obtained from the subsequent ones as target patterns to jointly construct a loop pattern sequence, and the above 8 target patterns are run in parallel to realize multi-row synchronous multiple level excitation and matching.

[0057] It should be noted that the target chip may have different outputs when the same input is given multiple times. For example, Figure 2 After 1010 shown in the figure, the output of the target chip may be "HHH", "HLH" or "LLH", etc. Figure 2 In the cyclic pattern sequence shown, the first pattern to be tested, "1010", is input to the target chip 1, and the subsequent 7 second patterns to be tested, "1010", are input to the target chip 2 to the target chip 8, respectively. It is necessary to ensure that the response output information of the target chip obtained by the 8 rows of patterns corresponds to the level recorded in the comparison information 20. In the most ideal state, after the first input of "1010", the response output information of each target chip can be obtained in sequence as "HHH", "LLL", "HHH", "LLL", "HHH", "LLL", "HHH" and "LLL". If the response output information is the same as the comparison information, the pattern matching result of the corresponding target pattern is determined to be PASS, otherwise it is FAI L.

[0058] It should be noted that, when the pattern matching result of one or more target patterns is FAI L in a LOOPMATCH cycle, it does not belong to multiple level excitation matching successes. Through the LOOPMATCH instruction of this embodiment, the next LOOPMATCH cycle can be continued with the above 8 patterns, and "1010" is input to each target chip again to determine whether the response output information of the target chip obtained next time meets the comparison information. If the pattern matching results of the target pattern are all PASS in one cycle, the cycle is jumped out, and the test result of the cyclic pattern sequence test is determined to be PASS. It is not necessary to execute 1000 times fixedly, but it can jump out of the LOOPMATCH cycle at any time in a non-fixed time, saving test resources and improving test efficiency.

[0059] In addition, in one embodiment, step S13 specifically includes but is not limited to the following steps:

[0060] Allocate a target memory block in the board memory; write the number of matching rows, the maximum number of loops, and the input information of each row of the target Pattern into the target memory block; execute the LOOPMATCH loop based on the content recorded in the target memory block.

[0061] It should be noted that after entering the LOOPMATCH logic, the number of matching rows that need to be LOOPed, the maximum number of loops and the target Pattern of each row are entered into the target memory block in the memory of the first board according to the content recorded in the LOOPMATCH instruction, and the LOOPMATCH loop is executed according to the content recorded in the target memory block, which can improve the reading and writing efficiency.

[0062] Exemplarily, the target memory block is allocated in the card memory of the first card, such as Figure 2 As shown, the number of matching rows is 8, the maximum number of loops is 1000, and the input information is "1010". The above content is written into the target memory block to execute subsequent loops. The content in the memory block is executed according to the maximum upper limit of 1000 times, and the PASS or FAI L of each LOOP is independently judged until all PASS are matched once and the loop is jumped out.

[0063] In addition, in one embodiment, after step S14, the method further includes but is not limited to the following steps:

[0064] When the number of LOOPMATCH cycles reaches the maximum number of cycles, the first board determines the test result of the loop Pattern sequence as a test failure and exits the LOOPMATCH cycle.

[0065] It should be noted that this embodiment sets a maximum number of loops in the LOOPMATCH instruction. When the pattern matching result of at least one target pattern is FAIL, the next loop is executed, and the number of loops is recorded plus one. When the cumulative number of loops reaches the maximum number of loops, the test result of the loop Pattern sequence is determined to be a test failure (FAIL). Multiple tests cannot satisfy the multi-level matching, and the LOOPMATCH loop is exited and relevant error prompts are executed.

[0066] For example, Figure 2 As shown, the maximum number of loops is indicated by the LOOPMATCH instruction as 1000. If the target Pattern cannot be matched once within 1000 loops and all PASSes are met, the loop is exited and the test FAI L is determined.

[0067] In addition, in one embodiment, after step S31 or step S15, the method further includes but is not limited to the following steps:

[0068] Continue to execute the pattern test of the pattern sequence to be tested; when executing the new first pattern to be tested, construct a new loop pattern sequence based on the number of matching rows carried by the new first pattern to be tested; execute the LOOPMATCH loop based on the new loop pattern sequence to determine the test result of the loop pattern sequence.

[0069] It should be noted that the pattern sequence to be tested written by the ATE test equipment does not only include Figure 2 The loop pattern sequence shown in the embodiment has multiple rows of second patterns to be tested and at least one row of first patterns to be tested. When the executed pattern is the second pattern to be tested, the test can be performed according to the relevant technology. When the next row of patterns to be executed is the first pattern to be tested, when the LOOPMATCH instruction is detected, the subsequent multiple rows of second patterns to be tested are selected to construct the loop pattern sequence. After completing the test of the loop pattern sequence, the next pattern is executed. If the next pattern is the second pattern to be tested, the conventional test operation is performed. If the next pattern is a new first pattern to be tested, a new loop pattern sequence is constructed according to the scheme of the above embodiment and the LOOPMATCH loop test is performed. The loop pattern sequence is automatically constructed by detecting the LOOPMATCH instruction to perform multi-row synchronous multi-level matching of non-fixed time.

[0070] In addition, in one embodiment, step S13 specifically includes but is not limited to the following steps:

[0071] When the ATE device is configured in cross-board mode, the pattern sequence to be tested is written into the first board and the second board; the input information of the target pattern is executed through the first board, and the response output information corresponding to the target pattern is obtained through the second board; and the pattern matching result is determined by the second board based on the experience comparison information of the response output information.

[0072] It should be noted that ATE test equipment usually includes multiple channels. For example, some ATE test equipment includes 512 channels, and the board includes 64 channels. Therefore, the board can be installed with 64 target chips, and the ATE test equipment can be connected to 8 boards.

[0073] It should be noted that the above embodiment describes a technical solution for executing a LOOPMATCH loop in a first board. This embodiment introduces a second board on the basis of the first board, writes the Pattern sequence to be tested into the first board and the second board, executes the input information of the target Pattern through the target chip of the first board, obtains the response output information from the target chip of the second board, and compares it with the comparison information to determine the Pattern matching result, thereby realizing cross-board testing.

[0074] In addition, in one embodiment, step S15 specifically includes but is not limited to the following steps:

[0075] When the second board determines that all pattern matching results indicate a pass, it sends an exit loop signal to the first board; the first board determines the test result of the cyclic pattern sequence as a pass, exits the LOOPMATCH loop, and sends an exit confirmation signal to the second board.

[0076] It should be noted that, in this embodiment, the first board is used as the master control board. When the second board reports the pattern matching result to the first board for master control, when the pattern matching results all indicate a successful match, if it is a single-board loop, the LOOPMATCH loop can be directly exited according to the description of the above embodiment. In the cross-board test scenario, the second board sends an exit loop signal to the first board. After receiving the exit loop signal, the first board determines that it can jump out of the loop. Since the input information is applied in the first board, it is necessary to determine the test result of the cyclic Pattern sequence in the first board as a successful test before exiting the LOOPMATCH loop, and then send an exit confirmation signal to the second board, so that the second board jumps out of the LOOPMATCH loop and continues the subsequent Pattern test.

[0077] In addition, in one embodiment, after step S54, the method further includes but is not limited to the following steps:

[0078] Continue to execute the LOOPMATCH loop through the second board; when new response output information is obtained, the new Pattern matching result is not determined; when an exit confirmation signal is obtained, exit the LOOPMATCH loop.

[0079] It should be noted that, according to the description of the above embodiment, after the second board sends the exit loop signal, the second board actually does not exit the loop, and continues to execute the LOOPMATCH loop on the second board. In order to avoid affecting the test results, the second board does not match the new response output information, that is, only executes the LOOPMATCH loop to achieve a standby effect, and does not output the Pattern matching result to affect the test that has passed. The LOOPMATCH loop is exited after the exit confirmation signal is obtained.

[0080] The following combination Figure 3 The steps shown in the figure are used to fully describe the technical solution of this embodiment. Figure 3 As shown, the pattern multi-line matching method of the ATE device includes but is not limited to the following steps:

[0081] S31, enter the LOOPMATCH loop, record the number of rows, times and content required for LOOP;

[0082] S32, independently determining the pattern matching result of each row of the target pattern in each cycle;

[0083] S33, after one cycle is completed, determine whether all Pattern results are PASS, if so, execute step S34, otherwise continue to the next cycle;

[0084] S34, if it is cross-board mode, execute step S38, otherwise execute step S35;

[0085] S35, sending an exit PASS signal to the master control board;

[0086] S36, waiting for the master control board to send out an exit signal, and the cycle continues during the waiting period, but the PASS / FAIL judgment is not executed;

[0087] S37, receiving the exit signal from the master control board, and waiting until the current cycle ends;

[0088] S38, exit LOOPMATCH and enter the next line Pattern.

[0089] like Figure 4 As shown, Figure 4 1 is a structural diagram of a pattern multi-row matching device of an ATE device provided by an embodiment of the present invention. The present invention also provides a pattern multi-row matching device of an ATE device, comprising:

[0090] The processor 401 may be implemented by a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application;

[0091] The memory 402 can be implemented in the form of a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 402 can store an operating system and other application programs. When the technical solution provided in the embodiment of this specification is implemented by software or firmware, the relevant program code is stored in the memory 402, and the processor 401 calls and executes the pattern multi-row matching method of the ATE device of the embodiment of this application;

[0092] Input / output interface 403, used to implement information input and output;

[0093] Communication interface 404, used to realize communication interaction between the device and other devices, which can be realized through wired mode (such as USB, network cable, etc.) or wireless mode (such as mobile network, WI FI, Bluetooth, etc.);

[0094] Bus 405 , which transmits information between various components of the device (e.g., processor 401 , memory 402 , input / output interface 403 , and communication interface 404 );

[0095] The processor 401 , the memory 402 , the input / output interface 403 and the communication interface 404 are connected to each other in communication within the device via the bus 405 .

[0096] An embodiment of the present application also provides an electronic device, including the pattern multi-row matching device of the ATE device as described above.

[0097] An embodiment of the present application also provides a storage medium, which is a computer-readable storage medium and stores a computer program. When the computer program is executed by a processor, the pattern multi-row matching method of the above-mentioned ATE device is implemented.

[0098] As a non-transient computer-readable storage medium, the memory can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and are implemented to be located in one place, or may also be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0099] It will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed method above may be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0100] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions under the shared conditions without violating the spirit of the present invention. These equivalent deformations or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A pattern multi-line matching method for ATE equipment, characterized in that: Applied to a test system, the test system includes an ATE device and a first board, the ATE device is communicatively connected with the first board, and the method includes: Writing the pattern sequence to be tested into the first board through the ATE device, and sending a test instruction to the first board to start a pattern test, wherein the pattern sequence to be tested includes at least one row of the first pattern to be tested and multiple rows of the second pattern to be tested, the first pattern to be tested and the second pattern to be tested both include input information and comparison information, the input information records multiple input symbols, the comparison information records at least one comparison symbol, and the first pattern to be tested also carries a LOOPMATCH instruction, and the LOOPMATCH instruction records the number of matching rows and the maximum number of loops; When the first pattern to be tested is executed, a loop pattern sequence is determined based on the number of matching rows, wherein the loop pattern sequence includes multiple rows of target patterns, the first pattern to be tested is the first row of the target pattern, and the remaining multiple rows of the target pattern are multiple consecutive rows of the second pattern to be tested that are located after the first pattern to be tested; The first board executes a LOOPMATCH loop based on the loop pattern sequence. In each LOOPMATCH loop, the first board obtains corresponding response output information based on the input information of each row of the target pattern, and compares the response output information and the comparison information of the target pattern in the same row to obtain a pattern matching result, wherein the response output information includes a multi-bit output symbol, and the number of bits of the output symbol is the same as the number of bits of the comparison symbol; In each LOOPMATCH cycle, when the pattern matching result of at least one row of the target pattern indicates that the match fails, the next LOOPMATCH cycle is executed by the first board; When it is detected in one LOOPMATCH cycle that all the Pattern matching results indicate that the matching is passed, the first board determines the test result of the cyclic Pattern sequence as a test pass and exits the LOOPMATCH cycle.

2. The pattern multi-row matching method of ATE equipment according to claim 1, characterized in that: The first board executes a LOOPMATCH loop based on the loop Pattern sequence, including: Allocate the target memory block in the board memory; Write the number of matching rows, the maximum number of loops, and the input information of each row of the target Pattern into the target memory block; The LOOPMATCH loop is executed based on the content recorded in the target memory block.

3. The pattern multi-row matching method of ATE equipment according to claim 1, characterized in that: After the first board executes the next LOOPMATCH cycle, the method further includes: When the number of LOOPMATCH cycles reaches the maximum number of cycles, the first board determines the test result of the loop Pattern sequence as a test failure and exits the LOOPMATCH cycle.

4. The pattern multi-row matching method of ATE equipment according to claim 3, characterized in that: After the first board determines the test result of the loop Pattern sequence as a test pass and exits the LOOPMATCH loop, or after the first board determines the test result of the loop Pattern sequence as a test fail and exits the LOOPMATCH loop, the method further includes: Continue to perform pattern testing of the Pattern sequence to be tested; When a new first pattern to be tested is executed, a new cyclic pattern sequence is constructed based on the number of matching rows carried by the new first pattern to be tested; The LOOPMATCH loop is executed based on the new loop Pattern sequence to determine a test result of the loop Pattern sequence.

5. The pattern multi-row matching method of ATE equipment according to any one of claims 1 to 4, characterized in that: The test system further includes a second board, the ATE device and the first board are respectively connected to the second board in communication, the first board obtains corresponding response output information based on the input information of each row of the target pattern, and obtains a pattern matching result based on the comparison of the response output information and the comparison information of the target pattern in the same row, including: When the ATE device is configured in a cross-board mode, writing the pattern sequence to be tested into the first board and the second board; Execute the input information of the target pattern through the first board card, and obtain the response output information corresponding to the target pattern through the second board card; The second board determines the pattern matching result by experiencing the comparison information based on the response output information.

6. The pattern multi-row matching method of ATE equipment according to claim 5, characterized in that: The first board determines the test result of the loop Pattern sequence as a test pass and exits the LOOPMATCH loop, including: When the second board determines that all the pattern matching results indicate a successful match, sending an exit loop signal to the first board; The first board determines the test result of the loop Pattern sequence as a test pass, exits the LOOPMATCH loop, and sends an exit confirmation signal to the second board.

7. The pattern multi-row matching method of ATE equipment according to claim 6, characterized in that: After sending the exit loop signal to the first board, the method further includes: Continue to execute the LOOPMATCH loop by the second board; When the new response output information is obtained, the new pattern matching result is not determined; When the exit confirmation signal is obtained, the LOOPMATCH loop is exited.

8. A pattern multi-row matching device for ATE equipment, characterized in that: It includes at least one control processor and a memory for communicating with the at least one control processor; the memory stores instructions that can be executed by the at least one control processor, and the instructions are executed by the at least one control processor so that the at least one control processor can execute the pattern multi-row matching method of the ATE device as described in any one of claims 1 to 7.

9. A testing system, characterized in that: The invention comprises the pattern multi-row matching device of the ATE equipment as claimed in claim 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the pattern multi-row matching method of the ATE device according to any one of claims 1 to 7.

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