Reconfigurable direct radio frequency modulation transmitter architecture applied to multiple modulation modes

Abstract

The invention discloses a reconfigurable direct radio frequency modulation transmitter architecture applied to multiple modulation modes, which comprises an L modulation link and an H modulation link, and each link is subjected to phase modulation and amplitude modulation by an I path and a Q path respectively. Through the arrangement of a reconfigurable switch, when only an L link participates in work, QPSK, STAR-QAM, 8PSK and 16-QAM modulation schemes are generated; and when the L link and the H link both participate in work, a 16-QAM (Quadrature Amplitude Modulation), 64-QAM and 256-QAM higher-order modulation scheme is generated. A reconfigurable three-path Doherty power amplifier output inverter network structure is provided, and when a modulation link generates a low-order modulation scheme, the output is a two-path series Doherty power amplifier structure; and when the modulation link generates a high-order modulation scheme, the output is a three-path series-parallel Doherty power amplifier structure. The overall efficiency of the transmitter is improved while the loss and the power consumption are reduced.

Description

Technical Field

[0001] The present invention relates to a reconfigurable direct radio frequency modulation transmitter architecture applied to millimeter wave / sub-THz frequency bands to generate multiple modulation modes, belonging to the technical field of direct radio frequency modulation. Background Art

[0002] A key link in wireless communication is data modulation. The modulated signal is amplified and filtered before being transmitted through various antennas. The receiving station performs low-noise amplification on the received signal and can restore it to the original data after demodulation, thus achieving long-distance transmission of information. Nowadays, with the exponential increase in the number of wireless terminal devices and the popularization of Internet of Things technology, society urgently needs point-to-point wireless connections with higher transmission rates to cope with massive data throughput. The different technologies reported so far to increase data rates can be divided into two categories: (1) increasing instantaneous bandwidth; (2) increasing the modulation order. The increase in bandwidth usually requires working at a higher millimeter wave or even terahertz center frequency. However, when the operating frequency approaches the fmax (cutoff frequency) of the active device, the performance of the device will drop sharply. For wireless communication system modulation, BPSK (binary phase shift keying) and OOK (on-off keying) modulation will lead to lower spectrum utilization efficiency of the transmitter. Higher transmission rates require the use of wider spectrum resources or higher modulation orders. Therefore, operating at high frequencies less than about fmax / 2 of the active devices while employing high-order modulation with high spectral efficiency is a more feasible way to realize high-speed wireless transceivers in a practical and efficient manner in low-cost silicon-based processes.

[0003] In traditional communication system devices, data modulation generally adopts the technology of first modulation and then frequency conversion, such as Figure 1 (a) is shown. A high intermediate frequency signal can be up-converted by a single LO (local oscillator), at the cost of implementing a high-speed and high-precision DAC (digital-to-analog converter). Complex calibration schemes and low parasitic requirements force most DACs to be designed using advanced CMOS processes with a sampling rate of at least twice the intermediate frequency center frequency, resulting in severe EVM degradation and limited data rates even with digital pre-distortion. For example, the use of 16-QAM (quadrature amplitude modulation) and above complex modulations usually requires a high-speed DAC with 8-bit or higher resolution, which usually needs to be completed in a separate chip, making the entire approach very expensive for a fully integrated system. Since the data modulation method of the transmitter of the traditional communication system is easily interfered and has a limited data rate, the demand for high-speed and high-resolution DAC constitutes a key bottleneck and cannot meet the needs of modern wireless communication systems with large data volumes and high transmission rates. Therefore, a direct RF modulation transmitter system device was proposed, such as Figure 1(b) is shown. It is a direct frequency conversion technology based on orthogonal modulation. By adjusting the phase shift between the I and Q input signals, the baseband signal is directly modulated to the carrier frequency band, and then transmitted to the output end through the antenna after filtering and amplification. The direct RF modulation method combines the two functions of digital baseband symbol generation and frequency up-conversion, eliminating the high power consumption and large area on-chip multi-bit DAC digital circuit part. The direct RF modulation method only uses a 1-bit D / A interface to convert the original data bit into a modulated RF signal, which can realize a high data rate QPSK (quadrature phase shift keying) modulation system. Compared with the traditional microwave transmitter structure, the direct RF modulation transmitter structure has the following advantages:

[0004] (1) Simple structure, small size, low cost, and high reliability. Traditional microwave transmitters have relatively more components, which increases the complexity, size, and cost of the equipment, and also reduces the reliability of the system.

[0005] (2) Higher data transmission rate: The modulation of high-speed digital baseband signals requires a high carrier frequency and a wide bandwidth, and direct RF modulation technology can meet this requirement.

[0006] (3) The nonlinear characteristics of the mixer will degrade the spectrum quality of the modulated signal, but direct RF modulation technology can avoid this problem and alleviate the strict linearity requirements of the front-end power amplifier (PA).

[0007] As the carrier frequencies of millimeter wave and terahertz spectrum can obtain higher bandwidth, the demand for higher data rate communication links is growing. When the required data rate approaches 10Gb / s or even higher, simple modulation methods can no longer meet the requirements, and higher-order modulation schemes with higher spectrum efficiency must be considered. High-order modulation in the direct RF domain eliminates the need for high-resolution, high-speed, and large dynamic range mixed signal parts of the transceiver link at data rates exceeding 10Gb / s. The literature [Analysis and Design of High-Order QAM Direct-Modulation Transmitter for High-Speed ​​Point-to-Point mm-Wave Wireless Links] proposes that by adding M-channel fixed amplitude ratio QPSK signals, 4 M -QAM high-order modulation signal. However, when the link budget changes during the operation of the link, that is, when the link signal-to-noise ratio is high, high-order modulation is required; when the signal strength is detected to be lower than a certain threshold and the signal-to-noise ratio is not sufficient to support high-order modulation, low-order modulation is required. This results in the communication link system being unable to adaptively meet the needs of high and low-order modulation according to the signal strength, and lacking certain reconfigurable characteristics. Summary of the invention

[0008] The present invention is to solve the application needs of future wireless communication direct radio frequency modulation technology in millimeter wave / sub-terahertz frequency bands for different data rate communication links, and at the same time has the characteristics of low cost, low power consumption, small size, high reliability, etc., and proposes a direct radio frequency modulation transmitter architecture with reconfigurable characteristics. According to different data rate requirements, the transmitter architecture can realize six different modulation modes of QPSK, STAR-QAM (star quadrature amplitude modulation), 8PSK (8 phase shift keying), 16-QAM (quadrature amplitude modulation), 64-QAM (64 quadrature amplitude modulation) and 256-QAM (64 quadrature amplitude modulation) through reconfigurable transformation. In order to achieve low power consumption and high efficiency performance of the transmitter architecture, a reconfigurable three-way Doherty power amplifier (DPA) is used as the last stage of the output end. When the modulation mode is QPSK, STAR-QAM, 8PSK and 16-QAM, through reconfigurable transformation, only the L modulation link in the transmitter architecture participates in the work, and the H modulation link does not work. At the same time, the reconfigurable three-way DPA (Doherty power amplifier) ​​can be switched to work as a two-way series DPA, which will further reduce the additional power consumption of the transmitter system in low-order modulation methods.

[0009] The present invention discloses a reconfigurable direct radio frequency modulation transmitter architecture applied to multiple modulation modes. The transmitter architecture is divided into two upper and lower low-order L and high-order H direct modulation paths. Each path includes an externally fed local oscillator RF signal, a balanced-unbalanced converter Balun, a differential frequency multiplier, a buffer Buffer, a differential I / Q quadrature coupler QCG1, I / Q quadrature couplers QCG2 and QCG3, single-pole double-throw switches SPDT1, SPDT2, SPDT3, SPDT4, SPDT5 and SPDT6, 0° and 45° phase shifters, binary phase shift keying modulators BPSK1, BPSK2, BPSK3 and BPSK4, amplitude modulators AM1, AM2, AM3 and AM4, binary PRBS sequence baseband signals B1-B9, adders ADD1, ADD2 and ADD3, and a reconfigurable three-way Doherty power amplifier.

[0010] The local oscillator RF signal is connected to the input of the Balun, the output of the Balun is connected to the differential frequency multiplier, the output of the differential frequency multiplier is connected to the input of the buffer Buffer, the output of the buffer Buffer is connected to the input end of the differential I / Q orthogonal coupler QCG1, and the differential orthogonal signals I+, Q+, I-, Q- generated at the output end of the differential I / Q orthogonal coupler QCG1 are respectively connected to the inputs of the single-pole double-throw switches SPDT1 and SPDT3 and the local oscillator input ends of the binary phase shift keying modulators BPSK3 and BPSK4; the outputs of the single-pole double-throw switches SPDT1 and SPDT3 are respectively connected to the input ends of the 0° and 45° phase shifters, and the output ends of the 0° and 45° phase shifters are respectively connected The local oscillator input end of the binary phase shift keying modulator BPSK1 and BPSK2; the input end of the single-pole double-throw switch SPDT2 is connected to the binary PRBS sequence baseband signal B1, and the two output ends of the single-pole double-throw switch SPDT2 are respectively connected to the input ends of the single-pole double-throw switches SPDT1 and SPDT3 and ground; the RF inputs of the binary phase shift keying modulators BPSK1, BPSK2, BPSK3, and BPSK4 are respectively connected to the binary PRBS sequence baseband signals B2, B3, B4, and B5; the output signals of the binary phase shift keying modulators BPSK1, BPSK2, BPSK3, and BPSK4 are respectively connected to the amplitude modulators AM1, AM2, AM 3, the input end of AM4, the control ends of the amplitude modulators AM1, AM2, AM3, AM4 are respectively connected to the binary PRBS sequence baseband signals B6, B7, B8, B9; the outputs of the amplitude modulators AM1, AM2, AM3, AM4 are respectively connected to the input end of the buffer Buffer, the output of the buffer Buffer is connected to the input of the adders ADD1 and ADD3, the outputs of the adders ADD1 and ADD3 are respectively connected to the input ends of the single-pole double-throw switches SPDT4 and SPDT5, the two output ends of the single-pole double-throw switch SPDT4 are respectively connected to one input end of the adder ADD2 and the input of the I / Q orthogonal coupler QCG2; The two output ends of the single-pole double-throw switch SPDT5 are respectively connected to the other input end of the adder ADD2 and the ground; the output of the adder ADD2 is connected to the input end of the I / Q quadrature coupler QCG2, and the output end of the I / Q quadrature coupler QCG2 is respectively connected to the input of the I / Q quadrature coupler QCG3 and one of the input ends of the reconfigurable three-way Doherty power amplifier; the two outputs of the I / Q quadrature coupler QCG3 are respectively connected to the other two input ends of the reconfigurable three-way Doherty power amplifier, and the output end of the reconfigurable three-way Doherty power amplifier is connected to the antenna end; the reconfigurable three-way Doherty power amplifier is connected to the main power amplifier PA M, Auxiliary power amplifier PA A1 , Auxiliary power amplifier PA A2 , transformer inverter network TR1, transformer inverter network TR2, transformer inverter network TR3, inductor L and single-pole double-throw switch SPDT6; wherein the main power amplifier PA M The output of the transformer inverter network TR1 is connected to the input of the transformer inverter network TR1, and one end of the output of the transformer inverter network TR1 is connected to the input end of the single-pole double-throw switch SPDT6; the other end of the transformer inverter network TR1 is connected in series with the inductor L and one output end of the transformer inverter network TR2, and the other output end of the transformer inverter network TR2 is grounded; the auxiliary power amplifier PA A1 The output of the auxiliary power amplifier PA is connected to the input of the transformer inverter network TR2; A2 The output of is connected to the input of the transformer inverter network TR3, one output end of the transformer inverter network TR3 is grounded, and the other output end of the transformer inverter network TR3 is connected to the two output ends of the single-pole double-throw switch SPDT6 and is grounded through a load resistor;

[0011] Through the reconfigurable setting of the single-pole double-throw switch SPDT1-6, when only the L modulation link is involved in the work of the direct RF modulation transmitter architecture, four different modulation modes of QPSK, STAR-QAM, 8PSK and 16-QAM are generated; when both the L and H modulation links are involved in the work of the direct RF modulation transmitter architecture, three different modulation modes of 16-QAM, 64-QAM and 256-QAM are generated.

[0012] Furthermore, the direct RF modulation transmitter architecture realizes 6 high- and low-order modulation modes in one, meeting the application requirements of the communication link for high and low-order modulation modes with different signal strengths, and making up for the lack of reconfigurable modulation mode of the transmitter architecture. The device generates modulation modes with greater flexibility. When transmitting high data rates, 16-QAM, 64-QAM and 256-QAM high-order modulation can be used; when transmitting low data rates and the signal-to-noise ratio is not sufficient to support high-order modulation, QPSK, STAR-QAM, and 8PSK low-order modulation modes can be used.

[0013] Furthermore, the power amplifier in the transmitter architecture is implemented using a reconfigurable three-way Doherty structure; when the modulation mode generated by the transmitter architecture is QPSK, STAR-QAM, 8PSK and 16-QAM, through the reconfigurable setting of the single-pole double-throw switch SPDT6, the reconfigurable three-way Doherty power amplifier is a two-way series DPA structure, and its back-off efficiency and data rate can meet the requirements of 16-QAM and below modulation modes, effectively improving the power consumption performance of the overall transmitter; when the modulation mode generated by the transmitter architecture is 16-QAM, 64-QAM and 256-QAM, the requirements for data rate and back-off efficiency are higher, and the reconfigurable three-way Doherty power amplifier is a three-way series-parallel (two channels are connected in series and then in parallel with the third channel) DPA structure, which meets the communication requirements of complex high-order modulation.

[0014] Furthermore, the passive part of the transmitter architecture is compact and low-loss, wherein the differential quadrature coupler QCG1 is implemented by stacking four thick metal layers and occupies only the area of ​​a conventional inductor; in the reconfigurable three-way Doherty power amplifier output inverter network, the main power amplifier PA M and auxiliary power amplifier PA A1 The λ / 4 impedance inverter connected in series between the two is realized by a two-stage T-type low-pass filter network (LCLCL) structure, in which the λ / 4 impedance inverter plays a phase balancing role; the auxiliary power amplifier PA A2 The λ / 4 impedance inverter in parallel at the output part is implemented by a Π-type low-pass filter network (CLC) structure, wherein the λ / 4 impedance inverter plays an impedance transformation role; the two-stage T-type low-pass filter network and the Π-type low-pass filter network are converted into three actual transformer models with coupling coefficients and a series wiring inductance model, which greatly reduces the chip area occupied by the passive devices of the transmitter architecture.

[0015] Furthermore, the low-order L and high-order H direct modulation paths in the transmitter architecture are implemented using a Cartesian structure with independent phase modulation and amplitude modulation, and both use the binary PRBS sequence baseband signals B2-B9 to achieve phase control and amplitude control; the Cartesian structure helps to improve the accuracy and efficiency of modulation, has higher flexibility, reduces complex interactions and possible interference problems between modulation devices, and can further improve communication quality and system reliability.

[0016] Furthermore, the direct RF modulation transmitter architecture has a high degree of design freedom. By increasing or decreasing the low-order L and high-order H direct modulation paths, the modulation order generated by the transmitter architecture can be further increased or decreased. The phase modulation circuit structure in the Cartesian structure is not limited to the binary phase shift keying circuit, but only the baseband control circuit that satisfies the 0° and 180° phase states can be used. The demand-based design of the frequency multiplier module (designing the frequency multiplier to double, triple or quadruple the frequency) can realize the application of the transmitter architecture in the millimeter wave and sub-terahertz frequency bands.

[0017] The advantages of the present invention compared with the prior art are:

[0018] (1) The present invention designs a reconfigurable direct RF modulation transmitter architecture for multiple modulation modes. The transmitter architecture is reconfigurable according to different requirements for data rate, and realizes six high- and low-order modulation modes, namely QPSK, STAR-QAM, 8PSK, 16-QAM, 64-QAM and 256-QAM, in one, meeting the application requirements of communication links for high- and low-order modulation modes with different signal strengths, and making up for the lack of reconfigurable characteristics of the transmitter architecture modulation mode. The device generates modulation modes with greater flexibility, that is, when the link signal-to-noise ratio is high, high-order modulation such as 256-QAM, 64-QAM and 16-QAM can be used; when the signal strength is detected to be lower than a certain threshold and the signal-to-noise ratio is insufficient to support high-order modulation, QPSK, STAR-QAM, and 8PSK modulation modes can be used.

[0019] (2) The present invention designs a reconfigurable direct RF modulation transmitter architecture for multiple modulation modes. The modulation link part adopts a Cartesian structure for independent phase modulation and amplitude modulation, which helps to improve the modulation accuracy and efficiency. It has higher flexibility, reduces the complexity of the design, and reduces the complex interactions and possible interference problems between the modulation components. The Cartesian structure with independent amplitude modulation and phase modulation can further improve the communication quality and system reliability.

[0020] (3) The present invention designs a reconfigurable direct RF modulation transmitter architecture for multiple modulation modes. The power amplifier is implemented with a reconfigurable three-way Doherty structure. When the modulation mode of the transmitter is QPSK, STAR-QAM, 8PSK and 16-QAM, through the reconfigurable setting, only the L path modulation link of the transmitter is involved in the work, and the PA part is a two-way series DPA structure. Its back-off efficiency and data rate can meet the requirements of 16-QAM and below modulation modes, effectively improving the power consumption performance of the overall transmitter. When the modulation mode of the transmitter is 16-QAM, 64-QAM and 256-QAM, the requirements for data rate and back-off efficiency are higher. At this time, the L and H path modulation links of the transmitter are both involved in the work. The power amplifier is a three-way series-parallel DPA structure to meet the communication requirements of complex high-order modulation.

[0021] (4) The present invention designs a reconfigurable direct RF modulation transmitter architecture for multiple modulation modes. The passive part of the transmitter architecture has the characteristics of compactness and low loss. The differential orthogonal coupler QCG1 is implemented by thick metal stacking and only occupies the area of ​​a conventional inductor. The λ / 4 impedance inverter of the reconfigurable three-way Doherty output inverter network adopts a two-stage T-type low-pass filter network (LCLCL) and a π-type low-pass filter network (CLC) circuit structure, combined with the output matching network of each power amplifier, to form three actual transformer models with coupling coefficients and a series inductor model, which greatly reduces the chip area occupied by passive devices.

[0022] (5) The present invention designs a reconfigurable high-speed wireless transmission direct RF modulation transmitter architecture for multi-order modulation, and the transmitter architecture has a high degree of design freedom. By increasing or decreasing the direct RF modulation link (H, L), the modulation order generated by the transmitter architecture can be further increased or decreased. The phase modulation circuit structure in the Cartesian structure is not limited to the binary phase shift keying circuit, but only the baseband control circuit that satisfies the 0° and 180° phase states. As well as the demand-based design of the frequency multiplier module (designing the frequency multiplier to double, triple or quadruple the frequency), the transmitter architecture can be applied in the millimeter wave and sub-terahertz frequency bands. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 (a) Schematic diagram of transmitter architecture of traditional modulation method;

[0024] Figure 1 (b) Schematic diagram of transmitter architecture of direct RF modulation method;

[0025] Figure 2A schematic diagram of a reconfigurable direct radio frequency modulation transmitter architecture for use in a variety of modulation modes according to the present invention;

[0026] Figure 3 Schematic diagram of combining two QPSK constellations with a symbol spacing ratio of 2 into a 16-QAM constellation;

[0027] Figure 4 Constellation diagrams of various modulation modes obtained using system simulation software for the direct radio frequency modulation transmitter architecture of the present invention;

[0028] Figure 5 Schematic diagram of the differential orthogonal coupler equivalent circuit model and three-dimensional electromagnetic simulation layout model (based on 40-nm CMOS process);

[0029] Figure 6 Schematic diagram of the design scheme for the output inverter network of a reconfigurable three-way Doherty power amplifier; DETAILED DESCRIPTION

[0030] The scheme of the present invention will be described below in conjunction with the accompanying drawings and specific implementation methods in the embodiments of the present invention.

[0031] The schematic diagram of the architecture of a reconfigurable direct RF modulation transmitter designed by the present invention for use in multiple modulation modes is shown in FIG. Figure 2 As shown. The transmitter system device is divided into two upper and lower low-order (L) and high-order (H) direct modulation paths, each of which contains two upper and lower orthogonal paths (I+ path, Q+ path, I- path and Q- path). The main components include externally fed local oscillator input RF signal, balanced unbalanced converter (Balun) module, differential frequency multiplier module, buffer module, differential I / Q orthogonal coupler QCG1, I / Q orthogonal couplers QCG2, QCG3, single-pole double-throw switches SPDT1, SPDT2, SPDT3, SPDT4, SPDT5, SPDT6, I / Q path 0° phase shifter module and 45° phase shifter module, binary phase shift keying modulators BPSK1, BPSK2, BPSK3, BPSK4, amplitude modulators AM1, AM2, AM3, AM4, binary PRBS sequence baseband signals B1-B9, adders ADD1, ADD2, ADD3 and reconfigurable three-way Doherty power amplifier module. By properly controlling the single-pole double-throw switch SPDT module and the amplitude modulator AM modules, the generation of modulation modes from low-order QPSK modulation, Star-QAM modulation, 8PSK modulation to high-order 16-QAM modulation, 64-QAM modulation and 256-QAM modulation can be achieved. Then, according to the low- and high-order modulation modes generated by the transmitter architecture, the three-way Doherty power amplifier circuit structure is reconstructed to further meet the application requirements of the modulation signal for the data rate.

[0032] The externally fed local oscillator RF signal is connected to the input end of the balanced-to-unbalanced converter (Balun) module, and the output is a differential signal, which is connected to the differential frequency multiplier module. The output signal is a differential signal with an amplified multiple and enters the buffer module. The signal is amplified and introduced into a buffer to ensure that the multiplied signal correctly drives the subsequent circuit.

[0033] The balanced-to-unbalanced converter Balun converts a single-ended signal into a differential form, realizes input impedance matching, suppresses common-mode interference of the signal, and transmits the differential signal with high anti-interference performance to the input end of the differential frequency multiplier with maximum efficiency.

[0034] The differential frequency multiplier broadens the frequency range of the input local oscillator RF signal, converts a low-frequency local oscillator RF signal into a higher frequency range, and meets the design requirements of the millimeter wave frequency band or the sub-terahertz frequency band by adjusting the multiplication coefficient of the differential frequency multiplier. The differential frequency multiplier sends the multiplied differential signal to the input end of the buffer Buffer.

[0035] The buffer Buffer amplifies the input local oscillator RF signal and introduces it into a buffer zone, ensuring that the frequency-multiplied local oscillator RF signal correctly drives the subsequent differential I / Q orthogonal coupler QCG1 circuit.

[0036] The differential I / Q orthogonal coupler QCG1 generates four differential orthogonal signals from the differential input signal, namely, I+ path, Q+ path, I- path and Q- path; the I+ path is connected to the input of the single-pole double-throw switch SPDT1, and the output of the single-pole double-throw switch SPDT1 is respectively connected to the inputs of the 0° phase shifter and the 45° phase shifter of the I+ path; the Q+ path is connected to the input of the single-pole double-throw switch SPDT3, and the output of the single-pole double-throw switch SPDT3 is respectively connected to the inputs of the 0° phase shifter and the 45° phase shifter of the Q+ path; the input of the single-pole double-throw switch SPDT2 is connected to the binary PRBS sequence baseband signal B1, and one end of the output of the single-pole double-throw switch SPDT2 is grounded, and the other end is commonly connected to the input of the single-pole double-throw switch SPDT1 and the input of the single-pole double-throw switch SPDT3.

[0037] The local oscillator end of the I+ path binary phase shift keying modulator BPSK1 is connected to the output of the I+ path 0° phase shifter and the 45° phase shifter, the input end is connected to the binary PRBS sequence baseband signal B2, and the output end is connected to the input end of the I+ path amplitude modulator AM1; the local oscillator end of the Q+ path binary phase shift keying modulator BPSK2 is connected to the output of the Q+ path 0° phase shifter and the 45° phase shifter, the input end is connected to the binary PRBS sequence baseband signal B3, and the output end is connected to the Q+ path amplitude modulator AM2. Input end; the local oscillator end of the I-path binary phase-shift keying modulator BPSK3 is connected to the output I-path of the differential IQ orthogonal coupler, the input end is connected to the binary PRBS sequence baseband signal B4, and the output end is connected to the input end of the I-path amplitude modulator AM3; the local oscillator end of the Q-path binary phase-shift keying modulator BPSK4 is connected to the output Q-path of the differential IQ orthogonal coupler QCG1, the input end is connected to the binary PRBS sequence baseband signal B5, and the output end is connected to the input end of the Q-path amplitude modulator AM4.

[0038] The input of the I+ path amplitude modulator AM1 is connected to the output of the binary phase shift keying modulator BPSK1, the control end is the binary PRBS sequence baseband signal B6, and the output passes through the buffer Buffer to reach one input of the adder ADD1; the input of the Q+ path amplitude modulator AM2 is connected to the output of the binary phase shift keying modulator BPSK2, the control end is the binary PRBS sequence baseband signal B7, and the output passes through the buffer Buffer to reach another input of the adder ADD1; the input of the I- path amplitude modulator AM3 is connected to the output of the binary phase shift keying modulator BPSK3, the control end is the binary PRBS sequence baseband signal B8, and the output passes through the buffer Buffer to reach one input of the adder ADD3; the input of the Q- path amplitude modulator AM4 is connected to the output of the binary phase shift keying modulator BPSK4, the control end is the binary PRBS sequence baseband signal B9, and the output passes through the buffer Buffer to reach another input of the adder ADD3.

[0039] The two input ends of the adder ADD1 are respectively connected to the output ends of the buffers Buffer and Buffer, and the output end of the adder ADD1 is connected to the input end of the single-pole double-throw switch SPDT4; the two input ends of the adder ADD3 are respectively connected to the output end of the buffer Buffer, and the output end of the adder ADD3 is connected to the input end of the single-pole double-throw switch SPDT5; the two input ends of the adder ADD2 are respectively connected to an output end of the single-pole double-throw switch SPDT4 and an output end of the single-pole double-throw switch SPDT5, the other output end of the single-pole double-throw switch SPDT5 is grounded, and the output end of the adder ADD2 is connected to the input end of the IQ orthogonal coupler QCG2.

[0040] The input end of the I / Q quadrature coupler QCG2 is connected to the output end of the adder ADD2, one output of the I / Q quadrature coupler QCG2 is connected to the input end of the I / Q quadrature coupler QCG3, and is also connected to the other output end of the single-pole double-throw switch SPDT4; the other output of the I / Q quadrature coupler QCG2 is connected to the auxiliary power amplifier PA in the reconfigurable three-way Doherty power amplifier. A2 The two outputs of the orthogonal coupler QCG3 are respectively connected to the main power amplifier PA in the reconfigurable three-way Doherty power amplifier M Path and auxiliary power amplifier PA A1 The input end of the path; the I / Q orthogonal couplers QCG2 and QCG3 serve as the input inverter network part of the reconfigurable three-way Doherty power amplifier.

[0041] The reconfigurable three-way Doherty power amplifier is composed of a main power amplifier PA M , Auxiliary power amplifier PA A1 And auxiliary power amplifier PA A2 When the transmitter architecture is L-path modulation, the main power amplifier PA M And auxiliary power amplifier PA A1 It is composed of two series DPA structures; when both L and H path modulation modes of the transmitter architecture are involved in the work, the main power amplifier PA M And auxiliary power amplifier PA A1 First, it is formed into a two-way series structure, and then connected with the third auxiliary power amplifier PA A2 The main power amplifier PA M The output end of the auxiliary power amplifier PA A1 The output ends are respectively connected to the primary coils of the actual transformer models TR1 and TR2, the secondary coil of the actual transformer model TR2 is connected in series with the inductor L and then connected to the secondary coil of the actual transformer model TR1, and then connected to the input end of the single-pole double-throw switch SPDT6, one output end of the single-pole double-throw switch SPDT6 is directly connected to the 50Ω antenna, and the other output end is first connected in parallel to the secondary coil of the actual transformer model TR3, and then connected to the 50Ω antenna; the auxiliary power amplifier PA A2 The output end is connected to the primary coil of the actual transformer model TR3.

[0042] The present invention controls the opening or closing of the single-pole double-throw switch SPDT1-6 to make the direct radio frequency modulation transmitter architecture reconfigurable, thereby generating 6 different complex modulation modes applied to high-speed wireless transmission systems. The reconfigurable three-way Doherty power amplifier adaptively switches to a two-way series Doherty power amplifier structure or a three-way series-parallel Doherty power amplifier structure according to the reconfigurable characteristics following the high and low order modulation modes. The specific implementation method is: when the output end of the single-pole double-throw switch SPDT5 is grounded, the output end of SPDT4 is connected to the input of the orthogonal coupler QCG3, and the output end of SPDT6 is directly connected to the load. At this time, the reconfigurable three-way Doherty power amplifier is a two-way series Doherty power amplifier structure. The direct radio frequency transmitter only has the L modulation link involved in the work, generating a low-order modulation mode. That is, when the SPDT2 is grounded, and the SPDT1 and SPDT3 are both connected to the 0° phase shifter, when the amplitude ratio of the control signals of the amplitude control units AM1 and AM2 is 1:1, the modulation mode is QPSK; when the control signals of the amplitude control units AM1 and AM2 are the same data signal, the modulation mode is Star-QAM; when the amplitude ratio of the amplitude control units AM1 and AM2 is 1:3, the modulation mode is 16-QAM; when the SPDT2 is connected to the binary PRBS sequence baseband signal B1, the SPDT1 and SPDT3 follow the binary PRBS sequence baseband signal B1 to switch in real time, and when the amplitude ratio of the amplitude control units AM1 and AM2 is 1:1, the modulation mode is 8PSK. When both the L and H modulation links of the direct RF transmitter are involved in the work, a higher-order modulation mode is generated. That is, when the single-pole double-throw switch SPDT5 is connected to the adder ADD2, and the SPDT4 is connected to the input of the ADD2 adder, the SPDT6 is first connected in parallel to the auxiliary PA A2 The output is then connected to the load, and the power amplifier is a three-way series-parallel Doherty power amplifier structure. When the SPDT2 is grounded, and the SPDT1 and the SPDT3 are both connected to the 0° phase shifter, when the amplitude ratio of the amplitude control units AM3 and AM4 is 2:2 and the amplitude ratio of the amplitude control units AM2 and AM1 is 1:1, the modulation mode is 16-QAM; when the amplitude ratio of the amplitude control units AM3 and AM4 is 2:2 and the amplitude ratio of the amplitude control units AM1 and AM2 is 1:3, the modulation mode is 64-QAM; when the amplitude ratio of the amplitude control units AM3 and AM4 is 4:12 and the amplitude ratio of the amplitude control units AM1 and AM2 is 1:3, the modulation mode is 256-QAM.

[0043] The present invention is a reconfigurable direct RF modulation transmitter architecture for multiple modulation modes, which is implemented by the above connection method. The basic principle of the proposed transmitter system device is to vector-synthesize the two channels of the QPSK modulated signal according to a fixed amplitude ratio, thereby realizing a high-order QAM modulated signal and effectively avoiding the use of expensive DAC digital-to-analog converters. Figure 3 As shown in the figure, the two QPSK constellations on the complex plane are the QPSK1 signal (black dots) centered at the origin with a symbol spacing of 2d, and the QPSK2 signal (dark gray dots) centered at the origin with a symbol spacing of 4d. Linear vector summation is performed on the QPSK1 signal and the QPSK2 signal to generate four new QPSK signals with a symbol spacing of 2d around the origin of each quadrant of the QPSK2 signal, namely the 16-QAM constellation (gray and white bright spots). Similarly, a 64-QAM constellation can be directly generated by linear vector summation with another QPSK3 signal centered at the origin with a symbol spacing of 8d. Similarly, by using M QPSK3 signals centered at the origin with symbol spacings of 2d,…,2 M d QPSK signal is linearly summed to directly generate high-order 4 M -QAM constellation. Figure 3 EVM1 of QPSK1 constellation, EVM2 of QPSK2 constellation, and EVM of combined 16-QAM constellation 16 The relationship equation is as follows:

[0044] QPSK1+QPSK2=16-QAM

[0045]

[0046] From the above relationship equation, it can be seen that for QPSK1 and QPSK2 with the same EVM and the error vectors are independent Gaussian processes, the combined 16-QAM EVM will be the same as the EVM of QPSK.

[0047] Based on the above principle, the present invention opens or closes two QPSK paths (corresponding to Figure 2 The four channels (I+, Q+, I-, Q-) of the L path and H path in the transmitter architecture are vector-synthesized into QPSK (two amplitude modulators have the same amplitude), 16-QAM, 64-QAM and 256-QAM according to a fixed amplitude ratio. The QPSK path uses a Cartesian structure to perform phase modulation and amplitude modulation respectively, which helps to improve the modulation accuracy and efficiency, and further improve the communication quality and system reliability.

[0048] The proposed 8PSK modulation method is Figure 2It is implemented in the I+ and Q+ channels of the QPSK scheme in the L modulation link, and the QPSK direct RF modulation scheme is extended by performing additional 45° / 0° phase modulation on the LO signal components of the I+ and Q+ channels. The binary PRBS sequence baseband signal B1 is connected through the common control bit of the SPDT2, and then the 45° / 0° phase shifter is switched at high speed to achieve phase modulation of the I+ and Q+ paths. When the switch is switched to the 45° phase shifter, the direct QPSK signal is offset 45° around the origin, generating a new QPSK modulated signal distributed along the diagonal line; when the switch is switched to the 0° phase shifter, a QPSK modulated signal distributed along the coordinate axis is generated. Thereby, a modulation scheme of 8PSK is generated in the direct RF QPSK modulation system.

[0049] The proposed Star-QAM modulation method is implemented in the transmitter architecture L modulation link by controlling the amplitude control bits of the amplitude modulation modules AM1 and AM2 using the same binary PRBS sequence baseband signal. Figure 2 The schematic diagram of the direct RF modulation transmitter architecture proposed in the specification does not reflect how to switch the amplitude control bits of the amplitude modulation modules AM1 and AM2. When the direct RF modulation transmitter system generates a Star-QAM modulated signal, the binary PRBS sequence baseband signals B6 and B7 are connected to the same external binary PRBS sequence baseband signal data source.

[0050] Figure 4 Shown are the constellation diagrams of various modulation schemes obtained by system simulation using SystemVue software. Figure 4 (a) is the constellation diagram of QPSK modulation; Figure 4 (b) is the constellation diagram of Star-QAM modulation mode; Figure 4 (c) is the constellation diagram of 16-QAM L path modulation mode; Figure 4 (d) is the constellation diagram of 8PSK modulation mode; Figure 4 (e) is the constellation diagram of 16-QAM H path modulation mode; Figure 4 (f) is the constellation diagram of 64-QAM modulation mode; Figure 4(g) is the constellation diagram of 256-QAM modulation mode. The present invention designs a reconfigurable direct RF modulation transmitter architecture for multi-order modulation mode. The specific implementation method is as follows: when the output end of the single-pole double-throw switch SPDT5 is grounded and the output end of the SPDT4 is connected to the input of the orthogonal coupler QCG3, the output end of the SPDT6 is directly connected to the load. At this time, the reconfigurable three-way Doherty power amplifier part is a two-way series DPA structure. The direct RF transmitter generates a low-order modulation mode: when the SPDT2 is grounded, the SPDT1 and SPDT3 are both connected to the 0° phase shifter, and when the amplitude ratio of the control signals of the amplitude control units AM1 and AM2 is 1:1, the modulation mode is QPSK, and the constellation diagram is as follows Figure 4 (a); when the control signals of the amplitude control units AM1 and AM2 are the same data signal, the modulation mode is Star-QAM, and the constellation diagram is as follows Figure 4 (b) As shown; when the amplitude ratio of the amplitude control unit AM1 and AM2 is 1:3, the modulation mode is 16-QAM, the constellation diagram is as follows Figure 4 (c) As shown; when the SPDT2 is connected to the binary PRBS sequence baseband signal B1, the SPDT1 and SPDT3 follow the binary PRBS sequence baseband signal B1 to switch at high speed, and when the amplitude ratio of the amplitude control unit AM1 and AM2 is 1:1, the modulation mode is 8PSK, such as Figure 4 (d) As shown. Direct RF transmitter generates higher order modulation: When the single-pole double-throw switch SPDT5 is connected to the adder ADD2, and the SPDT4 is connected to the input of ADD2, the SPDT6 is first connected in parallel to the auxiliary PA A2 The output is then connected to the load, and the power amplifier part is a three-way series-parallel DPA structure. When the SPDT2 is grounded, and the SPDT1 and SPDT3 are both connected to the 0° phase shifter, when the amplitude ratio of the amplitude control units AM3 and AM4 is 2:2 and the amplitude ratio of the amplitude control units AM2 and AM1 is 1:1, the modulation mode is 16-QAM, such as Figure 4 (e) As shown; when the amplitude ratio of the amplitude control units AM3 and AM4 is 2:2 and the amplitude ratio of the amplitude control units AM1 and AM2 is 1:3, the modulation mode is 64-QAM, such as Figure 4 (f) As shown; when the amplitude ratio of the amplitude control units AM3 and AM4 is 4:12 and the amplitude ratio of the amplitude control units AM1 and AM2 is 1:3, the modulation mode is 256-QAM, such as Figure 4It should be noted that the L path and the H path in the reconfigurable direct RF modulation transmitter architecture for multi-order modulation designed by the present invention can realize 16-QAM modulation signals by controlling the corresponding amplitude ratios, but the implementation methods are different.

[0051] Figure 5 Shown is the equivalent circuit model of the differential orthogonal coupler QCG1 and a schematic diagram of its three-dimensional electromagnetic simulation layout model. Figure 5 (a) is an equivalent circuit model of the differential quadrature coupler QCG1; Figure 5 (a) is a three-dimensional electromagnetic simulation layout model of the differential orthogonal coupler QCG1. The equivalent circuit model of the differential orthogonal coupler QCG1 in a reconfigurable direct radio frequency modulation transmitter architecture for multi-order modulation designed by the present invention is shown in FIG. Figure 5 As shown in (a). The differential orthogonal coupler QCG1 is composed of two transformer coils Lp1, Ls1, Lp2, and Ls2 with a coupling coefficient of k stacked vertically. This structure greatly reduces the area of ​​the passive differential orthogonal coupler QCG1 and has good orthogonal phase accuracy and amplitude error. In the figure, IN+ and IN- are differential signal input terminals, THR+ and THR- are differential signal pass-through terminals, CPL+ and CPL- are differential signal coupling terminals, ISO+ and ISO- are signal isolation terminals, and are connected through 100Ω resistors. Among them, the capacitors Cg represent the parasitic capacitance values ​​of the primary and secondary coils of the two transformers to the ground. The capacitor Cm represents the parasitic capacitance value between the primary and secondary coils of the two transformers. The three-dimensional electromagnetic simulation layout model of the differential orthogonal coupler QCG1 is shown in Figure 5 As shown in (b), the layout corresponds to its equivalent circuit model. It is implemented by using 4 layers of thick metal stacking, namely the metal aluminum layer (AL layer), the top metal layer (Top layer), the sub-top metal layer (Sub-top layer) and the third top metal layer, to reduce the loss of the passive differential orthogonal coupler. Ct is the adjustment capacitor, which is used to adjust and optimize the phase accuracy and amplitude error between each differential port. Figure 5 In (b), the capacitors Cg and Cm are combined and shown on one side for clarity.

[0052] Figure 6 Shown is a schematic diagram of the evolution of the reconfigurable three-way Doherty power amplifier output inverter network into a three-way actual transformer model. Figure 6 (a) is the reconfigurable three-way Doherty power amplifier output inverter network; Figure 6 (b) The equivalent model of the low-pass filter network structure replacing the λ / 4 impedance inverter; Figure 6 (c) is the equivalent circuit model after the actual transformer; Figure 6(d) is the actual transformer model of the reconfigurable three-way Doherty power amplifier. The reconfigurable three-way Doherty power amplifier consists of a main power amplifier PA M , Auxiliary power amplifier PA A1 And auxiliary power amplifier PA A2 When the transmitter architecture only has the L-path modulation link involved in the operation, and the transmitter modulation mode is QPSK, STAR-QAM, 8PSK, and 16-QAM, by switching the single-pole double-throw switch, the main power amplifier PA M And auxiliary power amplifier PA A1 It is formed into a two-way series DPA structure; when the L path and H path modulation links of the transmitter architecture work together, and the modulation mode of the transmitter is 16-QAM, 64-QAM and 256-QAM, by switching the single-pole double-throw switch, the main power amplifier PA M And auxiliary power amplifier PA A1 First, it is formed into a two-way series structure and then connected to the third auxiliary power amplifier PA A2 The output inverter network of the reconfigurable three-way Doherty power amplifier is as follows: Figure 6 (a), where L1-3 and C1-3 are the parallel resonant network parts of the output end of each power amplifier, Lp'1-3 and Ls'1-3 are ideal transformer models, and the light gray and dark gray λ / 4 impedance inverters are the series-parallel output inverter network parts of the reconfigurable three-way Doherty power amplifier, respectively. The light gray λ / 4 impedance inverter adopts a two-stage T-type low-pass filter network (LCLCL) structure, and the dark gray λ / 4 impedance inverter adopts a single-stage Π-type low-pass filter network (CLC) structure. The third auxiliary power amplifier PA of the reconfigurable three-way Doherty power amplifier A2 The series inductor L0 at the output end is used to absorb the parasitic capacitance of the output PAD part. Figure 6 (b) represents the equivalent model of replacing the λ / 4 impedance inverter with a low-pass filter network structure. Figure 6(c) is the equivalent circuit model structure after the actual transformer, and the inductance element value and the proportional coefficient n in the equivalent model have a corresponding functional relationship with the coupling coefficient k of the actual transformer. For details, see the literature [M. Pashaeifar, LCN de Vreede and M. S. Alavi, "A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation," in IEEE Journal of Solid-State Circuits, vol. 57, no. 10, pp. 2999-3013, Oct. 2022.]. It is worth noting that the first main power amplifier PA of the reconfigurable three-way Doherty power amplifier M Output network and third auxiliary power amplifier PA A2 The capacitor C1' in the output network represents the equivalent capacitance value of the ideal transformer transformed into the actual transformer, and its value is the sum of the capacitance values ​​of C1' and C3'. Figure 6 (d) is the circuit structure after the output inverter network of the reconfigurable three-way Doherty power amplifier is converted into an actual transformer model. It consists of three actual transformer models and a series wiring inductor, which greatly reduces the chip area and the loss of passive devices.

[0053] The above specific implementation scheme elaborates in detail that the present invention proposes a reconfigurable direct RF modulation transmitter system device for multiple modulation modes. Through its reconfigurable setting, six different high and low order modulation modes, QPSK, STAR-QAM, 8PSK, 16-QAM, 64-QAM and 256-QAM, can be realized in the same transmitter system. It meets the application requirements of communication links for high and low order modulation modes with different signal strengths, and makes up for the deficiency that the modulation mode of the transmitter system device does not have a reconfigurable characteristic. And proposes a circuit structure of a compact output inverter network part of a reconfigurable three-way Doherty power amplifier. Relevant researchers and technicians in this field can make non-substantial improvements, modifications or replacements based on the application fields mentioned in the above scheme without departing from the purpose of the present invention, and should also belong to the scope of protection of the claims of the present invention. The present invention is not limited to the contents disclosed in the above implementation scheme, and the scope of protection of the present invention shall be subject to the claims.

Claims

1. A reconfigurable direct radio frequency modulation transmitter architecture for multiple modulation modes, characterized in that: The transmitter architecture is divided into two upper and lower low-order L and high-order H direct modulation paths, each path includes an externally fed local oscillator RF signal, a balanced-to-unbalanced converter Balun, a differential frequency multiplier, a buffer Buffer, a differential I / Q quadrature coupler QCG1, I / Q quadrature couplers QCG2 and QCG3, single-pole double-throw switches SPDT1, SPDT2, SPDT3, SPDT4, SPDT5 and SPDT6, 0° and 45° phase shifters, binary phase-shift keying modulators BPSK1, BPSK2, BPSK3 and BPSK4, amplitude modulators AM1, AM2, AM3 and AM4, binary PRBS sequence baseband signals B1-B9, adders ADD1, ADD2 and ADD3, and a reconfigurable three-way Doherty power amplifier; The local oscillator RF signal is connected to the input of the Balun, the output of the Balun is connected to the differential frequency multiplier, the output of the differential frequency multiplier is connected to the input of the buffer Buffer, the output of the buffer Buffer is connected to the input end of the differential I / Q orthogonal coupler QCG1, and the differential orthogonal signals I+, Q+, I-, Q- generated at the output end of the differential I / Q orthogonal coupler QCG1 are respectively connected to the inputs of the single-pole double-throw switches SPDT1 and SPDT3 and the local oscillator input ends of the binary phase shift keying modulators BPSK3 and BPSK4; the outputs of the single-pole double-throw switches SPDT1 and SPDT3 are respectively connected to the 0° and 45° phase shifter input ends, the output ends of the 0° and 45° phase shifters are respectively connected to the local oscillator input ends of binary phase shift keying modulators BPSK1 and BPSK2; the input end of the single-pole double-throw switch SPDT2 is connected to the binary PRBS sequence baseband signal B1, and the two output ends of the single-pole double-throw switch SPDT2 are respectively connected to the input ends of the single-pole double-throw switches SPDT1 and SPDT3 and ground; the RF inputs of the binary phase shift keying modulators BPSK1, BPSK2, BPSK3, and BPSK4 are respectively connected to the binary PRBS sequence baseband signals B2, B3, B4, and B5; The output signals of the binary phase shift keying modulators BPSK1, BPSK2, BPSK3, and BPSK4 are respectively connected to the input ends of the amplitude modulators AM1, AM2, AM3, and AM4, and the control ends of the amplitude modulators AM1, AM2, AM3, and AM4 are respectively connected to the binary PRBS sequence baseband signals B6, B7, B8, and B9; the outputs of the amplitude modulators AM1, AM2, AM3, and AM4 are respectively connected to the input ends of the buffer Buffer, and the outputs of the buffer Buffer are connected to the inputs of the adders ADD1 and ADD3, and the outputs of the adders ADD1 and ADD3 are respectively connected to the input ends of the single-pole double-throw switches SPDT4 and SPDT5, and the two output ends of the single-pole double-throw switch SPDT4 are respectively connected to the adder One input end of the adder ADD2 and the input of the I / Q quadrature coupler QCG2; the two output ends of the single-pole double-throw switch SPDT5 are respectively connected to the other input end of the adder ADD2 and the ground; the output of the adder ADD2 is connected to the input end of the I / Q quadrature coupler QCG2, and the output end of the I / Q quadrature coupler QCG2 is respectively connected to the input of the I / Q quadrature coupler QCG3 and one input end of the reconfigurable three-way Doherty power amplifier; the two outputs of the I / Q quadrature coupler QCG3 are respectively connected to the other two input ends of the reconfigurable three-way Doherty power amplifier, and the output end of the reconfigurable three-way Doherty power amplifier is connected to the antenna end; the reconfigurable three-way Doherty power amplifier is connected to the main power amplifier PA M , Auxiliary power amplifier PA A1 , Auxiliary power amplifier PA A2 , transformer inverter network TR1, transformer inverter network TR2, transformer inverter network TR3, inductor L and single-pole double-throw switch SPDT6; wherein the main power amplifier PA M The output of the transformer inverter network TR1 is connected to the input of the transformer inverter network TR1, and one end of the output of the transformer inverter network TR1 is connected to the input end of the single-pole double-throw switch SPDT6; the other end of the transformer inverter network TR1 is connected in series with the inductor L and one output end of the transformer inverter network TR2, and the other output end of the transformer inverter network TR2 is grounded; the auxiliary power amplifier PA A1 The output of the auxiliary power amplifier PA is connected to the input of the transformer inverter network TR2; A2 The output of is connected to the input of the transformer inverter network TR3, one output end of the transformer inverter network TR3 is grounded, and the other output end of the transformer inverter network TR3 is connected to the two output ends of the single-pole double-throw switch SPDT6 and is grounded through a load resistor; Through the reconfigurable setting of the single-pole double-throw switch SPDT1-6, when only the L modulation link is involved in the work of the direct RF modulation transmitter architecture, four different modulation modes of QPSK, STAR-QAM, 8PSK and 16-QAM are generated; when both the L and H modulation links are involved in the work of the direct RF modulation transmitter architecture, three different modulation modes of 16-QAM, 64-QAM and 256-QAM are generated.

2. The reconfigurable direct radio frequency modulation transmitter architecture for multiple modulation modes according to claim 1, characterized in that: When transmitting at high data rates, 16-QAM, 64-QAM and 256-QAM high-order modulation are used; when transmitting at low data rates, QPSK, STAR-QAM, 8PSK low-order modulation is used.

3. The reconfigurable direct radio frequency modulation transmitter architecture for multiple modulation modes according to claim 1, characterized in that: When the modulation mode generated by the transmitter architecture is QPSK, STAR-QAM, 8PSK and 16-QAM, through the reconfigurable setting of the single-pole double-throw switch SPDT6, the reconfigurable three-way Doherty power amplifier is a two-way series DPA structure, and its back-off efficiency and data rate meet the requirements of 16-QAM and below modulation modes; when the modulation mode generated by the transmitter architecture is 16-QAM, 64-QAM and 256-QAM, the reconfigurable three-way Doherty power amplifier is a DPA structure in which two ways are connected in series and then in parallel with the third way, which meets the communication requirements of complex high-order modulation.

4. The reconfigurable direct radio frequency modulation transmitter architecture for multiple modulation modes according to claim 1, characterized in that: The differential orthogonal coupler QCG1 is implemented by stacking four thick metal layers and only occupies the area of ​​a conventional inductor; the main power amplifier PA M and auxiliary power amplifier PA A1 The λ / 4 impedance inverter connected in series is realized by a two-stage T-type low-pass filter network structure, and the auxiliary power amplifier PA A2 The output part of the parallel λ / 4 impedance inverter is implemented using a Π-type low-pass filter network structure; the two-stage T-type low-pass filter network and the Π-type low-pass filter network are converted into three actual transformer models with coupling coefficients and a series wiring inductance model.

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