Real-time control method of semiconductor device

Abstract

The invention relates to the technical field of semiconductor device control, and particularly discloses a real-time control method of a semiconductor device, which comprises the following steps of: evaluating a scribing processing performance index, judging a scribing quality coincidence degree value, and controlling the quality of the semiconductor device. The scribing quality parameter preset set of the semiconductor chip is obtained through matching, standardized parameter setting is provided for scribing processing operation, quality monitoring is carried out on each semiconductor sub-chip, the scribing quality coincidence degree value of each semiconductor sub-chip is judged, and quality early warning prompt is carried out on each unqualified semiconductor sub-chip. Through early warning prompt, quality processing can be carried out on unqualified sub-chips as early as possible, the number of unqualified semiconductor chips is reduced, and effective quality control of the semiconductor device is finally realized.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device control, and in particular to a real-time control method for semiconductor devices. Background Art

[0002] The current semiconductor device control technology solutions have high requirements for equipment performance. If the equipment has performance fluctuations during real-time control, it will affect the yield and reliability of semiconductor chip quality. In addition, if laser scribing is used, the laser power, focus and speed need to be precisely controlled to adapt to different wafer materials and thickness requirements, which makes the operation difficult.

[0003] For example, the invention patent with the announcement number CN113437020B provides a method for manufacturing a semiconductor device, which includes: forming a three-dimensional (3D) structure on a substrate; forming an adsorption control layer to cover the upper part of the 3D structure; and forming a material layer on the adsorption control layer and on the lower part of the 3D structure not covered by the adsorption control layer, wherein the minimum thickness of the material layer on the adsorption control layer is less than the maximum thickness of the material layer on the lower part of the 3D structure.

[0004] For example, the invention patent with the announcement number CN105762145B provides a semiconductor device, in which a semiconductor chip (4PH, 4PL) having a power metal oxide semiconductor field effect transistor and a semiconductor chip (4D) having a control circuit for controlling the operation thereof are packaged in a package (PA) of the semiconductor device (SM1), and the semiconductor chips (4PH, 4PL, 4D) are respectively mounted on die pads (7D1, 7D2, 7D3); the bonding pads (12S1, 12S2) for the source electrode of the high-side semiconductor chip (4PH) are electrically connected to the die pad (7D2) via a metal plate (8A); and an electroplating layer (9b) formed in an area where the semiconductor chip (4PL) is mounted and an electroplating layer (9c) formed in an area where the metal plate (8A) is bonded are provided on the upper surface of the die pad (7D2), and the electroplating layer (9b) and the electroplating layer (9c) are separated by an area where no electroplating layer is formed. The invention can improve the reliability of semiconductor devices.

[0005] Combining the above technical solutions, it is found that with the continuous upgrading of semiconductor manufacturing technology, more reliable, precise and efficient semiconductor device control technical solutions need to be organized. However, most semiconductor device control technical solutions have less performance analysis of semiconductor chips, making it difficult to achieve the expected real-time control of semiconductor chips, resulting in deviations in the quality judgment of semiconductor chips, which ultimately affects the use of semiconductor chips. Summary of the invention

[0006] In view of the deficiencies of the prior art, the present invention provides a real-time control method for a semiconductor device, which can effectively solve the problems involved in the above-mentioned background technology.

[0007] To achieve the above objectives, the present invention is implemented through the following technical solutions: The first aspect of the present invention provides a real-time control method for semiconductor devices, including: evaluation of a dicing process performance index: obtaining dicing process parameters of semiconductor chips through the dicing process of semiconductor chips in semiconductor devices, evaluating the dicing process performance index of semiconductor chips, and thereby matching to obtain a preset set of dicing quality parameters of semiconductor chips; determination of dicing quality compliance value: recording diced semiconductor chips as semiconductor sub-chips, and performing quality monitoring on each semiconductor sub-chip based on a real-time control component, while comprehensively considering the preset set of dicing quality parameters of semiconductor chips, and determining the dicing quality compliance value of each semiconductor sub-chip based on a processor; quality control of semiconductor devices: comparing the dicing quality compliance value of each semiconductor sub-chip with a preset dicing quality compliance range, counting out each semiconductor sub-chip with unqualified quality, and giving a quality warning prompt to each semiconductor sub-chip with unqualified quality through a quality warning mechanism, thereby ultimately achieving quality control of semiconductor devices.

[0008] As a further method, the quality control of semiconductor devices is achieved, and the specific analysis process is: comparing the dicing quality compliance value of each semiconductor sub-chip with a preset dicing quality compliance range. If the dicing quality compliance value of a semiconductor sub-chip does not fall within the dicing quality compliance range, then the semiconductor sub-chip is recorded as an unqualified semiconductor sub-chip. Thus, all semiconductor sub-chips whose dicing quality compliance values ​​do not fall within the dicing quality compliance range are recorded as unqualified semiconductor sub-chips, and a quality warning mechanism is used to issue a quality warning prompt to each unqualified semiconductor sub-chip, thereby finally achieving quality control of semiconductor devices.

[0009] As a further method, the dicing quality compliance value of each semiconductor sub-chip is specifically analyzed in the following process: by quality monitoring each semiconductor sub-chip, the quality monitoring data of each semiconductor sub-chip is obtained, the length and width of each semiconductor sub-chip are extracted, and the length and width of the chipped edge of each semiconductor sub-chip are obtained at the same time; the length and width of each semiconductor sub-chip are used to obtain the surface area of ​​each semiconductor sub-chip through the area formula, and the chipped edge length and width of each semiconductor sub-chip are used to obtain the chipped edge area of ​​each semiconductor sub-chip through the area formula; the surface area of ​​each semiconductor sub-chip is processed with the chipped edge area of ​​each semiconductor sub-chip to obtain the chipping rate of each semiconductor sub-chip; the preset set of dicing quality parameters of the above-mentioned semiconductor chips specifically includes preset length, preset width, and defined chipping rate, and comprehensively determines the dicing quality compliance value of each semiconductor sub-chip.

[0010] As a further method, the matching obtains a preset set of dicing quality parameters of the semiconductor chip. The specific matching process is: matching the dicing process performance index of the semiconductor chip with the preset set of dicing quality parameters corresponding to each preset dicing process performance index interval, so as to obtain the preset set of dicing quality parameters of the semiconductor chip.

[0011] As a further method, the semiconductor chip dicing processing parameters specifically include the use thickness of the semiconductor wafer, the charge of the semiconductor wafer at each processing time point, the ambient temperature of the semiconductor chip dicing processing area at each processing time point, the dicing speed of the dicing machine at each processing time point, and the blade thickness of the dicing machine.

[0012] As a further method, the dicing processing performance index of the semiconductor chip is specifically analyzed as follows: the dicing speed of the dicing machine at each processing time point is averaged to obtain the average dicing speed of the dicing machine during the processing cycle; the dicing reference speed of the dicing machine is extracted from the semiconductor device control information library, and the dicing machine blade thickness and the adsorption index of the semiconductor chip are used to comprehensively analyze the dicing processing performance index of the semiconductor chip.

[0013] The second aspect of the present invention provides an apparatus in a real-time control method for a semiconductor device, characterized in that it includes: a semiconductor chip and a real-time control component, a processor, and a quality warning mechanism; the semiconductor chip is used to connect to the real-time control component through flip-chip bonding technology; the real-time control component is used to monitor the quality of each semiconductor sub-chip and obtain quality monitoring data of each semiconductor sub-chip; the processor is used to connect to the real-time control component through wireless communication technology, receive the quality monitoring data of each semiconductor sub-chip sent by the real-time control component, and determine each semiconductor sub-chip with unqualified quality; the quality warning mechanism is used to connect to the processor through wireless communication technology, receive each semiconductor sub-chip with unqualified quality in the processor, and issue a quality warning prompt.

[0014] Compared with the prior art, the embodiments of the present invention have at least the following advantages or beneficial effects: (1) The present invention provides a real-time control method for semiconductor devices. By evaluating the dicing process performance index of semiconductor chips, a preset set of dicing quality parameters of semiconductor chips is obtained by matching, and standardized parameter settings are provided for dicing process operations. The quality of each semiconductor sub-chip is monitored, and the dicing quality compliance value of each semiconductor sub-chip is determined. A quality warning prompt is issued for each semiconductor sub-chip with unqualified quality. Through the warning prompt, the quality of unqualified sub-chips can be processed as early as possible, and the number of unqualified semiconductor chips can be reduced. Finally, effective quality control of semiconductor devices is achieved. Through strict semiconductor chip quality control, the defective rate of semiconductor chips can be reduced and the overall quality of semiconductor chips can be improved.

[0015] (2) The present invention obtains the dicing processing parameters of the semiconductor chip through the dicing process of the semiconductor chip in the semiconductor device, evaluates the dicing processing performance index of the semiconductor chip, and thereby matches and obtains a preset set of dicing quality parameters of the semiconductor chip. By monitoring the dicing processing performance index, it is possible to ensure that the processing conditions of the dicing equipment are suitable and improve the utilization rate of the dicing equipment. By monitoring the performance index of the dicing processing parameters, it is possible to timely discover and adjust the dicing processing parameters and reduce the semiconductor chip failure rate caused by improper dicing processing operations.

[0016] (3) The present invention records the semiconductor chips after dicing as various semiconductor sub-chips, monitors the quality of each semiconductor sub-chip, and integrates the preset set of dicing quality parameters of the semiconductor chips. By determining the dicing quality compliance value of each semiconductor sub-chip, the quality performance of each semiconductor sub-chip in the dicing process can be quantitatively reflected, helping operators to accurately identify sub-chips with quality problems, thereby improving the operational efficiency of the dicing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention is further described using the accompanying drawings, but the embodiments in the accompanying drawings do not constitute any limitation to the present invention. A person skilled in the art can obtain other drawings based on the following drawings without creative work.

[0018] Figure 1 It is a schematic diagram of the method flow of the present invention.

[0019] Figure 2 It is a scatter diagram of the charge amount change involved in the present invention.

[0020] As shown in the attached figure: 1. Charge reference value straight line. DETAILED DESCRIPTION

[0021] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0022] Reference Figure 1 As shown, the present invention provides a real-time control method for a semiconductor device, including: evaluation of a dicing process performance index: obtaining dicing process parameters of the semiconductor chip through a dicing process of the semiconductor chip in the semiconductor device, evaluating the dicing process performance index of the semiconductor chip, and thereby matching a preset set of dicing quality parameters of the semiconductor chip.

[0023] The semiconductor chip dicing process refers to dividing a plurality of semiconductor chips manufactured on a wafer into independent individuals during the processing of the semiconductor chips, so as to perform subsequent packaging, testing or other operations on the semiconductor chips.

[0024] The above-mentioned wafers are silicon chips used by the semiconductor industry to manufacture integrated circuits. They are the basis and raw materials for chip manufacturing and the carrier for making various circuit component structures.

[0025] Specifically, the dicing processing parameters of the semiconductor chip include the use thickness of the semiconductor wafer, the charge of the semiconductor wafer at each processing time point, the ambient temperature of the dicing processing area of ​​the semiconductor chip at each processing time point, the dicing speed of the dicing machine at each processing time point, and the blade thickness of the dicing machine.

[0026] The use thickness of the above-mentioned semiconductor wafer refers to the wafer thickness determined during the wafer dicing process according to the specific manufacturing process, application requirements and subsequent processing steps.

[0027] The charge amount of the above-mentioned semiconductor wafer at each processing time point refers to the electrostatic charge carried by the wafer surface at different time points, wherein each processing time point is obtained by dividing the processing time point into each processing time point by a processing cycle, and the processing cycle is determined by the operator through a comprehensive analysis based on factors such as the processing environment, actual needs, and the status of the semiconductor chip.

[0028] The specific values ​​of the wafer thickness and blade thickness can be obtained by a precise ruler, the specific value of the charge can be measured by a charge meter, the ambient temperature can be measured by a thermometer, and the dicing speed can be obtained by a speed sensor.

[0029] Furthermore, the specific analysis process of the adsorption index of the semiconductor chip is as follows: The difference between the use thickness of the semiconductor wafer and the preset wafer reference thickness is processed to obtain the use thickness difference of the semiconductor wafer.

[0030] The charge amount of the semiconductor wafer at each processing time point is subjected to standard deviation processing with a preset charge amount reference value to obtain the charge fluctuation degree of the semiconductor wafer during the processing cycle.

[0031] According to the charge amount of the semiconductor wafer at each processing time point, a scatter plot of the charge amount change of the semiconductor wafer is constructed, such as Figure 2 As shown, it is used to display the charge distribution of the semiconductor wafer and the trend relationship between the charge of the semiconductor wafer and the charge reference value. The horizontal axis of the charge change scatter plot is the processing time point, the unit is second, and the vertical axis is the charge, the unit is coulomb.

[0032] According to the charge amount variation scatter diagram, a charge amount reference value straight line 1 is located therefrom.

[0033] The ambient temperatures of the semiconductor chip dicing process area at each processing time point are arranged in descending order, and the first-ranked ambient temperature is recorded as the maximum ambient temperature of the semiconductor chip dicing process area during the processing cycle.

[0034] The ambient temperature of the area of ​​the semiconductor chip dicing process at each processing time point is shown in Table 1: Table 1 Ambient temperature value change table

[0035] In this embodiment, according to the table of the ambient temperature of the area to which the semiconductor chip slicing process belongs at each processing time point, it can be learned that the ambient temperature of the area to which the semiconductor chip slicing process belongs is relatively stable, which can ensure the semiconductor chip slicing processing accuracy and the processing quality of the semiconductor chip. In this embodiment, the maximum ambient temperature of the area to which the semiconductor chip slicing process belongs during the processing cycle is 18 degrees Celsius.

[0036] The wafer reference thickness, charge reference value, and ambient temperature limit value are extracted from the semiconductor device control information library, and the adsorption index of the semiconductor chip is comprehensively analyzed.

[0037] The data stored in the above-mentioned semiconductor device control information library is obtained by fitting based on the statistics of multiple dicing operation data. For example, the wafer reference thickness is obtained by obtaining the wafer thickness during multiple dicing operations, and the operator determines that the wafer thickness that meets the chip quality when performing dicing operations at different thicknesses is averaged and used as the wafer reference thickness. In this way, the value in the semiconductor device control information library is obtained, and the value may change due to different operating environments, operator status, and wafer status. This embodiment does not make any special limitations on this.

[0038] Specifically, the adsorption index of the semiconductor chip, in this embodiment, is obtained by comprehensive analysis of the difference in thickness of the semiconductor wafer, the charge fluctuation of the semiconductor wafer during the processing cycle, and the maximum value of the ambient temperature of the area to which the semiconductor chip is diced during the processing cycle, so as to determine the adsorption index of the semiconductor chip. In this embodiment, a more accurate calculation method is used to obtain the adsorption index, and the specific analysis process is as follows:

[0039] In the formula It is an adsorption index of semiconductor chips. In this embodiment, if the dicing process is in a high temperature environment or even close to the ambient temperature limit, the charge on the wafer surface may be more likely to migrate or dissipate, resulting in a large charge fluctuation, which reduces the adsorption performance of the semiconductor chip. At the same time, changes in wafer thickness will also affect the accumulation and distribution of charge on the wafer surface. The greater the wafer thickness difference, the more unstable the wafer performance during the dicing process, the more obvious the migration of the wafer surface charge, and the greater the charge fluctuation. In summary, when the fluctuation of the charge on the semiconductor wafer surface tends to be stable, and the thickness of the semiconductor wafer and the temperature are within a reasonable range, the adsorption performance of the semiconductor chip will reach the best state.

[0040] The use thickness difference of the semiconductor wafer refers to the difference between the use thickness of the semiconductor wafer and the reference thickness of the wafer.

[0041] It is the charge fluctuation of the semiconductor wafer during the processing cycle, which describes the change of the charge of the semiconductor wafer during the processing cycle. The greater the charge fluctuation, the more unstable the charge distribution, resulting in worse adsorption performance of the semiconductor chip.

[0042] It is the maximum value of the ambient temperature in the area of ​​semiconductor chip dicing process during the processing cycle, which refers to the maximum value that the ambient temperature can reach during the processing cycle.

[0043] The ambient temperature limit value refers to the maximum temperature value allowed by the ambient temperature.

[0044] The correction factor corresponding to the thickness difference is predefined in the semiconductor device control information library.

[0045] In a specific embodiment, a fitting curve is obtained by fitting the wafer diameter, historical ambient temperature, historical efficiency of production equipment and adsorption index of semiconductor chips, and the real-time wafer diameter, ambient temperature and efficiency of production equipment are brought into the fitting curve to obtain the correction factor corresponding to the thickness difference used in this embodiment. The value range in this embodiment is (0, 1).

[0046] It is the impact factor corresponding to the charge fluctuation unit value predefined in the semiconductor device control information library.

[0047] In a specific embodiment, a fitting curve is obtained by fitting the historical ambient temperature, wafer thickness, historical wafer carrier concentration and adsorption index of the semiconductor chip, and the real-time ambient temperature, wafer thickness and wafer carrier concentration are brought into the fitting curve to obtain the influence factor corresponding to the unit value of the charge fluctuation degree in this embodiment. At the same time, the value range in this embodiment is (0, 1).

[0048] Furthermore, the semiconductor chip dicing process performance index is specifically analyzed as follows: The dicing speed of the dicing machine at each processing time point is averaged to obtain the average dicing speed of the dicing machine during the processing cycle.

[0049] The reference dicing speed and blade reference thickness of the dicing machine, the blade thickness of the dicing machine and the adsorption index of the semiconductor chip are extracted from the semiconductor device control information library to comprehensively analyze the dicing processing performance index of the semiconductor chip.

[0050] Specifically, the semiconductor chip dicing process performance index is obtained by comprehensively analyzing the semiconductor chip dicing equipment performance index and the semiconductor chip adsorption index in this embodiment, so as to determine the semiconductor chip dicing process performance index. In this embodiment, a more accurate calculation method is used to obtain the performance index, and the specific expression is:

[0051] in In the formula is the dicing performance index of the semiconductor chip. In this embodiment, insufficient or unstable adsorption force may cause the wafer to move slightly or vibrate during the cutting process, thereby affecting the dicing accuracy of the dicing equipment. Good adsorption can ensure that the wafer remains in a fixed position during the cutting process, reduce the cutting deviation caused by movement or vibration, thereby improving the dicing accuracy of the dicing equipment, that is, affecting the performance of the dicing equipment. When the performance of the dicing equipment and the adsorption performance of the semiconductor chip are both in the best state, it will also affect the increase of the dicing performance index of the semiconductor chip. At the same time, if the blade thickness of the dicing machine is not within a reasonable range, too large or too small will affect the dicing speed of the dicing machine. When the blade thickness is too large, it means that the contact area with the wafer increases during the dicing operation, thereby increasing the resistance during the dicing process, directly leading to a decrease in the dicing speed and reducing the performance of the dicing equipment; if the blade thickness is too small, the blade is more likely to break or be damaged during the dicing process, which not only affects the dicing speed, but may also cause damage to the dicing machine and the wafer, and also reduce the performance of the dicing equipment, so as to reduce the dicing performance of the semiconductor chip.

[0052] It is the performance index of the semiconductor chip dicing equipment, which is obtained by comprehensively analyzing the average dicing speed of the dicing machine during the processing cycle and the blade thickness of the dicing machine.

[0053] It is the adsorption index of semiconductor chips, which is obtained by comprehensively analyzing the thickness difference of semiconductor wafers, the charge fluctuation of semiconductor wafers during the processing cycle, and the maximum ambient temperature of the area where the semiconductor chip is processed during the processing cycle.

[0054] It is the average dicing speed of the dicing machine during the processing cycle, which refers to the average cutting length that the dicing machine can complete during the processing cycle under stable working conditions.

[0055] The reference speed for the dicing machine is the standard value specified when discussing the dicing speed of the dicing machine.

[0056] The thickness of the dicing machine blade refers to the size of the dicing machine blade perpendicular to the cutting direction.

[0057] The reference thickness of the dicing machine blade refers to the standard value specified when discussing the dicing machine blade thickness.

[0058] It is the weight factor corresponding to the performance index of the dicing equipment predefined in the semiconductor device control information library.

[0059] In a specific embodiment, a fitting curve is obtained by fitting the historical dicing equipment performance index, the historical adsorption index and the dicing processing performance index of the semiconductor chip, and the real-time dicing equipment performance index and adsorption index are brought into the fitting curve to obtain the weight factor corresponding to the dicing equipment performance index in this embodiment. At the same time, the value range in this embodiment is (0, 1).

[0060] It is the weight factor corresponding to the adsorption index predefined in the semiconductor device control information library.

[0061] In a specific embodiment, a fitting curve is obtained by fitting the historical dicing equipment performance index, the historical adsorption index and the dicing processing performance index of the semiconductor chip, and the real-time dicing equipment performance index and adsorption index are brought into the fitting curve to obtain the weight factor corresponding to the adsorption index in this embodiment. At the same time, the value range in this embodiment is (0, 1).

[0062] is the impact factor corresponding to the unit value of blade thickness predefined in the semiconductor device control information library, and e is a natural constant.

[0063] In a specific embodiment, a fitting curve is obtained by fitting the historical cutting speed, cutting line width, wafer thickness and performance indicators of the semiconductor chip dicing equipment, and the real-time cutting speed, cutting line width and wafer thickness are introduced into the fitting curve to obtain the influencing factor corresponding to the unit value of the blade thickness in this embodiment. At the same time, the value range in this embodiment is (0, 1).

[0064] Furthermore, the matching obtains a preset set of semiconductor chip dicing quality parameters, and the specific matching process is as follows: The dicing process performance index of the semiconductor chip is matched with the preset set of dicing quality parameters corresponding to each preset dicing process performance index interval. The specific matching process is: obtaining a mapping set between the dicing process performance index of the semiconductor chip and the preset set of dicing quality parameters from the semiconductor device control information library, determining the interval to which the dicing process performance index of the semiconductor chip belongs, and assigning the preset set of dicing quality parameters corresponding to the interval to the semiconductor chip corresponding to the dicing process performance index, thereby obtaining the preset set of dicing quality parameters of the semiconductor chip.

[0065] Determination of the degree of compliance of dicing quality: The semiconductor chip after dicing is recorded as various semiconductor sub-chips, and the quality of each semiconductor sub-chip is monitored based on the real-time control component. At the same time, the preset set of dicing quality parameters of the semiconductor chip is integrated, and the degree of compliance of the dicing quality of each semiconductor sub-chip is determined based on the processor.

[0066] The above-mentioned real-time control components refer to a plurality of devices for monitoring the quality of each semiconductor sub-chip, including but not limited to a length sensor and a chipping length sensor.

[0067] The above-mentioned processor is the device for data processing in this example. Its function is to receive the quality monitoring data of each semiconductor sub-chip sent by the real-time control component, determine the degree of compliance of the dicing quality of each semiconductor sub-chip, and complete the real-time control of the semiconductor chip through data processing.

[0068] Specifically, the dicing quality compliance value of each semiconductor sub-chip is analyzed in the following process: By monitoring the quality of each semiconductor sub-chip, quality monitoring data of each semiconductor sub-chip is obtained, from which the length and width of each semiconductor sub-chip are extracted, and the edge collapse length and edge collapse width of each semiconductor sub-chip are obtained.

[0069] The specific values ​​of the above-mentioned length, width, chipping length and chipping width can be obtained through the length sensor and chipping length sensor in the real-time control component.

[0070] The length and width of each semiconductor sub-chip are used to obtain the surface area of ​​each semiconductor sub-chip through an area formula, and the chipping length and chipping width of each semiconductor sub-chip are used to obtain the chipping area of ​​each semiconductor sub-chip through an area formula.

[0071] The surface area of ​​each semiconductor sub-chip is ratio-processed with the edge collapse area of ​​each semiconductor sub-chip to obtain the edge collapse rate of each semiconductor sub-chip.

[0072] The preset set of dicing quality parameters of the above-mentioned semiconductor chip specifically includes a preset length, a preset width, and a defined chipping rate.

[0073] The dicing quality compliance value of each semiconductor sub-chip is comprehensively determined, and the specific expression is:

[0074] In the formula is the dicing quality compliance value of the ith semiconductor sub-chip. In this embodiment, when the length and width of the semiconductor sub-chip are close to the preset length and preset width, that is, the difference is small, it means that the dicing operation of the semiconductor chip is relatively successful, and its dicing performance is relatively stable, and it is performed according to the preset parameters. Therefore, when the semiconductor sub-chip is diced, the fluctuation of cutting quality caused by parameter changes is reduced, so that the chipping edge of the sub-chip will be reduced, so that the corresponding chipping edge length and chipping edge width will be reduced accordingly, and at the same time, the chipping edge rate of the semiconductor sub-chip is reduced. If the chipping edge rate of the semiconductor sub-chip is smaller than the defined chipping edge rate, the dicing quality of the semiconductor sub-chip will be higher.

[0075] In this embodiment, when the adsorption index of the semiconductor chip is high, it means that the wafer can maintain a fixed position well during the cutting process, which is beneficial to the dicing process operation. When the performance index of the dicing equipment of the semiconductor chip is large, the cutting deviation caused by the movement or vibration of the dicing equipment can be reduced, thereby improving the dicing accuracy of the dicing equipment. That is, when the dicing process performance index of the semiconductor chip increases, the damage such as chip edge collapse and burrs can be reduced during the cutting process, thereby improving the overall dicing quality of the semiconductor sub-chip, thereby improving the dicing quality compliance value of the semiconductor sub-chip.

[0076] i is the number of each semiconductor sub-chip, , m is the total number of semiconductor sub-chips.

[0077] is the length of the ith semiconductor sub-chip, which refers to the length of the semiconductor sub-chip after the dicing operation is completed.

[0078] The preset length refers to a preset standard length of a semiconductor sub-chip.

[0079] is the width of the ith semiconductor sub-chip, which refers to the width of the semiconductor sub-chip after the dicing operation is completed.

[0080] The preset width refers to a preset standard width of a semiconductor sub-chip.

[0081] is the edge collapse rate of the ith semiconductor sub-chip, which refers to the ratio of the surface area of ​​the semiconductor sub-chip to the edge collapse area of ​​each semiconductor sub-chip.

[0082] To define the edge collapse rate, it refers to a pre-set minimum edge collapse rate of a semiconductor sub-chip.

[0083] It is a correction factor corresponding to the dicing quality compliance value predefined in the semiconductor device control information library.

[0084] In a specific embodiment, a fitting curve is obtained by fitting the historical length, historical width, historical chipping rate and the dicing quality compliance value of the semiconductor sub-chip, and the real-time length, width and chipping rate are brought into the fitting curve to obtain a correction factor corresponding to the dicing quality compliance value in this embodiment. At the same time, the value range in this embodiment is (0, 1).

[0085] In this embodiment, the preset length is set to 5 mm, the preset width is set to 3 mm, the defined chipping rate is set to 10%, and the correction factor corresponding to the dicing quality compliance value is set to 0.43.

[0086] In this embodiment, the dicing quality compliance values ​​of the above-mentioned semiconductor sub-chips are as shown in Table 2: Table 2 Numerical changes between the dicing quality compliance value and its parameters

[0087] It should be explained that the data in the above table are data of different dimensions and have different units and magnitudes. Therefore, a normalized data processing method is used for the data in the above table to eliminate the dimensional differences and weight imbalance problems between different features and improve the convergence speed and accuracy of the above expression.

[0088] In this embodiment, according to the table of the above-mentioned dicing quality compliance values ​​of each semiconductor sub-chip, it can be learned that when the length of the semiconductor sub-chip, the width of the semiconductor sub-chip, and the chipping rate of the semiconductor sub-chip are close to the preset values, that is, the smaller the difference between the two, the greater the dicing quality compliance value of the semiconductor sub-chip will be, which means that the semiconductor chip does not have too many chipping, displacement, falling and other problems during the cutting process, thereby ensuring the quality and reliability of the semiconductor chip.

[0089] Semiconductor device quality control: Compare the dicing quality compliance value of each semiconductor sub-chip with the preset dicing quality compliance range, count the semiconductor sub-chips with unqualified quality, and issue quality warning prompts to each unqualified semiconductor sub-chip through the quality warning mechanism, ultimately achieving quality control of semiconductor devices.

[0090] The above-mentioned quality warning mechanism refers to a management mechanism that is connected to the processor through wireless communication technology, and by receiving each unqualified semiconductor sub-chip in the processor, accurately obtains the unqualified quality of the semiconductor chip during the dicing process, issues a warning on the quality of the semiconductor chip, and then solves the potential dicing quality problems of the semiconductor sub-chip, thereby improving the dicing quality and production efficiency of the semiconductor sub-chip.

[0091] Furthermore, the quality control of semiconductor devices is achieved by analyzing the following process: The dicing quality compliance value of each semiconductor sub-chip is compared with the dicing quality compliance range preset in the semiconductor device control information library. If the dicing quality compliance value of a semiconductor sub-chip belongs to the dicing quality compliance range, it means that the dicing quality of the semiconductor sub-chip has met the established quality standards and its dicing process is relatively stable, then there is no need to issue a quality warning prompt for the semiconductor sub-chip.

[0092] If the dicing quality compliance value of a semiconductor sub-chip does not fall within the dicing quality compliance range, the semiconductor sub-chip will be recorded as a semiconductor sub-chip with unqualified quality. Thus, all semiconductor sub-chips whose dicing quality compliance values ​​do not fall within the dicing quality compliance range are recorded as semiconductor sub-chips with unqualified quality. A quality warning mechanism is used to issue a quality warning to each unqualified semiconductor sub-chip, thereby ultimately achieving quality control of semiconductor devices.

[0093] The specific process of the above-mentioned early warning prompt is: when it is detected that the dicing quality compliance value of the semiconductor sub-chip does not belong to the dicing quality compliance range, the quality early warning mechanism automatically triggers the early warning, analyzes the quality parameters that trigger the early warning, and compares them with the quality parameter reference values ​​defined in the semiconductor device control information library to determine whether they truly represent a dicing quality problem. If the quality parameter that triggers the early warning is less than the quality parameter reference value, it is determined that the quality parameter that triggers the early warning truly represents a dicing quality problem. Once it is confirmed that the semiconductor sub-chip has a dicing quality problem, the quality early warning mechanism will automatically send early warning information to the operator, including key information such as the problem type, location, and scope of impact, and the operator will then investigate and handle the problem.

[0094] A second aspect of the present invention provides a device in a real-time control method of a semiconductor device, characterized in that it comprises: Semiconductor chips and real-time control components, processors, and quality early warning mechanisms.

[0095] The semiconductor chip is used to connect with the real-time control component through flip chip bonding technology.

[0096] The flip-chip bonding technology mentioned above achieves electrical connection by forming bumps on the chip and then connecting it directly to the package substrate or another chip, and also to the real-time control components.

[0097] The real-time control component is used to monitor the quality of each semiconductor sub-chip and obtain quality monitoring data of each semiconductor sub-chip.

[0098] The processor is used to connect with the real-time control component through wireless communication technology, receive the quality monitoring data of each semiconductor sub-chip sent by the real-time control component, and determine each semiconductor sub-chip with unqualified quality.

[0099] The quality warning mechanism is used to connect with the processor through wireless communication technology, receive each semiconductor sub-chip with unqualified quality in the processor, and issue a quality warning prompt.

[0100] The above contents are merely examples and explanations of the structure of the present invention. The technicians in this technical field may make various modifications or additions to the specific embodiments described or replace them in a similar manner. As long as they do not deviate from the structure of the invention or exceed the scope defined by the present invention, they should all fall within the protection scope of the present invention.

Claims

1. A real-time control method for a semiconductor device, characterized in that: include: Slicing process performance index evaluation: through the slicing process of the semiconductor chip in the semiconductor device, the slicing process parameters of the semiconductor chip are obtained, and the slicing process performance index of the semiconductor chip is evaluated, so as to match and obtain the preset set of slicing quality parameters of the semiconductor chip; Determination of the dicing quality compliance value: the diced semiconductor chip is recorded as each semiconductor sub-chip, and the quality of each semiconductor sub-chip is monitored based on the real-time control component. At the same time, the dicing quality parameter preset set of the semiconductor chip is integrated, and the dicing quality compliance value of each semiconductor sub-chip is determined based on the processor; Semiconductor device quality control: Compare the dicing quality compliance value of each semiconductor sub-chip with the preset dicing quality compliance range, count the semiconductor sub-chips with unqualified quality, and issue quality warning prompts to each unqualified semiconductor sub-chip through the quality warning mechanism, ultimately achieving quality control of semiconductor devices.

2. A real-time control method for a semiconductor device according to claim 1, characterized in that: The specific analysis process of achieving quality control of semiconductor devices is as follows: The dicing quality compliance value of each semiconductor sub-chip is compared with a preset dicing quality compliance range. If the dicing quality compliance value of a semiconductor sub-chip does not fall within the dicing quality compliance range, the semiconductor sub-chip is recorded as a semiconductor sub-chip of unqualified quality. Thus, each semiconductor sub-chip whose dicing quality compliance value does not fall within the dicing quality compliance range is recorded as a semiconductor sub-chip of unqualified quality, and a quality warning mechanism is used to issue a quality warning prompt to each unqualified semiconductor sub-chip, thereby ultimately achieving quality control of semiconductor devices.

3. A real-time control method for a semiconductor device according to claim 2, characterized in that: The dicing quality compliance value of each semiconductor sub-chip is specifically analyzed as follows: By performing quality monitoring on each semiconductor sub-chip, quality monitoring data of each semiconductor sub-chip is obtained, from which the length and width of each semiconductor sub-chip are extracted, and the edge collapse length and edge collapse width of each semiconductor sub-chip are obtained; The length and width of each semiconductor sub-chip are used to obtain the surface area of ​​each semiconductor sub-chip through an area formula, and the length and width of the chipped edge of each semiconductor sub-chip are used to obtain the chipped edge area of ​​each semiconductor sub-chip through an area formula; The surface area of ​​each semiconductor sub-chip is processed by ratio with the edge collapse area of ​​each semiconductor sub-chip to obtain the edge collapse rate of each semiconductor sub-chip; The preset set of dicing quality parameters of the semiconductor chip mentioned above specifically includes a preset length, a preset width, and a defined edge collapse rate, which comprehensively determines the dicing quality compliance value of each semiconductor sub-chip.

4. The real-time control method of a semiconductor device according to claim 1, characterized in that: The matching obtains a preset set of semiconductor chip dicing quality parameters, and the specific matching process is as follows: The dicing process performance index of the semiconductor chip is matched with the preset dicing quality parameter preset sets corresponding to the preset dicing process performance index intervals, so as to obtain the preset dicing quality parameter preset sets of the semiconductor chip.

5. The real-time control method of a semiconductor device according to claim 1, characterized in that: The semiconductor chip dicing processing parameters specifically include the use thickness of the semiconductor wafer, the charge of the semiconductor wafer at each processing time point, the ambient temperature of the semiconductor chip dicing processing area at each processing time point, the dicing speed of the dicing machine at each processing time point, and the blade thickness of the dicing machine.

6. The real-time control method of a semiconductor device according to claim 1, characterized in that: The specific analysis process of the semiconductor chip dicing process performance index is as follows: The dicing speed of the dicing machine at each processing time point is averaged to obtain the average dicing speed of the dicing machine during the processing cycle; The reference dicing speed and blade reference thickness of the dicing machine, the blade thickness of the dicing machine and the adsorption index of the semiconductor chip are extracted from the semiconductor device control information library to comprehensively analyze the dicing processing performance index of the semiconductor chip.

7. A real-time control method for a semiconductor device according to claim 6, characterized in that: The semiconductor chip dicing process performance index is specifically expressed as: ； in ; In the formula is the semiconductor chip dicing process performance index, It is the performance index of semiconductor chip dicing equipment. It is an index of the adsorption of semiconductor chips. is the average dicing speed of the dicing machine during the processing cycle, is the reference speed of the dicing machine, is the blade thickness of the dicing machine, The reference thickness of the dicing machine blade. is the weight factor corresponding to the performance index of the dicing equipment predefined in the semiconductor device control information library, is the weight factor corresponding to the adsorption index predefined in the semiconductor device control information library, is the impact factor corresponding to the unit value of blade thickness predefined in the semiconductor device control information library, and e is a natural constant.

8. A real-time control method for a semiconductor device according to claim 6, characterized in that: The specific analysis process of the adsorption index of the semiconductor chip is as follows: Performing difference processing on the use thickness of the semiconductor wafer and the preset wafer reference thickness to obtain the use thickness difference of the semiconductor wafer; Performing standard deviation processing on the charge amount of the semiconductor wafer at each processing time point and a preset charge amount reference value to obtain the charge fluctuation degree of the semiconductor wafer during the processing cycle; Arrange the ambient temperatures of the semiconductor chip dicing process area at each processing time point in descending order, and record the first-ranked ambient temperature as the maximum ambient temperature of the semiconductor chip dicing process area during the processing cycle; The wafer reference thickness, charge reference value, and ambient temperature limit value are extracted from the semiconductor device control information library, and the adsorption index of the semiconductor chip is comprehensively analyzed.

9. A real-time control method for a semiconductor device according to claim 8, characterized in that: The specific analysis process of the adsorption index of the semiconductor chip is as follows: ； In the formula It is an index of the adsorption of semiconductor chips. Due to the difference in thickness of semiconductor wafers, is the charge fluctuation of the semiconductor wafer during the processing cycle. It is the maximum ambient temperature of the semiconductor chip dicing process area during the processing cycle. is the ambient temperature limit value, The correction factor corresponding to the thickness difference predefined in the semiconductor device control information library, It is the impact factor corresponding to the charge fluctuation unit value predefined in the semiconductor device control information library.

10. A device for use in a real-time control method for a semiconductor device as claimed in any one of claims 1 to 9, characterized in that: include: Semiconductor chips and real-time control components, processors, and quality early warning mechanisms; The semiconductor chip is used to connect with the real-time control component through flip chip bonding technology; The real-time control component is used to monitor the quality of each semiconductor sub-chip and obtain quality monitoring data of each semiconductor sub-chip; The processor is used to connect to the real-time control component through wireless communication technology, receive quality monitoring data of each semiconductor sub-chip sent by the real-time control component, and determine each semiconductor sub-chip with unqualified quality; The quality warning mechanism is used to connect with the processor through wireless communication technology, receive each semiconductor sub-chip with unqualified quality in the processor, and issue a quality warning prompt.

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