Radio frequency power supply and test analysis method thereof

Abstract

The invention relates to a radio frequency power supply and a test analysis method thereof. The radio frequency power supply comprises a main controller; the slave controller adjusts and controls the output of the radio frequency power supply according to an instruction of the master controller or a preset algorithm so as to realize the logic function of the radio frequency power supply through programming; the DDS source generates a signal source with a specific waveform and frequency; the ADC detection module collects an analog signal of the radio frequency power supply and converts the analog signal into a digital signal; the DAC attenuation module converts the digital control signal into an analog control signal so as to adjust an output signal of the radio frequency power supply, and the DAC attenuation module adopts a low-speed operational amplifier so as to enable second power values obtained by checking a power correspondence table by the DDS source to be in one-to-one correspondence with the first power values by increasing response time; the PA power amplification module amplifies an output signal of the radio frequency power supply so as to meet the power requirement of a load; coupling / VI sensor signal transmission and coupling; and monitoring voltage and current values in the power supply system in real time.

Description

Technical Field

[0001] The present disclosure relates to the technical field of power supplies, and in particular to a radio frequency power supply and a test and analysis method thereof. Background Art

[0002] The RF power supply exhibits serious nonlinear characteristics. The DDS source output is a linear system with a frequency resolution of 500Mhz / 32bit, a phase resolution of 360 degrees / 14bit, and an amplitude resolution of 10mA / 10bit. It also has three output modes: single mode, modulation, and linear scanning frequency / phase / amplitude. The DAC attenuation output is approximately a linear system, but because the PA power amplifier uses an LDM0S tube, its gain is not only related to the static operating point, but also to the input power. It can be divided into a gain expansion zone in the low power output segment, a gain stabilization zone in the medium power segment, and a gain compression zone in the high power segment. See Figure 1-4 The characteristic curve shown in Figure 1, as well as the normalized chart of the DAC output value, output power and coupler forward power acquisition signal when working in open loop.

[0003] However, VIsensor has the characteristics of good stability and high linearity, but it is easily affected by the input impedance, power level and operating frequency of the ADC detector board; the two-channel signal link of the ADC detector board must ensure the consistency of its amplitude response and phase response, otherwise it will affect the detection accuracy. The test found that the two signals have inconsistent gains; Fourth, power resolution. 3kw / 6kw / 10kw / 24kw, products with different power levels have different resolutions in theory. The current adjustable methods of the system are: DDS amplitude modulation 10bit, DDS phase modulation 13bit, DAC attenuation 16bit. Excluding the maximum and minimum value ranges at both ends, there are not many truly adjustable ranges; PID control uses DAC attenuation output. The current circuit (BAP70Q) has a step response of about 10us. Due to the nonlinearity of the system output, the proportional gain coefficient of PID should be changed accordingly at different power levels.

[0004] In addition, multi-level power control can not meet the demand by adjusting DAC attenuation (response time is in ns level), so the power can be adjusted by adjusting the amplitude of DDS source output, or by using two-channel synthesis and adjusting the phase of one of the channels to achieve the purpose of output power control. The time resolution (minimum 8ns) of AD9959 can meet the demand, and the phase and amplitude can also basically meet the demand. Due to the nonlinear characteristics of the system loop, the second power value can be set by using a lookup table.

[0005] However, due to different settings of the first power value, the same DDS output represents different power values ​​after DAC attenuation, so the same second power lookup table output will appear, representing different power values ​​at different first power values. In other words, the DDS lookup table (amplitude, phase) is not unique, and has different values ​​due to different attenuation of BAP70Q, which will cause regulation fluctuations when the power level changes. Summary of the invention

[0006] The object of the present invention is to provide a radio frequency power supply and a test and analysis method thereof, aiming to at least partially solve the above-mentioned technical problems.

[0007] In order to achieve the above-mentioned object, a first aspect of an embodiment of the present disclosure provides a radio frequency power supply, the radio frequency power supply comprising:

[0008] Main controller MCU, slave controller FPGA, DDS source, ADC detection module, DAC attenuation module, PA power amplifier module, coupling / VI sensor;

[0009] Wherein, the main controller MCU is used for communication control, system protection, and protocol conversion;

[0010] The slave controller FPGA, as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the master controller MCU, so as to realize the logical functions of the RF power supply through programming;

[0011] The DDS source is used to generate a signal source with a specific waveform and frequency;

[0012] The ADC detection module is used to collect the analog signal of the RF power supply and convert the analog signal into a digital signal;

[0013] The DAC attenuation module is used to convert the digital control signal into an analog control signal to adjust the output signal of the RF power supply, wherein the DAC attenuation module adopts a low-speed operational amplifier to increase the response time so that the second power value obtained by the DDS source looking up the power correspondence table corresponds to the first power value one by one, wherein the first power value is the expected output power value under different scenarios, and the second power value is the actual output power value corresponding to the first power value. The power correspondence table provides the corresponding relationship between the expected output power value and the actual output power value of the DDS source, and the first power value is used to determine the power range that the signal source output by the DDS source can represent after DAC conversion and attenuation;

[0014] The PA power amplifier module is used to amplify the output signal of the RF power supply to meet the power demand of the load;

[0015] The coupling / VI sensor is used for signal transmission and coupling as well as real-time monitoring of voltage and current values ​​in a power supply system.

[0016] In one possible implementation, the DAC attenuation module includes: an operational amplifier U24B, a resistor R338, a resistor R242, a resistor R245, a resistor R244, a variable resistor VR2, and a capacitor C262, wherein the 0dB open-loop gain-bandwidth product of the operational amplifier is 1M, and the closed-loop bandwidth is 100k;

[0017] The first end of the resistor R338 is connected to the first end of the resistor R242 to form a first connection point; the second end of the resistor R338 is connected to the signal source output end of the DDS source, the second end of the resistor R242 is connected to the output end of the switch, the first end of the capacitor C262 is connected to the first connection point, and the second end of the capacitor C262 is grounded;

[0018] The output end of the operational amplifier U24B is simultaneously connected to the first end of the resistor R245 and the sliding contact end of the variable resistor VR2, and is constructed as the output end of the DAC attenuation module. The second end of the resistor R245 and the fixed first contact end of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact end of the variable resistor VR2 is suspended.

[0019] The non-inverting input terminal of the operational amplifier U24B is connected to the first connection point, the inverting input terminal of the operational amplifier U24B is connected to the first end of the resistor R242, the second end of the resistor R242 is grounded, and the first end of the resistor R242 is connected to the second connection point.

[0020] In one possible implementation, the operational amplifier is LM358.

[0021] In a possible implementation, the resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

[0022] A second aspect of the embodiments of the present disclosure provides a method for testing and analyzing a radio frequency power supply, which is applied to the radio frequency power supply described in any one of the first aspects, and the method includes:

[0023] Providing a series bias and multiple parallel biases to the RF power supply, wherein the series bias is 2B70_Vctrl, and the multiple parallel biases are all 300kHz-4GHz, to test and analyze the impulse response, overshoot, and oscillation to obtain a first test result, and to test the influence of the 2B70_Vctrl inductor and capacitor on the step and oscillation to obtain a second test result;

[0024] The amplitude of the DDS source output is adjusted to adjust the actual output power value of the RF power supply, or, two-channel synthesis is adopted to adjust the phase of any channel to adjust the actual output power value of the RF power supply.

[0025] In one possible implementation, the method further includes:

[0026] Dynamically adjust the PID proportional coefficient according to different power levels;

[0027] The digital signal input of the DAC attenuation module is 8192-65535, and the in-band output power value is determined to be 12dbm;

[0028] The input voltage is determined by the PA power amplification module to determine the static operating point, so that at a determined temperature, the corresponding relationship between the input of the digital signal of the DAC attenuation module and the output of the power amplifier is tested to obtain the power correspondence table.

[0029] In a possible implementation, dynamically adjusting the PID proportional coefficient according to different power levels includes:

[0030] Discretizing the power levels according to different power levels;

[0031] The PID proportional coefficient is dynamically adjusted according to the discretized power level.

[0032] In one possible implementation, the method further includes:

[0033] The input-output characteristic curve of the coupling / VI sensor is tested, wherein the input-output characteristic curve is constructed according to power, frequency, and temperature.

[0034] In one possible implementation, the method further includes:

[0035] The detection board is tested for consistency in amplitude and phase with the signal output by the radio frequency power supply, and the maximum output signal of the radio frequency power supply is tested to adjust the detection board.

[0036] In one possible implementation, the method further includes:

[0037] A handshake signal is added between the main controller MCU and the slave controller FPGA to provide query, reset and interrupt functions, thereby enhancing the robustness of the radio frequency power supply.

[0038] The present invention provides a radio frequency power supply and a test and analysis method thereof. Compared with the prior art, the present invention has the following beneficial effects:

[0039] By integrating the main controller MCU, the slave controller FPGA, the DDS source, the ADC detection module, the DAC attenuation module, the PA power amplifier module and the coupling / VI sensor, a highly integrated design is achieved, and each module works together to ensure the stability and efficiency of the system. As the core of communication control and system protection, the MCU is responsible for protocol conversion and overall scheduling, while the FPGA, as a programmable logic device, can flexibly adjust the output of the RF power supply according to the instructions of the MCU or the preset algorithm, realizing the programmability and high customization of the logic function.

[0040] Furthermore, the DAC attenuation module uses a low-speed operational amplifier to increase the response time, thereby ensuring a one-to-one correspondence between the second power value obtained by the DDS source looking up the power correspondence table and the first power value. This effectively solves the problem of regulation fluctuations caused by the nonlinearity of the system loop and improves the accuracy and stability of power control. The power correspondence table provides a correspondence between the expected output power value and the actual output power value, so that in different scenarios, the RF power supply can output the expected power value.

[0041] The RF power supply supports multiple power levels and achieves a wide power adjustment range through multiple adjustment methods such as DDS amplitude modulation, phase modulation, and DAC attenuation. In terms of multi-level power control, by adjusting the amplitude of the DDS source output or using two-channel synthesis technology, the requirements of ns-level response time are met, further improving the system's adjustment capability and adaptability.

[0042] Other features and advantages of the present disclosure will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0044] Figure 1 It is a circuit diagram of a DAC attenuation module according to an embodiment of the specification.

[0045] Figure 2 It is a schematic diagram of a large signal open-loop voltage gain according to an embodiment of the specification.

[0046] Figure 3 It is a schematic diagram showing the relationship between frequency, phase and amplitude according to an embodiment of the specification.

[0047] Figure 4 It is a schematic diagram showing a comparison of peripheral circuit parameters according to an embodiment of the specification.

[0048] Figure 5 It is a circuit diagram of a BAP70Q signal link according to an embodiment of the specification.

[0049] Figure 6 It is a flow chart of a radio frequency power supply test and analysis method shown according to an embodiment of the specification.

[0050] Figure 7 It is a schematic diagram showing the comparison of circuit parameters before and after optimization according to an embodiment of the specification.

[0051] Figure 8 It is a schematic diagram showing another comparison of circuit parameters before and after optimization according to an embodiment of the specification.

[0052] Fig. 9 It is a schematic diagram showing another comparison of circuit parameters before and after optimization according to an embodiment of the specification.

[0053] Fig.10 It is a schematic diagram showing another comparison of circuit parameters before and after optimization according to an embodiment of the specification.

[0054] Fig.11 It is a schematic diagram showing the comparison before and after adjustment of a PID coefficient according to an embodiment of the specification. DETAILED DESCRIPTION

[0055] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0056] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0057] The present disclosure provides a radio frequency power supply, specifically, the radio frequency power supply comprises:

[0058] Main controller MCU, slave controller FPGA, DDS source, ADC detection module, DAC attenuation module, PA power amplifier module, coupling / VI sensor;

[0059] Among them, the main controller MCU (Microcontroller Unit): a microcontroller unit is an integrated circuit chip that uses very large-scale integrated circuit technology to integrate a central processing unit CPU with data processing capabilities, random access memory RAM, read-only memory ROM, multiple I / 0 ports and interrupt systems, timer / counters and other functions (may also include display drive circuits, pulse width modulation circuits, analog multiplexers, A / D converters and other circuits) into a small and complete microcomputer system on a silicon chip.

[0060] From the controller FPGA (Field-Programmable Gate Array): Field-programmable gate array is a semi-custom circuit that solves the shortcomings of custom circuits and overcomes the shortcomings of the limited number of gate circuits of the original programmable devices. FPGA adopts the concept of logic cell array LCA (Logic Cell Array), which includes three parts: configurable logic module CLB (Configurable Logic Block), input and output module IOB (Input Output Block) and internal connection (Interconnect).

[0061] DDS source (Direct Digital Synthesis): Direct digital synthesis is a new frequency synthesis technology that directly synthesizes the required waveform from the phase concept. DDS is the abbreviation of Direct Digital Frequency Synthesizer, which is a new frequency synthesis method that directly synthesizes the required waveform from the phase perspective.

[0062] ADC detection module (Analog-to-Digital Converter): An analog-to-digital converter is a device that can convert continuously changing analog signals into discrete digital signals.

[0063] DAC attenuation module (Digital-to-Analog Converter): A digital-to-analog converter is a circuit that converts digital signals into analog signals. In this article, DAC is also used to implement the signal attenuation function.

[0064] PA power amplifier module (Power Amplifier): A power amplifier, referred to as a "power amplifier", refers to an amplifier that can generate maximum power output to drive a load (such as a speaker) under a given distortion rate. The power amplifier plays a pivotal role in "organization and coordination" in the entire audio system, and to some extent dominates whether the entire system can provide good sound quality output.

[0065] Coupling / VI Sensor (Voltage / Current Sensor): Voltage / current sensor, used to monitor the voltage and current values ​​in the power system in real time. Coupling refers to the process of transmitting a signal from one circuit part to another.

[0066] Wherein, the main controller MCU is used for communication control, system protection, and protocol conversion;

[0067] In the disclosed embodiment, the MCU is responsible for the overall communication control, system protection and protocol conversion of the RF power supply. It controls the working state of each module by receiving external instructions or internal algorithms to ensure the stable operation of the RF power supply.

[0068] For example: When the RF power supply receives an external start signal, the MCU will parse the signal and start the DDS source to generate a signal source with a specific waveform and frequency according to the preset algorithm or instruction, while monitoring the analog signal fed back by the ADC detection module to ensure the stability and accuracy of the output signal.

[0069] The slave controller FPGA, as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the master controller MCU, so as to realize the logical functions of the RF power supply through programming;

[0070] In the disclosed embodiment, FPGA, as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions of the MCU or the preset algorithm. FPGA implements the logical functions of the RF power supply through programming, such as signal source generation, signal attenuation, power amplification, etc.

[0071] For example: During the output regulation of the RF power supply, the FPGA can dynamically adjust the output frequency and waveform of the DDS source and the attenuation coefficient of the DAC attenuation module according to the instructions of the MCU, thereby achieving precise control of the RF power supply output.

[0072] The DDS source is used to generate a signal source with a specific waveform and frequency;

[0073] In the disclosed embodiment, the DDS source generates a corresponding signal source according to preset waveform and frequency parameters, and realizes digital synthesis of signals by using components such as a phase accumulator, a waveform memory, a D / A converter and a low-pass filter.

[0074] For example: when a 1MHz sine wave signal needs to be generated, the DDS source will calculate the phase value of each sampling point through the phase accumulator according to the preset frequency parameters, and then use the waveform memory to find the corresponding amplitude value, and finally output a continuous sine wave signal through the D / A converter and low-pass filter.

[0075] The ADC detection module is used to collect the analog signal of the radio frequency power supply and convert the analog signal into a digital signal;

[0076] In the disclosed embodiment, the ADC detection module collects the analog signal of the RF power supply and converts it into a digital signal. It uses an analog-to-digital converter to convert the continuous analog signal into a discrete digital signal for subsequent digital signal processing.

[0077] For example, when monitoring the output power of an RF power supply, the ADC detection module collects the analog signal (such as voltage or current) output by the RF power supply and converts it into a digital signal. Then, the MCU or FPGA can process these digital signals to calculate the output power.

[0078] The DAC attenuation module is used to convert the digital control signal into an analog control signal to adjust the output signal of the RF power supply, wherein the DAC attenuation module adopts a low-speed operational amplifier to increase the response time so that the second power value obtained by the DDS source looking up the power correspondence table corresponds to the first power value one by one, wherein the first power value is the expected output power value under different scenarios, and the second power value is the actual output power value corresponding to the first power value. The power correspondence table provides the corresponding relationship between the expected output power value and the actual output power value of the DDS source, and the first power value is used to determine the power range that the signal source output by the DDS source can represent after DAC conversion and attenuation;

[0079] In the disclosed embodiment, the DAC attenuation module converts the digital control signal into an analog control signal to adjust the output signal of the RF power supply. It uses a low-speed operational amplifier to increase the response time to ensure that the second power value obtained by the DDS source looking up the power correspondence table corresponds to the first power value.

[0080] For example: when the output power of the RF power supply needs to be adjusted, the MCU will look up the power correspondence table to obtain the corresponding digital control signal according to the preset first power value (expected output power value). Then, the DAC attenuation module converts the digital control signal into an analog control signal, and achieves precise adjustment of the RF power supply output signal by adjusting the gain or attenuation coefficient of the operational amplifier. Due to the use of a low-speed operational amplifier, the response time of the DAC attenuation module is relatively long, but it can ensure a one-to-one correspondence between the second power value (actual output power value) and the first power value.

[0081] The PA power amplifier module is used to amplify the output signal of the RF power supply to meet the power demand of the load;

[0082] In the disclosed embodiment, the PA power amplifier module amplifies the output signal of the RF power supply to meet the power demand of the load. It uses a power amplifier to amplify the input RF signal to a sufficient power level to drive the load (such as an antenna, a speaker, etc.).

[0083] For example, in a wireless communication system, the output signal of the RF power supply may be too weak to directly drive the antenna for signal transmission. At this time, the PA power amplifier module will amplify the signal to a sufficient power level so that the antenna can effectively transmit the signal.

[0084] The coupling / VI sensor is used for signal transmission and coupling as well as real-time monitoring of voltage and current values ​​in a power supply system.

[0085] In the disclosed embodiment, the coupling / VI sensor is used for signal transmission and coupling and real-time monitoring of the voltage and current values ​​in the power supply system. It uses the electromagnetic induction principle or the resistance voltage division principle to convert the voltage and current values ​​in the power supply system into measurable signals (such as voltage or current) for subsequent processing and analysis.

[0086] For example, when monitoring the working status of an RF power supply, the coupling / VI sensor will monitor the voltage and current values ​​in the power supply system in real time. When the voltage or current value exceeds the preset threshold, the sensor will issue an alarm signal so that timely measures can be taken to protect the power supply system from damage. At the same time, the sensor can also send the monitored data to the MCU or FPGA for further processing and analysis.

[0087] Among them, for the analog circuit algorithm of coupling / VI sensor, based on the basic principle of electromagnetic field induction, the current flowing through the conductor can be sampled by "inductive coupling", and the load voltage can be sampled by "capacitive coupling". The coil with a specially wound shape acts as a current sensor, and adding a circular electrode inside it can act as a voltage sensor. At present, the self-made sensor has capacitor and inductor effects together, and the output two signals contain common mode and differential mode signals. According to the principle of this sensor, the following description is made.

[0088] The two output signals of the sensor are defined as A1 and A2 respectively. Once the sensor structure, turns ratio and material are fixed, the size and phase of the two output signals are theoretically only related to the input and output. In order to accurately measure the load impedance, the sensor needs to be calibrated. First, assume that the outputs of A1 and A2 are linear (actually functions of frequency and power). Test their curves at a fixed frequency, and they should be a fixed ratio on a standard 50 ohm load (if it is actually a function of power and frequency, it should be compensated).

[0089] According to different implementation methods, it can be divided into analog implementation and digital implementation. The digital implementation method has completed digital down-conversion, extraction filtering, and baseband signal processing. In order to solve the problem that the RF frequency is unknown and changes rapidly due to load changes, especially when the matching device and plasma load are monitored in real time, analog circuits can be used to achieve down-conversion, thereby using low-speed and high-resolution baseband DC sampling chips.

[0090] Assume that the input of channel 1 is A1 and the input of channel 2 is A2, which are voltage U1 and current signal I1 (voltage signal representation) respectively. As shown in the figure below, a resistor-capacitor voltage divider phase-shift network is used to generate voltage signal U2 and current signal I2 respectively, and digital down-conversion and impedance power calculation are realized through analog multiplier and low-pass filtering.

[0091] Assume that the current signal i 1 =I m cos(ωt), voltage signal u 1 =U m ·cos(ωt+α), where α is the voltage-current phase difference, then i 2 =I m ·cos(ωt+β),u 2 =U m ·cos(ωt+α-(π / 2-β)). Assuming the operating frequency is f=13.56MHz, then X C2 =1 / (2·π·f·c2)=1 / (2·pi·13.56·68e-6)=172.6Ω, β=49°, in order to reduce the error, the phase shift angle can be 45°, and then the value is selected according to the resistance and capacitance sequence. The resistance and capacitance values ​​of the two phase shift branches are equal to achieve a 90-degree phase shift of the synthetic signal. The calculation is as follows, LPF=low pass filter, analog low-pass filter, RC low-pass network can be used in actual implementation,

[0092] P r =LPF(u 1 ·i 1 )=0.5·U m I m ·cos(α)=U·I·cos(α)

[0093] P i =LPF(u 2 ·i 2 )=0.5·U m I m ·cos(π / 2-α)=U·I.sin(α)

[0094] I 2 =LPF(i 1 ·i1 )

[0095] The above three signals are analog operations, using analog multipliers plus low-pass filtering to achieve orthogonal down-conversion, which has high precision and simple structure. Low-rate and high-resolution ADC sampling can be used, and then other operations can be performed in the digital domain.

[0096]

[0097] When normalized with a standard 50 ohm load,

[0098] Z0=50Ω

[0099]

[0100] Therefore, the normalized impedance is calculated as:

[0101]

[0102] The calculation formula for FPGA implementation, where the correction coefficient k is the amplitude ratio of the two signals A1 and A2, When the load is standard, the phase difference between the two signals A1 and A2 and the phase shift of the ADC signal link should be as small as possible. Each sensor must be measured. The proportional coefficients of the two sensors currently installed are very different, one of which has an amplitude ratio of about 6.8 and the other about 2.5. At the same time, the consistency of the two signals of the signal detection board must be ensured, and the amplification factor and phase shift must be as consistent as possible, otherwise it will cause errors.

[0103]

[0104] Symbols used only for calculations

[0105] Symbols used only for calculations

[0106]

[0107] P L =P r

[0108]

[0109] P R =P O -P L

[0110] For the digital circuit algorithm of the coupled / VI sensor, in order to accurately measure the load impedance, the sensor needs to be calibrated. First, assume that the outputs of A1 and A2 are linear and should be a fixed ratio on a standard 50 ohm load (if it is actually a function of power and frequency, it should be compensated). Assume that the input of channel 1 is A1 and the input of channel 2 is A2, then:

[0111]

[0112] When normalized with a standard 50 ohm load,

[0113] Z 0 =50Ω

[0114]

[0115] (In order to stabilize this coefficient, R 1 Purely resistive is best)

[0116] Therefore, the normalized impedance is calculated as:

[0117]

[0118]

[0119] because It is a linear function of frequency. Therefore, when setting power, the voltage and current sensor outputs of the same power value will change with the change of frequency. Therefore, the frequency coefficient must be reversely compensated when calculating power. From the current inductance output formula, its value is a straight line passing through the zero point, but because the sensor operating frequency covers 2-60M, it cannot be completely regarded as a straight line passing through zero. However, it is possible to regard it as a complete straight line near a certain center frequency point. When calibrating power, only the center frequency power needs to be verified, and other frequencies will automatically adjust the voltage and current coefficients.

[0120] The calculation formula is 0≤Cor≤2 (ideally Cor≤1), the current correction multiplication factor in this formula is (f 0 , 1) A straight line with a negative slope at point , by adjusting the value of Cor, its slope can be adjusted to compensate for the positive slope of the frequency of the current output, so that the current value of any frequency is a certain value when calculating the power.

[0121] At the same time, since the calculation of the reflection coefficient is related to the source impedance and the load impedance, the influence of the source impedance must be considered when calculating the forward power.

[0122] The following is the calculation formula for FPGA implementation, where the correction coefficient k is the amplitude ratio of the two signals A1 and A2. When the load is standard, the phase difference between the two signals A1 and A2 and the phase shift of the ADC signal link should be as small as possible. At the same time, the consistency of the two signals of the signal detector board must be ensured, and the amplification factor and phase shift must be as consistent as possible, otherwise it will cause errors.

[0123]

[0124] P R =P O -P L

[0125] The above technical solution realizes a highly integrated design by integrating the main controller MCU, the slave controller FPGA, the DDS source, the ADC detection module, the DAC attenuation module, the PA power amplifier module and the coupling / VI sensor. The modules work together to ensure the stability and efficiency of the system. As the core of communication control and system protection, the MCU is responsible for protocol conversion and overall scheduling, while the FPGA, as a programmable logic device, can flexibly adjust the output of the RF power supply according to the instructions of the MCU or the preset algorithm, realizing the programmability and high customization of the logic function.

[0126] Furthermore, the DAC attenuation module uses a low-speed operational amplifier to increase the response time, thereby ensuring a one-to-one correspondence between the second power value obtained by the DDS source looking up the power correspondence table and the first power value. This effectively solves the problem of regulation fluctuations caused by the nonlinearity of the system loop and improves the accuracy and stability of power control. The power correspondence table provides a correspondence between the expected output power value and the actual output power value, so that in different scenarios, the RF power supply can output the expected power value.

[0127] The RF power supply supports multiple power levels and achieves a wide power adjustment range through multiple adjustment methods such as DDS amplitude modulation, phase modulation, and DAC attenuation. In terms of multi-level power control, by adjusting the amplitude of the DDS source output or using two-channel synthesis technology, the requirements of ns-level response time are met, further improving the system's adjustment capability and adaptability.

[0128] In one possible implementation, see Figure 1 As shown, the DAC attenuation module includes: an operational amplifier U24B, a resistor R338, a resistor R242, a resistor R245, a resistor R244, a variable resistor VR2 and a capacitor C262, wherein the 0dB open-loop gain-bandwidth product of the operational amplifier is 1M, and the closed-loop bandwidth is 100k;

[0129] The first end of the resistor R338 is connected to the first end of the resistor R242 to form a first connection point; the second end of the resistor R338 is connected to the signal source output end of the DDS source, the second end of the resistor R242 is connected to the output end of the switch, the first end of the capacitor C262 is connected to the first connection point, and the second end of the capacitor C262 is grounded;

[0130] The output end of the operational amplifier U24B is simultaneously connected to the first end of the resistor R245 and the sliding contact end of the variable resistor VR2, and is constructed as the output end of the DAC attenuation module. The second end of the resistor R245 and the fixed first contact end of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact end of the variable resistor VR2 is suspended.

[0131] The non-inverting input terminal of the operational amplifier U24B is connected to the first connection point, the inverting input terminal of the operational amplifier U24B is connected to the first end of the resistor R242, the second end of the resistor R242 is grounded, and the first end of the resistor R242 is connected to the second connection point.

[0132] In the disclosed embodiment, the resistor R338 and the resistor R242 are connected in series to form a voltage divider circuit for dividing the signal provided by the signal source output terminal of the DDS source and sending it to the non-inverting input terminal of the operational amplifier U24B.

[0133] Capacitor C262 is connected in parallel between the output end (ie, the first connection point) of the voltage divider circuit and the ground to filter out high-frequency noise and improve the stability of the circuit.

[0134] The operational amplifier U24B forms a feedback circuit, and its output end is connected through the resistor R245 and the sliding contact end of the variable resistor VR2 to form an attenuated output signal. Its 0dB open-loop gain-bandwidth product is 1M, and the closed-loop bandwidth is about 100k, so its response time is relatively long, so the output of the RF power supply can be optimized.

[0135] The variable resistor VR2 is used to adjust the attenuation coefficient. By changing the position of the sliding contact end, the amplitude of the output signal can be changed. The second end (ground end) of the resistor R242 is also connected to the inverting input end of the operational amplifier U24B to form a negative feedback, which helps to stabilize the output of the circuit.

[0136] When the DDS source provides a digital control signal, the signal is sent to the non-inverting input of the operational amplifier U24B after passing through the voltage divider circuit of resistors R338 and R242. The operational amplifier U24B outputs an amplified or attenuated signal based on the voltage difference between the non-inverting input and the inverting input (grounded through resistor R242). Since the inverting input is grounded, the output signal mainly depends on the voltage of the non-inverting input. After the output signal passes through resistor R245 and variable resistor VR2, an attenuated output signal is formed. The attenuation coefficient is determined by the resistance values ​​of resistor R245 and variable resistor VR2. Capacitor C262 is used to filter out high-frequency noise and ensure the stability of the output signal.

[0137] In one possible implementation, the operational amplifier is LM358.

[0138] In a possible implementation, the resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

[0139] As shown in FIG. 24, Figure 2 shows that the large signal open-loop voltage gain gradually decreases, and Figure 3 The relationship between the output frequency, phase and amplitude is obtained. Figure 4 The following is a comparison of the peripheral circuit parameters before and after the main control board uses LM358.

[0140] The present disclosure also provides a method for testing and analyzing a radio frequency power supply, which is applied to the radio frequency power supply in any one of the above embodiments. Figure 5 The BAP70Q signal chain shown can provide both series biasing and multiple parallel biasing, see Figure 6 As shown, the method includes:

[0141] In step S11, a series bias and multiple parallel biases are provided to the RF power supply, wherein the series bias is 2B70_Vctrl, and the multiple parallel biases are all 300kHz-4GHz, so as to test and analyze the impulse response, overshoot, and oscillation to obtain a first test result, and to test the influence of the 2B70_Vctrl inductor and capacitor on the step and oscillation to obtain a second test result;

[0142] Among them, series bias: In a circuit, series bias refers to adding a bias voltage or current to a circuit element in series to control or adjust the working state of the element.

[0143] Parallel Bias: In contrast to series bias, parallel bias is the addition of bias voltage or current to circuit elements in parallel, which is also used to control or adjust the working state of the elements.

[0144] Impulse Response: The response of a system to a transient input signal (such as an impulse signal). In RF power supplies, impulse response can reflect the power supply's ability to handle burst signals.

[0145] Overshoot: The phenomenon where a signal briefly exceeds its steady-state value before reaching its steady-state value. In RF power supplies, overshoot may cause unwanted energy release or signal distortion.

[0146] Oscillation: A periodic change in voltage or current in a circuit. In RF power supplies, unwanted oscillations can cause signal degradation or power supply instability.

[0147] DDS source (Direct Digital Synthesis Source): Direct digital synthesis source is a signal source that can generate high-precision, programmable frequency and phase.

[0148] Two-Channel Synthesis: The synthesis of signals from two or more channels to produce the desired output signal. In RF power supplies, this can be used to adjust the output power or implement other complex signal modulation.

[0149] In the disclosed embodiments, in order to test the performance of the RF power supply, different types of bias need to be provided to it. Series bias (such as 2B70_Vctrl) is used to control the operating point of a specific component (such as a transistor or amplifier) ​​in the power supply. Multiple parallel biases (such as signals in the range of 300kHz-4GHz) are used to simulate multiple frequency components that may be encountered in actual applications to test the impulse response, overshoot, and oscillation characteristics of the power supply.

[0150] For example: Assuming that the RF power supply contains a power amplifier, its operating point can be adjusted by series bias (such as 2B70_Vctrl) to ensure that the amplifier works in the best state. At the same time, multiple parallel bias signals (such as 300kHz, 1GHz, 4GHz, etc.) can be input to the amplifier to observe its response to signals of different frequencies. Through these tests, the first test results can be obtained, including characteristics such as impulse response, overshoot and oscillation.

[0151] In the embodiment of the present disclosure, the presence of components such as inductors and capacitors in the RF power supply will affect the stability of the power supply. In order to understand the impact of these components on the performance of the power supply, a special test can be performed. By changing the value of 2B70_Vctrl, the response of the inductor and capacitor to the step input signal and the possible oscillation can be observed.

[0152] For example: Assume there is an RF power circuit that includes an inductor L and a capacitor C. You can observe the response of the inductor and capacitor to a step input signal by changing the value of 2B70_Vctrl. If there is obvious oscillation in the response, you may need to adjust the value of the inductor or capacitor to improve the stability of the power supply. Through these tests, you can get the second test result and understand the impact of the inductor and capacitor on the power supply performance.

[0153] In step S12, the amplitude of the DDS source output is adjusted to adjust the actual output power value of the RF power supply, or, two-channel synthesis is adopted to adjust the phase of any channel to adjust the actual output power value of the RF power supply.

[0154] In the disclosed embodiment, the actual output power value of the RF power supply can be adjusted by adjusting the output amplitude of the DDS source or by using two-channel synthesis. By changing the output amplitude of the DDS source, the output power of the RF power supply can be directly controlled. In addition, by two-channel synthesis, the signal synthesis of two or more channels can be used to generate the required output power value. By adjusting the phase of any channel, the amplitude and phase of the synthesized signal can be changed, thereby adjusting the output power.

[0155] For example: suppose there is an RF power supply whose output power needs to be adjusted by a DDS source. The output power of the RF power supply can be directly controlled by changing the output amplitude of the DDS source. In addition, if two-channel synthesis is used to adjust the output power, the signal synthesis of the two channels can be used to generate the required output power value. For example, if the output power needs to be doubled, the phases of the two channels can be adjusted to be the same (i.e., in-phase synthesis), so that the amplitude of the synthesized signal will be doubled, thereby achieving output power adjustment.

[0156] Furthermore, for the characteristics of BAP70Q and the operating frequency of the current circuit, the comparison of circuit parameters before and after optimization can be found in Figure 7-10 shown.

[0157] In one possible implementation, the method further includes:

[0158] Dynamically adjust the PID proportional coefficient according to different power levels;

[0159] Among them, PID proportional coefficient: In the PID (proportional-integral-differential) control system, the proportional coefficient determines the system's response speed to the error signal. In the RF power supply, the adjustment of the PID proportional coefficient can optimize the dynamic performance and stability of the power supply.

[0160] In the disclosed embodiment, in the RF power supply, the PID control system is used to adjust the output voltage or current to maintain a stable output power. However, different power levels may require different PID proportional coefficients to optimize performance. Therefore, the PID proportional coefficient can be dynamically adjusted according to the current power level. This usually involves two steps: first, the power level is discretized into several intervals; then, a suitable PID proportional coefficient is set for each interval.

[0161] For example: Assume that the RF power supply needs to operate at three power levels of 10W, 20W, and 30W. These three power levels can be discretized into three intervals, and different PID proportional coefficients can be set for each interval. For example, in the 10W interval, a smaller PID proportional coefficient may be selected to improve the stability of the system; while in the 30W interval, a larger PID proportional coefficient may be selected to speed up the response of the system. In this way, the PID proportional coefficient can be dynamically adjusted according to the current power level, thereby optimizing the performance of the RF power supply.

[0162] The digital signal input of the DAC attenuation module is 8192-65535, and the in-band output power value is determined to be 12dbm;

[0163] As before, the DAC attenuation module is used to convert digital signals into analog signals and control the output power by attenuation. In order to determine the correspondence between the digital signal input of the DAC attenuation module and the output of the power amplifier, it is necessary to test the output power of the power amplifier under different digital signal inputs at a certain temperature. This usually involves the following steps: first, set the digital signal input range of the DAC attenuation module (such as 8192-65535); then, measure the power value of the power amplifier output under each digital signal input; finally, record these measurement results and generate a power correspondence table.

[0164] For example: Assume that the digital signal input range of the DAC attenuation module is 8192-65535, and the in-band output power value is 12dBm. The power amplifier output power values ​​under different digital signal inputs (such as 8192, 16384, 32768, 65535, etc.) can be tested at a temperature of 25°C. For example, when the digital signal input is 8192, the power amplifier output power may be 10dBm; when the digital signal input is 65535, the power amplifier output power may be 14dBm. By recording these measurement results and generating a power correspondence table, the digital signal input value of the DAC attenuation module can be set according to the required output power in actual applications.

[0165] The input voltage is determined by the PA power amplification module to determine the static operating point, so that at a determined temperature, the corresponding relationship between the input of the digital signal of the DAC attenuation module and the output of the power amplifier is tested to obtain the power correspondence table.

[0166] Among them, static operating point: in electronic equipment, static operating point refers to the working state of the circuit when there is no input signal. In RF power supply, the determination of static operating point is crucial to ensure the stability and efficiency of the power supply.

[0167] Power Mapping Table: It records the correspondence between different input signals (such as the digital signal of the DAC attenuation module) and the output power of the power amplifier. In the RF power supply, the power mapping table is used to achieve precise power control.

[0168] In the embodiment of the present disclosure, in the RF power supply, the input voltage of the PA power amplifier module has an important influence on its output power and efficiency. In order to determine the static operating point, it is necessary to measure the output power and efficiency of the PA at different input voltages at a certain temperature. Then, the input voltage that makes the output power and efficiency of the PA reach the best balance point can be selected as the static operating point.

[0169] For example: Assume that the PA power amplifier module is tested at a temperature of 25°C. The input voltage can be gradually increased, and the output power and efficiency of the PA can be measured at each input voltage. For example, when the input voltage is 3V, the PA output power may be 10W and the efficiency may be 50%; when the input voltage is 4V, the PA output power may be 15W and the efficiency may be 60%. By comparing the output power and efficiency values ​​at different input voltages, the input voltage (such as 3.5V) that makes the two reach the best balance point can be selected as the static operating point. In this way, it can be ensured that the RF power supply operates in a stable and efficient state.

[0170] See also Fig.11As shown in the figure, after the circuit parameters are optimized and the PID coefficients are adjusted, the multi-power can be adjusted by only 70Q in about 100us, so theoretically the forward power can be stabilized within 100us-200us.

[0171] In a possible implementation, dynamically adjusting the PID proportional coefficient according to different power levels includes:

[0172] Discretizing the power levels according to different power levels;

[0173] Among them, power level discretization (Power Level Discretization): divide the continuous power range into several discrete power levels or intervals, so that each interval can be controlled and optimized separately.

[0174] In the application of the RF power supply in the embodiment of the present disclosure, since different application scenarios or load conditions may require different output powers, it is necessary to flexibly control the power. In order to simplify the control logic and improve the response speed of the system, the continuous power range can be divided into several discrete power levels. Each power level corresponds to a specific output power range, and different control parameters (such as PID proportional coefficient) can be set as needed.

[0175] For example, assuming that the output power range of the RF power supply is 0-100W, this range can be divided into 5 discrete power levels: 0-20W, 20-40W, 40-60W, 60-80W and 80-100W. Each power level corresponds to a specific PID proportional coefficient setting. For example, in the lower power level (0-20W), in order to maintain the stability of the system, a smaller PID proportional coefficient may be selected; while in the higher power level (80-100W), in order to quickly respond to load changes, a larger PID proportional coefficient may be selected.

[0176] The PID proportional coefficient is dynamically adjusted according to the discretized power level.

[0177] In the disclosed embodiment, once the power level is discretized, different PID proportional coefficients can be set for each power level. In practical applications, the control system of the RF power supply monitors the output power in real time and dynamically adjusts the PID proportional coefficient according to the current power level. This dynamic adjustment can ensure that the RF power supply can maintain a stable output under different load conditions and respond quickly to load changes.

[0178] Continuing with the above example, assume that the current output power of the RF power supply is 30W, which belongs to the second power level (20-40W). According to the preset control strategy, the control system will adjust the PID proportional coefficient to a value suitable for this power level. If the output power suddenly increases to 65W and enters the fourth power level (60-80W), the control system will immediately detect this change and automatically adjust the PID proportional coefficient to a new value suitable for this power level. In this way, the RF power supply can always maintain a stable output and quickly adapt to load changes.

[0179] In summary, by discretizing the power level and dynamically adjusting the PID proportional coefficient according to the discretized power level, the RF power supply can achieve precise control of the output power while improving the stability and response speed of the system.

[0180] In one possible implementation, the method further includes:

[0181] The input-output characteristic curve of the coupling / VI sensor is tested, wherein the input-output characteristic curve is constructed according to power, frequency, and temperature.

[0182] In the embodiment of the present disclosure, in the case of RF open-loop output, power linearity data is collected for the RF power sensor according to different output powers, and power test collection data of the sensor channel and the ADC signal acquisition link channel under different output powers in multiple power test indicators are obtained;

[0183] According to the multiple test frequency points set for the sensor, frequency linearity data of the RF power sensor is collected to obtain frequency test collection data of the sensor channels and ADC signal acquisition link channels corresponding to the multiple test frequency points;

[0184] Determine power test results corresponding to different output powers according to power test collection data of the sensor channel and the ADC signal acquisition link channel at multiple power test indicators and power meter calibration data at different output powers;

[0185] Frequency test results corresponding to different frequency indicators are obtained based on the frequency test acquisition data of the sensor channels and the ADC signal acquisition link channels corresponding to the multiple test frequency points.

[0186] Wherein, the frequency linearity data of the RF power sensor is collected according to the multiple test frequency points set for the sensor, and the frequency test collection data of the sensor channel and the ADC signal collection link channel corresponding to the multiple test frequency points are obtained, including:

[0187] Adjusting the parameter value of the target module in the radio frequency power supply according to the plurality of test frequency points averagely set within a preset frequency range;

[0188] The output signals of the sensor channels and the ADC signal acquisition link channels corresponding to the multiple test frequency points are collected.

[0189] Wherein, adjusting the parameter value of the target module in the RF power supply according to the plurality of test frequency points averagely set within the preset frequency range includes:

[0190] According to the plurality of test frequency points averagely set within a preset frequency range, adjusting the parameter value of the DAC attenuation module in the RF power supply so that the output power of the RF power supply is fixed at a preset power;

[0191] The frequency test acquisition data of the sensor channels and the ADC signal acquisition link channels corresponding to the multiple test frequency points are obtained to obtain frequency test results corresponding to different frequency indicators, including:

[0192] The power value is calculated according to the output signals of the sensor channel and the ADC signal acquisition link channel, and the frequency response of the sensor channel and the ADC signal acquisition link channel is tested.

[0193] Among them, the parameter value of the DAC attenuation module is 1500W.

[0194] Wherein, adjusting the parameter value of the target module in the RF power supply according to the plurality of test frequency points averagely set within the preset frequency range includes:

[0195] According to the plurality of test frequency points averagely set within a preset frequency range, adjusting the signal source of the DDS source in the radio frequency power supply to a preset fixed value;

[0196] The frequency test acquisition data of the sensor channels and the ADC signal acquisition link channels corresponding to the multiple test frequency points are obtained to obtain frequency test results corresponding to different frequency indicators, including:

[0197] The power value is calculated according to the output signals of the sensor channel and the ADC signal acquisition link channel, and the frequency response of the ADC signal acquisition link channel is tested.

[0198] Wherein, the signal source of the DDS source is 18dbm.

[0199] Among them, the preset frequency range is 12.882M-14.238M.

[0200] The multiple power test indicators include: forward power, reverse power, standing wave ratio, current and voltage;

[0201] In the case of RF open-loop output, power linearity data is collected for the RF power sensor according to different output powers, and power test collection data of the sensor channel and the ADC signal acquisition link channel under different output powers in multiple power test indicators are obtained, including:

[0202] In the case of RF open-loop output, different output powers are adjusted linearly to achieve stable output of the power amplifier after each output power switching, and the forward power, reverse power and standing wave ratio of the power meter are recorded;

[0203] After IQ demodulation, filtering, and extraction, the test acquisition data of the sensor channel and the ADC signal acquisition link channel on the current and the voltage at different output powers are recorded respectively.

[0204] In one possible implementation, the method further includes:

[0205] The detection board is tested for consistency in amplitude and phase with the signal output by the radio frequency power supply, and the maximum output signal of the radio frequency power supply is tested to adjust the detection board.

[0206] Among them, the detector board is used to detect the amplitude and phase of the RF signal, and usually includes a detector and other related circuits to convert the RF signal into a measurable DC voltage or current.

[0207] In the disclosed embodiment, the detector board is a key component in the RF power supply system for monitoring the amplitude and phase of the output signal. In order to ensure that the output signal of the RF power supply can accurately reflect its actual working state, the detector board needs to be calibrated and tested. First, by comparing the signal output by the RF power supply with the signal detected by the detector board, the consistency of the detector board in amplitude and phase can be evaluated. Secondly, by testing the maximum output signal of the RF power supply, the performance of the detector board under high power conditions can be verified. If the detector board is found to be biased or unstable, it can be adjusted accordingly to ensure its accuracy.

[0208] For example: Assume that the output power range of the RF power supply is 0-100W, and a detector board is designed to monitor the amplitude and phase of the output signal. During manufacturing or maintenance, a signal generator can be used to generate an RF signal of known amplitude and phase as the input of the RF power supply. Then, observe and record the signal output by the RF power supply and the signal detected by the detector board. By comparing the amplitude and phase differences between the two, the consistency of the detector board can be evaluated. In addition, the input power of the RF power supply can be gradually increased until it reaches its maximum output power to test the performance of the detector board under high power conditions. If the detector board is found to be deviated, it can be corrected by adjusting its internal circuit parameters or calibrating its measurement range.

[0209] In one possible implementation, the method further includes:

[0210] A handshake signal is added between the main controller MCU and the slave controller FPGA to provide query, reset and interrupt functions, thereby enhancing the robustness of the radio frequency power supply.

[0211] The handshake signal is used to confirm that the master controller MCU and the slave controller FPGA are ready to perform data transmission or operation, so as to ensure the correct transmission and execution of data or commands.

[0212] In the disclosed embodiment, in the RF power supply system, the main controller MCU is usually responsible for the overall control logic and data processing, while the slave controller FPGA is responsible for specific signal processing and control tasks. In order to ensure the reliability of communication and data transmission between the two, a handshake signal can be added. The handshake signal is a two-way communication mechanism used to confirm that both parties are ready for data transmission or execution. Through the handshake signal, the MCU can query the status of the FPGA, reset the FPGA, or trigger an interrupt operation, thereby achieving precise control of the FPGA. This mechanism can greatly improve the robustness and reliability of the RF power supply.

[0213] For example: Assume that there is an MCU as the main controller in the RF power supply system, which is responsible for controlling the generation, power regulation and status monitoring of RF signals; at the same time, there is an FPGA as a slave controller, which is responsible for processing the digital part of the RF signal, such as modulation, demodulation, filtering, etc. In order to enhance the robustness of the system, a handshake signal can be added between the MCU and the FPGA. For example, when the MCU needs to query the current status of the FPGA, it can send a query request signal to the FPGA. After receiving the request, the FPGA will return a status signal to the MCU to confirm its current working status. If the MCU needs to reset the FPGA, it can send a reset signal to the FPGA. After receiving the reset signal, the FPGA will perform a reset operation and return a confirmation signal to the MCU. In addition, if the FPGA detects any abnormal situation or needs to interrupt the current operation of the MCU, it can send an interrupt signal to the MCU. After receiving the interrupt signal, the MCU will immediately stop the current operation and turn to handle the interrupt event. In this way, the communication and data transmission between the MCU and the FPGA become more reliable and stable, thereby enhancing the robustness of the RF power supply.

[0214] The preferred embodiments of the present disclosure are described in detail above in conjunction with the accompanying drawings; however, the present disclosure is not limited to the specific details in the above embodiments; within the technical concept of the present disclosure, various changes, modifications, substitutions and variations may be made to these embodiments, and these changes, modifications, substitutions and variations all fall within the protection scope of the present disclosure.

[0215] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any appropriate manner without contradiction, and they should also be regarded as the contents disclosed in this disclosure. In order to avoid unnecessary repetition, this disclosure will not further describe various possible combinations. The technical scope of this application is not limited to the contents in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A radio frequency power supply, characterized in that: The radio frequency power supply comprises: Main controller MCU, slave controller FPGA, DDS source, ADC detection module, DAC attenuation module, PA power amplifier module, coupling / VI sensor; Wherein, the main controller MCU is used for communication control, system protection, and protocol conversion; The slave controller FPGA, as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the master controller MCU, so as to realize the logical functions of the RF power supply through programming; The DDS source is used to generate a signal source with a specific waveform and frequency; The ADC detection module is used to collect the analog signal of the radio frequency power supply and convert the analog signal into a digital signal; The DAC attenuation module is used to convert the digital control signal into an analog control signal to adjust the output signal of the RF power supply, wherein the DAC attenuation module adopts a low-speed operational amplifier to increase the response time so that the second power value obtained by the DDS source looking up the power correspondence table corresponds to the first power value one by one, wherein the first power value is the expected output power value under different scenarios, and the second power value is the actual output power value corresponding to the first power value. The power correspondence table provides the corresponding relationship between the expected output power value and the actual output power value of the DDS source, and the first power value is used to determine the power range that the signal source output by the DDS source can represent after DAC conversion and attenuation; The PA power amplifier module is used to amplify the output signal of the RF power supply to meet the power demand of the load; The coupling / VI sensor is used for signal transmission and coupling as well as real-time monitoring of voltage and current values ​​in a power supply system.

2. The radio frequency power supply according to claim 1, characterized in that: The DAC attenuation module includes: an operational amplifier U24B, a resistor R338, a resistor R242, a resistor R245, a resistor R244, a variable resistor VR2 and a capacitor C262, wherein the 0dB open-loop gain-bandwidth product of the operational amplifier is 1M, and the closed-loop bandwidth is 100k; The first end of the resistor R338 is connected to the first end of the resistor R242 to form a first connection point; the second end of the resistor R338 is connected to the signal source output end of the DDS source, the second end of the resistor R242 is connected to the output end of the switch, the first end of the capacitor C262 is connected to the first connection point, and the second end of the capacitor C262 is grounded; The output end of the operational amplifier U24B is simultaneously connected to the first end of the resistor R245 and the sliding contact end of the variable resistor VR2, and is constructed as the output end of the DAC attenuation module. The second end of the resistor R245 and the fixed first contact end of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact end of the variable resistor VR2 is suspended. The non-inverting input terminal of the operational amplifier U24B is connected to the first connection point, the inverting input terminal of the operational amplifier U24B is connected to the first end of the resistor R242, the second end of the resistor R242 is grounded, and the first end of the resistor R242 is connected to the second connection point.

3. The radio frequency power supply according to claim 2, characterized in that: The operational amplifier is LM358.

4. The radio frequency power supply according to claim 2, characterized in that: The resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

5. A radio frequency power supply test and analysis method, characterized in that: The radio frequency power supply applied to any one of claims 1 to 4, the method comprising: Providing a series bias and multiple parallel biases to the RF power supply, wherein the series bias is 2B70_Vctrl, and the multiple parallel biases are all 300kHz-4GHz, to test and analyze the impulse response, overshoot, and oscillation to obtain a first test result, and to test the influence of the 2B70_Vctrl inductor and capacitor on the step and oscillation to obtain a second test result; The amplitude of the DDS source output is adjusted to adjust the actual output power value of the RF power supply, or, two-channel synthesis is adopted to adjust the phase of any channel to adjust the actual output power value of the RF power supply.

6. The radio frequency power supply test and analysis method according to claim 5, characterized in that: The method further comprises: Dynamically adjust the PID proportional coefficient according to different power levels; The digital signal input of the DAC attenuation module is 8192-65535, and the in-band output power value is determined to be 12dbm; The input voltage is determined by the PA power amplification module to determine the static operating point, so that at a determined temperature, the corresponding relationship between the input of the digital signal of the DAC attenuation module and the output of the power amplifier is tested to obtain the power correspondence table.

7. The radio frequency power supply test and analysis method according to claim 6, characterized in that: The PID proportional coefficient is dynamically adjusted according to different power levels, including: Discretizing the power levels according to different power levels; The PID proportional coefficient is dynamically adjusted according to the discretized power level.

8. The radio frequency power supply test and analysis method according to any one of claims 5 to 7, characterized in that: The method further comprises: The input-output characteristic curve of the coupling / VI sensor is tested, wherein the input-output characteristic curve is constructed according to power, frequency, and temperature.

9. The radio frequency power supply test and analysis method according to any one of claims 5 to 7, characterized in that: The method further comprises: The detection board is tested for consistency in amplitude and phase with the signal output by the radio frequency power supply, and the maximum output signal of the radio frequency power supply is tested to adjust the detection board.

10. The radio frequency power supply test and analysis method according to any one of claims 5 to 7, characterized in that: The method further comprises: A handshake signal is added between the main controller MCU and the slave controller FPGA to provide query, reset and interrupt functions, thereby enhancing the robustness of the radio frequency power supply.

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