A High-temperature Point Bending Equivalent Life Test Method for Board-level SMD Packages

Abstract

The present invention discloses a method for high-temperature point-bending equivalent life test of board-level SMD packages, which relates to the technical field of electronic packaging and includes: designing a board-level SMD package high-temperature point-bending test board; performing strain analysis on the board-level SMD package under conventional temperature cycling to obtain the characteristic value of the strain difference under conventional temperature cycling; performing strain analysis on the board-level SMD package under high-temperature point-bending conditions to obtain the characteristic value of the strain difference under high-temperature point-bending; obtaining the high-temperature point-bending acceleration factor based on the characteristic value of the strain difference under conventional temperature cycling, the characteristic value of the strain difference under high-temperature point-bending, and the life model; and obtaining the high-temperature point-bending equivalent life test scheme for the board-level SMD package based on the high-temperature point-bending acceleration factor. The present invention solves the problems in the prior art such as long test cycle, low efficiency, and inability to comprehensively simulate the comprehensive stress borne by the package in actual use.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic packaging, and particularly relates to a method for testing the equivalent high-temperature point bending life of board-level SMD packaging. Background Art

[0002] With the development of electronic products towards high performance and miniaturization, the SMD (Surface Mounted Device) packaging form has become one of the most commonly used packaging methods for electronic components. SMD packaging has the advantages of high density, low weight, and high reliability, and is widely used in various electronic products such as integrated circuits, sensors, and communication devices. However, with the increasing complexity of the functions of electronic products, especially the increasing requirements for reliability under environmental conditions such as high temperature and mechanical stress, higher requirements are put forward for the reliability testing of SMD packages.

[0003] Currently, the reliability verification of SMD packages is mainly carried out through temperature cycle tests. This method simulates the thermal stress and thermal expansion effects that SMD packages may encounter in the actual working environment by cycling between different temperatures. Temperature cycle tests are widely used to evaluate the heat resistance of solder joints and packages, and to verify whether they can maintain normal functions and structural stability during long-term use.

[0004] However, the existing temperature cycle tests have many limitations:

[0005] (1) Long test cycle and low efficiency. The temperature cycle test has a long cycle and requires multiple high and low temperature cycles. This not only wastes a lot of time, but also has low efficiency when verifying multiple processes or design schemes.

[0006] (2) It is difficult to simulate the comprehensive stress borne by the package in actual use. Conventional temperature cycle tests mainly focus on the influence of thermal stress on SMD packages and cannot fully simulate the influence of mechanical stresses (such as bending stress and vibration stress) on solder joints and packages, resulting in inaccurate evaluation of the actual reliability of packages in some cases.

[0007] (3) Unable to quickly screen and verify process parameters. Due to the long cycle of temperature cycle tests and the main focus on the influence of thermal cycles, the optimization and screening process of process parameters requires a long time of testing and analysis. The time consumption of conventional test methods leads to a bottleneck in the R & D process and reduces the overall productivity and market response speed.

[0008] (4) Unable to accurately evaluate the durability of solder joints at high temperature. In temperature cycle tests, thermal stress is mainly applied to solder joints through temperature changes, but the stress concentration and fatigue problems of solder joints at high temperature are not deeply evaluated. Summary of the Invention

[0009] In view of the above deficiencies in the prior art, a method for testing the equivalent life of high-temperature point bending of board-level SMD packages provided by the present invention solves the limitations existing in the existing temperature cycle test.

[0010] In order to achieve the above object of the invention, the technical solution adopted by the present invention is: a method for testing the equivalent life of high-temperature point bending of board-level SMD packages, comprising the following steps:

[0011] S1: Design a board-level SMD package high-temperature point bending test board;

[0012] S2: Based on the board-level SMD package high-temperature point bending test board, perform strain analysis of the board-level SMD package under conventional temperature cycling to obtain the characteristic value of the strain difference under conventional temperature cycling;

[0013] S3: Based on the board-level SMD package high-temperature point bending test board, perform strain analysis of the board-level SMD package under high-temperature point bending conditions to obtain the characteristic value of the strain difference under high-temperature point bending;

[0014] S4: Based on the characteristic value of the strain difference under conventional temperature cycling, the characteristic value of the strain difference under high-temperature point bending, and the life model, obtain the high-temperature point bending acceleration factor;

[0015] S5: Based on the high-temperature point bending acceleration factor, obtain the equivalent life test plan for the board-level SMD package high-temperature point bending.

[0016] Further, the board-level SMD package high-temperature point bending test board in S1 includes fixing holes, an SMD array, and a stress application area.

[0017] Further, the following sub-steps are included in S2:

[0018] S21: Establish a finite element model of the board-level SMD package high-temperature point bending test board;

[0019] S22: Set the temperature profile under conventional temperature cycling;

[0020] S23: Place the finite element model of the board-level SMD package high-temperature point bending test board in the temperature field of the temperature profile under conventional temperature cycling, and calculate the characteristic value of the strain difference under conventional temperature cycling , the formula is:

[0021]

[0022]

[0023] Among them, is the characteristic value of the temperature strain difference between the highest and lowest temperatures of the encapsulation body in the th encapsulation body, is the characteristic value of the temperature strain difference between the highest and lowest temperatures of the solder joints of the encapsulation body in the th encapsulation body. is the total number of packages in the SMD array.

[0024] Further, the step S3 includes the following sub-steps:

[0025] S31: Establish a finite element model of the board-level SMD package high-temperature point bending test board and the indenter;

[0026] S32: Set the temperature profile under high-temperature point bending conditions;

[0027] S33: Place the finite element model of the board-level SMD package high-temperature point bending test board and the indenter in the temperature field of the temperature profile under high-temperature point bending conditions, move the indenter down according to the set value, and calculate the characteristic value of the high-temperature point bending strain difference , and the formula is:

[0028]

[0029]

[0030] where is the characteristic value of the strain difference of the package at the highest and lowest points of the indenter in the th package, is the characteristic value of the strain difference of the package solder joint at the highest and lowest points of the indenter in the th package.

[0031] Further, the step S4 includes the following sub-steps:

[0032] S41: Calculate the ratio matrix of the conventional temperature cycle strain difference characteristic value and the high-temperature point bending strain difference characteristic value which is:

[0033]

[0034] S42: Based on the ratio matrix and the life model, calculate the high-temperature point bending acceleration factor, and the life model is:

[0035]

[0036] where is the number of life cycles, is the fatigue ductility coefficient, is the fatigue ductility index;

[0037] The high-temperature point bending acceleration factor is:

[0038]

[0039] where is the high-temperature point bending acceleration factor matrix;

[0040] Take the average value of the high-temperature point bending acceleration factor matrix as the high-temperature point bending acceleration factor .

[0041] Furthermore, based on the high-temperature point bending acceleration factor and the equivalent temperature cycle times of the board-level SMD package , obtain the stress cycle times as follows:

[0042]

[0043] Based on the stress cycle times , obtain the high-temperature point bending equivalent life test plan for the board-level SMD package

[0044] Compared with the prior art, by proposing a high-temperature point bending equivalent life test method for board-level SMD packages, the present invention significantly improves the reliability evaluation efficiency and accuracy of SMD packages in high-temperature environments. The beneficial effects of the present invention are reflected in the following aspects:

[0045] (1) Significantly shorten the test cycle and improve the test efficiency. The present invention uses the high-temperature point bending test to replace the traditional temperature cycle test. It only takes about 20 seconds to complete one high-temperature point bending cycle, while the temperature cycle test usually takes more than 20 minutes. It can effectively shorten the test cycle, meet the needs of quickly screening and verifying various process parameters, and greatly reduce the test time and R & D costs.

[0046] (2) Comprehensively simulate the combined stress and improve the accuracy of reliability evaluation. Through finite element analysis combined with the high-temperature point bending test, the present invention comprehensively considers the combined effects of mechanical stress (bending stress) and thermal stress under high-temperature conditions on solder joints and packages, and can more realistically reflect the stress response of solder joints and packages in the actual working environment, avoiding the reliability evaluation deviation caused by ignoring mechanical stress in the traditional temperature cycle test.

[0047] (3) Quickly screen and verify process parameters and support parallel verification of multiple schemes. By using the acceleration characteristics of the point bending test and calculating the equivalent cycle life in combination with the life model, the present invention quickly screens and verifies different process parameters, significantly improves the efficiency of process optimization and design scheme verification, and meets the needs of rapid product iteration.

[0048] (4) Accurately evaluate the durability of solder joints and reduce the failure risk. Aiming at the stress concentration and fatigue problems of solder joints under high-temperature conditions, the present invention uses the indenter displacement control technology to accurately apply mechanical stress and calculate the strain eigenvalue, and can discover the potential failure modes of solder joints under the combined action of high-temperature mechanical stress and thermal stress, reducing the reliability risk of products in actual applications.

[0049] (5) Reduce the test cost and have a wide range of applications. Since the test method of the present invention can complete the high-temperature reliability test in a short time and does not require complex temperature cycling equipment, the test cost is significantly reduced. While meeting the accurate test requirements, it is applicable to various types of SMD packages and test environments, and has extensive engineering application value. Description of the Drawings

[0050] Figure 1 It is a flowchart of a board-level SMD package high-temperature point bending equivalent life test method according to the present invention.

[0051] Figure 2 It is a schematic diagram of the distribution method of a typical SMD package test board.

[0052] Figure 3 It is a schematic diagram of a board-level SMD package high-temperature point bending test device.

[0053] Figure 4 It is a schematic diagram of the size parameters of the SMD package body.

[0054] Figure 5 It is a schematic diagram of the size parameters of the high-temperature point bending indenter.

[0055] Figure 6 It is a single-cycle profile of a conventional temperature cycle test.

[0056] Figure 7 It is a high-temperature point bending test ambient temperature profile.

[0057] Figure 8 It is a high-temperature point bending test indenter displacement profile.

[0058] Figure 9 It is a finite element model mesh division diagram of a typical case.

[0059] Wherein: 1. Typical SMD package test board; 2. Fixed hole; 3. SMD array; 4. Stress application area. Detailed Implementation Manner

[0060] The present invention will be further described below with reference to the drawings and specific embodiments.

[0061] As Figure 1 shown, a board-level SMD package high-temperature point bending equivalent life test method includes the following steps:

[0062] S1: Design a board-level SMD package high-temperature point bending test board;

[0063] S2: Based on the board-level SMD package high-temperature point bending test board, conduct strain analysis of the board-level SMD package under conventional temperature cycling to obtain the characteristic value of the conventional temperature cycling strain difference;

[0064] S3: Based on the board-level SMD package high-temperature point bending test board, conduct strain analysis of the board-level SMD package under high-temperature point bending conditions to obtain the characteristic value of the high-temperature point bending strain difference;

[0065] S4: Based on the characteristic value of the conventional temperature cycle strain difference, the characteristic value of the high-temperature point bending strain difference, and the life model, obtain the high-temperature point bending acceleration factor;

[0066] S5: Based on the high-temperature point bending acceleration factor, obtain the equivalent life test plan for the board-level SMD package under high-temperature point bending.

[0067] In the above S1, the board-level SMD package high-temperature point bending test board includes fixing holes 2, SMD arrays 3, and stress application areas 4.

[0068] In this embodiment, the SMD devices to be tested are arranged on the board-level SMD package high-temperature point bending test board. The distribution method of the typical SMD package test board 1 is as Figure 2 shown, mainly including three parts: fixing holes 2, SMD arrays 3, and stress application areas 4. The circuit board is mainly placed in the device as Figure 3 shown for high-temperature point bending tests. The fixing holes 2 are fixed using standard studs. The circuit board design parameters include the length l pcbx , width l pcby , thickness h pcbz , the aperture of the fixing holes r 1 and the coordinates ([[]] x f1 , y f1 ), ([[]] x f2 , y f2 ), ([[]] x f3 , y f3 ), ([[]] x f4 , y f4 ), etc. The SMD array size parameters include the x-direction pitch d x , the y-direction pitch d y , x the number of elements in the x n x direction, the number of elements in the y direction n y, the parameters of the SMD package mainly include the package length lx, width ly, thickness lz, as well as the solder joint height h sold, the support height h stand, the pad pitch d sold, the pad length lx pad, and the pad width ly pad, as Figure 4 shown. The downward pressure uses a circular indenter for downward pressure, and the dimensional parameters are the indenter radius R ind and the indenter height H ind, as Figure 5 shown.

[0069] The S2 described above includes the following sub-steps:

[0070] S21: Establish a finite element model of the board-level SMD package high-temperature point bending test board;

[0071] S22: Set the temperature profile under the conventional temperature cycle;

[0072] S23: Place the finite element model of the board-level SMD package high-temperature point bending test board in the temperature field of the temperature profile under the conventional temperature cycle, and calculate the characteristic value of the conventional temperature cycle strain difference , the formula is:

[0073]

[0074]

[0075] Among them, is the characteristic value of the temperature strain difference between the highest and lowest temperatures in the th package, is the characteristic value of the temperature strain difference between the highest and lowest temperatures of the solder joints in the th package, is the total number of packages in the SMD array.

[0076] In this embodiment, for the conventional temperature cycle condition, the strain of the board-level SMD package is analyzed. First, a finite element model of the board-level SMD package test board is established, including settings such as geometric model, material assignment, mesh generation, and boundary conditions; then, the temperature conditions of the conventional temperature cycle are determined, mainly including the room temperature T0, the highest temperature T1, the high-temperature immersion time t1, the lowest temperature T2, the low-temperature immersion time t2, and the temperature change rate v. The temperature profile of the conventional temperature cycle is as Figure 6 shown, where t11 = (T1 - T0) / v, t12 = t11 + t1, t13 = t12 + (T1 - T2) / v, t14 = t13 + t2, t15 = t14 + (T0 - T2) / v; furthermore, set the entire model in the temperature field of the above temperature profile, and calculate all the strain difference eigenvalue matrices of the packages and solder joints in the SMD package at the highest and lowest temperature time points , the mean, maximum or minimum value can be selected as the eigenvalue. Finally, the maximum value U of the vertical displacement of the circuit board in the indenter area of the high-temperature and low-temperature circuit boards is extracted Ind-1 , the minimum value U Ind-2 .

[0077] The S3 includes the following sub-steps:

[0078] S31: Establish a finite element model of the board-level SMD package high-temperature point bending test board and the indenter;

[0079] S32: Set the temperature profile under high-temperature point bending conditions;

[0080] S33: Place the finite element model of the board-level SMD package high-temperature point bending test board and the indenter in the temperature field of the temperature profile under high-temperature point bending conditions, move the indenter down according to the set value, and calculate the eigenvalue of the high-temperature point bending strain difference , the formula is:

[0081]

[0082]

[0083] Among them, is the strain difference eigenvalue of the package at the highest and lowest points of the indenter in the th package, is the strain difference eigenvalue of the solder joints of the package at the highest and lowest points of the indenter in the th package.

[0084] In this embodiment, for high-temperature point bending conditions, the strain of the board-level SMD package is analyzed. First, a finite element model of the board-level SMD package test board and the indenter is established, including geometric model, material assignment, mesh generation, boundary conditions, and contact settings; then, the temperature profile of the high-temperature point bending conditions is set, mainly using the same maximum temperature T1, high-temperature immersion time t1, and temperature change rate v as in step S2. The temperature profile of the high-temperature point bending conditions is as Figure 7 shown, where t11 = (T1 - T0) / v, t12 = t11 + t1; furthermore, the displacement value of the indenter moving vertically downward with respect to the circuit board is set. The initial value is selected as 1.5 to 2 times of U Ind-1 , the downward displacement is selected as U Ind-2 , the downward movement time is t3, the displacement holding time is t4, and the displacement curve is as Figure 8 shown, where t11 = (T1 - T0) / v, t12 = t11 + t1, t21 = t12 + t3, t22 = t21 + t4, t23 = t22 + t3, and subsequently the temperature remains unchanged, repeating the indenter point bending cycle process; furthermore, the entire model is placed in the temperature field of the above temperature profile, and the indenter is moved downward by a displacement UInd-2 , calculate the eigenvalue matrix of all strain differences of the package body and solder joints in the SMD package at the highest and lowest points of the indenter , and the mean value, maximum value or minimum value can be selected as the eigenvalue.

[0085] The S4 includes the following sub-steps:

[0086] S41: Calculate the ratio matrix of the conventional temperature cycle strain difference eigenvalue and the high-temperature point bending strain difference eigenvalue which is:

[0087]

[0088] S42: Based on the ratio matrix and the life model, calculate the high-temperature point bending acceleration factor, and the life model is:

[0089]

[0090] where, is the number of life cycles, is the fatigue ductility coefficient (material-related), is the fatigue ductility index (material-related);

[0091] The high-temperature point bending acceleration factor is:

[0092]

[0093] where, is the high-temperature point bending acceleration factor matrix;

[0094] Take the average value of the high-temperature point bending acceleration factor matrix as the high-temperature point bending acceleration factor .

[0095] According to the high-temperature point bending acceleration factor and the equivalent temperature cycle times of the board-level SMD package, obtain the stress cycle times which is:

[0096]

[0097] Based on the stress cycle times , obtain the high-temperature point bending equivalent life test plan of the board-level SMD package.

[0098] The high-temperature point bending equivalent life test plan of the board-level SMD package is shown in Table 1:

[0099] Table 1 High-temperature point bending equivalent life test plan of board-level SMD package

[0100]

[0101] With this technical solution, the present invention can provide an efficient and accurate method for testing the high-temperature reliability of SMD packages. Since the shortest high-temperature point-bending cycle can be completed in 20 seconds, while temperature cycling usually takes more than 20 minutes, by quickly applying stress and having a clear equivalent relationship, it solves the problems of high cost, long cycle, and limitations in the prior art and has a broad application prospect.

[0102] In an embodiment of the present invention, the specific operation process of the board-level SMD package high-temperature point-bending equivalent life test method is as follows:

[0103] S1: Design a board-level SMD package high-temperature point-bending test board.

[0104] 1) Test board structure design

[0105] Design a test board suitable for high-temperature point-bending tests (as shown in Figure 2 ). An SMD device array to be tested is arranged on the test board, and the key parameters are as follows:

[0106] Circuit board: The length of the circuit board is l pcbx = 40 mm, the width is l pcby = 40 mm, and the thickness is h pcbz = 2 mm;

[0107] Fixing holes: The hole diameter is r 1 = 2.0 mm and the coordinates are (4 mm, 4 mm), (36 mm, 4 mm), (36 mm, 36 mm), (4 mm, 36 mm);

[0108] SMD array: The pitch in the x direction is d x = 6.0 mm, the pitch in the y direction is d y = 6.0 mm, x The number of directions is n x = 5, and the number of directions in the y direction is n y = 5;

[0109] SMD package: The package has a length of lx = 2.0 mm, a width of ly = 1.27 mm, a thickness of lz = 0.5 mm, a solder joint height of hsold = 0.5 mm, a support height of hstand = 0.2 mm, a pad pitch of dsold = 1.2 mm, a pad length of lxpad = 0.8 mm, and a pad width of lypad = 1.4 mm;

[0110] Circular indenter: The indenter has a radius of Rind = 1.0 mm and a height of Hind = 2.0 mm.

[0111] 2) Test device

[0112] The test device includes a bracket for fixing the test board, a loading mechanism for the adjustable indenter, and a heating device. The bracket fixes the four fixing points of the test board, and the indenter is vertically aligned with the central area of the test board. The heating device uses a constant temperature heating box, which can stably control the test environment temperature at T 1 = 150 °C.

[0113] S2: Based on the board-level SMD package high-temperature point bending test board, perform strain analysis of the board-level SMD package under normal temperature cycling to obtain the characteristic values of the strain difference under normal temperature cycling.

[0114] 1) Finite element model establishment

[0115] Establish a three-dimensional geometric model of the test board, and assign material properties to the test board and the SMD package. Among them, the PCB board is made of FR4 material, the SMD solder joint is SAC305, and the package is barium titanate ceramic. Use commercial finite element analysis software to divide the mesh as Figure 9 shown. The boundary conditions are set to be fixed at the fixed holes at the four corners of the test board, and the remaining SMD packages, SMD solder joints, and SMD solder joints and PCB boards all use bonded constraints.

[0116] 2) Temperature cycling conditions

[0117] Define the temperature profile of the temperature cycle: room temperature T0 = 25 °C, maximum temperature T1 = 150 °C, minimum temperature T2 = -40 °C, heating rate v = 20 °C / min, high-temperature immersion time t1 = 15 min, low-temperature immersion time t2 = 15 min, and the single-cycle time is 48 min.

[0118] Calculate all the strain difference eigenvalue matrices of the package and solder joints in the SMD package at the highest and lowest temperature time points , and select the maximum value as the eigenvalue here. The calculation results of the eigenvalue matrix are shown in Table 2:

[0119] Table 2 Eigenvalue matrix Calculation results

[0120]

[0121] Extract the maximum value U of the vertical displacement of the circuit board in the indenter area for high-temperature and low-temperature circuit boards Ind-1 = 0.1105 mm, and the minimum value U Ind-2 = -0.0451 mm.

[0122] S3: Based on the board-level SMD package high-temperature point bending test board, conduct strain analysis of the board-level SMD package under high-temperature point bending conditions to obtain the characteristic value of the high-temperature point bending strain difference.

[0123] 1) Finite element model establishment

[0124] On the basis of the finite element model of the board-level SMD package test board established above, add the finite element model of the indenter, which is located directly above the board-level SMD package test board, and set the contact to the general contact type.

[0125] 2) High-temperature point bending cycle conditions

[0126] Define the high-temperature point bending cycle conditions: room temperature T0 = 25 °C, maximum temperature T1 = 150 °C, heating rate v = 20 °C / min, high-temperature immersion time t1 = 15 min, and the overall time is t12 = t11 + t1 = (T1 - T0) / v + t1 = 21.25 min. After that, continuously maintain at the maximum temperature T1 level and conduct the high-temperature point bending test. The initial position of the indenter is at 2 times of U Ind-1 , that is, at 0.221 mm, the downward displacement is selected as U Ind-2 = -0.0451 mm. After the downward movement time t3 = 5 s and the displacement holding time t4 = 10 s, move upward for t3 = 5 s and then lift to the initial position of the indenter, and the high-temperature level remains unchanged and the point bending is applied periodically.

[0127] Calculate the matrix of all strain difference characteristic values of the package body and solder joints in the SMD package at the highest and lowest points of the indenter , and select the maximum value as the characteristic value here. The characteristic value matrix is shown in Table 3 below:

[0128] Table 3 Characteristic value matrix Calculation results

[0129]

[0130] S4: Based on the characteristic value of the conventional temperature cycle strain difference, the characteristic value of the high-temperature point bending strain difference, and the life model, obtain the high-temperature point bending acceleration factor.

[0131] Calculate the ratio matrix of the characteristic value of the conventional temperature cycle strain difference and the characteristic value of the high-temperature point bending strain difference As shown in Table 4 below:

[0132] Table 4 Ratio Matrix Calculation Results

[0133]

[0134] Then, based on the life model, the acceleration factor matrix for the conventional temperature cycle test and the high-temperature point bending test can be calculated As shown in Table 5 below:

[0135] Table 5 Acceleration Factor Matrix Calculation Results

[0136]

[0137] Finally, calculate the average value as the acceleration factor = 7.9355.

[0138] S5: Based on the high-temperature point bending acceleration factor, obtain the high-temperature point bending equivalent life test plan for board-level SMD packages.

[0139] Combined with the acceleration factor value, it is known that the SMD life device has experienced the above equivalent temperature cycle = 10,000 times, then the total time of the conventional temperature cycle is 480,000 min, and through the high-temperature point bending equivalent life test of board-level SMD packages, the stress cycle obtained is times, and the calculation formula is:

[0140]

[0141] The high-temperature point bending equivalent life test plan for board-level SMD packages is shown in Table 6 as follows:

[0142] Table 6 Results of the High-temperature Point Bending Equivalent Life Test Plan for Board-level SMD Packages

[0143]

[0144] It can be calculated that the total test duration is 1,588,375 s, approximately 26,472.92 min, which greatly shortens the test duration.

[0145] Those of ordinary skill in the art will realize that the embodiments described herein are for helping readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific deformations and combinations without departing from the essence of the present invention according to the technical revelations disclosed in the present invention, and these deformations and combinations are still within the protection scope of the invention.

Claims

1. A board-level SMD package high temperature point bending equivalent life test method, characterized in that: The following steps are involved: S1: Design board-level SMD package high temperature point bending test board; S2: Based on the board-level SMD package high temperature point bending test board, the board-level SMD package strain analysis under conventional temperature cycle is carried out to obtain the conventional temperature cycle strain difference characteristic value; S3: Based on the board-level SMD package high-temperature point bending test board, the board-level SMD package strain analysis under high-temperature point bending conditions is carried out to obtain the high-temperature point bending strain difference characteristic value; S4: Based on the conventional temperature cycle strain difference characteristic value, the high temperature point bending strain difference characteristic value and the life model, the high temperature point bending acceleration factor is obtained; S5: Based on the high temperature point bending acceleration factor, obtain the board-level SMD package high temperature point bending equivalent life test plan; The S2 includes the following sub-steps: S21: Establish the finite element model of the board-level SMD package high temperature point bending test board; S22: Setting the temperature profile under conventional temperature cycle; S23: Place the finite element model of the board-level SMD package high-temperature spot bending test board in the temperature field of the temperature profile under conventional temperature cycling, and calculate the characteristic value of the conventional temperature cycle strain difference , the formula is: in, For the The highest and lowest temperature strain difference characteristic values ​​of the package in the package, For the The highest and lowest temperature strain difference characteristic values ​​of the package solder joints in each package, is the total number of packages in the SMD array; The S3 includes the following sub-steps: S31: Establish the finite element model of the board-level SMD package high temperature spot bending test board and the indenter; S32: Setting the temperature profile under high temperature point bending conditions; S33: Place the finite element model of the board-level SMD package high-temperature spot bending test board and the pressure head in the temperature field of the temperature profile under the high-temperature spot bending condition, move the pressure head downward according to the set value, and calculate the high-temperature spot bending strain difference characteristic value , the formula is: in, For the The characteristic value of the strain difference between the highest and lowest points of the package in the package is: For the The strain difference characteristic value of the package body solder joint at the highest point and the lowest point of the pressure head in each package body; The S4 comprises the following sub-steps: S41: Calculate the ratio matrix of the conventional temperature cycle strain difference eigenvalue and the high temperature point bending strain difference eigenvalue for: S42: Calculate the high temperature point bending acceleration factor based on the ratio matrix and the life model, wherein the life model is: in, is the number of life cycles, is the fatigue ductility coefficient, is the fatigue ductility index, is the characteristic value of the conventional temperature cycle strain difference; The high temperature point bending acceleration factor is: in, is the high temperature point bending acceleration factor matrix; High temperature point bending acceleration factor matrix The average value is taken as the high temperature point bending acceleration factor .

2. A board-level SMD package high temperature point bending equivalent life test method according to claim 1, characterized in that: The S1 medium-level SMD package high-temperature spot bending test board comprises a fixing hole (2), an SMD array (3) and a stress application area (4).

3. A board-level SMD package high temperature point bending equivalent life test method according to claim 1, characterized in that: According to the high temperature point bending acceleration factor Equivalent temperature cycle times of board-level SMD package , get the number of stress cycles for: Based on the number of stress cycles , obtain the board-level SMD package high temperature point bending equivalent life test plan.

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