Standard unit aging test circuit and test control method

Abstract

The invention discloses a standard unit aging test circuit and a test control method, and the method comprises the steps: enabling a state machine to precisely control the aging stress application and test action switching of each monitor module through a cooperative architecture of the state machine, a difference frequency counting module and the monitor modules, a standard unit to be measured continuously bears stress during non-measurement and rapidly generates stress frequency during measurement, the difference frequency counting module converts frequency difference caused by aging into a quantitative result by comparing the stress frequency with reference frequency, high-precision data is provided for aging evaluation, and the accuracy of aging evaluation is improved. The method realizes deep fusion of the difference frequency principle and the aging measurement process of the standard unit, improves the accuracy of the aging test of the standard unit, and meanwhile, more accurately monitors the temperature information of the standard unit through the frequency difference between the stress frequency signal and the reference frequency signal in combination with the pre-calibrated frequency-temperature characteristic curve.

Description

Technical Field

[0001] This application relates to the field of electronic information technology, and in particular, to a standard cell aging test circuit and a test control method. Background Art

[0002] As the integrated circuit manufacturing process continues to advance to the nanometer level, the problem of circuit reliability has become increasingly prominent. At deep sub-micron process nodes, the characteristics of transistor devices will degrade significantly with the increase in usage time, and this phenomenon is called device aging. Device aging will cause the performance of digital circuits to decline, seriously affecting the reliability and service life of integrated circuits. Therefore, it is particularly important to conduct reliability assessment on digital circuits, especially to measure and predict their performance degradation during the aging process.

[0003] Existing test methods often rely on external temperature sensors deployed at specific positions on the chip. Such solutions have a slow response speed and are easily affected by the sensor layout and heat conduction path, resulting in a difference between the actual operating temperature of the standard cell and the measured value. Eventually, it is difficult to accurately reflect the instantaneous temperature change under dynamic load, thereby affecting the accuracy of aging assessment and easily leading to inaccurate tests. Summary of the Invention

[0004] This application provides a standard cell aging test circuit and a test control method to solve the technical problem of inaccurate testing in existing standard cell aging tests.

[0005] To solve the above technical problem, in the first aspect of this application, a standard cell aging test circuit is provided, including: a state machine, a difference frequency counting module, and a plurality of monitor modules;

[0006] The state machine is respectively connected to the monitor modules, and is used to respond to a test start instruction, apply aging stress to the standard cells under test in the monitor modules according to a clock signal and preset test configuration information, and output a control signal, where the control signal is used to control the monitor modules to execute test actions;

[0007] The monitor module includes a plurality of standard cells under test, and is used to respond to the control signal and output the stress frequency of the standard cells under test to the difference frequency counting module, where the stress frequency is: the ring oscillator frequency of the standard cells under test after being affected by the aging stress;

[0008] The difference frequency counting module is connected to the monitor module, and is used to receive the stress frequency, and then determine the aging test result of the standard cells under test according to the difference between the stress frequency and a reference frequency, where the reference frequency is: the ring oscillator frequency generated by a reference standard cell, and the reference standard cell is a standard cell of the same type as the standard cells under test.

[0009] Preferably, the monitor module specifically includes: a plurality of standard units to be tested and a multiplexer;

[0010] The standard units to be tested are connected in series in turn to form a closed loop with the head and tail connected in series, and the output end of each standard unit to be tested is a controllable load structure composed of a transmission gate and a MOS capacitor;

[0011] A multiplexer is arranged between every two adjacent standard units to be tested.

[0012] Preferably, the state machine is specifically configured to: in response to a test start instruction, output a first control signal and a second control signal according to a clock signal, wherein the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the standard unit to be tested and is used to trigger the stress frequency output of the corresponding standard unit to be tested.

[0013] A second aspect of the present application provides a method for controlling the aging test of a standard unit, which is applied to the standard unit aging test circuit provided in the first aspect of the present application, and includes:

[0014] In response to the received test start instruction, apply aging stress and output a control signal to the standard unit to be tested in the monitor module according to the clock signal and preset test configuration information, where the control signal is used to control the monitor module to execute a test action;

[0015] When receiving the control signal, in response to the control signal, enable the monitor module to output the stress frequency of the standard unit to be tested to the difference frequency counting module, where the stress frequency is: the ring oscillator frequency of the standard unit to be tested after being affected by the aging stress;

[0016] Receive the stress frequency, and determine the aging test result of the standard unit to be tested according to the difference between the stress frequency and the reference frequency, where the reference frequency is: the ring oscillator frequency generated by a reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit to be tested.

[0017] Preferably, the control signal includes: a first control signal and a second control signal, wherein the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the standard unit to be tested and is used to trigger the stress frequency output of the corresponding standard unit to be tested.

[0018] Preferably, the step of, in response to the control signal, causing the monitor module to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes:

[0019] According to the first control signal, establish a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module;

[0020] After the monitor module establishes the data transmission connection, according to the second control signal, determine the standard unit under test corresponding to the second control signal inside the monitor module, and by controlling the multiplexer in the monitor module, make the standard unit under test form a ring oscillator, so as to output the stress frequency of the standard unit under test to the difference frequency counting module.

[0021] Preferably, when the number of monitor modules is multiple, the step of, according to the first control signal, establishing a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module specifically includes:

[0022] According to the correspondence between each monitor module and the first control signal, in accordance with a preset connection sequence, successively establish data transmission connections between each monitor module and the difference frequency counting module.

[0023] Preferably, when the number of standard units under test included in the monitor module is multiple, the step of, according to the second control signal, determining the standard unit under test corresponding to the second control signal inside the monitor module, and by controlling the multiplexer in the monitor module, making the standard unit under test form a ring oscillator, so as to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes:

[0024] According to the correspondence between each standard unit under test and the second control signal, by controlling the multiplexer in the monitor module, successively make each standard unit under test form a ring oscillator, so as to output the stress frequency of the target standard unit under test to the difference frequency counting module, where the target standard unit under test is specifically: the standard unit under test currently forming the ring oscillator.

[0025] Preferably, the step of determining the aging test result of the standard unit under test according to the difference between the stress frequency and the reference frequency specifically includes:

[0026] According to the stress frequency and the reference frequency, in combination with a preset clock pulse number calculation formula, obtain a clock pulse count value, and determine the aging test result of the standard unit under test according to the change of the clock pulse count value with the aging test time.

[0027] Preferably, it further includes:

[0028] According to the frequency difference between the stress frequency and the reference frequency, in combination with a preset frequency-temperature characteristic curve, temperature monitoring data of the standard unit to be measured is determined, where the frequency-temperature characteristic curve is: a characteristic curve used to reflect the variation relationship between the frequency difference and temperature, and the frequency difference is: the frequency difference value between the stress frequency of the standard unit to be measured and the reference frequency of the reference standard unit.

[0029] As can be seen from the above technical solutions, the present application has the following advantages:

[0030] Through the collaborative architecture of the state machine, the difference frequency counting module and the monitor module provided by the present application, the state machine precisely controls the switching of the aging stress application and the test actions of each monitor module, enabling the standard unit to be measured to continuously bear stress during non-measurement and quickly generate stress frequency during measurement. The difference frequency counting module converts the frequency difference caused by aging into a quantization result by comparing the stress frequency with the reference frequency, providing high-precision data for aging assessment, realizing the deep integration of the difference frequency principle and the standard unit aging measurement process, improving the accuracy of the standard unit aging test. At the same time, through the frequency difference between the stress frequency signal and the reference frequency signal, in combination with the pre-calibrated frequency-temperature characteristic curve, the temperature information of the standard unit is monitored more accurately. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0032] Figure 1 It is a schematic structural diagram of an embodiment of a standard unit aging test circuit provided by the present application.

[0033] Figure 2 It is a schematic structural diagram of a standard unit ring oscillator chain inside the monitor module in the standard unit aging test circuit provided by the present application.

[0034] Figure 3 It is a schematic flowchart of an embodiment of a standard unit aging test control method provided by the present application.

[0035] Figure 4 It is a logical block diagram of the test process of an embodiment of a standard unit aging test control method provided by the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] The embodiment of the present application provides a standard cell aging test circuit and a test control method, which are used to solve the technical problem of inaccurate testing existing in the existing standard cell aging test.

[0037] In order to make the inventive purpose, features and advantages of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the embodiments described below are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0038] Please refer to Figure 1 , a standard cell aging test circuit provided by the embodiment of the present application includes: a state machine, a differential frequency counting module, and a plurality of monitor modules;

[0039] The state machine is respectively connected to the monitor modules, and is used to respond to a test start instruction, apply aging stress to the standard cells to be tested in the monitor modules according to a clock signal and preset test configuration information, and output a control signal, where the control signal is used to control the monitor modules to execute test actions;

[0040] The monitor module includes a plurality of standard cells to be tested, and is used to monitor the aging stress data received by the standard cells to be tested, and output the stress frequency of the standard cells to be tested to the differential frequency counting module in response to the control signal, where the stress frequency is: the ring oscillator frequency of the standard cell to be tested after being affected by the aging stress;

[0041] The differential frequency counting module is connected to the monitor module, and is used to receive the stress frequency, and then determine the aging test result of the standard cell to be tested according to the difference between the stress frequency and the reference frequency, where the reference frequency is: the ring oscillator frequency generated by a reference standard cell, and the reference standard cell is a standard cell of the same type as the standard cell to be tested.

[0042] It should be noted that the standard cell aging test circuit provided in this embodiment mainly includes a state machine, a plurality of monitor units, and a differential frequency counter. The measurement is controlled by the state machine. The user only needs to provide a rising edge signal START to start a group of measurements. The differential frequency counter is shared by each group of monitor units and can be connected through a tri-state buffer control signal. The monitor module can control the size of the capacitive load by the control signal sent by the state machine, and control the input and output paths of the standard cells in the ring oscillation chain by this signal (for example: a two-input NAND gate has two inputs A1 and A2, and the ring oscillation chain is controlled by switching the signal to be composed of A1 or A2), and control the input aging waveform.

[0043] More specifically, asFigure 2 As shown in Figure 2 , the monitor module specifically includes: a plurality of standard units to be measured and a multiplexer;

[0044] The standard units to be measured are connected in series in turn to form a closed loop with the head and tail connected in series, and the output end of each standard unit to be measured is a controllable load structure composed of a transmission gate and a MOS capacitor;

[0045] A multiplexer is arranged between every two adjacent standard units to be measured.

[0046] It should be noted that the monitor module in this embodiment is specifically composed of multiple standard unit ring oscillator chains of different types. This circuit adopts a reconfigurable hybrid cascade architecture. Through the alternating connection of odd-level standard unit chains and data selectors, its core topology is: connecting the 2N + 1-level standard units in series with the head and tail to form a closed loop, and inserting a multiplexer between every two adjacent standard units. And the control ports of all multiplexers are controlled by the control signals issued by the state machine, which can realize the rapid switching of the monitor module between two working states.

[0047] When the system operates in the ring oscillator mode (CTRL<0:1>=01 - 11), each multiplexer will directly connect the outputs of adjacent standard units, thus forming a closed ring oscillation circuit. In this mode, the oscillation frequency is inversely proportional to the gate-level propagation delay (the time required for a signal to pass through each circuit unit). The real-time detection of process parameters can be realized through a high-precision differential frequency counter, and the measurement resolution reaches the picosecond level. The reference frequency data established in this mode provides a quantitative reference basis for subsequent aging analysis.

[0048] When switching to the accelerated aging mode (CTRL<0:1>=00), the topology of the circuit will change: the multiplexer will cut off the ring feedback path and instead apply abnormal working conditions (such as increasing the voltage to 1.8V and the temperature to 80°C) to the standard units to be measured in the monitor module by connecting to an external programmable stress excitation source or the stress source output module integrated in the state machine, so that the standard units to be measured enter the overvoltage stress state, accelerating the test mode of device aging. This dual stress loading mechanism (topological isolation and overvoltage biasing) can play two roles: 1. Ensure the stress consistency of each unit in the ring oscillator chain; 2. Accelerate the aging failure process of the circuit by accelerating degradation mechanisms such as hot carrier injection and negative bias temperature instability (NBTI). The external stress source generally consists of two parts: an input signal source and a power supply voltage source. The input signal source is used to generate controllable stress signals, and its signal waveform, switching rate, and duty cycle can all be configured, which enables researchers to analyze the influence of different input signal patterns on the aging of standard units. The power supply voltage source provides a high voltage of 1.8V in the stress mode to achieve rapid aging through voltage acceleration.

[0049] A controllable load structure based on a transmission gate and MOS capacitors is designed at the output of each standard cell. This load circuit dynamically adjusts the equivalent capacitance via an independent control signal, thereby varying the load capacitance at the standard cell output. When the standard cell output flips, larger load capacitance leads to more pronounced hot carrier injection (HCI). By adjusting the load control signal, the aging behavior of the standard cell under different HCI / BTI ratios can be studied.

[0050] More specifically, the state machine is specifically used to: respond to a test start instruction, output a first control signal and a second control signal according to a clock signal, wherein the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the standard unit to be tested and is used to trigger the stress frequency output of the corresponding standard unit to be tested.

[0051] It should be noted that this embodiment uses a state machine to achieve fully automatic control of the test process, which includes four states: initialization, stress loading, difference frequency measurement, and data output. The first control signal Ci controls the operation of monitors at different positions, and the second control signal Sj controls different standard units to be tested. When and only when Ci and Sj are 1 at the same time, it indicates that the standard unit j in the monitor i enters the ring oscillation state, and its delay is measured, which takes 1 microsecond. At other times, the standard unit is always subjected to stress aging, and when this standard unit is tested, the other standard units are also subjected to stress aging, avoiding the adverse effects of the aging recovery effect caused by stress removal on the measurement results.

[0052] The solution provided by the present application uses a collaborative architecture of a state machine, a difference frequency counting module, and a monitor module, and the state machine accurately controls the aging stress application and test action switching of each monitor module, so that the standard unit to be tested continues to be under stress when not measured, and quickly generates a stress frequency during measurement. The difference frequency counting module converts the frequency difference caused by aging into a quantitative result by comparing the stress frequency with the reference frequency, providing high-precision data for aging evaluation, realizing a deep integration of the difference frequency principle and the standard unit aging measurement process, and improving the accuracy of the standard unit aging test. At the same time, the monitor module can integrate multiple standard units to be tested, which can be tested in time-sharing or parallel under the control of the state machine. A single cycle covers multiple unit measurements, and the on-chip resource utilization is significantly improved. It can adapt to the testing needs of large-scale standard unit libraries and improve the test efficiency.

[0053] The above is a detailed description of an embodiment of a standard cell aging test circuit provided by the present application. The following is a detailed description of an embodiment of a standard cell aging test control method provided by the present application.

[0054] See also Figure 3, a standard cell aging test control method provided by an embodiment of the present application can be applied to the standard cell aging test circuit provided in the above embodiment. The control method of this embodiment includes:

[0055] Step 101, in response to the received test start instruction, apply aging stress and output a control signal to the standard cell under test in the monitor module according to the clock signal and the preset test configuration information;

[0056] Among them, the control signal is used to control the monitor module to execute a test action.

[0057] Step 102, monitor the aging stress data received by the standard cell under test, and when the control signal is received, in response to the control signal, enable the monitor module to output the stress frequency of the standard cell under test to the difference frequency counting module;

[0058] Among them, the stress frequency is: the ring oscillator frequency of the standard cell under test after being affected by the aging stress.

[0059] Step 103, receive the stress frequency, and determine the aging test result of the standard cell under test according to the difference between the stress frequency and the reference frequency;

[0060] Among them, the reference frequency is: the ring oscillator frequency generated by the reference standard cell, and the reference standard cell is a standard cell of the same type as the standard cell under test.

[0061] More specifically, in step 103, determining the aging test result of the standard cell under test according to the difference between the stress frequency and the reference frequency, the steps can specifically include:

[0062] According to the stress frequency and the reference frequency, combined with the preset clock pulse number calculation formula, obtain the clock pulse count value, so as to determine the aging test result of the standard cell under test according to the change of the clock pulse count value with the aging test time.

[0063] The difference frequency counter quantifies the aging effect by comparing the reference oscillator frequency (f ref ) and the measured oscillator frequency (f stress ). Its core processing method is: using a phase comparator (constituted by D flip-flops) to generate a beat frequency signal (f beat ) whose frequency is equal to the difference between the two input frequencies, and then using a counter to calculate the number of clock pulses (N) output by the reference oscillator (f ref ) within a complete cycle of the beat frequency signal. This finally output digital count value N directly reflects f ref and f stressThe frequency difference between them is inversely proportional to this frequency difference. That is, the smaller the frequency difference, the longer the beat period, and the larger the output count value N; conversely, the larger the frequency difference, the smaller the output count value N. By monitoring the change of this count value N with the aging time, the frequency drift of the oscillator under test caused by aging can be quantified with high precision, so as to evaluate the degradation degree of the device. The specific calculation expression is as follows:

[0064]

[0065] In the formula, N is the clock pulse count value, is the reference frequency, is the stress frequency, is the beat signal frequency.

[0066] It should be noted that, as Figure 4 shown, for the standard cell aging test control method provided in this embodiment, the specific implementation process can refer to the following example:

[0067] 1: Initialization: When the tester sends a rising edge pulse representing the START signal to the "state machine" through human-computer interaction, the "state machine" can be triggered to start the test process.

[0068] 2: Stress application: Before and during the measurement, the state machine ensures that appropriate stress conditions (for example, elevated voltage VDD_STRESS, specific input signal patterns applied through INPUT<0:2>, specific loads set through CAP<0:1>, specific paths selected through CTRL<0:1>) are applied to the standard cells in the selected monitor, which is defined by the overall test plan. In the default state or stress phase, CTRL<0:1> is set to '00' to isolate the ring oscillator chain and apply stress.

[0069] 3: Measurement cycle start: After receiving the START pulse, the state machine starts a measurement cycle. It systematically selects each monitor and each standard cell inside it for a short measurement.

[0070] 4: Monitor selection: The state machine sets one of the Ci signals (for example, C1 becomes high) and lasts for a period of time (8µs). This will select the first "aging and temperature monitor" (monitor 1), and connect its output ( , ) to the input of the "difference frequency counter" through a tri-state buffer. Other monitors (C2, C3, C4 are low level) remain disconnected from the counter and continue to bear stress.

[0071] 5: Selection of Standard Cells in the Monitor: During the period when C1 is at a high level, the state machine sequentially sets the Sj signals (e.g., S1 is at a high level for 1 µs, then S2 is at a high level for 1 µs,..., until S8 is at a high level for 1 µs). When a specific Sj signal is at a high level (e.g., S1 is high) and Ci is at a high level (e.g., C1 is high), the corresponding standard cell in Monitor 1 (a NAND gate when C1 and S1 are 1) forms a ring oscillator and generates its output frequency.

[0072] 6: Beat Frequency Measurement: When C1 and S1 are set (for 1 µs), the "beat frequency counter" measures and the difference between. The counter calculates a value N representing this difference.

[0073] 7: Store / Output Results: The calculated value N corresponding to the aging of cell S1 in Monitor 1 is output on the Q<0:7> bus.

[0074] Furthermore, when the number of monitor modules is multiple, the process of step 8 below can be further included:

[0075] 8: Traverse Cells: The state machine cancels the setting of S1 and sets S2 (for 1 µs), and repeats steps 5 - 7 for the second standard cell / chain in Monitor 1. This process is repeated for all Sj signals (S1 to S8).

[0076] Furthermore, when the number of monitor modules is multiple, the processes of steps 9 to 10 below can be further included:

[0077] 9: Traverse Monitors: After completing the loop for all Sj in Monitor 1 (a total of 8 µs), the state machine cancels the setting of C1 and sets C2 (in the next 8 µs). Then steps 5 - 8 are repeated for all standard cells (Sj) in Monitor 2. This process is repeated for all monitors (C1 to C4).

[0078] 10: Return to Default State: Once all selected cells in all selected monitors have been measured, the state machine completes the cycle and returns the cells to the default state, waiting for the next START pulse for subsequent measurements.

[0079] Furthermore, it also includes:

[0080] According to the frequency difference between the stress frequency and the reference frequency, combined with a preset frequency - temperature characteristic curve, determine the temperature monitoring data of the standard cell to be measured, where the frequency - temperature characteristic curve is: a characteristic curve used to reflect the variation relationship between the frequency difference and the temperature, and the frequency difference is: the frequency difference value between the stress frequency of the standard cell to be measured and the reference frequency of the reference standard cell.

[0081] It should be noted that the standard cell under test of each monitor module and the reference standard cell form a double-ring oscillator structure. Among them, the output of the reference standard cell is connected to F_REF, and the output of the standard cell under test is connected to F_STRESS. A group of digital codes representing the frequency difference between the two is obtained by the difference frequency counting module, and there is a one-to-one mapping relationship between the magnitude of the digital code and the temperature. Therefore, based on this digital code and combined with the mapping relationship included in the frequency-temperature characteristic curve, the temperature monitoring data of the standard cell under test can be calculated.

[0082] The temperature measurement principle of this embodiment is based on a basic physical phenomenon: the performance of transistors that make up the standard cells of integrated circuits, especially their switching speed, is very sensitive to temperature. Usually, an increase in temperature will affect the carrier mobility and threshold voltage, resulting in an increase in the propagation delay of the standard cell. Since the oscillation frequency of the ring oscillator directly depends on the average propagation delay of the logic gates that make it up, the oscillation frequency of the oscillator will change with temperature. By pre-calibrating a specifically designed oscillator to establish an accurate frequency-temperature characteristic curve, the local temperature at the corresponding position of the chip can be inferred from its frequency reading in subsequent measurements. On this basis, this circuit further adopts a double-ring oscillator structure, and these two oscillators are specifically designed to have different sensitivities to temperature and aging effects. By measuring the frequency difference between their output signals and combining with the pre-calibrated characteristic curve, the system can extract temperature information more accurately. This difference frequency measurement technology not only improves the measurement speed but also helps to eliminate common-mode noise interference, thus ensuring the high precision and reliability of the final temperature measurement result.

[0083] The temperature and aging monitoring mechanism based on the beat frequency principle in this embodiment meets the dual requirements of on-chip temperature measurement and aging monitoring in a single circuit structure. By analyzing the frequency differences of two oscillators with different sensitivities, the system can accurately identify and distinguish the effects of temperature changes and aging effects on circuit performance, improving the utilization rate of on-chip resources and enhancing the reliability and accuracy of measurement data. The integrated temperature monitoring unit eliminates the dependence on external temperature measurement devices, simplifies the test process, and provides more precise environmental parameter control. This integrated design with dual functions not only saves chip area but also improves the timeliness and accuracy of measurement, providing more reliable data support for the research on circuit aging characteristics. At the same time, a dynamic and seamless switching between the stress mode and the ring oscillator mode is achieved through a multiplexer-based dual-mode switching mechanism. This switching mechanism ensures the stability of the circuit state during mode conversion by precisely controlling the signal path and significantly reduces the aging recovery effect, enabling the acquisition of accurate delay aging data of standard cells under actual working conditions. This design of rapid mode switching establishes an accurate mapping relationship between aging stress conditions and delay degradation, providing a solid foundation for the reliability assessment of integrated circuits. The advantage of this mechanism is that it can maintain the continuity of the circuit state during measurement, avoiding the state loss caused by mode switching in traditional methods, thus improving the accuracy and reliability of measurement.

[0084] In the description of this application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0085] Unless otherwise clearly specified and defined, the terms "installation", "connection", "connection" shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific situations.

[0086] It should be understood that in this application, "at least one (item)" means one or more, and "a plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist at the same time. Among them, A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one (one) of the following" or similar expressions refer to any combination of these items, including any combination of single item (one) or plural items (ones). For example, at least one (one) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0087] The unit described as a separate component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place, or it may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0088] In addition, each functional unit in various embodiments of the present invention may be integrated into a processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0089] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0090] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than limiting them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A standard cell aging test circuit, characterized in that Comprising: A state machine, a difference frequency counting module, and a plurality of monitor modules; The state machine is respectively connected to the monitor modules, and is configured to, in response to a test start instruction, apply an aging stress to a to-be-tested standard cell in the monitor modules and output a control signal according to a clock signal and preset test configuration information, where the control signal is used to control the monitor modules to perform test actions; The monitor module includes a plurality of to-be-tested standard cells, and is configured to, in response to the control signal, output the stress frequency of the to-be-tested standard cells to the difference frequency counting module, where the stress frequency is: the ring oscillator frequency of the to-be-tested standard cell after being affected by the aging stress; The difference frequency counting module is connected to the monitor module, and is configured to receive the stress frequency, and then determine the aging test result of the to-be-tested standard cell according to the difference between the stress frequency and a reference frequency, where the reference frequency is: the ring oscillator frequency generated by a reference standard cell, and the reference standard cell is a standard cell of the same type as the to-be-tested standard cell.

2. The aging test circuit for a standard cell according to claim 1, wherein The monitor module specifically includes: a plurality of to-be-tested standard cells and a multiplexer; The to-be-tested standard cells are connected in series in sequence to form a closed loop with the head and the tail connected in series, and the output end of each to-be-tested standard cell is a controllable load structure based on a transmission gate and a MOS capacitor; A multiplexer is disposed between every two adjacent to-be-tested standard cells.

3. The aging test circuit for standard cells according to claim 1, wherein, The state machine is specifically configured to: in response to a test start instruction, output a first control signal and a second control signal according to a clock signal, where the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the to-be-tested standard cell and is used to trigger the stress frequency output of the corresponding to-be-tested standard cell.

4. A standard cell aging test control method, applied to the standard cell aging test circuit according to any one of claims 1 to 3, characterized in that, Comprising: In response to the received test start instruction, apply an aging stress to the to-be-tested standard cell in the monitor module and output a control signal according to the clock signal and the preset test configuration information, where the control signal is used to control the monitor module to perform test actions; When receiving the control signal, in response to the control signal, enable the monitor module to output the stress frequency of the to-be-tested standard cell to the difference frequency counting module, where the stress frequency is: the ring oscillator frequency of the to-be-tested standard cell after being affected by the aging stress; Receive the stress frequency, and determine the aging test result of the to-be-tested standard cell according to the difference between the stress frequency and the reference frequency, where the reference frequency is: the ring oscillator frequency generated by the reference standard cell, and the reference standard cell is a standard cell of the same type as the to-be-tested standard cell.

5. The method for controlling the aging test of a standard cell according to claim 4, wherein The control signal includes: a first control signal and a second control signal, where the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the to-be-tested standard cell and is used to trigger the stress frequency output of the corresponding to-be-tested standard cell.

6. The method for controlling the aging test of a standard cell according to claim 5, characterized in that, In response to the control signal, causing the monitor module to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes: According to the first control signal, establish a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module; After the monitor module establishes a data transmission connection, according to the second control signal, determine the standard unit under test corresponding to the second control signal inside the monitor module. By controlling the multiplexer in the monitor module, make the standard unit under test form a ring oscillator, so as to output the stress frequency of the standard unit under test to the difference frequency counting module.

7. A standard cell aging test control method according to claim 6, characterized in that, When the number of monitor modules is multiple, the step of establishing a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module according to the first control signal specifically includes: According to the correspondence between each monitor module and the first control signal, in accordance with a preset connection sequence, sequentially establish a data transmission connection between each monitor module and the difference frequency counting module.

8. The control method for standard cell aging test according to claim 6, wherein, When the number of standard units under test included in the monitor module is multiple, determining the standard unit under test corresponding to the second control signal inside the monitor module according to the second control signal, and making the standard unit under test form a ring oscillator by controlling the multiplexer in the monitor module, so as to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes: According to the correspondence between each standard unit under test and the second control signal, by controlling the multiplexer in the monitor module, sequentially form a ring oscillator with each standard unit under test, so as to output the stress frequency of the target standard unit under test to the difference frequency counting module, where the target standard unit under test is specifically: the standard unit under test currently forming the ring oscillator.

9. The control method for standard cell aging test according to claim 4, wherein, Determining the aging test result of the standard unit under test according to the difference between the stress frequency and the reference frequency specifically includes: According to the stress frequency and the reference frequency, in combination with a preset clock pulse number calculation formula, obtain a clock pulse count value, and determine the aging test result of the standard unit under test according to the change of the clock pulse count value with the aging test time.

10. A standard cell aging test control method according to claim 4, characterized in that, Further includes: According to the frequency difference between the stress frequency and the reference frequency, in combination with a preset frequency-temperature characteristic curve, determine the temperature monitoring data of the standard unit under test, where the frequency-temperature characteristic curve is: a characteristic curve used to reflect the change relationship between the frequency difference and the temperature, and the frequency difference is: the frequency difference between the stress frequency of the standard unit under test and the reference frequency of the reference standard unit.

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