Semiconductor circuit

Abstract

The invention belongs to the technical field of semiconductors, and discloses a semiconductor circuit, the semiconductor circuit comprises a substrate, an insulating layer, a chip function layer and a packaging body, two sides of the substrate are respectively provided with a plurality of first installation parts, one surface of the substrate is used as an arrangement surface, and the insulating layer is arranged on the arrangement surface; the external pin is connected with the extension end of the first installation part, and the external pin is electrically connected with the first installation part. According to the semiconductor circuit disclosed by the invention, through the design of the first mounting part extending out of the packaging body and the external pin, the external pin can be mounted after the semiconductor circuit is packaged; even if the ejector pin is adopted for pressing to prevent glue overflow, the condition that stress between the substrate and the pins causes cracks on the insulating layer is avoided. In addition, the external pins can be installed after being independently formed, the lead frame does not need to be introduced in a mode of being matched with rib cutting forming, the equipment and production cost can be reduced, and the production efficiency is improved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a semiconductor circuit. Background Art

[0002] Semiconductor packaging is a critical step in semiconductor circuit manufacturing. It encapsulates and cross-links the chip, curing it into a device with a defined structure and protecting it from environmental damage (such as humidity and mechanical shock). Pins, the connection between the chip and external circuitry, must be electrically interconnected via the lead frame and chip pads before packaging. After the package is cured, the pin array is separated and formed through a rib cutting process.

[0003] Existing semiconductor circuit substrates have thickness tolerances, resulting in insufficient precision between the substrate and the packaging mold cavity, which can easily cause material overflow during the injection molding process. Currently, conventional packaging processes use ejector pins to apply mechanical pressure to the substrate during mold closing, ensuring a tight fit between the substrate and the mold cavity to prevent glue overflow. However, the mechanical stress applied by the ejector pins can also be transmitted to the substrate-pin junction area, causing cracks in the insulation layer and ultimately affecting the reliability of the semiconductor circuit. Summary of the Invention

[0004] The present invention aims to improve at least one technical problem in the background technology.

[0005] The present invention provides a semiconductor circuit, comprising:

[0006] A substrate, with a plurality of first mounting portions provided on both sides of the substrate, one side of the substrate serving as a layout surface, and an insulating layer provided on the layout surface;

[0007] a chip functional layer, the chip functional layer being disposed on the insulating layer and electrically connected to each of the first mounting portions;

[0008] A package body is arranged on the layout surface and covers the chip functional layer; each first mounting portion extends outside the package body;

[0009] A plurality of external pins are connected to the extended end of the first mounting portion and are electrically connected to the first mounting portion.

[0010] Beneficial effects of the present invention: The semiconductor circuit of the present invention is designed with a first mounting portion extending outward from the package body and external pins, so that the external pins can be installed after the semiconductor circuit is packaged. Therefore, when the packaging mold is closed during the packaging process, even if ejector pressing is used to prevent glue overflow, stress between the substrate and the pins will not be generated to cause cracks in the insulating layer. In addition, the external pins of the present invention can be individually formed and then installed, without the need to be introduced through a lead frame in combination with rib cutting and forming, which can reduce equipment and production costs and improve production efficiency.

[0011] Furthermore, the first mounting portion includes two pin pads, a first gap is formed between the two pin pads, a groove shape of the first gap matches the shape of the external pin, and the external pin is connected to the first gap.

[0012] By providing two pin pads and forming a gap matching the shape of the external pins in each first mounting portion of the present invention, the accuracy of the external pin welding installation can be improved, the mechanical stability of the external pins can be ensured, and the reliability of the semiconductor circuit can be further improved.

[0013] Furthermore, the semiconductor circuit further comprises a baffle, which is mounted on the outer edge of the arrangement surface. The baffle and the arrangement surface are combined to form a box-like structure with an opening facing upward.

[0014] The setting of the baffle in the present invention can first play a supporting role. When the semiconductor circuit is arranged on the electronic control board, an appropriate gap can be formed between the semiconductor circuit and the electronic control board, so that electronic components can be arranged at the corresponding gap positions on the electronic control board to improve the integration of the electronic control board; at the same time, it can also prevent the condensed water formed on the electronic control board from soaking the semiconductor circuit for a long time and affecting the reliability of the semiconductor circuit; in addition, the structure enclosed by the baffle and the layout surface can also play an insect-proof role.

[0015] Furthermore, a plurality of second mounting portions are respectively provided on the outer side of the substrate, and each second mounting portion extends out of the package body; the semiconductor circuit also includes a plurality of supporting pins, one end of the supporting pin is connected to the extending end of the second mounting portion.

[0016] In the present invention, the support pins are not electrically connected to the chip functional layer. By arranging support pins on the outside of the substrate to support the baffle, multi-point support can significantly improve the baffle's anti-deformation ability, ensuring that the box-type structure formed by the baffle and the substrate maintains rigidity; at the same time, it can disperse mechanical stress and reduce the risk of damage to the substrate structure caused by local stress concentration.

[0017] Furthermore, the free end of the support pin is connected to the baffle, and the support pin and the baffle are connected to form a whole.

[0018] The present invention can improve the stability of the overall supporting structure by connecting the supporting pins and the baffle to form an integral body. At the same time, the integrated design can simplify the installation process and improve production efficiency.

[0019] Furthermore, the second mounting portion includes two support pin pads, a second gap is formed between the two support pin pads, a groove shape of the second gap matches the shape of the support pin, and the support pin is connected to the second gap.

[0020] By providing two support pin pads and forming a gap that matches the shape of the support pin in each second mounting portion of the present invention, the accuracy of the support pin welding installation can be improved, the mechanical stability of the support pin can be improved, and the accuracy of the gap formed by the baffle supporting the semiconductor circuit can be ensured.

[0021] Furthermore, the chip functional layer includes a circuit wiring layer and a circuit component assembly. The circuit wiring layer is arranged on the insulating layer and is electrically connected to each first mounting part; the circuit component assembly is arranged on the circuit wiring layer and is electrically connected to the circuit wiring layer.

[0022] Furthermore, a green oil layer is provided on the circuit wiring layer, and the green oil layer is used to protect the circuit wiring layer.

[0023] Furthermore, the circuit component assembly and the circuit wiring layer are electrically connected via wires, which are metal wires, specifically, gold wires, aluminum wires, and copper wires.

[0024] Furthermore, the circuit component assembly includes high-power components, and a heat sink is provided between the high-power components and the circuit wiring layer. The high-power components in the semiconductor circuit usually generate a large amount of heat. The setting of the heat sink can ensure the stable operation of the high-power components and extend the service life of the high-power components. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0026] Figure 1 A schematic structural diagram of a semiconductor circuit according to an embodiment of the present invention;

[0027] Figure 2 for Figure 1 Enlarged view of point A in the middle;

[0028] Figure 3 for Figure 1 Enlarged view of point B in the middle;

[0029] Figure 4 A schematic diagram of the internal structure of a semiconductor circuit according to an embodiment of the present invention;

[0030] Figure 5 This is a schematic diagram of installing a semiconductor circuit on an electric control board according to an embodiment of the present invention;

[0031] Figure 6 This is a cross-sectional view of a semiconductor circuit mounted on an electronic control board according to an embodiment of the present invention.

[0032] In the accompanying drawings: 1-substrate; 101-pin pad; 102-baffle; 103-support pin pad; 104-support pin; 2-insulation layer; 3-circuit wiring layer; 4-green oil layer; 501-components; 502-high-power components; 503-chip resistors; 504-chip capacitors; 505-heat sink; 506-wires; 6-package; 7-external pins; 8-semiconductor circuit; 9-electronic control board. DETAILED DESCRIPTION

[0033] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0034] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.

[0035] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0036] The following combination Figures 1 to 6 Embodiments of the present invention are described.

[0037] Reference Figures 1 to 4 , an embodiment of the present invention provides a semiconductor circuit, comprising:

[0038] A substrate 1 (in this embodiment, the substrate 1 is an aluminum metal substrate 1 ), with a plurality of first mounting portions provided on both sides of the substrate 1, one side of the substrate 1 serving as a layout surface, on which an insulating layer 2 is provided;

[0039] A chip functional layer, the chip functional layer is disposed on the insulating layer 2 and is electrically connected to each first mounting portion;

[0040] The package body 6 is arranged on the layout surface, and the package body 6 covers the chip functional layer; each first mounting portion extends outside the package body 6;

[0041] A plurality of external pins 7 are connected to the extended end of the first mounting portion, and the external pins 7 are electrically connected to the first mounting portion.

[0042] In this embodiment, the first mounting portion includes two pin pads 101 , a first gap is formed between the two pin pads 101 , the groove shape of the first gap matches the shape of the external pin 7 , and the external pin 7 is connected to the first gap.

[0043] The semiconductor circuit of this embodiment is designed with pin pads 101 extending out of the package body 6 and external pins 7, so that the external pins 7 can be installed after the semiconductor circuit is packaged. Therefore, when the packaging mold is closed during the packaging process, even if ejector pressing is used to prevent glue overflow, stress between the substrate 1 and the pins will not cause cracks in the insulating layer 2. In addition, the external pins 7 of this embodiment can be separately formed and then installed, without the need to be introduced through the lead frame in combination with rib cutting and forming, which can reduce equipment and production costs and improve production efficiency.

[0044] Furthermore, the semiconductor circuit of this embodiment also includes a baffle 102, which is installed on the outer edge of the layout surface, and the baffle 102 and the layout surface are enclosed to form a box-like structure with an open top; a plurality of second mounting portions are respectively provided on the outer side of the substrate 1, and each second mounting portion extends outward from the package body 6; the second mounting portion includes two support pin pads 103, and a second gap is formed between the two support pin pads 103. The semiconductor circuit also includes a plurality of support pins 104 (the support pins 104 in this embodiment are not electrically connected to the chip functional layer), and the groove type of the second gap matches the shape of the support pins 104. One end of the support pin 104 is connected to the second gap, and the other end of the support pin 104 is connected to the baffle 102 and forms a whole.

[0045] Reference Figure 5 and Figure 6 In this embodiment, the setting of the baffle 102 can first play a supporting role. When the semiconductor circuit 8 is arranged on the electronic control board 9, an appropriate gap can be formed between the semiconductor circuit 8 and the electronic control board 9, so that electronic components can be arranged at the corresponding gap positions on the electronic control board 9 to improve the integration of the electronic control board 9; at the same time, it can also prevent condensed water formed on the electronic control board 9 from soaking the semiconductor circuit 8 for a long time and affecting the reliability of the semiconductor circuit 8; in addition, the structure enclosed by the baffle 102 and the arrangement surface can also play an insect-proof role.

[0046] At the same time, this embodiment provides support pins 104 on the outside of the substrate 1 to support the baffle 102. Multi-point support can significantly improve the deformation resistance of the baffle 102, ensuring that the box-type structure formed by the baffle 102 and the substrate 1 maintains rigidity; the support pins 104 can also disperse mechanical stress and reduce the risk of structural damage to the substrate 1 caused by local stress concentration; the integrated design of the support pins 104 and the baffle 102 further improves the stability of the overall support structure, simplifies the installation process, and improves production efficiency.

[0047] Furthermore, the functional layer of the chip in this embodiment includes a circuit wiring layer 3 and a circuit component assembly. The circuit wiring layer 3 is arranged on the insulating layer 2, and the circuit wiring layer 3 is electrically connected to each first mounting part; the circuit component assembly is arranged on the circuit wiring layer 3, and the circuit component assembly is electrically connected to the circuit wiring layer 3.

[0048] Furthermore, in this embodiment, a green oil layer 4 is provided on the circuit wiring layer 3 , and the green oil layer 4 is used to protect the circuit wiring layer 3 .

[0049] Furthermore, the circuit component assembly of this embodiment is electrically connected to the circuit wiring layer 3 via a copper wire 506 .

[0050] Furthermore, the circuit component assembly of this embodiment includes component 501, high-power component 502, chip resistor 503 and chip capacitor 504, wherein component 501 and high-power component 502 are composed of chips required for various internal functional circuits of the semiconductor circuit, and a heat sink 505 is provided between the high-power component 502 and the circuit wiring layer 3; the chip resistor 503 is connected to the gate of the IGBT chip inside the semiconductor circuit, and limits the switching speed of the IGBT by current limiting; the chip capacitor 504 plays a filtering, coupling and bootstrapping role in the semiconductor circuit.

[0051] Furthermore, the external pin 7 of this embodiment is a copper alloy external pin 7, and the grade of the copper alloy is C194-1 / 2H.

[0052] Furthermore, the package 6 of this embodiment is a hybrid resin package, which is a mixture of epoxy resin, phenolic resin, silicon powder and additives, wherein epoxy resin is used as a base resin, phenolic resin is used as a curing agent, and silicon powder is used as a filler.

[0053] The method for manufacturing a semiconductor circuit in this embodiment includes the following steps:

[0054] A pin pad 101 and a supporting pin pad 103 are provided on the substrate 1;

[0055] The insulating layer 2 and the copper foil layer are pressed together to obtain a pressed semi-finished product, and then the pressed semi-finished product is pressed together with the substrate 1, wherein one side of the insulating layer 2 in the pressed semi-finished product faces the arrangement surface of the substrate 1;

[0056] Etching the copper foil layer to obtain a circuit wiring layer 3;

[0057] A green oil layer 4 is formed on the surface of the circuit wiring layer 3, and the green oil layer 4 avoids the preset positions of the circuit components;

[0058] Place the substrate 1 on a carrier (the carrier is made of ceramic material with a high temperature resistance of more than 200°C), apply solder paste to the preset positions of the circuit component assemblies, and then mount the circuit component assemblies to their preset positions using an automatic die bonding device (the high-power component 502 is first mounted on the silver-plated copper heat sink 505 using a soft solder die bonding machine);

[0059] The carrier carries the substrate 1 into the reflow oven to solder all the circuit components to the corresponding preset positions, and the soldering quality of the circuit components is inspected by visual inspection equipment (AOI optical inspection instrument);

[0060] By spraying and ultrasonic cleaning, foreign matter such as flux and aluminum chips remaining on the substrate 1 is removed;

[0061] The circuit component assembly and the circuit wiring layer 3 are electrically connected via the wire 506;

[0062] Perform packaging to form a packaging body 6;

[0063] Post-curing stress relief treatment of the product through a high-temperature oven;

[0064] Complete electrical parameter testing;

[0065] The external pins 7, the supporting pins 104 and the baffle 102 are mounted to obtain a semiconductor circuit.

[0066] The packaging process of this embodiment first places the substrate 1 into the mold cavity and presses the substrate 1 together using ejector pins. Then, using thermal transfer molding, the raw materials for the hybrid resin package (epoxy resin, phenolic resin, silicon powder, and additives) are extruded into the mold cavity and cross-linked and cured. Because the semiconductor circuit of this embodiment utilizes pin pads 101 extending from the package body 6 and external pins 7, which are installed after the packaging steps are complete, ejector pin pressing of the substrate 1 prevents stress between the substrate 1 and the pins from forming cracks in the insulating layer 2.

[0067] Reference Figure 5 and Figure 6 The installation of the semiconductor circuit on the electric control board 9 of this embodiment includes the following steps:

[0068] Insert the free end of the external pin 7 of the semiconductor circuit 8 into the corresponding mounting position on the electronic control board 9, support the semiconductor circuit 8 through the baffle 102 connected by the support pin 104, so that a distance is formed between the semiconductor circuit 8 and the electronic control board 9, and finally solder the semiconductor circuit 8 to the electronic control board 9 by wave soldering.

[0069] The above specifically describes the preferred embodiments of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A semiconductor circuit, characterized in that: include: A substrate, wherein a plurality of first mounting portions are respectively provided on both sides of the substrate, one side of the substrate serves as a layout surface, and an insulating layer is provided on the layout surface; a chip function layer, the chip function layer being disposed on the insulating layer and electrically connected to each of the first mounting portions; A package body, the package body being arranged on the arrangement surface and covering the chip functional layer; each of the first mounting portions extending out of the package body; A plurality of external pins are connected to the extended end of the first mounting portion, and the external pins are electrically connected to the first mounting portion.

2. The semiconductor circuit according to claim 1, wherein The first mounting portion includes two pin pads, a first gap is formed between the two pin pads, a groove shape of the first gap matches the shape of the external pin, and the external pin is connected to the first gap.

3. The semiconductor circuit according to claim 1, wherein: It also includes a baffle, which is installed on the outer edge of the layout surface. The baffle and the layout surface are combined to form a box-like structure with an open mouth upward.

4. The semiconductor circuit according to claim 3, wherein: A plurality of second mounting portions are respectively provided on the outer side of the substrate, and each of the second mounting portions extends outward from the package body; the semiconductor circuit further comprises a plurality of supporting pins, one end of each supporting pin is connected to the extending end of the second mounting portion.

5. The semiconductor circuit according to claim 4, wherein: The free end of the support pin is connected to the baffle, and the support pin and the baffle are connected to form a whole.

6. The semiconductor circuit according to claim 4, wherein: The second mounting portion includes two support pin pads, a second gap is formed between the two support pin pads, a groove shape of the second gap matches the shape of the support pin, and the support pin is connected to the second gap.

7. The semiconductor circuit according to claim 1, wherein: The chip functional layer includes a circuit wiring layer and a circuit component assembly. The circuit wiring layer is arranged on the insulating layer and is electrically connected to each of the first mounting parts; the circuit component assembly is arranged on the circuit wiring layer and is electrically connected to the circuit wiring layer.

8. The semiconductor circuit according to claim 7, wherein: A green oil layer is provided on the circuit wiring layer, and the green oil layer is used to protect the circuit wiring layer.

9. The semiconductor circuit according to claim 7, wherein: The circuit component assembly and the circuit wiring layer are electrically connected via wires.

10. The semiconductor circuit according to claim 7, wherein: The circuit component assembly includes high-power components, and a heat sink is provided between the high-power components and the circuit wiring layer.

Images