Dual-redundancy servo controller and main / standby autonomous switching method thereof

Abstract

The invention discloses a dual-redundancy servo controller and a main-standby autonomous switching method thereof, and belongs to the technical field of electric servo control. The controller comprises a host machine and a standby machine; each of the host and the standby machine comprises a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), a hardware ID (Identity) identification module, a motor power driving IPM (Intelligent Power Module) and a generator tripping instruction module which are in signal connection; the DSP and the FPGA are respectively connected with an LDO (Low Dropout Regulator) power module; the FPGA is in communication connection with the control system; the motor power driving IPM is connected with the execution mechanism; the DSP processors of the host and the standby machine are in signal connection; and the switching instruction modules of the host and the standby are in signal connection. The invention discloses a main / standby autonomous switching method for a dual-redundancy servo controller, which adopts a DSP and an FPGA to cooperatively detect and process faults, improves the fault detection rate by 5%, and reduces the possibility that the output of an IPM module is not turned off by 20% when a fault occurs; three heterogeneous redundant generator tripping modes of hardware generator tripping, serial port generator tripping and heartbeat generator tripping are adopted, and the reliability of main and standby independent generator tripping is improved by 20%.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electric servo control, and relates to a dual-redundancy servo controller and a master-slave autonomous switching method thereof. BACKGROUND

[0002] Medium and large long-endurance unmanned aerial vehicles require high reliability of servo systems, that is, one-time fault working and twice fault safety. Redundancy technology is an effective means to improve the safety and reliability of systems, so servo systems usually adopt a dual-redundancy architecture and a master-slave hot backup working mode. Under normal circumstances, the master and the backup work at the same time, and only the master outputs a power signal at the same time. When the master fails, the power output of the master is first cut off, and then the backup outputs a power signal.

[0003] The existing dual-redundancy servo controller does not have an independent fault monitoring circuit, and the processor completes fault monitoring and processing and sends a machine switching instruction through a serial port to realize master-slave switching. This redundancy architecture ignores the possibility of processor and peripheral circuit failure, does not consider the serious consequences caused by failure spreading due to the processor failure that cannot shut down the power output of the master, and does not consider the potential risk that the processor failure or the serial port link failure cannot reliably switch the machine. The existing dual-redundancy servo controller has problems such as unreasonable hardware architecture, poor fault isolation, and low machine switching reliability, and cannot meet the application requirements of long-endurance unmanned aerial vehicles for high reliability and generalization of servo controllers. SUMMARY

[0004] The application aims to solve the technical problems of the existing dual-redundancy servo controller, such as processor fault detection not covered, poor fault isolation leading to failure spreading, and poor autonomous machine switching reliability, and provides a dual-redundancy servo controller and a master-slave autonomous switching method thereof.

[0005] To achieve the above-mentioned purpose, the application adopts the following technical solutions: In a first aspect, the application discloses a dual-redundancy servo controller, which comprises a master and a backup. The master and the backup each comprise a signal-connected DSP processor, an FPGA, a hardware ID identification module, a motor power drive IPM, and a machine switching instruction module. The DSP processor and the FPGA are respectively connected with an LDO power module. The FPGA is communicatively connected with a control system. The motor power drive IPM is connected with an actuator. The DSP processors of the master and the backup are signal-connected. The machine switching instruction modules of the master and the backup are signal-connected.

[0006] Further improvements are as follows: The communication connection adopts an RS422 bus connection mode.

[0007] The hardware ID identification module of the host machine is configured with a host hardware ID identification number as "1", and the hardware ID identification module of the backup machine is configured with a backup hardware ID identification number as "0".

[0008] After the DSP processor of the host machine detects a fault of the functional module, the machine is switched by a hardware switching machine or a serial port switching machine; after the FPGA of the host machine detects a fault of the DSP and its peripheral circuit, the machine is switched by a hardware switching machine; after the DSP of the backup machine detects a fault of the DSP of the host machine, the machine is actively switched by a heartbeat switching machine.

[0009] The switching instruction signal direction in the switching machine module of the host machine is configured as an output signal, and the switching instruction signal direction in the switching machine module of the backup machine is configured as an input signal; the switching mode of the host machine and the backup machine is a one-way switching mode, and the host machine is switched to the backup machine when the host machine fails, and the backup machine cannot switch the host machine to work when the backup machine fails.

[0010] When controlling m execution mechanisms, each host machine and backup machine includes m motor power driving IPMs, m enable signals EN, m PWM1-6 signals, m fault signals FAULT and m hardware switching machine signals ESS, which are used to realize accurate switching of a fault channel.

[0011] In a second aspect, the application discloses a host-backup autonomous switching method based on the above-mentioned dual-redundancy servo controller, which comprises the following steps: Step 1: The DSP processor of the host machine performs periodic self-checking, and if a fault is found, the fault signal FAULT is set to be valid, and the enable signal EN of the motor power driving IPM of the host machine is cut off, and a serial port switching machine signal is sent through the SCI serial port at the same time; Step 2: The host FPGA detects a fault of the host DSP processor and its peripheral circuit, and if the heartbeat signal HB1 is abnormal or the fault signal FAULT is valid, the PWM signal of the motor power driving IPM of the host machine is cut off, and the hardware switching machine signal ESS is output to the backup machine; Step 3: The DSP processor of the backup machine receives the hardware switching machine signal ESS or the SCI serial port switching machine signal, turns on the enable signal EN of the motor power driving IPM of the backup machine, so that the FPGA of the backup machine normally outputs the PWM signal to the motor power driving IPM of the backup machine, and successfully switches to the backup machine to complete the instruction signal from the control system.

[0012] Further improvements are as follows: The DSP processor of the host machine performs periodic self-checking and outputs heartbeat signal HB2 to the DSP processor of the backup machine and heartbeat signal HB1 to the FPGA of the host machine to inform its own running condition; when the DSP processor of the backup machine detects abnormal heartbeat signal HB2, the enable signal EN of the motor power drive IPM of the backup machine is turned on, so that the FPGA of the backup machine normally outputs PWM signal to the motor power drive IPM of the backup machine; when the FPGA of the host machine detects abnormal heartbeat signal HB1, the PWM signal of the motor power drive IPM of the host machine is cut off, and a hardware machine cutting signal ESS is output to the backup machine.

[0013] The DSP processor of the backup machine performs periodic self-checking and outputs heartbeat signal HB1 to the FPGA of the backup machine to inform its own running condition.

[0014] When the DSP processor of the backup machine receives hardware machine cutting signal ESS for 3 times continuously, receives serial port machine cutting signal from the SCI serial port for 3 times continuously or the heartbeat HB2 signal does not jump for 30 ms, the machine cutting operation is performed.

[0015] Compared with the prior art, the application has the following beneficial effects: The application discloses a dual-redundancy servo controller, and the dual-redundancy servo controller adopts a dual-machine homogeneous hardware architecture of DSP+FPGA+power drive IPM module, and fault detection and processing are cooperatively performed by the DSP processor and the FPGA. When the main DSP or the FPGA detects a fault, the output of the power drive IPM module of the host machine is first cut off, and then a hardware machine cutting ESS signal and a SCI serial port machine cutting signal are respectively sent to the backup machine through the machine cutting module and the serial port. When the backup DSP detects the hardware machine cutting or serial port machine cutting signal, or detects that the heartbeat HB2 signal of the main DSP is abnormal, the output of the power drive IPM module of the backup machine is turned on, and the backup machine is switched to work. The dual-redundancy servo controller hardware architecture has the advantages of simple structure, flexible configuration, high reliability and the like, and can meet the high reliability requirement of a long-time unmanned aerial vehicle servo controller.

[0016] The application discloses a master-slave autonomous switching method of a dual-redundancy servo controller, and the dual-redundancy servo controller and the master-slave autonomous switching method adopt DSP and FPGA for cooperatively performing fault detection and processing, the fault detection rate is increased by 5%, and the possibility of the output of the power drive IPM module of the host machine not being cut off during a fault is reduced by 20%; three heterogeneous redundant machine cutting modes, namely, hardware machine cutting, serial port machine cutting and heartbeat machine cutting, are adopted, and the reliability of the master-slave autonomous machine cutting is increased by 20%. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation to the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0018] Figure 1 A functional block diagram of a dual-redundant servo controller in the embodiments of the present application. DETAILED DESCRIPTION

[0019] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will combine the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0021] It should be noted that: similar reference numbers and letters represent similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0022] The present application will be further described in detail below in combination with the drawings: Referring to Figure 1 The embodiments of the present application disclose a dual-redundant servo controller, comprising a host and a backup machine; the host and the backup machine both comprise a signal-connected DSP processor, an FPGA, a hardware ID recognition module, a motor power driving IPM and a machine switching instruction module; the DSP processor and the FPGA are respectively connected with an LDO power module; the FPGA is communicatively connected with a control system; the motor power driving IPM is connected with an actuator; the DSP processors of the host and the backup machine are signal-connected; and the machine switching instruction modules of the host and the backup machine are signal-connected.

[0023] The product function composition, initialization configuration and the host-backup autonomous machine switching method of the dual-redundant servo controller are described as follows.

[0024] (1) Function composition The dual-redundant servo controller adopts dual-computer hardware isomorphic design, each single computer is composed of DSP processor, FPGA, power supply LDO1 / 2, hardware ID recognition, motor power drive IPM and machine switching instruction modules. The hardware design of the controller has the following characteristics: In order to improve the coverage rate of fault detection, DSP and FPGA are used for fault detection. FPGA detects the fault of DSP and its peripheral circuit through heartbeat HB1 signal, and DSP detects the fault of the remaining functional modules. The standby DSP detects the fault of the main DSP through heartbeat HB2 signal; In order to ensure the reliable shutdown of the power drive IPM module in the event of a fault, the DSP controls its enable signal EN, and the FPGA controls its input PWM signal. Any one of the signals can shut down the output of the IPM module; In order to improve the reliability of the main and standby autonomous machine switching, three kinds of heterogeneous redundant machine switching modes are designed, which are hardware machine switching, serial port machine switching and heartbeat machine switching. After the main DSP detects the fault of the functional module, it realizes machine switching through hardware machine switching and serial port machine switching. After the main FPGA detects the fault of the main DSP and its peripheral circuit, it realizes machine switching through hardware machine switching. After the standby DSP detects the fault of the main DSP, it realizes active machine switching through heartbeat machine switching; In order to reduce the complexity of the main and standby switching logic, the priority of the main and standby machines cannot be changed, and the design is in one-way switching mode, which can only switch from the main machine to the standby machine, and the standby machine cannot switch the main machine; In order to ensure the interchangeability of the main and standby machines, the bus driver 74HC245 chip with direction end is selected as the machine switching instruction module. The machine switching instruction signal direction of the main machine is configured as an output signal, and the machine switching instruction signal direction of the standby machine is configured as an input signal; In order to realize the uniqueness of the main and standby DSP software and FPGA software version, hardware ID number is used to distinguish the main and standby machines, and the corresponding main and standby machine configuration function is completed; Since the actuator has no high real-time requirement, the working sequence of the main and standby machines is not synchronized, and each runs independently; In order to reduce the complexity of the dual-computer system, the main and standby machines do not exchange data information, and only rely on the data collected by themselves for fault detection; In order to reduce the risk of single-point failure caused by power supply failure, two LDO modules are used to supply power to DSP and FPGA respectively; In order to reduce the software time consumption of RS422 bus communication and data analysis, FPGA is used to realize communication function.

[0025] The above design ensures the versatility of the dual-redundant servo controller hardware, the flexibility of the software configuration and the reliability of the main and standby machine switching.

[0026] (2) initialization configuration The main DSP initializes, configures SCI serial port parameters, configures heartbeat HB1 and HB2 signals as output signals, and configures the enable EN signal of the IPM module as "1" (disable). The main DSP self-checks normally, sets the fault Fault signal as "0" (no fault) and the enable EN signal as "0" (enable).

[0027] The standby DSP initializes, configures SCI serial port parameters, configures the heartbeat HB1 signal as an output signal and the heartbeat HB2 signal as an input signal, and configures the enable EN signal of the IPM module as "1". The standby DSP self-checks normally, sets the fault Fault signal as "0" and the enable EN signal as "1". The standby FPGA configures the machine switching signal as an input signal and sets the 6-channel PWM signals of the IPM module as "0" (turn off the power output).

[0028] (3) Master-slave autonomous switching method The dual-redundancy servo controller works in a master-slave hot backup mode, periodically performs self-checking, and can autonomously switch from the main machine to the standby machine when the main machine fails, without the need for external hardware machine switching circuits and software machine switching commands.

[0029] (4) Multi-channel configuration and switching method The dual-redundancy servo controller is a general master-slave fault-tolerant switching controller hardware basic architecture that is easy to expand and extend. Figure 1 As shown, the dual-redundancy controller drags one dual-redundancy actuator. When the dual-redundancy servo controller needs to control multiple actuators, only partial expansion of hardware resources is required. The specific implementation method is as follows.

[0030] If m actuators are controlled, the master and backup machines in the controller each need m motor power driving IPM modules, m EN signals, m PWM1-6 signals, m fault Fault signals and m machine tripping instruction ESS signals. When the nth actuator main channel of the master machine fails, the master DSP sets the nth fault Faultn signal to "1", sets the nth power enable ENn signal to "1", and simultaneously sends the nth actuator fault machine tripping information to the backup machine through the serial port. When the master FPGA detects that the nth fault Faultn signal is "1", the internal fault logic is synthesized, the nth power driving PWMn1-6 signal is set to invalid, and the nth machine tripping instruction ESSn signal is set to "1". When the master FPGA detects that the master DSP heartbeat HB1 signal is abnormal, the internal fault logic is synthesized, the m power driving PWM1-6 signals are set to be invalid, and the m machine tripping instruction ESS signals are set to "1". When the backup DSP detects that the nth machine tripping instruction ESSn signal is "1", or receives the nth machine tripping information from the serial port, the nth power enable ENn signal is set to "0", the backup FPGA normally outputs the 6 PWM signals of the nth IPM module, and the master and backup switching work of the fault channel is realized. When the backup DSP detects that the heartbeat HB2 is abnormal, the m power driving EN signals are set to "0", the backup FPGA normally outputs the 6 PWM signals of the m IPM modules, and the master and backup switching work of all channels is realized.

[0031] The embodiment of the application discloses a master and backup autonomous switching method based on the above-mentioned dual-redundancy servo controller, comprising: Step 1: The DSP processor of the master machine performs periodic self-checking, and if a fault is found, the fault signal FAULT is set to be valid, and the enable signal EN of the motor power driving IPM of the master machine is cut off, and the SCI serial port sends a serial port machine tripping signal; Step 2: The master FPGA detects the fault of the master DSP processor and its peripheral circuit, and if the heartbeat signal HB1 is abnormal or the fault signal FAULT is valid, the PWM signal of the motor power driving IPM of the master machine is cut off, and the hardware machine tripping signal ESS is output to the backup machine; Step 3: The DSP processor of the backup machine receives the hardware machine tripping signal ESS or the SCI serial port machine tripping signal, turns on the enable signal EN of the motor power driving IPM of the backup machine, so that the FPGA of the backup machine normally outputs the PWM signal to the motor power driving IPM of the backup machine, and successfully switches to the backup machine to complete the instruction signal from the control system.

[0032] The DSP processor of the host machine performs periodic self-checking and outputs heartbeat signal HB2 to the DSP processor of the backup machine and heartbeat signal HB1 to the FPGA of the host machine to inform its own running condition; when the DSP processor of the backup machine monitors that heartbeat signal HB2 is abnormal, the enable signal EN of the motor power drive IPM of the backup machine is turned on, so that the FPGA of the backup machine normally outputs PWM signal to the motor power drive IPM of the backup machine; when the FPGA of the host machine monitors that heartbeat signal HB1 is abnormal, the PWM signal of the motor power drive IPM of the host machine is cut off, and a hardware machine cutting signal ESS is output to the backup machine. The DSP processor of the backup machine performs periodic self-checking and outputs heartbeat signal HB1 to inform its own running condition. When the DSP processor of the backup machine receives hardware machine cutting signal ESS for 3 times continuously, receives serial port machine cutting signal from the SCI serial port for 3 times continuously or the heartbeat HB2 signal does not jump for 30 ms continuously, the machine cutting operation is performed.

[0033] The application discloses a kind of main and backup autonomous switching methods of dual-redundancy servo controller, dual-redundancy servo controller and main and backup autonomous switching method proposed in the application, adopt DSP and FPGA to cooperate and carry out fault detection and processing, and the fault detection rate is increased by 5%, the possibility of host power drive IPM module output is not turned off when fault is reduced by 20%;Adopt hardware machine cutting, serial port machine cutting and heartbeat machine cutting three kinds of heterogeneous redundant machine cutting mode, the reliability of main and backup autonomous machine cutting is increased by 20%.

[0034] The working process of the application is as follows: Host working process: 1) The main DSP performs periodic self-checking and outputs two heartbeat signals HB1 and HB2 to inform the main FPGA and the backup DSP of the running status of the program. 2) When the main DSP detects a fault, it sets the fault signal to "1" (faulty) and the enable signal EN of the IPM module to "1", and sends a machine cutting signal to the backup machine through the serial port.

[0035] 3) When the main FPGA detects a fault signal "1" or detects an abnormal heartbeat signal HB1 of the main DSP, it sets the 6-way PWM signal of the IPM module to "0" through internal fault logic synthesis, turns off the output of the IPM module, and sets the machine cutting instruction ESS signal to "1". To reduce unnecessary software communication overhead, the backup machine is only sent a machine cutting instruction through the serial port when the main DSP detects a fault, and the machine cutting instruction is automatically ended after 10 cycles of continuous sending.

[0036] Backup machine working process: 1) The backup DSP performs periodic self-checking and outputs one heartbeat signal HB1 to inform the backup DSP of the running status of the program. 2) standby DSP periodically reads the machine switching ESS signal forwarded by the standby FPGA, and detects the main DSP heartbeat HB2 signal. When the standby DSP detects that the machine switching ESS signal is "1" or detects that the heartbeat HB2 signal is abnormal, or receives a machine switching signal from the serial port, the enable EN signal of the IPM module is set to "0", and the standby FPGA normally outputs the 6-way PWM signal of the IPM module.

[0037] 3) In order to improve the reliability of the main and standby machine switching, only when the standby DSP detects the machine switching instruction ESS signal as "1" for 3 times in succession, or receives the machine switching instruction from the serial port for 3 times in succession, or the heartbeat HB2 signal does not jump for 30 ms, the machine switching operation is performed.

[0038] The working principle of the application is as follows: The dual-redundancy servo controller receives the control commands issued by the flight management computer through 2-way RS422 bus, drives the dual-redundancy actuator to complete the instruction action, and reports the working state and fault information to the flight management computer through the bus. Under normal circumstances, the main channel of the dual-redundancy actuator controlled by the main machine completes the instruction action. The standby machine is in a hot backup state, does not output motor power driving signals, but has the same functions as the main machine, such as data acquisition, control quantity calculation, fault detection and processing. The main DSP detects the fault and sets the fault Fault signal effective, turns off the enable EN signal of the main machine IPM module, and sends the machine switching signal through the SCI serial port. The main FPGA detects the fault of the main DSP and its peripheral circuit or the effective fault Fault signal, turns off the 6-way PWM signal of the main machine IPM module, and outputs the hardware machine switching ESS signal. After the standby DSP receives the hardware machine switching signal, the serial port machine switching signal or cannot monitor the main DSP heartbeat HB2 signal, the enable EN signal of the standby machine IPM module is turned on, the standby FPGA normally outputs the 6-way PWM signal of the standby machine IPM module, and the standby channel of the dual-redundancy actuator completes the instruction action.

[0039] The above is only a preferred embodiment of the application and is not used to limit the application. For those skilled in the art, the application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A dual redundant servo controller, characterized in that: The system comprises a main machine and a standby machine; the main machine and the standby machine both comprise a signal-connected DSP processor, an FPGA, a hardware ID recognition module, a motor power drive IPM and a machine cutting instruction module; the DSP processor and the FPGA are respectively connected to an LDO power supply module; the FPGA is communicatively connected to a control system; the motor power drive IPM is connected to an actuator; the DSP processors of the main machine and the standby machine are signal-connected; and the machine cutting instruction modules of the main machine and the standby machine are signal-connected.

2. The dual redundant servo controller according to claim 1, characterized in that: The communication connection adopts RS422 bus connection mode.

3. The dual redundant servo controller according to claim 1, wherein: The hardware ID identification module of the host configures the host hardware ID identification number to be "1"; the hardware ID identification module of the standby machine configures the standby machine hardware ID identification number to be "0".

4. The dual redundant servo controller according to claim 1, wherein: After the DSP processor of the host detects a functional module failure, it implements machine switching through hardware switching or serial port switching; after the FPGA of the host detects a failure of the host's DSP and its peripheral circuits, it implements machine switching through hardware switching; after the DSP of the backup machine detects a DSP failure of the host, it uses a heartbeat switching method to implement active machine switching.

5. The dual redundant servo controller according to claim 1, wherein: The direction of the cutting instruction signal in the cutting module of the host is configured as an output signal, and the direction of the cutting instruction signal in the cutting module of the standby is configured as an input signal; the cutting mode of the host and the standby is a one-way switching mode. When the host fails, it switches to the standby machine, and when the standby machine fails, the host cannot be switched to work.

6. The dual redundant servo controller according to claim 1, wherein: Using a multi-channel configuration, when controlling m actuators, each master and standby machine includes m motor power drive IPMs, m enable signals EN, m PWM1-6 signals, m fault signals FAULT and m hardware cut-off signals ESS, which are used to achieve accurate switching of fault channels.

7. A method for autonomous master / slave switching of a dual redundant servo controller according to any one of claims 1 to 6, characterized in that: include: Step 1: The DSP processor of the host performs periodic self-test. If a fault is found, the fault signal FAULT is set to valid, and the enable signal EN of the host's motor power drive IPM is cut off. At the same time, a serial port shutdown signal is sent through the SCI serial port; Step 2: The main FPGA detects a fault in the main DSP processor and its peripheral circuits. If the heartbeat signal HB1 is abnormal or the fault signal FAULT is valid, the main FPGA cuts off the PWM signal of the motor power drive IPM of the main machine and outputs a hardware cut-off signal ESS to the standby machine. In step 3, the DSP processor of the standby machine receives the hardware cut-off signal ESS or the SCI serial port cut-off signal, turns on the enable signal EN of the motor power driver IPM of the standby machine, so that the FPGA of the standby machine normally outputs the PWM signal to the motor power driver IPM of the standby machine, and successfully switches to the standby machine to complete the command signal from the control system.

8. The method for autonomous master-slave switching of a dual-redundant servo controller according to claim 7, characterized in that: include: The DSP processor of the host machine performs periodic self-tests and outputs a heartbeat signal HB2 to the DSP processor of the standby machine and a heartbeat signal HB1 to the FPGA of the host machine to inform them of their own operating status; when the DSP processor of the standby machine detects that the heartbeat signal HB2 is abnormal, it turns on the enable signal EN of the motor power drive IPM of the standby machine, so that the FPGA of the standby machine can normally output the PWM signal to the motor power drive IPM of the standby machine; when the FPGA of the host machine detects that the heartbeat signal HB1 is abnormal, it cuts off the PWM signal of the motor power drive IPM of the host machine and outputs a hardware power-off signal ESS to the standby machine.

9. The method for autonomous master-slave switching of dual redundant servo controllers according to claim 7, characterized in that: include: The DSP processor of the standby machine performs periodic self-tests and outputs a heartbeat signal HB1 to the FPGA of the standby machine to inform it of its own operating status.

10. The method for autonomous master-slave switching of dual redundant servo controllers according to claim 7, characterized in that: The standby machine's DSP processor will only perform the machine switching operation when it receives the hardware switch signal ESS three times in a row, receives the serial switch signal from the SCI serial port three times in a row, or the heartbeat HB2 signal does not change for 30ms.

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