Tensile strain germanium substrate and tensile strain germanium sensor
By adopting the design of tensile strained germanium-based substrate in germanium-based sensors and using the combined structure of ferroelectric oxide and multi-quantum well layer, the contradiction between the responsiveness and working speed of germanium-based sensors is solved, achieving high efficiency and low cost production, suitable for large-scale production and application.
Patent Information
- Application Number
- CN202420619145.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-27
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-03-27
AI Technical Summary
There is a contradiction between the responsiveness and working speed of existing germanium sensors. The thicker germanium layer increases the responsiveness but increases the capacitance, which affects the working speed.
Tensile-strained germanium-based substrate is adopted, including a first silicon substrate stacked sequentially, a first intrinsic strained germanium layer, an intrinsic strained germanium/germanium-silicon multi-quantum well layer, a second intrinsic strained germanium layer, and a second doped The hybrid strained germanium layer, ferroelectric oxide layer and dielectric layer use the negative capacitance effect of ferroelectric oxide to compensate the capacitance, and expand the spectral response range through the multi-quantum well layer.
It realizes the high responsiveness and high working speed of germanium-based sensors, reduces capacitance and dark current, expands the spectral response range, and uses large-size silicon substrates to reduce production costs, making it suitable for large-scale mass production.
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Figure CN222190762U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, in particular to a tensile strain germanium substrate and a tensile strain germanium sensor. Background Art
[0002] InGaAs short-wave infrared sensors are widely used in machine vision, laser communication, astronomy, life sciences, semiconductor detection, security, medical diagnosis, low-altitude technology and automotive assisted driving, but they have technical bottlenecks such as small wafer size, incompatibility with CMOS manufacturing process, low yield and inability to mass produce. As a result, germanium sensors that are more compatible with CMOS manufacturing process and also have photoelectric response in the short-wave infrared band are attracting more and more attention.
[0003] At present, vertical PIN structured germanium sensors are usually prepared by direct epitaxial germanium on silicon or germanium on insulator (GOI) structure. However, a thicker germanium layer is usually used in the wafer of vertical PIN structure to improve the responsiveness, but the thicker germanium layer will introduce a larger capacitance to the manufactured germanium sensor, thereby affecting the working speed of the germanium sensor.
[0004] Therefore, how to simultaneously achieve high responsiveness and high operating speed of germanium-based sensors has become a problem that needs to be solved. Utility Model Content
[0005] Based on the above problems, the utility model provides a tensile strained germanium substrate and a tensile strained germanium sensor, so as to simultaneously achieve high responsiveness and high operating speed of the germanium sensor.
[0006] The utility model embodiment discloses the following technical solution:
[0007] In a first aspect, an embodiment of the present utility model provides a tensile strained germanium substrate, wherein the tensile strained germanium substrate is used to form a tensile strained germanium sensor, and the tensile strained germanium substrate comprises:
[0008] A first silicon substrate, a first intrinsic strained germanium layer, an intrinsic strained germanium / germanium silicon multi-quantum well layer, a second intrinsic strained germanium layer, a second doped strained germanium layer, a ferroelectric oxide layer and a dielectric layer are stacked in sequence; the first silicon substrate is a silicon substrate with a diameter of not less than 8 inches.
[0009] Optionally, an intrinsic strained germanium buffer layer is further provided between the first silicon substrate and the first intrinsic strained germanium layer.
[0010] Optionally, the first silicon substrate is a silicon substrate having a diameter not less than 8 inches.
[0011] Optionally, the ferroelectric oxide layer is Hf0.5 Zr 0.5 One or more stacks of O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice.
[0012] Optionally, the intrinsic strained germanium / germanium silicon multi-quantum well layer includes a strained germanium layer and a strained germanium silicon layer; the strained germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the strained germanium silicon layer is a well layer with a thickness range of 10 to 100 nm; the silicon content in the strained germanium silicon layer is 0 to 30%.
[0013] Optionally, the intrinsic strained germanium / germanium silicon multi-quantum well layer includes 2 to 10 quantum wells.
[0014] Optionally, the intrinsic strained germanium / germanium silicon multiple quantum well layer has a thickness ranging from 200 to 1000 nm.
[0015] Optionally, the thickness of the second intrinsic strained germanium layer is in the range of 100 to 3000 nm.
[0016] In a second aspect, an embodiment of the present utility model provides a tensile strain germanium sensor, wherein the tensile strain germanium sensor is made based on the tensile strain germanium substrate described in any embodiment of the first aspect, and the tensile strain germanium sensor comprises:
[0017] A first doped strained germanium layer, an intrinsic strained germanium / germanium silicon multi-quantum well layer, a second intrinsic strained germanium layer, a second doped strained germanium layer, a ferroelectric oxide layer, a dielectric layer and an oxide layer are stacked in sequence; the first doped strained germanium layer is a first intrinsic strained germanium layer after ion doping; the first doped strained germanium layer, the intrinsic strained germanium / germanium silicon multi-quantum well layer, the second intrinsic strained germanium layer and the second doped strained germanium layer form a vertical PIN structure.
[0018] Optionally, the side of the oxide layer facing away from the dielectric layer further has a second silicon substrate.
[0019] Optionally, the germanium-based sensor further includes a readout circuit, and the first metal located in the first doped strained germanium layer and the second metal located in the second doped strained germanium layer are electrically connected to the readout circuit.
[0020] Compared with the prior art, the utility model has the following beneficial effects:
[0021] The utility model provides a tensile strained germanium substrate, which comprises: a first silicon substrate, a first intrinsic strained germanium layer, an intrinsic strained germanium / germanium silicon multi-quantum well layer, a second intrinsic strained germanium layer, a second doped strained germanium layer, a ferroelectric oxide layer and a dielectric layer stacked in sequence; the first silicon substrate is a silicon substrate with a diameter of not less than 8 inches. Therefore, the germanium sensor made based on the tensile strained germanium substrate, on the one hand, due to the negative capacitance effect of the ferroelectric oxide, its capacitance is negative during the operation of the germanium sensor, which can effectively compensate for the larger positive capacitance in the thick germanium vertical PIN structure, thereby reducing the capacitance of the entire germanium sensor, while achieving high responsiveness and high operating speed of the germanium sensor, and obtaining a germanium sensor with high quantum efficiency and high sensitivity; on the other hand, the ferroelectric oxide is also an effective insulating layer, which can effectively improve the defect state generated at the interface between the germanium and the oxide layer due to the existence of dangling bonds or water molecules, thereby reducing the dark current of the germanium sensor; on the other hand, there are two photoelectric sensing layers, namely the second intrinsic strained germanium layer and the intrinsic strained germanium / germanium silicon multi-quantum well layer, wherein the second intrinsic strained germanium layer is a visible light and short-wave infrared sensing layer, and the intrinsic strained germanium / germanium silicon multi-quantum well layer is an infrared band sensing layer, and the combined structure of the two can significantly expand the spectral response range of the germanium sensor. In addition, using large-size, low-cost, non-fragile silicon substrates as the substrate material for tensile strained germanium substrates can overcome the shortcomings of using germanium substrates to prepare germanium sensors, such as fragility, high cost, small size, and low yield, and is easy to mass-produce, thereby reducing the production cost of germanium sensors. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0023] Figure 1 A structural diagram of a tensile strained germanium substrate provided in an embodiment of the utility model;
[0024] Figure 2 A structural diagram of an acceptor substrate provided in an embodiment of the utility model;
[0025] Figure 3 A structural diagram of a tensile strain germanium sensor provided in an embodiment of the utility model. DETAILED DESCRIPTION
[0026] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0027] See also Figure 1 , which is a structural diagram of a tensile strained germanium substrate provided by an embodiment of the utility model, and the tensile strained germanium substrate comprises:
[0028] A first silicon substrate 101, a first intrinsic strained germanium layer 102, an intrinsic strained germanium / germanium silicon multi-quantum well layer 103, a second intrinsic strained germanium layer 104, a second doped strained germanium layer 105, a ferroelectric oxide layer 106 and a dielectric layer 107 are stacked in sequence; the first silicon substrate 101 is a large-size silicon substrate, preferably a silicon substrate with a diameter of not less than 8 inches.
[0029] Therefore, by using a large-size, low-cost, non-fragile silicon substrate, the disadvantages of using a germanium substrate to prepare a germanium sensor, such as fragility, high cost, small size, and low yield, can be overcome, and large-scale batch production can be easily carried out, thereby reducing the production cost of the germanium sensor, and it can be highly compatible with the CMOS process production line, which is conducive to promoting the promotion and application of germanium sensors in the civilian field; in addition, in the embodiment of the utility model, the first intrinsic strained germanium layer 102 is formed on the silicon substrate by heteroepitaxial growth, and then a donor substrate is formed. A certain amount of tensile strain can be introduced by the heteroepitaxial growth, which can effectively expand the wavelength response range of the germanium sensor prepared by the donor substrate.
[0030] As an example, the thickness of the ferroelectric oxide layer 106 may be selected from a range of 10 to 1000 nm. 0.5 Zr 0.5 O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice. For example, the ferroelectric oxide layer 106 can be a PZT layer, or a stack of PZT and SrTiO3. The ferroelectric oxide layer 106 is preferably a stack formed by stacking multiple materials, thereby generating a resonant cavity effect, so that light is reflected multiple times in the resonant cavity, the intensity of light is enhanced, and it is beneficial to improve the responsiveness of the germanium sensor.
[0031] The tensile strained germanium substrate provided by the embodiment of the utility model has a ferroelectric oxide layer 106. Since the ferroelectric oxide has a negative capacitance effect, its capacitance is negative during the operation of the germanium sensor, which can effectively compensate for the larger positive capacitance in the thick germanium vertical PIN structure, thereby reducing the capacitance of the entire germanium sensor, while achieving high responsiveness and high operating speed of the germanium sensor; on the other hand, the ferroelectric oxide is also an effective insulating layer, which can effectively improve the defect state generated at the interface between the germanium and the oxide layer due to the existence of dangling bonds or water molecules, thereby reducing the dark current of the germanium sensor.
[0032] Optionally, the dielectric layer 107 is an Al 2 O 3 layer, so that the tensile strained germanium substrate and the acceptor substrate can be directly wafer-bonded.
[0033] Optionally, an intrinsic strained germanium buffer layer may be provided between the first silicon substrate 101 and the first intrinsic strained germanium layer 102, and the intrinsic strained germanium buffer layer may be a film layer having a different epitaxial growth temperature from the first intrinsic strained germanium layer 102. Thus, the lattice mismatch between the first silicon substrate 101 and the first intrinsic strained germanium layer 102 may be reduced, the quality of the first intrinsic strained germanium layer 102 may be improved, and the performance of the tensile strained germanium sensor formed based on the tensile strained germanium substrate may be improved.
[0034] Optionally, the thickness of the intrinsic strained germanium buffer layer is in the range of 100 to 500 nm; the thickness of the first intrinsic strained germanium layer 102 is in the range of 100 to 500 nm.
[0035] Optionally, the intrinsic strained germanium / germanium silicon multi-quantum well layer 103 includes a strained germanium layer and a strained germanium silicon layer, wherein the strained germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the strained germanium silicon layer is a potential well layer with a thickness range of 10 to 100 nm, the silicon content in the strained germanium silicon layer is 0 to 30%, and the germanium content is not less than 70%; the total thickness range of the intrinsic strained germanium / germanium silicon multi-quantum well layer 102 is 200 to 1000 nm, and can include 2 to 10 quantum wells.
[0036] Optionally, the thickness of the second intrinsic strained germanium layer 104 is in the range of 100 to 3000 nm; the thickness of the second doped strained germanium layer 105 is in the range of 100 to 500 nm. As an example, a germanium layer may be formed by epitaxy first, and then part of the germanium layer may be N-type or P-type doped by, for example, ion implantation or diffusion, so that the germanium layer is divided into the second intrinsic strained germanium layer 104 without ion doping and the second doped strained germanium layer 105 with ion doping.
[0037] See also Figure 2 , this figure is a structural diagram of an acceptor substrate provided by an embodiment of the utility model, and the acceptor substrate includes: a second substrate 201 and an oxide layer 202 stacked in sequence.
[0038] Specifically, the second substrate 201 can be a silicon substrate, a sapphire substrate or a glass substrate; the oxide layer 202 can be a layer of SiO2 or a stack of multiple layers of SiO2 formed on a silicon substrate using, for example, a thermal oxidation process or a chemical vapor deposition process, and the thickness of the oxide layer 202 can range from 100 to 1000 nm.
[0039] See also Figure 3 , which is a structural diagram of a tensile strain germanium sensor provided by an embodiment of the utility model, and the germanium sensor includes:
[0040] The first doped strained germanium layer 102', the intrinsic strained germanium / germanium silicon multi-quantum well layer 103, the second intrinsic strained germanium layer 104, the second doped strained germanium layer 105, the ferroelectric oxide layer 106, the dielectric layer 107 and the oxide layer 202 are sequentially stacked. The first doped strained germanium layer 102', the intrinsic strained germanium / germanium silicon multi-quantum well layer 103, the second intrinsic strained germanium layer 104 and the second doped strained germanium layer 105 form a vertical PIN structure.
[0041] Specifically, the tensile strained germanium substrate and the acceptor substrate can be directly wafer-bonded to form a first silicon substrate 101, a first intrinsic strained germanium layer 102, an intrinsic strained germanium / germanium silicon multi-quantum well layer 103, a second intrinsic strained germanium layer 104, a second doped strained germanium layer 105, a ferroelectric oxide layer 106, a dielectric layer 107 and an oxide layer 202 which are stacked in sequence; then, the side of the tensile strained germanium substrate away from the dielectric layer 107 is thinned to expose the first intrinsic strained germanium layer 102; finally, the exposed first intrinsic strained germanium layer 102 is N-type or P-type doped by ion implantation or diffusion to form a first doped strained germanium layer 102', wherein the ion doping types of the first doped strained germanium layer 102' and the second doped strained germanium layer 105 are different, so that the first doped strained germanium layer 102', the intrinsic strained germanium / germanium silicon multi-quantum well layer 103, the second intrinsic strained germanium layer 104 and the second doped strained germanium layer 105 form a vertical PIN structure.
[0042] As an example, if the tensile strained germanium substrate includes an intrinsic strained germanium buffer layer, then in the process of thinning the side of the tensile strained germanium substrate away from the dielectric layer 107, the first silicon substrate 101 and the intrinsic strained germanium buffer layer are removed in sequence to expose the first intrinsic strained germanium layer 102, thereby facilitating ion doping of the first intrinsic strained germanium layer 102.
[0043] In addition, in an embodiment of the present invention, the intrinsic strained germanium / germanium silicon multi-quantum well layer 103 includes a strained germanium layer and a strained germanium silicon layer, wherein the strained germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the strained germanium silicon layer is a potential well layer with a thickness range of 10 to 100 nm, the silicon content in the strained germanium silicon layer is 0 to 30%, and the germanium content is not less than 70%; the total thickness of the intrinsic strained germanium / germanium silicon multi-quantum well layer 103 is in the range of 200 to 1000 nm, and can include 2 to 10 quantum wells.
[0044] Optionally, the thickness of the second intrinsic strained germanium layer 104 is in the range of 100-3000 nm, including a reserved electrode layer of 100-500 nm, and the rest is a photoelectric sensing layer. The thickness of the second doped strained germanium layer 105 is in the range of 100-500 nm.
[0045] Therefore, the tensile strained germanium sensor provided by the embodiment of the utility model has two photoelectric sensing layers, namely the second intrinsic strained germanium layer 104 and the intrinsic strained germanium / germanium silicon multi-quantum well layer 103, wherein the second intrinsic strained germanium layer 104 is a visible light and short-wave infrared sensing layer, and the intrinsic strained germanium / germanium silicon multi-quantum well layer 103 is an infrared band sensing layer. By using the combined structure of the second intrinsic strained germanium layer 104 and the intrinsic strained germanium / germanium silicon multi-quantum well layer 103 as the sensing layer, the spectral response range of the germanium sensor can be significantly expanded.
[0046] In the embodiment of the present invention, the thickness of the ferroelectric oxide layer 106 can be selected from the range of 10 to 1000 nm. 0.5 Zr 0.5 O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice. For example, the ferroelectric oxide layer 106 can be a PZT layer, or a stack of PZT and SrTiO3. The ferroelectric oxide layer 106 is preferably a stack formed by stacking multiple materials, thereby generating a resonant cavity effect (Resonant Cavity Effect), so that the light is reflected multiple times in the resonant cavity, the intensity of the light is enhanced, and it is beneficial to improve the responsiveness of the germanium sensor. In addition, the stacking of the ferroelectric oxide layer 106, the dielectric layer 107 and the oxide layer 202 can also form a resonant cavity effect, enhance the interaction between the optical signal and the two photoelectric sensing layers of the second intrinsic strained germanium layer and the intrinsic strained germanium / germanium silicon multi-quantum well layer, and improve the performance of the germanium sensor.
[0047] Optionally, the germanium sensor further includes a readout circuit ROIC, and the first metal 501 located in the first doped strained germanium layer 102 ′ and the second metal 502 located in the second doped strained germanium layer 105 can be electrically connected by bump bonding with the readout circuit.
[0048] Optionally, the side of the oxide layer 202 facing away from the dielectric layer 107 may also have a portion of the second substrate 201. Specifically, after the first metal 501 located in the first doped strained germanium layer 102' and the second metal 502 located in the second doped strained germanium layer 105 are electrically connected to the readout circuit, a portion of the second substrate 201 may be removed, or the second substrate 201 may be completely removed to expose the oxide layer 202.
[0049] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0050] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A tensile strained germanium substrate, characterized in that: The tensile strained germanium substrate is used to form a tensile strained germanium sensor, and the tensile strained germanium substrate includes: A first silicon substrate, a first intrinsic strained germanium layer, an intrinsic strained germanium / germanium silicon multi-quantum well layer, a second intrinsic strained germanium layer, a second doped strained germanium layer, a ferroelectric oxide layer and a dielectric layer are stacked in sequence; the first silicon substrate is a silicon substrate with a diameter of not less than 8 inches.
2. The tensile strained germanium substrate according to claim 1, characterized in that: An intrinsic strained germanium buffer layer is further provided between the first silicon substrate and the first intrinsic strained germanium layer.
3. The tensile strained germanium substrate according to claim 1, characterized in that: The ferroelectric oxide layer is Hf 0.5 Zr 0.5 One or more stacks of O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice.
4. The tensile strained germanium substrate according to claim 1, characterized in that: The intrinsic strained germanium / germanium silicon multi-quantum well layer includes a strained germanium layer and a strained germanium silicon layer; the strained germanium layer is a barrier layer with a thickness ranging from 10 to 100 nm; the strained germanium silicon layer is a potential well layer with a thickness ranging from 10 to 100 nm.
5. The tensile strained germanium substrate according to claim 1, characterized in that: The intrinsic strained germanium / germanium silicon multi-quantum well layer includes 2 to 10 quantum wells.
6. The tensile strained germanium substrate according to claim 1, characterized in that: The thickness of the intrinsic strained germanium / germanium silicon multi-quantum well layer is in the range of 200 to 1000 nm.
7. The tensile strained germanium substrate according to claim 1, characterized in that: The thickness of the second intrinsic strained germanium layer is in the range of 100 to 3000 nm.
8. A tensile strain germanium sensor, characterized in that: The tensile strain germanium sensor is made based on the tensile strain germanium substrate according to any one of claims 1 to 7, and the tensile strain germanium sensor comprises: A first doped strained germanium layer, an intrinsic strained germanium / germanium silicon multi-quantum well layer, a second intrinsic strained germanium layer, a second doped strained germanium layer, a ferroelectric oxide layer, a dielectric layer and an oxide layer are stacked in sequence; the first doped strained germanium layer is a first intrinsic strained germanium layer after ion doping; the first doped strained germanium layer, the intrinsic strained germanium / germanium silicon multi-quantum well layer, the second intrinsic strained germanium layer and the second doped strained germanium layer form a vertical PIN structure.
9. The tensile strain germanium sensor according to claim 8, characterized in that: The side of the oxide layer facing away from the dielectric layer also has a second silicon substrate.
10. The tensile strain germanium sensor according to claim 8, characterized in that: The germanium-based sensor further includes a readout circuit, and the first metal located in the first doped strained germanium layer and the second metal located in the second doped strained germanium layer are electrically connected to the readout circuit.