Compressed video stream decoding and sending device

Abstract

The utility model relates to a compressed video stream decoding and transmitting device, belongs to the technical field of multimedia, and solves the problems of high energy consumption and high cost caused by the fact that compressed video streams need to be locally decoded and displayed by a display terminal in the prior art. The device comprises an optical fiber channel video decoding unit, a network switch and a plurality of optical fiber channel display terminals, the optical fiber channel video decoding unit comprises a plurality of optical fiber channel video decoding modules; each optical fiber channel video decoding module comprises a video decoding circuit and an FC controller; the video decoding circuit is connected with the network switch through the Ethernet, and the FC controller and the display terminal are connected with the network switch through an optical fiber channel. Hard decoding of the compressed video stream is realized, energy consumption is reduced, cost is saved, and system expansion is flexible.

Description

Technical Field

[0001] The utility model relates to the technical field of multimedia, and in particular to a compressed video stream decoding and sending device. Background Art

[0002] Fiber Channel is a computer communication protocol designed to meet the requirements of high-performance data transmission. It meets the standardization of system structure and the requirements of high-speed, large-scale, reliable and effective information communication and processing. It is widely used in the new generation of avionics systems. At the same time, FC (Fiber Channel) technology has also gradually been applied in the field of automotive electronics. Video encoding and decoding refers to the elimination of relevant redundant information in video data, which can greatly reduce the storage capacity and bandwidth occupied by the video, so that the video can be transmitted on the network at a lower bandwidth cost. In the traditional fiber channel video decoding method, video decoding is performed on the display terminal through a dedicated video decoding chip or graphics card, and each display terminal needs to have video decoding capabilities.

[0003] Under the current trend of domestic independent control, limited by the capabilities and costs of domestic devices, in traditional fiber channel video decoding devices, display terminals usually perform video decoding through dedicated video decoding chips, graphics cards or FPGAs (Field Programmable Gate Arrays) or video decoding chips or graphics cards. Each display terminal needs to have video decoding capabilities, which may lead to high energy consumption and high costs. Utility Model Content

[0004] In view of the above analysis, the utility model aims to provide a compressed video stream decoding and sending device to solve the technical problems of high decoding capability requirements, high power consumption of display terminals and high costs in traditional video decoding and sending devices.

[0005] The purpose of this utility model is mainly achieved through the following technical solutions:

[0006] A compressed video stream decoding and sending device, the device comprising: a fiber channel video decoding unit, a network switch and a plurality of fiber channel display terminals;

[0007] The fiber channel video decoding unit includes a plurality of fiber channel video decoding modules; each fiber channel video decoding module includes a video decoding circuit and an FC controller;

[0008] The video decoding circuit is connected to the network switch via Ethernet, and the FC controller and the display terminal are connected to the network switch via a fiber optic channel.

[0009] Based on the further improvement of the above solution, the Ethernet port and FC channel interface of the network switch are simultaneously connected to the Ethernet port and FC controller of each fiber channel video decoding module in the fiber channel video decoding unit;

[0010] The network switch is also connected to each fiber channel display terminal via an FC channel interface.

[0011] Based on a further improvement of the above solution, the video decoding circuit is connected to the FC controller via a PCIe interface.

[0012] Based on the further improvement of the above scheme, the video decoding circuit includes a video decoding chip, an EMMC memory, a DDR4 memory and a debugging serial port;

[0013] The video decoding chip is electrically connected to the EMMC memory, the DDR4 memory and the debugging serial port.

[0014] Based on the further improvement of the above solution, the video decoding circuit also includes a reset circuit, a clock circuit and a power supply circuit;

[0015] The video decoding chip is electrically connected to the reset circuit, the clock circuit and the power supply circuit.

[0016] Based on the further improvement of the above solution, the FC controller includes a FC controller chip, a reset circuit, a clock circuit, a power supply circuit and a photoelectric conversion circuit;

[0017] The FC controller chip is electrically connected to the reset circuit, the clock circuit, the power supply circuit and the photoelectric conversion circuit.

[0018] Based on the further improvement of the above solution, the fiber channel video decoding module further includes an Ethernet circuit, the Ethernet circuit includes an Ethernet Phy and an Ethernet transformer, and the Ethernet Phy is electrically connected to the Ethernet transformer;

[0019] The video decoding circuit is connected to the Ethernet Phy via a GMAC interface.

[0020] Based on the further improvement of the above solution, the fiber channel display terminal includes a power supply unit, an FC network display driver module, a mainboard and a display screen;

[0021] The power supply unit supplies power to the FC network display driver module, the mainboard and the display screen through circuit connection;

[0022] The FC network display driver module is connected to the display screen via a DP interface;

[0023] The FC network display driving module is electrically connected to the mainboard.

[0024] Based on the further improvement of the above solution, the video decoding chip is the HiSilicon Hi3559AV100 processor.

[0025] Based on the further improvement of the above solution, the FC controller chip is a FC4000A chip.

[0026] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0027] 1. Through the combination of Fiber Channel video decoding unit, network switch and Fiber Channel display terminal, video decoding and transmission in Fiber Channel network is realized. This design may help reduce energy consumption, reduce costs, and improve the performance and efficiency of the entire system;

[0028] 2. The advanced hardware components of HiSilicon Hi3559AV100 processor and FC4000A chip are introduced to use hardware decoding for compressed video streams, which improves the decoding efficiency and capability of compressed video streams, making the decoding and device have more powerful video processing and decoding capabilities;

[0029] 3. Use FC channel to send FC-AV video images after decoding, which has the advantages of high bandwidth, low latency, long-distance transmission, fire resistance and electromagnetic shielding;

[0030] 4. Fiber channel display terminals do not need to have video decoding capabilities, saving costs and improving system flexibility;

[0031] 5. The Fibre Channel video decoding unit includes one or more Fibre Channel video decoding modules, and the Fibre Channel display terminal is flexibly expanded according to the demand for expansion of decoding and display performance.

[0032] Those skilled in the art can understand that the control of the first memory buffer and the second memory buffer in the layer by the FC network display driver module in the above embodiment, and then sending the FC-AV video to the display screen is a common method in the prior art, and the present utility model does not involve any software improvements. The present utility model only needs to connect each device with corresponding functions through the connection relationship given in the embodiment of the present utility model, which does not involve any program software improvements. As for the connection method between the hardware devices with corresponding functions, it can be implemented by those skilled in the art using the existing technology, and will not be described in detail here.

[0033] In the present invention, the above-mentioned technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the following content, and some advantages can be obvious from the description or understood by implementing the present invention. The purpose and other advantages of the present invention can be achieved and obtained through the contents specifically pointed out in the text and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are only used for the purpose of illustrating specific embodiments and are not to be considered as limiting the present invention. In the entire drawings, the same reference symbols represent the same components.

[0035] Figure 1 This is a schematic diagram of the structure of a compressed video stream decoding and sending device in an embodiment of the utility model;

[0036] Figure 2 This is a schematic diagram of a fiber channel video decoding module in an embodiment of the utility model;

[0037] Figure 3 This is a schematic diagram of a fiber channel display terminal in an embodiment of the utility model;

[0038] Figure 4 This is a schematic diagram of the FC network display driver module controlling the buffer in the layer to send the FC-AV video to the display screen in an embodiment of the utility model;

[0039] Figure 5 This is a schematic diagram of the connection of various components in the decoding and sending device in the embodiment of the utility model. DETAILED DESCRIPTION

[0040] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the present application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.

[0041] A specific embodiment of the utility model is as follows Figure 1 As shown, a compressed video stream decoding and sending device is disclosed, the device comprising: a fiber channel video decoding unit, a network switch and a plurality of fiber channel display terminals;

[0042] The fiber channel video decoding unit includes a plurality of fiber channel video decoding modules; each fiber channel video decoding module includes a video decoding circuit and an FC controller;

[0043] The video decoding circuit is connected to the network switch via Ethernet, and the FC controller and the display terminal are connected to the network switch via a fiber optic channel.

[0044] The fiber channel video decoding unit includes one or more fiber channel video decoding modules, and the fiber channel display terminal is one or more, which can be flexibly customized and expanded according to actual decoding needs.

[0045] Each fiber channel video decoding module has the same structure, and each fiber channel display terminal has the same structure.

[0046] The Ethernet port and FC channel interface of the network switch are simultaneously connected to the Ethernet port and FC controller of each Fiber Channel video decoding module in the Fiber Channel video decoding unit;

[0047] The network switch is also connected to each fiber channel display terminal via an FC channel interface.

[0048] like Figure 2 As shown, the video decoding circuit is connected to the FC controller via a PCIe (Peripheral Component Interconnect express, a high-speed serial data bus) interface. The FC controller transmits a decoding instruction to the video decoding circuit.

[0049] The video decoding circuit is the core component of the compressed video stream decoding of the device.

[0050] The FC controller is connected to the network switch through the FC channel interface and the FC channel.

[0051] The video decoding circuit includes a video decoding chip, an EMMC memory, a DDR4 memory and a debugging serial port;

[0052] The video decoding chip is electrically connected to the EMMC memory, the DDR4 memory and the debugging serial port.

[0053] The video decoding chip performs hardware decoding on the compressed video stream, which is faster and more efficient than software decoding;

[0054] EMMC (Embedded Multi Media Card) memory, which provides a standard interface and manages flash memory;

[0055] DDR4 (Double Data Rate) memory is used to provide a buffer for video decoding;

[0056] The debugging serial port is used to receive instructions and debug the video decoding circuit.

[0057] The video decoding circuit also includes a reset circuit, a clock circuit and a power supply circuit;

[0058] The video decoding chip is electrically connected to the reset circuit, the clock circuit and the power supply circuit.

[0059] The reset circuit is used to reset the video decoding circuit and restore the components in the video decoding circuit to the initial state;

[0060] The clock circuit is used to provide a time reference for the video decoding circuit to achieve data synchronization;

[0061] The power supply circuit is used to supply power to the video decoding circuit.

[0062] The FC controller includes an FC controller chip, a reset circuit, a clock circuit, a power supply circuit and a photoelectric conversion circuit;

[0063] The FC controller chip is electrically connected to the reset circuit, the clock circuit, the power supply circuit and the photoelectric conversion circuit.

[0064] The reset circuit is used to reset the FC controller and restore the components in the FC controller to their initial state;

[0065] The clock circuit is used to provide a time reference for the FC controller;

[0066] The power circuit is used to supply power to the FC controller;

[0067] The photoelectric conversion circuit is used to convert optical signals into electrical signals. The video decoding circuit processes electrical signals, which are converted into optical signals through the photoelectric conversion circuit of the FC controller and transmitted to the network switch.

[0068] FC channel is fiber optic communication, which is an optical signal. The FC controller processes electrical signals inside, but uses optical signals for external communication, which requires an optoelectronic conversion circuit for conversion.

[0069] The fiber channel video decoding module further includes an Ethernet circuit, wherein the Ethernet circuit includes an Ethernet Phy and an Ethernet transformer, wherein the Ethernet Phy is electrically connected to the Ethernet transformer;

[0070] The video decoding circuit is connected to the Ethernet Phy via a GMAC interface.

[0071] The Ethernet Phy is connected to the video decoding circuit through a GMAC (Gigabit Media Access Controller, a controller for implementing high-speed Ethernet interconnection) interface;

[0072] An Ethernet PHY is a chip that sends and receives Ethernet data frames.

[0073] In Ethernet transmission, data is transmitted through network cables in the form of electrical signals. Ethernet transformers are used to convert electrical signals into the signal format required by Ethernet, so that data can be transmitted and parsed in the network. Ethernet network transformers can also increase the transmission distance.

[0074] like Figure 3 As shown, the fiber channel display terminal includes a power supply unit, an FC networked display driver module, a main board and a display screen; the power supply unit supplies power to the FC networked display driver module, the main board and the display screen through a circuit connection; the FC networked display driver module is connected to the display screen through a DP (DisplayPort, a display communication port that relies on packetized data transmission technology) interface; the FC networked display driver module is electrically connected to the main board.

[0075] The FC network display driver module receives the compressed video stream decoded by the video decoding chip and displays it on the display screen through the DP interface;

[0076] The motherboard, also known as the host board, is one of the most basic components of the Fibre Channel display terminal. It has components such as the BIOS chip, I / O control chip, keyboard and panel control switch interface, indicator light connectors, expansion slots, and DC power supply connectors for plug-in cards.

[0077] like Figure 4 As shown, the FC network display driver module receives the FC-AV protocol data frame transmitted by the fiber channel video decoding module through the network switch, stores it alternately in the first memory buffer and the second memory buffer in the layer, and then outputs it to the display screen for display. This part uses the common method of the prior art and does not involve any software improvement.

[0078] The video decoding chip is the HiSilicon Hi3559AV100 processor.

[0079] Load the HiSilicon Hi3559AV100 decoding library, set the decoding resolution of HiSilicon Hi3559AV100 according to the resolution width and height of the compressed video stream to be decoded, and perform hard decoding.

[0080] The FC controller chip is a FC4000A chip.

[0081] Load the FC4000A controller driver on the HiSilicon Hi3559AV100 operating system. According to the Fibre Channel FC protocol requirements, set the communication port mode, FC port rate, FC port login registration, FC port name and node name, FC port switching network login, N port login, FC-AV sending protocol enable, and interrupt enable for the FC controller.

[0082] The device of this embodiment is used to obtain, decode and display the compressed video stream. Figure 5 As shown. HiSilicon Hi3559AV100 is connected to FC controller (FC4000A chip) through PCIe bus, and HiSilicon Hi3559AV100 receives H.264 / H.265 compressed video stream through Ethernet; storage flash is used to store the operating system of HiSilicon Hi3559AV100, and memory DDR is used as the cache area for HiSilicon Hi3559AV100 to process compressed video stream. FC controller outputs the decoded video image to the Fiber Channel display terminal through the Fiber Channel switch for display; the Fiber Channel display terminal can be flexibly expanded according to the decoding and display requirements, and can be one or more.

[0083] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0084] 1. Through the combination of Fiber Channel video decoding unit, network switch and Fiber Channel display terminal, video decoding and transmission in Fiber Channel network is realized. This design may help reduce energy consumption, reduce costs, and improve the performance and efficiency of the entire system;

[0085] 2. The advanced hardware components of HiSilicon Hi3559AV100 processor and FC4000A chip are introduced to use hardware decoding for compressed video streams, which improves the decoding efficiency and capability of compressed video streams, making the decoding and device have more powerful video processing and decoding capabilities;

[0086] 3. Use FC channel to send FC-AV video images after decoding, which has the advantages of high bandwidth, low latency, long-distance transmission, fire resistance and electromagnetic shielding;

[0087] 4. Fiber channel display terminals do not need to have video decoding capabilities, saving costs and improving system flexibility;

[0088] 5. The Fibre Channel video decoding unit includes one or more Fibre Channel video decoding modules, and the Fibre Channel display terminal is flexibly expanded according to the demand for expansion of decoding and display performance.

[0089] Those skilled in the art can understand that the control of the first memory buffer and the second memory buffer in the layer by the FC network display driver module in the above embodiment, and then sending the FC-AV video to the display screen is a common method in the prior art, and the present utility model does not involve any software improvements. The present utility model only needs to connect each device with corresponding functions through the connection relationship given in the embodiment of the present utility model, which does not involve any program software improvements. As for the connection method between the hardware devices with corresponding functions, it can be implemented by those skilled in the art using the existing technology, and will not be described in detail here.

[0090] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed in the present invention should be included in the protection scope of the present invention.

Claims

1. A compressed video stream decoding and sending device, characterized in that: The device comprises: a fiber channel video decoding unit, a network switch and a plurality of fiber channel display terminals; The fiber channel video decoding unit includes a plurality of fiber channel video decoding modules; each fiber channel video decoding module includes a video decoding circuit and an FC controller; The video decoding circuit is connected to the network switch via Ethernet, and the FC controller and the display terminal are connected to the network switch via a fiber optic channel.

2. The compressed video stream decoding and sending device according to claim 1, characterized in that: The Ethernet port and FC channel interface of the network switch are simultaneously connected to the Ethernet port and FC controller of each Fiber Channel video decoding module in the Fiber Channel video decoding unit; The network switch is also connected to each fiber channel display terminal via an FC channel interface.

3. The compressed video stream decoding and sending device according to claim 2, characterized in that: The video decoding circuit is connected to the FC controller via a PCIe interface.

4. The compressed video stream decoding and sending device according to claim 3, characterized in that: The video decoding circuit includes a video decoding chip, an EMMC memory, a DDR4 memory and a debugging serial port; The video decoding chip is electrically connected to the EMMC memory, the DDR4 memory and the debugging serial port.

5. The compressed video stream decoding and sending device according to claim 4, characterized in that: The video decoding circuit also includes a reset circuit, a clock circuit and a power supply circuit; The video decoding chip is electrically connected to the reset circuit, the clock circuit and the power supply circuit.

6. The compressed video stream decoding and sending device according to claim 5, characterized in that: The FC controller includes an FC controller chip, a reset circuit, a clock circuit, a power supply circuit and a photoelectric conversion circuit; The FC controller chip is electrically connected to the reset circuit, the clock circuit, the power supply circuit and the photoelectric conversion circuit.

7. The compressed video stream decoding and sending device according to claim 6, characterized in that: The fiber channel video decoding module further includes an Ethernet circuit, wherein the Ethernet circuit includes an Ethernet Phy and an Ethernet transformer, wherein the Ethernet Phy is electrically connected to the Ethernet transformer; The video decoding circuit is connected to the Ethernet Phy via a GMAC interface.

8. The compressed video stream decoding and sending device according to claim 7, characterized in that: The fiber channel display terminal includes a power supply unit, an FC network display driver module, a mainboard and a display screen; The power supply unit supplies power to the FC network display driver module, the mainboard and the display screen through circuit connection; The FC network display driver module is connected to the display screen via a DP interface; The FC network display driving module is electrically connected to the mainboard.

9. The compressed video stream decoding and sending device according to any one of claims 4 to 8, characterized in that: The video decoding chip is the HiSilicon Hi3559AV100 processor.

10. The compressed video stream decoding and sending device according to any one of claims 1 to 8, characterized in that: The FC controller chip is a FC4000A chip.

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