Chip packaging structure and radio frequency front-end module

Abstract

The utility model belongs to the technical field of chip packaging, and relates to a chip packaging structure and a radio frequency front-end module. The chip packaging structure comprises a packaging substrate, a filter chip, a protective film and a first insulating part, the filter chip is connected with the packaging substrate, a gap is formed between the filter chip and the packaging substrate, the protective film at least covers the filter chip and part of the packaging substrate, and the first insulating part is arranged on the filter chip. The filter chip is arranged on the packaging substrate, so that a cavity structure is formed between the filter chip and the packaging substrate; and the first insulating part is arranged at a position, corresponding to the gap, on the protective film. The chip packaging structure can prevent the protective film from being broken at the gap.

Description

Technical Field

[0001] The utility model belongs to the technical field of chip-level packaging, and in particular relates to a chip packaging structure and a radio frequency front-end module. Background Art

[0002] In the chip-level packaging technology of filters, sealing resin is generally used to fill the filter chip with plastic sealing. In order to prevent the sealing resin from entering the cavity between the filter chip and the packaging substrate during the plastic sealing process and polluting the cavity environment, a protective film is usually applied to the surface of the filter chip. However, the protective film is thin and has limited pressure bearing capacity. During the plastic sealing process, if the pressure applied is too small, the sealing resin will not be fully filled in the non-cavity area, which will lead to problems such as low strength, reduced waterproofness and high structural stress in the packaging structure; if the pressure applied is too large, the protective film located in the gap between the filter chip and the packaging substrate is easily damaged, and the sealing resin is easy to flow into the cavity through the damaged position on the protective film, causing the filter chip to fail. Utility Model Content

[0003] The technical problem to be solved by the utility model is: to provide a chip packaging structure and a radio frequency front-end module in view of the technical problem that the protective film of the packaging structure of the filter chip in the related technology is easily damaged by force.

[0004] In order to solve the above technical problems, on the one hand, the embodiment of the utility model provides a chip packaging structure, including a packaging substrate, a filter chip, a protective film and a first insulating portion, wherein the filter chip is connected to the packaging substrate, a gap is formed between the filter chip and the packaging substrate, and the protective film at least covers the filter chip and a part of the packaging substrate to form a cavity structure between the filter chip and the packaging substrate;

[0005] The first insulating portion is disposed on the protection film at a position corresponding to the gap.

[0006] Optionally, the protective film comprises a chip covering portion and a substrate covering portion, the chip covering portion and the substrate covering portion are at least partially connected at the gap, the chip covering portion covers the filter chip, and the substrate covering portion at least covers a position on the packaging substrate surrounding the filter chip;

[0007] The first insulating portion is disposed between the chip covering portion and the substrate covering portion, and the first insulating portion at least partially surrounds an outer circumference of the chip covering portion.

[0008] Optionally, the chip covering portion includes a top covering area and a lateral covering area, the lateral covering area is connected between the top covering area and the substrate covering portion, the top covering area covers the top surface of the filter chip away from the packaging substrate, and the lateral covering area covers the side surface of the filter chip;

[0009] The first insulating portion is disposed at a position where the lateral covering area and the substrate covering portion meet, and is bonded to the lateral covering area and the substrate covering portion.

[0010] Optionally, at least at the gap, the sum of the lateral width of the first insulating portion and the thickness of the lateral covering region is greater than the thickness of the top covering region;

[0011] The thickness of the top cover region is greater than the thickness of the lateral cover regions.

[0012] Optionally, along the thickness direction of the packaging substrate, a height of a bonding surface between the first insulating portion and the lateral covering area is greater than 2 / 3 of a height of the filter chip.

[0013] Optionally, along the thickness direction of the packaging substrate, the height of the bonding surface between the first insulating portion and the lateral covering area is flush with the height of the filter chip.

[0014] Optionally, the chip packaging structure further includes a plastic packaging layer, and the plastic packaging layer covers the protective film and the first insulating part.

[0015] Optionally, along the thickness direction of the packaging substrate, the thickness of the first insulating portion is greater than the height of the gap; and / or,

[0016] The lateral width of the first insulating portion is greater than 15 micrometers; and / or,

[0017] The material of the first insulating part is a plastic material; and / or,

[0018] The material of the first insulating portion is a material having a hardness greater than that of the protective film after curing; and / or,

[0019] The modulus of the first insulating portion is smaller than the modulus of the molding material of the molding layer.

[0020] Optionally, the chip packaging structure further includes a non-filter chip, and the non-filter chip is mounted on the packaging substrate.

[0021] Optionally, the protective film also covers the non-filter chip, and a notch is formed on the protective film corresponding to the position where the non-filter chip is connected to the packaging substrate, and the plastic packaging layer fills the space between the non-filter chip and the packaging substrate through the notch.

[0022] Optionally, along the thickness direction of the packaging substrate, a height of the gap between the filter chip and the packaging substrate is 5-80 microns.

[0023] Optionally, the packaging substrate includes a base and a solder resist layer disposed on the base, the solder resist layer has an opening, and the filter chip is connected to the base at a position exposed in the opening;

[0024] The protection film covers at least a position on the solder resist layer surrounding the filter chip.

[0025] Optionally, the chip packaging structure further includes a second insulating portion, which is disposed on the protective film and located at an edge of a top surface of the filter chip, wherein the top surface is a surface of the filter chip away from the packaging substrate.

[0026] Optionally, the second insulating portion is at least partially connected to the first insulating portion.

[0027] On the other hand, an embodiment of the present invention provides a radio frequency front-end module, which includes the above-mentioned chip packaging structure.

[0028] According to the chip packaging structure of the embodiment of the utility model, a first insulating portion is arranged on the protective film at a position corresponding to the gap, so as to protect the protective film at the gap between the filter chip and the packaging substrate, prevent the protective film from breaking at the gap, and further prevent the plastic packaging material of the plastic packaging layer from entering the cavity between the filter chip and the packaging substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic diagram of a chip packaging structure provided by an embodiment of the utility model;

[0030] Figure 2 yes Figure 1 A magnified schematic diagram of the filter chip in the middle;

[0031] Figure 3 This is another schematic diagram of the chip packaging structure provided by one embodiment of the utility model at the filter chip.

[0032] The reference numerals in the specification are as follows:

[0033] 1. Package substrate; 11. Pad; 12. Base; 13. Solder resist;

[0034] 2. Filter chip; 21. Welding bump;

[0035] 3. Protective film; 31. Chip covering part; 311. Top covering area; 312. Side covering area; 32. Substrate covering part;

[0036] 4. a first insulating portion;

[0037] 5. Plastic sealing layer;

[0038] 6. Second insulating part;

[0039] 7. Non-filter chip. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0041] It should be understood that the present application can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0042] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to, or coupled to, connected to, or connected to other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to, or directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part.

[0043] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0044] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0045] In order to thoroughly understand the present application, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by the present application. The preferred embodiments of the present application are described in detail below, but in addition to these detailed descriptions, the present application may also have other implementation methods.

[0046] In the packaging structure of the filter chip of the related art, some packaging structures directly use glue to form the gap in order to form the cavity of the filter chip. However, in the actual process, the glue is easy to flow into the cavity, which may cause the chip to fail. Some packaging structures adjust the gap size to make the gap small enough and then directly fill it with the sealing resin used to form the plastic sealing layer. However, in order to make the sealing resin fully fill the non-cavity area, the sealing resin will still enter the cavity when the molding pressure is too large, causing the chip to fail. Of course, the glue can also be set under extremely harsh process conditions, but it will increase the process cost and affect the yield rate. In order to solve this defect, the embodiment of the utility model provides a chip packaging structure to prevent the filter chip from failing due to the sealing resin or glue flowing into the cavity, while improving the packaging reliability.

[0047] like Figures 1 to 3As shown, the chip packaging structure provided by the embodiment of the utility model includes a packaging substrate 1, a filter chip 2, a protective film 3 and a first insulating part 4. The filter chip 2 is connected to the packaging substrate 1, and a gap is formed between the filter chip 2 and the packaging substrate 1. The protective film 3 at least covers the filter chip 2 and a part of the packaging substrate 1, and a cavity structure is enclosed between the packaging substrate 1, the filter chip 2 and the protective film 3.

[0048] The first insulating portion 4 is disposed on the protective film 3 at a position corresponding to the gap.

[0049] Since the protective film 3 at the gap between the filter chip 2 and the packaging substrate 1 is easily damaged by the force, the plastic encapsulation material (such as sealing resin) can easily flow into the cavity through the damaged position on the protective film 3, causing the filter chip 2 to fail. By adopting the chip packaging structure provided by the embodiment of the utility model, the first insulating portion 4 is arranged at the position corresponding to the gap on the protective film 3, so as to protect the protective film 3 located at the gap between the filter chip 2 and the packaging substrate 1, and to a certain extent, prevent the protective film 3 from being broken at the gap, and at the same time, prevent the plastic encapsulation material from entering the cavity due to the rupture of the protective film 3, which causes cavity environmental pollution and chip failure, and can also prevent insufficient filling of the plastic encapsulation material, thereby improving the strength and waterproofness of the packaging structure.

[0050] In one embodiment, if Figure 2 As shown, the protective film 3 includes a chip covering portion 31 and a substrate covering portion 32. The chip covering portion 31 and the substrate covering portion 32 are at least partially connected at the gap. The chip covering portion 31 covers the filter chip 2, and the substrate covering portion 32 at least covers the position surrounding the filter chip 2 on the packaging substrate 1, thereby achieving regional coverage of the protective film 3.

[0051] The first insulating portion 4 is disposed between the chip covering portion 31 and the substrate covering portion 32 , and the first insulating portion 4 at least partially surrounds the outer circumference of the chip covering portion 31 .

[0052] "The chip covering part 31 and the substrate covering part 32 are at least partially connected at the gap" includes two situations: one is that the chip covering part 31 and the substrate covering part 32 are completely connected at the gap, and the first insulating part 4 is arranged at the position where the chip covering part 31 and the substrate covering part 32 are connected; the other is that the chip covering part 31 and the substrate covering part 32 are partially connected at the gap (intermittent connection). At this time, the first insulating part 4 is preferably continuously around the periphery of the chip covering part 31 (and is arranged at the connection and disconnection between the chip covering part 31 and the substrate covering part 32) to avoid the connection between the chip covering part 31 and the substrate covering part 32 from being broken, thereby avoiding the cavity environment pollution and chip failure caused by the plastic packaging material entering the cavity due to the broken connection.

[0053] At this time, the position where the chip covering part 31 and the substrate covering part 32 meet will correspond to the position of the gap. By setting the first insulating part 4 at the position where the chip covering part 31 and the substrate covering part 32 meet, the protective film 3 located at the gap between the filter chip 2 and the packaging substrate 1 can be protected, and to a certain extent, the protective film 3 can be prevented from rupturing at the gap. At the same time, it can prevent the plastic packaging material from entering the cavity due to the rupture of the protective film 3, which can cause cavity environmental pollution and chip failure.

[0054] In one embodiment, if Figure 2 As shown, the chip covering part 31 includes a top covering area 311 and a lateral covering area 312. The lateral covering area 312 is connected between the top covering area 311 and the substrate covering part 32. The top covering area 311 covers the top surface of the filter chip 2 away from the packaging substrate 1, and the lateral covering area 312 covers the side surface of the filter chip 2, thereby achieving coverage of the top surface and side surface of the filter chip 2 by the chip covering part 31.

[0055] The first insulating portion 4 is disposed between the lateral covering region 312 and the substrate covering portion 32 , and is bonded to the lateral covering region 312 and the substrate covering portion 32 .

[0056] The position where the lateral covering area 312 and the substrate covering part 32 meet will correspond to the position of the gap. By setting the first insulating part 4 between the lateral covering area 312 and the substrate covering part 32, the protective film 3 located at the gap between the filter chip 2 and the packaging substrate 1 can be protected, thereby preventing the protective film 3 from rupturing at the gap to a certain extent. At the same time, it can prevent the plastic packaging material from entering the cavity due to the rupture of the protective film 3, which may cause cavity environmental pollution and chip failure.

[0057] In one embodiment, the first insulating portion 4 is continuously arranged around the periphery of the chip covering portion 31. At this time, since the first insulating portion 4 is continuous and uninterrupted, the protection of the protective film 3 by the first insulating portion 4 will be more stable; alternatively, the first insulating portion 4 is intermittently arranged around the periphery of the chip covering portion 31. The first insulating portion 4 is intermittently arranged, which can protect the film 3 at the protective gap while reducing the use of glue and saving costs.

[0058] When the first insulating portion 4 is continuously arranged around the periphery of the chip covering portion 31, the first insulating portion 4 is an annular structure, and the shapes or heights of the first insulating portions 4 in different regions may be the same or different. Specifically, the annular structure may also be regarded as having a plurality of insulating blocks, each of which is arranged around the periphery of the filter chip 2, and adjacent insulating blocks are in contact with each other, and the parameters such as shapes, heights, materials, etc. between different insulating blocks may be the same or different, and this application does not limit this.

[0059] When the first insulating portion 4 is intermittently arranged around the periphery of the chip covering portion 31, the first insulating portion 4 may also include a plurality of insulating blocks, which are arranged at intervals around the periphery of the chip covering portion 31 to ensure that the protective film 3 at the gap is protected from all directions. The shape, height, material and other parameters of different insulating blocks may be the same or different, and this application does not limit them.

[0060] In one embodiment, the packaging substrate 1 may be a resin substrate, a ceramic substrate, a glass substrate, a quartz substrate or other types of substrates, which are not limited in the present application. Preferably, the packaging substrate 1 is a resin substrate.

[0061] In some embodiments, the package substrate 1 may be a single-layer substrate or a multi-layer substrate. In a multi-layer substrate, the pad 11 is connected to an external circuit through wiring inside and on the surface of the multi-layer substrate, thereby achieving electrical connection between the filter chip and the external circuit.

[0062] In some implementations, the filter chip 2 may be a surface acoustic wave filter chip or a bulk acoustic wave filter chip, which is not limited in the present application.

[0063] The material of the protective film 3 may be an epoxy resin film, or other polymer films such as a dry film, or other resin materials. The protective film 3 may be a material that has a certain degree of ductility at high temperatures, but has poor fluidity and does not present a liquid state at high temperatures, so that the protective film 3 can better cover surfaces of various shapes and can play a better barrier role.

[0064] The thickness of the protective film 3 can be greater than 20 microns, for example, the thickness of the protective film 3 can be 40 microns, 70 microns, 80 microns, 100 microns, etc.; it can also be less than or equal to 20 microns, for example, the thickness of the protective film 3 can be 18 microns, 15 microns, 10 microns, etc., which is not limited in this embodiment.

[0065] The material of the first insulating part 4 can be a material that is initially liquid and solidifies after curing (such as heating or UV light), and finally becomes a solid or semi-solid material, such as resin glue, green oil or UV glue, etc.; it can be epoxy resin; it can also be a similar material to the sealing resin, but it is not the same as the sealing resin. By selecting a material that is solid or semi-solid after molding, the first insulating part 4 has a certain hardness, so as to achieve a better blocking effect on the plastic sealing material and prevent the protective film 3 from breaking.

[0066] The first insulating portion 4 can be formed on the packaging substrate 1 by liquid dispensing or spraying.

[0067] In one embodiment, the modulus of the first insulating portion 4 can be lower than the modulus of the plastic layer 5. At this time, the first insulating portion 4 can buffer the stress of the plastic material on the side surface of the filter chip 2, and can also buffer the stress near the corners of the filter chip 2, thereby preventing the filter chip 2 from stretching during the aging test and extending the life of the packaging structure.

[0068] In one embodiment, if Figure 1 and Figure 2 As shown, along the thickness direction of the packaging substrate 1, the thickness of the first insulating part 4 is greater than the height of the gap, so as to better protect the protective film 3 at the gap, which can not only prevent the protective film 3 from being broken and damaged to a certain extent, but also prevent the plastic packaging material from entering the cavity structure of the filter chip 2 from the broken part due to the broken protective film 3, thereby improving the strength and waterproofness of the packaging structure.

[0069] In one embodiment, if Figure 1 and Figure 2 As shown, along the direction perpendicular to the thickness direction of the packaging substrate 1, the lateral width of the first insulating portion 4 is greater than 15 microns, so as to achieve a better blocking effect on the plastic packaging material.

[0070] Specifically, the lateral width of the first insulating portion 4 may be 20 micrometers, 50 micrometers, 80 micrometers, 100 micrometers, 130 micrometers or 150 micrometers, etc., which is not limited in the present application.

[0071] If the lateral width of the first insulating portion 4 is too small, the bonding area with the protective film 3 is insufficient, and it is difficult to ensure the reliability of the protective film 3 protecting the gap. Therefore, limiting the lateral width of the first insulating portion 4 to greater than 15 microns can effectively ensure the reliability of the protective film 3 protecting the gap.

[0072] In one embodiment, if Figure 1 and Figure 2 As shown, along the direction perpendicular to the thickness direction of the packaging substrate 1, the sum of the lateral width of the first insulating part 4 and the thickness of the lateral covering area 312 can be greater than the thickness of the top covering area 311; the sum of the lateral width of the first insulating part 4 and the thickness of the lateral covering area 312 can also be less than or equal to the thickness of the top covering area 311.

[0073] It can be understood that the protective film 3 is stretched for many times during the packaging process, and the thickness of the lateral covering area 312 is less than the thickness of the top covering area 311 in most cases, and the thickness of the substrate covering part 32 is also less than the thickness of the top covering area 311 in most cases. When the thickness of the top covering area 311 is small, the thickness of the lateral covering area 312 will be smaller, and the stress that the lateral covering area 312 can withstand will be smaller. At this time, by making the sum of the lateral width of the first insulating part 4 and the thickness of the lateral covering area 312 greater than the thickness of the top covering area 311, the lateral force of the filter chip 2 can be enhanced to avoid damage to the protective film 3. When the thickness of the top covering area 311 is large, it is only necessary to make the lateral covering area 312 cooperate with the first insulating part 4 to prevent the protective film 3 from being damaged. At this time, the sum of the lateral width of the first insulating part 4 and the thickness of the lateral covering area 312 can be less than or equal to the thickness of the top covering area 311.

[0074] In one embodiment, when the thickness of the top covering area 311 is small, at least at the gap, the sum of the lateral width of the first insulating portion 4 and the thickness of the lateral covering area 312 is greater than the thickness of the top covering area 311, which is beneficial to the protection of the protective film 3 and prevents the plastic packaging material from entering the cavity. Of course, at positions other than the gap, the sum of the lateral width of the first insulating portion 4 and the thickness of the lateral covering area 312 may be greater than the thickness of the top covering area 311, so that the protective film 3 of the lateral covering area 312 can be further protected, and the stress of the plastic packaging material on the side surface of the filter chip 2 can be buffered, thereby improving the structural stability and reliability.

[0075] In one embodiment, if Figure 1 and Figure 2 As shown, along the thickness direction of the packaging substrate 1, the height of the bonding surface between the first insulating portion 4 and the lateral covering area 312 is greater than 2 / 3 of the thickness of the packaging substrate 1, thereby protecting the protective film 3 while buffering the stress close to the corners of the filter chip 2.

[0076] Preferably, the height of the bonding surface between the first insulating portion 4 and the lateral covering area 312 is substantially the same as the height of the filter chip 2 .

[0077] It is understandable that the height of the bonding surface between the first insulating portion 4 and the lateral covering area 312 can be substantially the same as the height of the filter chip 2 in a partial area or substantially the same as the height of the filter chip 2 in the entire area, and this application does not limit this.

[0078] The height of the bonding surface between the first insulating portion 4 and the lateral covering area 312 is substantially the same as the height of the filter chip 2 , which can be more conducive to buffering the stress near the corners of the filter chip 2 .

[0079] In one embodiment, if Figure 1 and Figure 2 As shown, the package substrate 1 includes a base 12 and a solder resist layer 13 disposed on the base 12. The solder resist layer 13 has an opening, and the filter chip 2 is connected to the base 12 at a position exposed in the opening. The protective film 3 at least covers the position surrounding the filter chip 2 on the solder resist layer 13.

[0080] The solder resist layer 13 serves as a bearing structure and can be a structure formed on the packaging substrate 1 by a material with good formability and good solder resist performance, or it can be a solder resist layer 13 structure of the packaging substrate 1, such as resin, solder resist green paint, dry film, etc. This embodiment does not limit it.

[0081] Specifically, the solder resist layer 13 can protect the metal area that does not need soldering on one hand, and can serve as a buffer layer to relieve the stress caused by the difference in thermal expansion coefficient between the plastic packaging material and the packaging substrate 1 on the other hand.

[0082] In one embodiment, the solder resist layer 13 may be partially located in the cavity of the filter chip 2. At this time, in order to ensure the volume of the cavity, the height of the filter chip 2 may be adaptively raised to increase the height of the first gap between the filter chip 2 and the package substrate 1 to ensure the function of the filter chip 2.

[0083] In one embodiment, the solder resist layer 13 may be provided according to actual needs, or the solder resist layer 13 may not be provided. Figure 3 As shown, when the solder resist layer 13 is not provided, the package substrate 1 will only include the base 12 , the filter chip 2 is directly connected to the base 12 , and the protective film 3 at least covers the position around the filter chip 2 on the base 12 .

[0084] In one embodiment, if Figure 1 and Figure 2 As shown, a pad 11 is disposed on the package substrate 1, and the pad 11 is exposed in the opening. A plurality of welding bumps 21 are disposed on the filter chip 2, and each welding bump 21 is welded to the pad 11 respectively, so as to realize the connection between the filter chip 2 and the package substrate 1.

[0085] The pad 11 may be located on the surface of the packaging substrate 1 ; may be completely embedded in the packaging substrate 1 with the surface of the pad 11 exposed on the surface of the packaging substrate 1 ; may also be partially embedded in the packaging substrate 1 .

[0086] In one embodiment, the pad 11 may be a metal or an alloy, and the metal may be nickel, palladium, molybdenum, tungsten, ruthenium, gold, magnesium, aluminum, copper, chromium, titanium, osmium, iridium, etc. The pad 11 is connected to an external or internal circuit through wiring on the packaging substrate 1.

[0087] The soldering bumps 21 may be copper, tin, gold or alloy, or may be metal bumps or other commonly used bump types for conductive connection. The filter chip 2 is connected to external circuits via the soldering bumps 21 and the pads 11 .

[0088] The gap formed between the filter chip 2 and the packaging substrate 1 may be in the range of 5-80 microns, preferably in the range of 5-35 microns, such as 5 microns, 7 microns, 15 microns, 23 microns, 27 microns or 30 microns.

[0089] In one embodiment, if Figure 1 and Figure 2 As shown, the chip packaging structure further includes a plastic sealing layer 5 , which covers the protection film 3 and the first insulating portion 4 .

[0090] The plastic packaging material of the plastic packaging layer 5 may be an insulating material, such as a sealing resin, or may be other insulating materials with weak fluidity, such as a sealing resin containing particles.

[0091] In one embodiment, if Figure 1 As shown, the chip packaging structure further includes a non-filter chip 7, which is mounted on the packaging substrate 1. Preferably, the distance between the non-filter chip 7 and the filter chip 2 is less than 150 microns, 100 microns or 80 microns.

[0092] In one embodiment, the non-filter chip 7 can be mounted on the package substrate 1 by flip-chip mounting or by wire bonding. The non-filter chip 7 and the filter chip 2 can be arranged on the same side of the package substrate 1 or on opposite sides of the package substrate 1.

[0093] When the non-filter chip 7 is flipped on the package substrate 1 and the non-filter chip 7 and the filter chip 2 are arranged on the same side of the package substrate 1, the protective film 3 can cover the non-filter chip 7. At the gap between the non-filter chip 7 and the solder resist layer 13 (or the package substrate 1), the protective film 3 is disconnected, so that the plastic encapsulation material can smoothly enter and fill the gap between the non-filter chip 7 and the package substrate 1 during the plastic encapsulation process, thereby realizing the encapsulation of the non-filter chip 7.

[0094] When the non-filter chip 7 is flip-chip mounted on the packaging substrate 1 and the non-filter chip 7 and the filter chip 2 are arranged on two opposite sides of the packaging substrate 1 , the protective film 3 may not cover the non-filter chip 7 .

[0095] When the non-filter chip 7 is installed on the packaging substrate 1 by wire bonding, the non-filter chip 7 is a wire bonding structure chip, which is bonded to the packaging substrate 1 by wires. Preferably, the protective film 3 does not cover the non-filter chip 7 to avoid damaging the bonding wires of the non-filter chip 7.

[0096] In one embodiment, the filter chip 2 includes a surface acoustic wave filter and / or a bulk acoustic wave filter, and the filter can be selected according to actual needs. The non-filter chip 7 includes non-filter function chips such as power amplifiers, low noise amplifiers, and radio frequency switches.

[0097] In one embodiment, if Figure 3 As shown, the chip packaging structure further includes a second insulating portion 6 , which is disposed on the protective film 3 and located at the edge of the top surface of the filter chip 2 , where the top surface is the surface of the filter chip 2 away from the packaging substrate 1 .

[0098] It should be noted that the material, shape, formation method and other characteristics of the second insulating part 6 can refer to the relevant description of the first insulating part 4, and this application will not go into details.

[0099] In this embodiment, the material of the second insulating portion 6 may be different from the material of the first insulating portion 4 . Preferably, the material of the second insulating portion 6 is the same as the material of the first insulating portion 4 .

[0100] It is understandable that the second insulating portion 6 may include a plurality of insulating blocks, and the shape and size of each insulating block may be the same or different. A plurality of insulating blocks are interconnected to be arranged around the edge of the top surface of the filter chip 2. At this time, the second insulating portion 6 is a ring structure formed by a plurality of insulating blocks. Of course, a plurality of insulating blocks may also be arranged at intervals on the edge of the top surface of the filter chip 2. The second insulating portion 6 is arranged on the edge of the top surface of the filter chip 2, which can buffer the stress of the edge of the top surface of the filter chip 2 and to a certain extent, can also buffer the stress of the corners of the filter chip 2.

[0101] In one embodiment, if Figure 3 As shown, the second insulating portion 6 can be only arranged at the edge of the top surface of the filter chip 2. In this case, the second insulating portion 6 is located above the top covering area 311. It can also extend from the edge of the top surface of the filter chip 2 to the side surface of the filter chip 2 (such as Figure 3 As shown), at this time, the second insulating portion 6 is connected to a portion of the top covering area 311 and a portion of the lateral covering area 312 at the same time.

[0102] In one embodiment, if Figure 3 As shown, the second insulating part 6 is at least partially connected to the first insulating part 4 .

[0103] It is understandable that the first insulating portion 4 and the second insulating portion 6 can be partially or completely connected. When the material of the second insulating portion 6 is the same as that of the first insulating portion 4, the second insulating portion 6 can be regarded as extending from the first insulating portion 4 to the edge of the top surface of the filter chip 2.

[0104] In this embodiment, the second insulating portion 6 is at least partially connected to the first insulating portion 4 , which can further buffer the stress near the corners of the filter chip 2 , prevent the edge of the filter chip 2 from being stretched during the aging test, and extend the life of the packaging structure.

[0105] Of course, in other embodiments, the first insulating portion 4 and the second insulating portion 6 may also be disconnected.

[0106] An embodiment of the utility model further provides a radio frequency front-end module, which includes a circuit board and the above-mentioned chip packaging structure. The chip packaging structure includes the structure described in the above-mentioned embodiment. For related descriptions, please refer to the contents of the above-mentioned embodiment. The embodiments of the present application will not be repeated here.

[0107] An embodiment of the utility model also provides an electronic device, which includes a circuit board and the above-mentioned chip packaging structure. The chip packaging structure is arranged on the circuit board and electrically connected to the circuit board. The chip packaging structure includes the structure described in the above embodiment. For related descriptions, please refer to the contents of the above embodiment. The embodiments of this application will not be repeated here.

[0108] In an exemplary embodiment, the electronic device includes but is not limited to: LED panels, tablet computers, laptop computers, navigators, mobile phones, electronic watches, and any other electronic devices or components having PCBA board components, and this application does not impose specific restrictions on this.

[0109] It is understandable that the electronic device may also include electronic devices such as personal digital assistants (PDA) and / or music player functions, such as mobile phones, tablet computers, wearable electronic devices with wireless communication functions (such as smart watches), etc. The above-mentioned electronic devices may also be other electronic devices, such as laptop computers (Laptop) with touch-sensitive surfaces (such as touch panels), etc. In some embodiments, the electronic device may have a communication function, that is, it may establish communication with the network through 2G (second-generation mobile phone communication technology specifications), 3G (third-generation mobile phone communication technology specifications), 4G (fourth-generation mobile phone communication technology specifications), 5G (fifth-generation mobile phone communication technology specifications), 6G (sixth-generation mobile phone communication technology specifications) or W-LAN (wireless local area network) or communication methods that may appear in the future. For the sake of simplicity, this embodiment of the present application is not further limited.

[0110] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. In the absence of conflict, the above embodiments, implementation methods and features in the embodiments can be combined with each other. Any modification, equivalent replacement and improvement made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A chip packaging structure, characterized in that: The invention comprises a packaging substrate, a filter chip, a protective film and a first insulating portion, wherein the filter chip is connected to the packaging substrate, a gap is formed between the filter chip and the packaging substrate, and the protective film at least covers the filter chip and a part of the packaging substrate to form a cavity structure between the filter chip and the packaging substrate; The first insulating portion is disposed on the protection film at a position corresponding to the gap.

2. The chip packaging structure according to claim 1, characterized in that: The protective film comprises a chip covering portion and a substrate covering portion, wherein the chip covering portion and the substrate covering portion are at least partially connected at the gap, the chip covering portion covers the filter chip, and the substrate covering portion at least covers a position on the packaging substrate surrounding the filter chip; The first insulating portion is disposed between the chip covering portion and the substrate covering portion, and the first insulating portion at least partially surrounds an outer circumference of the chip covering portion.

3. The chip packaging structure according to claim 2, characterized in that: The chip covering portion includes a top covering area and a lateral covering area, wherein the lateral covering area is connected between the top covering area and the substrate covering portion, the top covering area covers the top surface of the filter chip away from the packaging substrate, and the lateral covering area covers the side surface of the filter chip; The first insulating portion is disposed between the lateral covering region and the substrate covering portion, and is bonded to the lateral covering region and the substrate covering portion.

4. The chip packaging structure according to claim 3, characterized in that: At least at the gap, the sum of the lateral width of the first insulating portion and the thickness of the lateral covering region is greater than the thickness of the top covering region; The thickness of the top cover region is greater than the thickness of the lateral cover regions.

5. The chip packaging structure according to claim 3, characterized in that: Along the thickness direction of the packaging substrate, the height of the bonding surface between the first insulating portion and the lateral covering area is greater than 2 / 3 of the height of the filter chip.

6. The chip packaging structure according to claim 3, characterized in that: Along the thickness direction of the packaging substrate, the height of the bonding surface between the first insulating portion and the lateral covering area is flush with the height of the filter chip.

7. The chip packaging structure according to claim 1, characterized in that: The chip packaging structure further includes a plastic packaging layer, and the plastic packaging layer covers the protective film and the first insulating portion.

8. The chip packaging structure according to claim 7, characterized in that: Along the thickness direction of the packaging substrate, the thickness of the first insulating portion is greater than the height of the gap; and / or, The lateral width of the first insulating portion is greater than 15 micrometers; and / or, The material of the first insulating part is a plastic material; and / or, The material of the first insulating portion is a material having a hardness greater than that of the protective film after curing; and / or, The modulus of the first insulating portion is smaller than the modulus of the molding material of the molding layer.

9. The chip packaging structure according to claim 7, characterized in that: The chip packaging structure further includes a non-filter chip, and the non-filter chip is mounted on the packaging substrate.

10. The chip packaging structure according to claim 9, characterized in that: The protective film also covers the non-filter chip. A notch is formed on the protective film corresponding to the position where the non-filter chip is connected to the packaging substrate. The plastic packaging layer fills the space between the non-filter chip and the packaging substrate through the notch.

11. The chip packaging structure according to claim 1, characterized in that: Along the thickness direction of the packaging substrate, the height of the gap between the filter chip and the packaging substrate is 5-80 microns.

12. The chip packaging structure according to claim 1, characterized in that: The packaging substrate comprises a base and a solder resist layer arranged on the base, the solder resist layer has an opening, and the filter chip is connected to the base at a position exposed at the opening; The protection film covers at least a position on the solder resist layer surrounding the filter chip.

13. The chip packaging structure according to claim 1, characterized in that: The chip packaging structure further includes a second insulating portion, which is disposed on the protective film and located at an edge of a top surface of the filter chip. The top surface is a surface of the filter chip away from the packaging substrate.

14. The chip packaging structure according to claim 13, characterized in that: The second insulating portion is at least partially connected to the first insulating portion.

15. A radio frequency front-end module, characterized in that: Comprising the chip packaging structure as described in any one of claims 1-14.

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