A port multiplexing system based on SPI communication

Abstract

The present invention discloses a port multiplexing system based on SPI communication, including an MCU, a clock circuit, a system reset circuit, an AD sampling circuit, a liquid crystal circuit, a storage circuit, an Ethernet control circuit, a security chip circuit, a CAN communication circuit, etc. There are multiple communication interfaces inside the MCU, among which there are three SPI interfaces: a flash chip and a ferroelectric register multiplex the first group of SPI interfaces, two Ethernet controllers multiplex the second group of SPI interfaces, and a security chip uses a third group of SPI interfaces. The purpose of fast access to data is achieved through SPI port multiplexing, and the purpose of fast communication with a master station is achieved through dual Ethernet controllers and MCU SPI port multiplexing. The port multiplexing system based on SPI communication provided by the present invention is easy to transplant and easy to implement functional expansion, and can be widely used in various automation devices using SPI communication.

Description

Technical Field

[0001] The invention relates to the technical field of communications, and in particular to a port multiplexing system based on SPI communication. Background Art

[0002] For a long time, the mismatch between peripheral devices and MCU speed has always been a major problem in the product design process, affecting the performance of the product system. With the rapid growth of computer storage size and processing power, this problem has become increasingly prominent. Although various software and hardware methods have been adopted to continuously improve the interface performance between MCU and I / O devices. However, in many applications, interface problems still restrict system performance. For a specific design, designers face a variety of interface standards. Generally, they choose suitable standard products based on the cost and functions required by the system, which may lead to interface standard conflicts and cause interoperability problems; or re-select standard devices compatible with the interface, but this may cause functional needs or cost requirements to not be met.

[0003] SPI is a high-speed, synchronous, full-duplex communication bus that only occupies 4 wires on the chip pins, which not only saves the chip pins, but also saves space on the PCB layout. It is precisely because of its few signal lines, simple protocol, and relatively high data rate that more and more chips are now integrating this communication protocol.

[0004] In the product design process of distribution automation terminals, there are many peripheral circuits of MCU, and the communication interfaces used are also different. Among them, the storage circuit (ferroelectric register and flash), dual network port circuit and security chip circuit all use SPI communication interface, while the MCU controller used has only 3 SPI interfaces, resulting in uneven port distribution. If the software IO simulation SPI timing solution is adopted, the MCU is responsible for the execution of the entire simulation process. In order to stabilize the access of data, a software delay will be inserted. This time is not obvious when the amount of data read is not large, but during the reading process, other non-interrupt and non-abnormal programs cannot be executed; therefore, the software simulation solution is not advisable. Summary of the invention

[0005] In view of the problems existing in the above-mentioned prior art, the present invention discloses a port multiplexing system based on SPI communication, which adopts a hardware port multiplexing solution, occupies less MCU resources, saves program running time, and facilitates the MCU to perform more other operations.

[0006] The hardware port multiplexing technical solution of the present invention is: the flash chip and the ferroelectric register reuse the same SPI interface, and the two Ethernet controllers reuse the same SPI interface, which effectively solves the problem of insufficient I / O port resources in MCU system design, simplifies the system structure, and improves the system function.

[0007] A port multiplexing system based on SPI communication is characterized by comprising an MCU, a clock circuit, a system reset circuit, an AD sampling circuit, a liquid crystal circuit, a storage circuit, an Ethernet control circuit, a safety chip circuit, a CAN communication circuit, etc.

[0008] The MCU adopts the STM32 microcontroller of TI's Cortex M4 core, which has multiple communication interfaces inside, including three SPI interfaces. To meet the system design, the port allocation is as follows: the flash chip and the ferroelectric register reuse the first group of SPI interfaces, the two Ethernet controllers reuse the second group of SPI interfaces, and the security chip uses the third group of SPI interfaces. Its SPI interface master mode controller includes: FIFO module, control module, data packaging module, bus interface configuration module, SPI physical layer module, etc.

[0009] The above-mentioned port multiplexing system based on SPI communication is further characterized in that: the source of the SPI clock is a clock signal obtained by dividing the clock provided by the external system clock circuit, and the clock division factor registers of different interfaces are set to generate corresponding clock output signals as serial clocks. In order to ensure the reliability of the timing, different division factors are set for the three SPIs according to the requirements of data transmission sequence, so as to achieve the purpose of time-sharing and module-sharing operation of the system.

[0010] The flash memory chip, ferroelectric register and Ethernet controller are multiplexed and connected to the MCU via the SPI interface. The MCU used in this system is powered by 3.3V. If the selected peripheral chip is powered by 5V, a bus transceiver SN74LVC4245A can be added between the peripheral chip and the SPI interface to complete the level conversion.

[0011] The dual Ethernet control circuit is mainly used to realize the communication between the MCU and the master station. The design of the present invention adopts the dual network ports to reuse the same SPI interface circuit, and the system performs time-sharing operation to realize the communication between the dual network ports and the master station through power protocol. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 The present invention is a block diagram of a port multiplexing system based on SPI communication.

[0013] Figure 2It is a physical size diagram of the port multiplexing system based on SPI communication according to an embodiment of the present invention. DETAILED DESCRIPTION

[0014] In order to facilitate understanding by those skilled in the art, the present invention is further described below in conjunction with embodiments.

[0015] The port multiplexing system based on SPI communication in this embodiment has a block diagram as shown in FIG. Figure 1 As shown, it includes MCU, clock circuit, system reset circuit, AD sampling circuit, liquid crystal circuit, storage circuit, Ethernet control circuit, security chip circuit, CAN communication circuit, etc. The MCU adopts the STM32 microcontroller of TI's Cortex M4 core, which has multiple communication interfaces inside, among which there are three SPI interfaces. To meet the system design, the port allocation is as follows: the flash chip and ferroelectric register reuse the first group of SPI interfaces, the two Ethernet controllers reuse the second group of SPI interfaces, and the security chip uses the third group of SPI interfaces. Its SPI interface master mode controller includes: FIFO module, control module, data packaging module, bus interface configuration module, SPI physical layer module, etc.

[0016] The source of the SPI clock is the clock signal obtained by dividing the clock provided by the external system clock circuit. By setting the clock division factor registers of different interfaces, the corresponding clock output signal is generated as the serial clock. In order to ensure the reliability of the timing, different division factors are set for the three SPIs according to the requirements of data transmission sequence, so as to achieve the purpose of time-sharing and module-sharing operation of the system.

[0017] The flash memory chip, ferroelectric register, and Ethernet controller are multiplexed and connected to the MCU via the SPI interface. The MCU used in this system is powered by 3.3V. If the selected peripheral chip is powered by 5V, a bus transceiver SN74LVC4245A can be added between the peripheral chip and the SPI interface to complete the level conversion.

[0018] In view of the technical specification requirements of the power distribution automation terminal equipment, based on the characteristics of SPI communication with few signal lines, simple protocol and high relative data rate, the present invention adopts the design scheme of SPI hardware port multiplexing, designs a port multiplexing system device based on SPI communication, and has been applied in a power distribution automation terminal equipment. As the core unit of the terminal equipment, the purpose of fast data access is achieved through SPI port multiplexing, and the purpose of fast communication with the master station is achieved through dual Ethernet controller and MCU SPI port multiplexing, and the expected effect is achieved. The main function of the dual Ethernet control circuit is to realize the communication between the MCU and the master station. The design of the present invention adopts the dual network port multiplexing of the same SPI interface circuit, and the system performs time-sharing operation, and realizes the communication between the dual network ports and the master station through the power protocol.

[0019] Figure 2 It is a physical size diagram of the port multiplexing system based on SPI communication according to an embodiment of the present invention.

[0020] The above embodiments are only for explaining the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution according to the technical idea proposed by the present invention shall fall within the protection scope of the present invention. The technologies not involved in the present invention can be realized by existing technologies.

Claims

1. A port multiplexing system based on SPI communication, comprising an MCU, a clock circuit, a system reset circuit, an AD sampling circuit, a liquid crystal circuit, a storage circuit, an Ethernet control circuit, a security chip circuit, and a CAN communication circuit; characterized in that: The MCU adopts the STM32 microcontroller with TI's Cortex M4 core, which has multiple communication interfaces inside, including three SPI interfaces: the flash memory chip and the ferroelectric register reuse the first group of SPI interfaces, the two Ethernet controllers reuse the second group of SPI interfaces, and the security chip uses the third group of SPI interfaces; The master mode controller of the SPI interface includes: a FIFO module, a control module, a data packaging module, a bus interface configuration module, and an SPI physical layer module; The clock circuit, system reset circuit, AD sampling circuit, liquid crystal circuit, storage circuit, Ethernet control circuit, security chip circuit, and CAN communication circuit are respectively connected to the MCU; The dual network ports reuse the same SPI interface circuit, and the system performs time-sharing operation to achieve communication between the dual network ports and the master station through power protocol; The clock circuit is an external oscillation circuit composed of a crystal oscillator and a fine-tuning capacitor to provide a clock source for the system. The SPI clock is a clock signal obtained by dividing the system clock. By setting the clock division factor registers of different interfaces, a corresponding clock output signal is generated as a serial clock. In order to ensure the reliability of the timing, different division factors are set for the three SPIs according to the requirements of data transmission sequence, so as to achieve the purpose of time-sharing and module-sharing operation of the system.

2. The port multiplexing system for SPI communication according to claim 1, characterized in that: The flash storage chip, ferroelectric register and Ethernet controller are connected to the MCU through SPI interface multiplexing; the Ethernet control circuit adopts dual network ports to multiplex the same SPI interface circuit, the system performs time-sharing operation, and realizes communication between the MCU and the master station through power protocol.

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