A data interface multiplexing control circuit
Through the data interface multiplexing control circuit, rectification and feedback control technology, the problem of insufficient IO of embedded electronic products is solved, and the self-control of peripheral modules is realized, which reduces design difficulty and cost, and is suitable for modules with high power consumption requirements. Circuit.
Patent Information
- Application Number
- CN201911141572.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-11-20
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2039-11-20
AI Technical Summary
In embedded electronic products, due to the limited IO resources of the main control chip, the peripheral module needs power control or reset insufficient IO. It is usually necessary to redesign the motherboard or replace the MCU, which increases the design difficulty and cost, especially when using connectors and When connecting wires are expanded, there is a lot of waste of costs and space.
Design a data interface multiplexing control circuit, rectify into a constant high-level signal through the input end of the data interface signal, control the module timing pin, such as the switch or reset pin, and use the feedback control unit to realize the module power-on or reset Control, avoid redesigning the motherboard, saving space and cost.
It realizes self-control of peripheral modules, reduces design difficulty and cost, supports communication interfaces composed of commonly used IOs, such as I2C, UART, SPI, and does not generate additional power consumption when not working, and is suitable for modules with high power consumption requirements. Circuit.
Smart Images
Figure CN110888828B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of computer control circuits, and in particular to a data interface multiplexing control circuit. Background Art
[0002] As the integration of various embedded electronic products continues to increase and their functions increase, the IO resources of the main control chip are limited by packaging and cost, and the number is relatively fixed, such as the data interface; and many peripheral modules require power control or reset. When faced with insufficient IO designs, the only option is to redesign the motherboard or replace it, mainly through IO expansion chips or replacing MCUs with more pins. This increases the difficulty and cost of design, especially when the peripheral modules need to be expanded with connectors and cables, which increases the cost and wastes the space of the entire machine. Summary of the invention
[0003] The technical problem to be solved by the present invention is to provide a data interface multiplexing control circuit, which is a power timing control circuit based on data interface multiplexing and is used to be set in a peripheral module to realize self-control of the peripheral module.
[0004] The present invention is implemented as follows: a data interface multiplexing control circuit, comprising:
[0005] Data interface signal input terminal, used to connect with external data interface pin;
[0006] Level output terminal, used to connect with the switch pin of the module;
[0007] A feedback input terminal, used to connect to the working signal terminal of the module;
[0008] A signal rectifying unit connected to the data interface signal input terminal and rectifying the level jump signal of the data interface signal input terminal into a constant high level signal;
[0009] A feedback control unit, connected to the feedback input terminal and also connected to the signal rectification unit, capable of converting the constant high-level signal into a constant low-level signal through bypass grounding;
[0010] An output control unit is connected to the level output end, and is also connected to the signal rectification unit and the feedback control unit; when the output control unit receives the constant high-level signal, the output level of the level output end changes from high to low; when the output control unit receives the constant low-level signal, the output level of the level output end changes from low to high.
[0011] Further, the signal rectification unit includes a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit includes a resistor R1, a transistor Q1, a resistor R2 and a resistor R3, and the feedback control unit includes a resistor R4, a capacitor C3, a resistor R5 and a transistor Q2;
[0012] The data interface signal input end is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the positive end of the diode D1 and the negative end of the diode D2, the negative end of the diode D1 is connected to one end of the capacitor C2, one end of the resistor R2, and the collector end of the transistor Q2, the positive end of the diode D2 is connected to the other end of the capacitor C2 and the ground end, one end of the resistor R1 is connected to the power supply end, the other end of the resistor R1 is connected to the collector end of the transistor Q1 and the level output end, the base end of the transistor Q1 is connected to one end of the resistor R3 and the other end of the resistor R2, the emitter end of the transistor Q1 and the other end of the resistor R3 are both connected to the ground end, one end of the resistor R4 is connected to the feedback input end, the other end of the resistor R4 is connected to one end of the capacitor C3, one end of the resistor R5, and the base end of the transistor Q2, the other end of the capacitor C3, the other end of the resistor R5, and the emitter end of the transistor Q2 are all connected to the ground end.
[0013] Furthermore, the data interface signal input terminal is connected to a CLK pin of an I2C, I2S or SPI interface.
[0014] Furthermore, the data interface signal input terminal is connected to the TXD pin of the serial port.
[0015] Furthermore, the level output terminal is connected to a reset pin of the module.
[0016] The present invention has the following advantages: the power timing control circuit based on data interface multiplexing collects the level jump on the data line interface and rectifies it into a constant high-level control signal to control the timing pin of the module, such as the switch pin or the reset pin; after the module is started, the output control unit is turned off by the feedback control unit, so as to realize the power-on or reset control of the peripheral module, without redesigning the main board, saving design space and controlling costs; supporting but not limited to communication interfaces composed of commonly used IOs such as I2C, UART, SPI, I2S, etc., the present invention does not generate additional power consumption when not working, and is particularly suitable for module circuits with requirements on power consumption. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] The present invention will be further described below in conjunction with embodiments with reference to the accompanying drawings.
[0018] Figure 1 It is a schematic diagram of the data interface multiplexing control circuit of the present invention.
[0019] Figure 2 It is a schematic diagram of the circuit connection of the present invention for peripheral modules. DETAILED DESCRIPTION
[0020] See also Figure 1 to Figure 2 , Embodiment 1 of the data interface multiplexing control circuit 10 of the present invention; including a data interface signal input terminal, which is INPUT in the figure, connected to the CLK pin 30 of the I2C or I2S or SPI interface; a level output terminal, which is PWR_KEY in the figure, connected to the switch pin 201 of the module 20; a feedback input terminal, which is MOUDLE_CTRL in the figure, connected to the working signal terminal 202 of the module 20; wherein the module 20 is specifically a controller or a control board or a communication module or an adjustable power supply module, etc.
[0021] A signal rectification unit 101 is connected to the data interface signal input terminal INPUT, and rectifies the level jump signal of the data interface signal input terminal INPUT into a constant high level signal; a feedback control unit 103 is connected to the feedback input terminal MOUDLE_CTRL and also connected to the signal rectification unit 101, and can convert the constant high level signal into a constant low level signal through bypass grounding; an output control unit 102 is connected to the level output terminal PWR_KEY, and also connected to the signal rectification unit 101 and the feedback control unit 103; when the output control unit 102 receives the constant high level signal, the output level of the level output terminal PWR_KEY changes from high to low, and when the output control unit 102 receives the constant low level signal, the output level of the level output terminal PWR_KEY changes from low to high.
[0022] The signal rectification unit 101 includes a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit 102 includes a resistor R1, a transistor Q1, a resistor R2 and a resistor R3, and the feedback control unit 103 includes a resistor R4, a capacitor C3, a resistor R5 and a transistor Q2;
[0023] The data interface signal input terminal INPUT is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the positive terminal of the diode D1 and the negative terminal of the diode D2, the negative terminal of the diode D1 is connected to one end of the capacitor C2, one end of the resistor R2, and the collector terminal of the transistor Q2, the positive terminal of the diode D2 is connected to the other end of the capacitor C2 and the ground terminal, one end of the resistor R1 is connected to the power supply terminal, which is VCC in the figure, the other end of the resistor R1 is connected to the collector terminal of the transistor Q1 and the level output terminal PWR_KEY, the base terminal of the transistor Q1 is connected to one end of the resistor R3 and the other end of the resistor R2, the emitter terminal of the transistor Q1 and the other end of the resistor R3 are both connected to the ground terminal, one end of the resistor R4 is connected to the feedback input terminal MOUDLE_CTRL, the other end of the resistor R4 is connected to one end of the capacitor C3, one end of the resistor R5, and the base terminal of the transistor Q2, the other end of the capacitor C3, the other end of the resistor R5, and the emitter terminal of the transistor Q2 are all connected to the ground terminal.
[0024] The working principle of the present invention is as follows: the data interface signal input terminal INPUT is the main control input signal, which is a square wave with a certain frequency. The square wave signal enters the signal rectification unit 101, that is, coupled through the capacitor C1, and then unidirectionally transmitted through the diode D1, the diode D2 performs freewheeling, and then filtered by the energy storage of the capacitor C2, and a stable voltage VA is formed at the connection point of the diode D1 and the resistor R2. The voltage VA enters the output control unit 102, that is, after the voltage is divided by the resistor R2 and the resistor R3, it acts on the base end of the transistor Q1, and controls the transistor Q1 to be turned on. At this time, the output level of the level output terminal PWR_KEY changes from high to low, forming a falling edge acting on the switch pin 201 of the module 20, so that the module 20 is controlled to start. After the module 20 is turned on and starts working, its working signal terminal 202 continuously outputs a high level to the feedback input terminal MOUDLE_CTRL, that is, enters the feedback control unit 103. The high level is divided by the resistor R4 and the resistor R5 to obtain a stable feedback voltage VC. The capacitor C3 controls the stabilization time of the feedback voltage VC. The feedback voltage VC acts on the base terminal of the transistor Q2 to control the transistor Q2 to be turned on. At this time, the voltage VA is close to 0 due to being bypassed and grounded, so that the transistor Q1 is turned off, so that the output level of the level output terminal PWR_KEY changes from low to high; since the switch pin 201 of the module 20 does not receive a falling edge signal within a predetermined time, the module 20 works normally after being turned on. Combined with the above description, since the module 20 works normally, the feedback input terminal MOUDLE_CTRL continues to have a high level, so that the transistor Q2 is continuously in the on state, and the voltage VA is close to 0 because it is bypassed to the ground. Even if there is still a square wave signal input to the data interface signal input terminal INPUT, the transistor Q1 is still in the off state, and the level output terminal PWR_KEY continues to be a high level, and the module 20 works normally.
[0025] The parameters of the capacitor capacity and the resistor resistance in this embodiment are as follows: Figure 1 shown.
[0026] The data interface multiplexing control circuit 10 of the present invention is used to be set in the peripheral module 20 to realize self-control of the peripheral module 20; there is no need to redesign the mainboard, saving design space; when the present invention is not working, it will not generate additional power consumption, and is particularly suitable for the module 20 circuit that has requirements on power consumption.
[0027] Embodiment 2 of the data interface multiplexing control circuit 10 of the present invention; the data interface signal input terminal INPUT is connected to the TXD pin of the serial port; the TXD pin of the serial port also outputs a square wave of a certain frequency, which enters the output control unit 102 through the signal rectification unit 101. The level output terminal PWR_KEY is connected to the reset pin of the module 20. In this way, when the diode Q1 is turned on and the output level of the level output terminal PWR_KEY changes from high to low, the module 20 is reset and restarted; then the module 20 works normally, and during the normal operation of the module 20, the feedback input terminal MOUDLE_CTRL continues to output a high level, so that the feedback control unit 103 bypasses the voltage VA to ground and is close to 0, the diode Q1 is turned off, and the level output terminal PWR_KEY continues to be a high level. For other undescribed parts, please refer to Embodiment 1 of the present invention.
[0028] Although the specific implementation modes of the present invention are described above, those skilled in the art should understand that the specific implementation modes described are only illustrative and are not intended to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should be included in the scope of protection of the claims of the present invention.
Claims
1. A data interface multiplexing control circuit, characterized in that: include: Data interface signal input terminal, used to connect with external data interface pin; Level output terminal, used to connect with the switch pin of the module; A feedback input terminal, used to connect to the working signal terminal of the module; A signal rectifying unit connected to the data interface signal input terminal and rectifying the level jump signal of the data interface signal input terminal into a constant high level signal; A feedback control unit, connected to the feedback input terminal and also connected to the signal rectification unit, capable of converting the constant high-level signal into a constant low-level signal through bypass grounding; An output control unit is connected to the level output end, and is also connected to the signal rectification unit and the feedback control unit; when the output control unit receives the constant high-level signal, the output level of the level output end changes from high to low; when the output control unit receives the constant low-level signal, the output level of the level output end changes from low to high.
2. A data interface multiplexing control circuit as claimed in claim 1, characterized in that: The signal rectification unit includes a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit includes a resistor R1, a transistor Q1, a resistor R2 and a resistor R3, and the feedback control unit includes a resistor R4, a capacitor C3, a resistor R5 and a transistor Q2; The data interface signal input end is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the positive end of the diode D1 and the negative end of the diode D2, the negative end of the diode D1 is connected to one end of the capacitor C2, one end of the resistor R2, and the collector end of the transistor Q2, the positive end of the diode D2 is connected to the other end of the capacitor C2 and the ground end, one end of the resistor R1 is connected to the power supply end, the other end of the resistor R1 is connected to the collector end of the transistor Q1 and the level output end, the base end of the transistor Q1 is connected to one end of the resistor R3 and the other end of the resistor R2, the emitter end of the transistor Q1 and the other end of the resistor R3 are both connected to the ground end, one end of the resistor R4 is connected to the feedback input end, the other end of the resistor R4 is connected to one end of the capacitor C3, one end of the resistor R5, and the base end of the transistor Q2, the other end of the capacitor C3, the other end of the resistor R5, and the emitter end of the transistor Q2 are all connected to the ground end.
3. A data interface multiplexing control circuit as claimed in claim 1, characterized in that: The data interface signal input terminal is connected to the CLK pin of the I2C, I2S or SPI interface.
4. A data interface multiplexing control circuit as claimed in claim 1, characterized in that: The data interface signal input terminal is connected to the TXD pin of the serial port.
5. A data interface multiplexing control circuit as claimed in claim 1, characterized in that: The level output terminal is connected to a reset pin of the module.