A low power consumption bandgap reference voltage generating circuit

Abstract

The invention discloses a low-power bandgap reference voltage generating circuit, comprising a start-up circuit, a bandgap core circuit and an output circuit; the output circuit comprises a plurality of resistors connected in series in sequence, and the first resistor is connected to a reference voltage output point of the output circuit; the low-power bandgap reference voltage generating circuit also comprises a first energy storage circuit, a second energy storage circuit, a third energy storage circuit, a reference voltage generating circuit, a voltage comparison circuit, a level output circuit, a logic circuit, a first switch, a second switch and a third switch; the first energy storage circuit and the second energy storage circuit respectively store voltages at both ends of the first resistor; the third storage circuit outputs the bandgap reference voltage; the invention stores and outputs the bandgap reference voltage through the energy storage circuit, and when the voltage is in a stable state, controls a power supply to stop supplying power, so that the bandgap reference voltage generating circuit enters a low-power mode, and dynamically switches between the low-power mode and the normal mode, thereby reducing power consumption.

Description

[Technical Field]

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a low-power bandgap reference voltage generating circuit. [Background Technology]

[0002] The bandgap reference circuit uses the negative temperature coefficient of the PN junction voltage and the positive temperature coefficient of the voltage difference between the two PN junctions under different current densities to compensate each other, thereby obtaining an output voltage with very low temperature drift. Theoretically, this output voltage value is approximately equal to the bandgap voltage of silicon, so this circuit is called a bandgap reference circuit.

[0003] At present, bandgap reference circuits can be used as stable voltage sources for wearable electronic devices, which generally require low power consumption. If the power consumption of bandgap reference circuits can be reduced, it can help meet the low power consumption requirements of wearable electronic devices. In fact, for other electronic devices with low power consumption requirements, reducing the power consumption of bandgap reference circuits is also of great significance. [Summary of the invention]

[0004] The purpose of the present invention is to provide a low-power bandgap reference voltage generating circuit to reduce the power consumption of the bandgap reference voltage generating circuit.

[0005] In order to achieve the purpose of the present invention, a technical solution adopted by the present invention is as follows:

[0006] A low-power bandgap reference voltage generating circuit comprises a startup circuit, a bandgap core circuit and an output circuit; the output circuit comprises a series resistor group consisting of a first resistor, a second resistor ... an Nth resistor connected in series in sequence, the first resistor is connected to a reference voltage output point of the output circuit, N is a positive integer, and N≥2; the low-power bandgap reference voltage generating circuit also comprises a first energy storage circuit, a second energy storage circuit, a third energy storage circuit, a reference voltage generating circuit, a voltage comparison circuit, a level output circuit, a logic circuit, a first switch, a second switch and a third switch;

[0007] The power supply is connected to one end of the first switch, the power supply end of the reference voltage generating circuit and the power supply end of the level output circuit, and the other end of the first switch is connected to the power supply end of the startup circuit, the power supply end of the bandgap core circuit and the power supply end of the output circuit; one end of the second switch is connected to one end of the first resistor connected to the reference voltage output point, and the other end is connected to the input end of the first energy storage circuit; one end of the third switch is connected to the other end of the first resistor, and the other end is connected to the input end of the second energy storage circuit; the first energy storage circuit, the second energy storage circuit and the reference voltage output circuit respectively output the first voltage, the second voltage and the reference voltage to the voltage comparison circuit; the voltage comparison circuit outputs the comparison result of the first voltage and the second voltage and the comparison result of the first voltage and the reference voltage to the logic circuit; the input end of the third energy storage circuit is connected to the output end of the first energy storage circuit, and the output end outputs the bandgap reference voltage; the charging speed of the first energy storage circuit is equal to the charging speed of the second energy storage circuit, and the discharging speed is less than the discharging speed of the second energy storage circuit;

[0008] The voltage comparison circuit compares a first voltage output by the first energy storage circuit with a second voltage output by the second energy storage circuit and the first voltage output by the first energy storage circuit with a reference voltage output by the reference voltage output circuit, and outputs a comparison result to the logic circuit; the level output circuit outputs a first level / a second level to the logic circuit during a period of power-off or power-on / after a period of power-on or power-on; when the level output circuit outputs a first level, the logic circuit controls the first switch, the second switch, and the third switch to be disconnected; when the level output circuit outputs a second level and the difference between the first voltage and the second voltage is greater than a preset difference or the first voltage is less than the reference voltage, the logic circuit controls the first switch, the second switch, and the third switch to be closed; when the level output circuit outputs a second level and the difference between the first voltage and the second voltage is less than a preset difference and the first voltage is greater than the reference voltage, the logic circuit controls the first switch, the second switch, and the third switch to be disconnected.

[0009] In order to achieve the purpose of the present invention, another technical solution adopted by the present invention is as follows:

[0010] A low-power bandgap reference voltage generating circuit comprises a startup circuit, a bandgap core circuit and an output circuit; the output circuit comprises a series resistor group consisting of a first resistor, a second resistor ... an Nth resistor connected in series in sequence, the first resistor is connected to a reference voltage output point of the output circuit, N is a positive integer, and N≥3; the low-power bandgap reference voltage generating circuit also comprises a first energy storage circuit, a second energy storage circuit, a third energy storage circuit, a reference voltage generating circuit, a voltage comparison circuit, a level output circuit, a logic circuit, a first switch, a second switch, a third switch and a fourth switch;

[0011] The power supply is connected to one end of the first switch, the power supply end of the reference voltage generating circuit and the power supply end of the level output circuit, and the other end of the first switch is connected to the power supply end of the startup circuit, the power supply end of the bandgap core circuit and the power supply end of the output circuit; one end of the second switch is connected to one end of the nth resistor connected to the previous resistor, and the other end is connected to the input end of the first energy storage circuit; one end of the third switch is connected to one end of the nth resistor connected to the next resistor, and the other end is connected to the input end of the second energy storage circuit, n is a positive integer, and 2≤n≤N-1; the output end of the first energy storage circuit, the output end of the second energy storage circuit and the output end of the reference voltage output circuit are connected to the voltage comparison circuit; one end of the fourth switch is connected to one end of the first resistor connected to the reference voltage output point, and the other end is connected to the input end of the third energy storage circuit, and the output end of the third energy storage circuit outputs the bandgap reference voltage; the charging speed of the first energy storage circuit is equal to the charging speed of the second energy storage circuit, and the discharging speed is less than the discharging speed of the second energy storage circuit;

[0012] The voltage comparison circuit compares the first voltage output by the first energy storage circuit with the second voltage output by the first energy storage circuit and the first voltage output by the first energy storage circuit with the reference voltage output by the reference voltage output circuit, and outputs the comparison result to the logic circuit; the level output circuit outputs the first level / the second level to the logic circuit during a period of time after being powered on or powered off / after being powered on or powered on for a period of time; the logic circuit controls the first switch, the second switch, the third switch and the fourth switch to be disconnected when the level output circuit outputs the first level; the logic circuit controls the first switch, the second switch, the third switch and the fourth switch to be closed when the level output circuit outputs the second level and the difference between the first voltage and the second voltage is greater than the preset difference or the first voltage is less than the reference voltage; and controls the first switch, the second switch, the third switch and the fourth switch to be disconnected when the level output circuit outputs the second level and the difference between the first voltage and the second voltage is less than the preset difference and the first voltage is greater than the reference voltage.

[0013] As a specific implementation, the first energy storage circuit includes a first resistor and a first capacitor; the second energy storage circuit includes a second resistor and a second capacitor; one end of the first resistor is connected to the other end of the second switch, the other end is connected to one end of the first capacitor, the input end of the third energy storage circuit and the voltage comparison circuit, and the other end of the first capacitor is grounded; one end of the second resistor is connected to the other end of the third switch, the other end is connected to one end of the second capacitor and the voltage comparison circuit, and the other end of the second capacitor is grounded; the product of the resistance value of the first resistor and the capacitance value of the first capacitor is equal to the product of the resistance value of the second resistor and the capacitance value of the second capacitor, and the capacitance value of the first capacitor is greater than the capacitance value of the second capacitor.

[0014] As a specific implementation, the third energy storage circuit includes a third resistor and a third capacitor; one end of the third resistor is connected to the output end of the first energy storage circuit, and the other end is connected to one end of the third capacitor, and the other end of the third capacitor is grounded; the common end of the third resistor and the third capacitor outputs a bandgap reference voltage.

[0015] As a specific implementation, the reference voltage generating circuit includes a fifth resistor and a second PNP transistor; one end of the fifth resistor is connected to a power supply, and the other end is connected to the emitter of the second PNP transistor and a voltage comparison circuit; the base of the second PNP transistor is connected to the collector and is grounded.

[0016] As a specific implementation, the voltage comparison circuit includes a first comparator and a second comparator; the first comparator has a non-inverting input terminal receiving the first voltage, an inverting input terminal receiving the second voltage, and an output terminal connected to a logic circuit; the second comparator has a non-inverting input terminal receiving the first voltage, an inverting input terminal receiving the reference voltage, and an output terminal connected to the logic circuit.

[0017] As a specific implementation, the voltage comparison circuit further includes a latch, and the latch is connected between the first comparator and the logic circuit and / or between the second comparator and the logic circuit.

[0018] As a specific implementation, the first level is a low level; the second level is a high level; when the difference between the first voltage and the second voltage is greater than a preset difference, the first output end of the voltage comparison circuit outputs a high level; when the difference between the first voltage and the second voltage is less than or equal to the preset difference, the first output end of the voltage comparison circuit outputs a low level; when the first voltage is greater than or equal to the reference voltage, the second output end of the voltage comparison circuit outputs a high level; when the first voltage is less than the reference voltage, the second output end of the voltage comparison circuit outputs a low level.

[0019] As a specific implementation, the level output circuit includes a fourth resistor, a fourth capacitor, a first inverter and a second inverter; one end of the fourth resistor is connected to a power supply, and the other end is connected to one end of the fourth capacitor and an input end of the first inverter, the other end of the fourth capacitor is grounded, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter outputs a low level to the logic circuit within a period of time after power-on, and outputs a high level to the logic circuit after power-on for a period of time.

[0020] As a specific implementation, the logic circuit includes a third inverter, a first AND gate, a second AND gate and a first XOR gate; one input end of the first AND gate receives a comparison result of the first voltage and the second voltage, the other input end is connected to the output end of the level output circuit, and the output end is connected to an input end of the first XOR gate; the input end of the third inverter receives a comparison result of the first voltage and the reference voltage, and the output end is connected to an input end of the second AND gate; the other input end of the second AND gate is connected to the output end of the level output circuit, and the output end is connected to the other input end of the first XOR gate; the output end of the first XOR gate is connected to the control signal input end of the first switch, the control signal input end of the second switch and the control signal input end of the third switch, or the output end of the first XOR gate is connected to the control signal input end of the first switch, the control signal input end of the second switch, the control signal input end of the third switch and the control signal input end of the fourth switch.

[0021] Furthermore, a charging speed of the third energy storage circuit is greater than or equal to a charging speed of the first energy storage circuit, and a discharging speed of the third energy storage circuit is less than or equal to a discharging speed of the first energy storage circuit.

[0022] Beneficial effects of the present invention:

[0023] The present invention stores the reference voltage output by the output circuit through an energy storage circuit, outputs the bandgap reference voltage, controls the first switch, the second switch and the third switch to be disconnected through a logic circuit when the level output circuit outputs the first level, controls the first switch, the second switch and the third switch to be closed when the level output circuit outputs the second level, and the difference between the first voltage and the second voltage is greater than the preset difference or the first voltage is less than the reference voltage, controls the first switch, the second switch and the third switch to be disconnected when the level output circuit outputs the second level, and the difference between the first voltage and the second voltage is less than the preset difference and the first voltage is greater than the reference voltage, so that when the voltage output by the energy storage circuit is in a stable state, the logic circuit controls the power supply to stop supplying power to the startup circuit, the bandgap core circuit and the output circuit, so that the bandgap reference voltage generating circuit enters a low power consumption mode until the voltage output by the energy storage circuit leaks to a boundary value, controls the power supply to supply power to the startup circuit, the bandgap core circuit and the output circuit again through the logic circuit, so that the voltage output by the energy storage circuit is maintained in a stable range, and the bandgap reference voltage generating circuit is dynamically switched between the low power consumption mode and the normal working mode all the time, thereby reducing power consumption compared to being in the normal working mode all the time. Furthermore, the present invention forms an energy storage circuit through resistors and capacitors, which is not only used for energy storage, but also plays a filtering role. Furthermore, the present invention outputs a bandgap reference voltage VREF through the first energy storage circuit and the third energy storage circuit or a third energy storage circuit with a faster charging speed and a slower discharging speed than the first energy storage circuit. Compared with the first energy storage circuit charging and discharging alone, the bandgap reference voltage VREF output is more stable. The present invention maintains the signal output by the first comparator and / or the second comparator through a latch. [Description of the attached figure]

[0024] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. The drawings described below are only embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 is a structural block diagram of a low-power bandgap reference voltage generating circuit provided by Embodiment 1 of the present invention;

[0026] Figure 2 is a timing diagram of a first voltage V1, a second voltage V2 and a reference voltage VCM provided in the first embodiment of the present invention;

[0027] Figure 3 1 is a circuit schematic diagram of a low-power bandgap reference voltage generating circuit provided in Embodiment 1 of the present invention;

[0028] Figure 4is a circuit schematic diagram of a low-power bandgap reference voltage generating circuit provided by Embodiment 2 of the present invention;

[0029] Figure 5 is a structural block diagram of a low-power bandgap reference voltage generating circuit provided by Embodiment 3 of the present invention;

[0030] Figure 6 is a circuit schematic diagram of a low-power bandgap reference voltage generating circuit provided in Embodiment 3 of the present invention;

[0031] Figure 7 It is a circuit schematic diagram of a low-power bandgap reference voltage generating circuit provided in Embodiment 4 of the present invention. [Specific implementation method]

[0032] The present invention is described in detail below in conjunction with the accompanying drawings. In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0033] like Figure 1 As shown, a low power consumption bandgap reference voltage generating circuit comprises a start-up circuit 100, a bandgap core circuit 200, an output circuit 300, a first energy storage circuit 410, a second energy storage circuit 420, a third energy storage circuit 430, a reference voltage generating circuit 500, a voltage comparison circuit 600, a level output circuit 700, a logic circuit 800, a first switch K1, a second switch K2 and a third switch K3; one end of the first switch S1 is connected to a power supply VDD, and the other end is connected to a power supply end of the start-up circuit 100, a power supply end of the bandgap core circuit 200 and a power supply end of the output circuit 300; the start-up circuit 100, the bandgap core circuit 200 and the output circuit 300 are connected in sequence, and the start-up circuit 100 outputs a start-up voltage to the bandgap core circuit 200 and the output circuit 300; the output circuit 300 comprises a first PMOS transistor PM1, a series resistor group 310 and a first PNP transistor Q1, and the series resistor group 310 comprises a first resistor R connected in series. 01 And the second resistor R 02 The source of the first PMOS tube PM1 is connected to the other end of the first switch S1, and the drain is connected to one end of the first resistor R1 and one end of the second switch S2. 01 The other end of the second resistor R 02 The other end of the second resistor R 02 The other end is connected to the emitter of the first PNP transistor Q1, the collector of the first PNP transistor Q1 is connected to the base and grounded GND, the first PMOS tube PM1 is connected to the first resistor R01 The common point of the reference voltage output point ref of the output circuit 300 is connected; the other end of the second switch S2 is connected to the input end of the first energy storage circuit 410, and the output end of the first energy storage circuit 410 is connected to the first voltage input end, the third voltage input end and the input end of the third energy storage circuit 430 of the voltage comparison circuit 600; the output end of the third energy storage circuit 430 outputs the bandgap reference voltage VREF; the other end of the third switch S3 is connected to the input end of the second energy storage circuit 420, and the output end of the second energy storage circuit 420 is connected to the second voltage input end of the voltage comparison circuit 600; the input end of the reference voltage generating circuit 500 is connected to the power supply VDD, and the output end is connected to the fourth voltage input end of the voltage comparison circuit 600; the voltage comparison circuit 600 compares the first voltage V1 output by the first energy storage circuit 410 with the output of the second energy storage circuit 420 The second voltage V1 output by the first energy storage circuit 410 and the first voltage V1 output by the first energy storage circuit 410 and the reference voltage VCM output by the reference voltage generating circuit 500 respectively output the first comparison result to the first input terminal of the logic circuit 600 and the second comparison result to the second input terminal of the logic circuit 600; the input terminal of the level output circuit 700 is connected to the power supply VDD, and the output terminal is connected to the third input terminal of the logic circuit 600. When the level output circuit 700 is powered off (that is, the power supply VDD is not supplied), the first level is output to the third input terminal of the logic circuit 600, and the second level is continuously output to the third input terminal of the logic circuit 600 when powered on, or the level output circuit 700 outputs the first level to the third input terminal of the logic circuit 600 when powered off and for a period of time after the power is turned on, and continuously outputs the second level to the third input terminal of the logic circuit 600 after a period of time.

[0034] In this embodiment, the first level is a low level and the second level is a high level; when the difference between the first voltage V1 and the second voltage V2 is less than or equal to the preset difference, the first comparison result output by the voltage comparison circuit 600 is a low level, and when the difference between the first voltage V1 and the second voltage V2 is greater than the preset difference, the first comparison result output by the voltage comparison circuit 600 is a high level; when the difference between the first voltage V1 and the reference voltage VCM is greater than or equal to the reference voltage VCM, the second comparison result output by the voltage comparison circuit 600 is a low level, and when the difference between the first voltage V1 and the reference voltage VCM is less than the reference voltage VCM, the first comparison result output by the voltage comparison circuit 600 is a high level.

[0035] In this embodiment, when the difference between the first voltage V1 and the second voltage V2 is less than or equal to the preset difference, the bandgap reference voltage VREF output by the third energy storage circuit 430 is in a relatively stable state; the preset difference and the reference voltage VCM can be set according to actual needs; the range of the preset difference is 100-200mv; the voltage value of the reference voltage VCM is approximately equal to the saturation conduction voltage between the emitter and the collector of the first PNP transistor Q1.

[0036] In this embodiment, the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 all include reactive elements with energy storage function, the charging speed of the first energy storage circuit 410 is equal to the charging speed of the second energy storage circuit 420, and the discharging speed of the first energy storage circuit 410 is less than the discharging speed of the second energy storage circuit 420; Figure 2As shown, in this embodiment, when the power supply VDD is not supplied, the level output circuit 700 is powered off, the level output circuit 700 outputs a low level to the logic circuit 800, and the switch control signal output by the logic circuit 800 is a low level, which controls the first switch S1, the second switch S2, and the third switch S3 to be disconnected, the first energy storage circuit 410, the second energy storage circuit 420, and the third energy storage circuit 430 are not charged, and the first voltage V1 and the second voltage V2 are both equal to 0; when the power supply VDD is supplied, the level output circuit 700 is powered on, and outputs a high level to the logic circuit 800, the first voltage V1 is initially less than the reference voltage VCM , the second comparison result output by the voltage comparison circuit 600 is a low level, the switch control signal output by the logic circuit 800 is a high level, the first switch S1, the second switch S2 and the third switch S3 are controlled to be closed, the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 start to charge, the bandgap reference voltage generation circuit enters the normal working mode, the first voltage V1 and the second voltage V2 start to increase until the difference between the first voltage and the second voltage V2 is less than or equal to the preset difference. The first comparison result output by the voltage comparison circuit 600 is a low level, and the first voltage V1 is greater than or equal to the reference voltage VC M, the second comparison result becomes a high level, the switch control signal output by the logic circuit 800 becomes a low level, the first switch S1, the second switch S2 and the third switch S3 are controlled to be disconnected, the startup circuit 100, the bandgap core circuit 200 and the output circuit 300 stop consuming energy, the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 stop charging and start discharging, and the bandgap reference voltage generating circuit enters a low power consumption mode; the discharge speed of the second energy storage circuit 420 is greater than the discharge speed of the first energy storage circuit 410, and when the difference between the first voltage V1 and the second voltage V2 is greater than the preset difference or the first voltage V2 is greater than the preset difference ... voltage V1 is disconnected from the first energy storage circuit 410, and the second voltage V2 is disconnected from the first energy storage circuit 410. When the voltage V1 is less than the reference voltage VCM (both represent that the voltage output by the output circuit 300 is leaked too much), the first comparison result output by the voltage comparison circuit 600 becomes a high level or the second comparison result becomes a low level, and the switch control signal output by the logic circuit 800 becomes a high level, controlling the first switch S1, the second switch S2 and the third switch S3 to close, and the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 restart charging, and in this cycle, the bandgap reference voltage generating circuit dynamically switches between the low power consumption mode and the normal working mode, thereby reducing power consumption compared to being in the normal working mode all the time.

[0037] In this embodiment, the circuit comparison circuit 800 reduces the excessive leakage of the first voltage V1 and the second voltage V2 by comparing the first voltage V1 with a fixed reference voltage VCM, but the difference between the first voltage V1 and the second voltage V2 is less than the preset difference, resulting in an incorrect judgment of the output status of the first energy storage circuit 410.

[0038] like Figure 3 As shown, in this embodiment, the startup circuit 100 includes a sixth resistor R6, a first diode D1, a first NMOS transistor NM1 and a second NMOS transistor NM2, and the bandgap core circuit 200 includes a second PMOS transistor PM2, a third PMOS transistor PM3, an operational amplifier OPA, a ninth resistor R9, a third PNP transistor Q3 and a fourth PNP transistor Q4; one end of the sixth resistor R6 is connected to the other end of the first switch S1, and the other end is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the source of the first NMOS transistor NM1 and the gate of the second NMS transistor NM2; the source of the first NMOS transistor NM1 is grounded GND, and the gate is connected to the emitter of the third PNP transistor Q3; the drain of the second NMS transistor NM2 is connected to the gate of the second PMOS transistor PM2, The gate of the third PMOS transistor PM3, the gate of the first PMOS transistor PM1 and the output end of the operational amplifier OPA are connected, and the source is grounded GND; the source of the second PMOS transistor PM2 is connected to the other end of the second switch S2, and the drain is connected to the inverting input end of the operational amplifier OPA and the emitter of the third PNP transistor Q3; the source of the third PMOS transistor PM3 is connected to the other end of the second switch S2, and the drain is connected to the non-inverting input end of the operational amplifier OPA and one end of the ninth resistor R9, and the other end of the ninth resistor R9 is connected to the emitter of the fourth PNP transistor Q4; the base of the third PNP transistor Q3 is connected to the base of the fourth PNP transistor Q4 and is grounded GND, and the collector of the third PNP transistor Q3 and the collector of the fourth PNP transistor Q4 are grounded GND.

[0039] like Figure 2 As shown, the first energy storage circuit 410 includes a first resistor R1 and a first capacitor C1, the second energy storage circuit 420 includes a second resistor R2 and a second capacitor C2, and the third energy storage circuit 430 includes a third resistor R3 and a third capacitor C3; one end of the first resistor R1 is connected to the other end of the second switch S2, and the other end is connected to one end of the first capacitor C1, one end of the third resistor R3, and the first voltage input terminal and the third voltage input terminal of the voltage comparison circuit 600, the other end of the first capacitor C1 is grounded GND, the other end of the third resistor R3 is connected to one end of the third capacitor C3, the other end of the third capacitor C3 is grounded GND, and the common end of the third resistor R3 and the third capacitor C3 outputs a bandgap reference voltage VREF; one end of the second resistor R2 is connected to the other end of the third switch S3, the other end of the second resistor R2 is connected to one end of the second capacitor C2 and the second voltage input terminal of the voltage comparison circuit 600, and the other end of the second capacitor C2 is grounded GND.

[0040] In this embodiment, R1*C1=R2*C2, the charging speed of the first energy storage circuit 410 is consistent with that of the second energy storage circuit 420; C1>C2, the discharge speed of the first energy storage circuit 410 is slower than that of the second energy storage circuit 420, and the voltage output is relatively stable during discharge; the first energy storage circuit 410 and the third energy storage circuit 430 are charged and discharged together, and the output of the bandgap reference voltage VREF is more stable than that of the first energy storage circuit 10 acting alone; the resistors and capacitors in the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 form an RC filter circuit, which not only has an energy storage function, but also has a filtering function.

[0041] like Figure 2 As shown, in this embodiment, the reference voltage generating circuit 700 includes a fifth resistor R5 and a second PNP transistor Q2, one end of the fifth resistor R5 is connected to the power supply VDD, and the other end is connected to the emitter of the second PNP transistor Q2 and the fourth voltage input terminal of the voltage comparison circuit 600, outputs the reference voltage to the fourth voltage input terminal of the voltage comparison circuit 600, and the base of the second PNP transistor Q2 is connected to the collector and grounded GND.

[0042] like Figure 2 As shown, in this embodiment, the voltage comparison circuit 600 includes a first comparator CMP1, a second comparator CMP2 and a latch Latch; the non-inverting input terminal of the first comparator CMP1 is the first voltage input terminal of the voltage comparison circuit 600, the inverting input terminal is the second voltage input terminal of the voltage comparison circuit 600, the output terminal is connected to the input terminal of the latch Latch, and the output terminal of the latch Latch outputs the first comparison result to the logic circuit 800; the non-inverting input terminal of the second comparator CMP2 is the third voltage input terminal of the voltage comparison circuit 600, the inverting input terminal is the fourth voltage input terminal of the voltage comparison circuit 600, and the output terminal outputs the second comparison result to the logic circuit 800.

[0043] In other embodiments, a latch is also connected between the second comparator CMP2 and the voltage comparison circuit 600 .

[0044] like Figure 2 As shown, the level output circuit 700 includes a fourth resistor R4, a capacitor C4, a first inverter NOT1 and a second inverter NOT2; one end of the fourth resistor R4 is connected to the power supply VDD, and the other end is connected to one end of the fourth capacitor C4 and the input end of the first inverter NOT1, the other end of the fourth capacitor C4 is grounded GND, the output end of the first inverter NOT1 is connected to the input end of the second inverter NOT2, and the output end of the second inverter NOT2 outputs a low level to the logic circuit 800 for a period of time after being powered on, and outputs a high level to the logic circuit 800 after being powered on for a period of time.

[0045] In this embodiment, the level output circuit 700 is a low-level power-on reset circuit, which outputs a low level at the beginning of power-on and continuously outputs a high level after a period of power-on; in other embodiments, the level output circuit 700 is a wire directly connected to the power supply VDD, and after the power supply VDD is powered on, the level output circuit 700 continuously outputs a high level.

[0046] like Figure 2 As shown, in this embodiment, the logic circuit 800 includes a third inverter NOT3, a first AND gate AND1, a second AND gate AND2 and a first XOR gate XOR1; one input end of the first AND gate AND1 receives the first comparison result output by the voltage comparison circuit 600, the other input end is connected to the output end of the level output circuit 700, and the output end is connected to one input end of the first XOR gate XOR1; one input end of the second AND gate AND2 receives the second comparison result output by the voltage comparison circuit 600, the other input end is connected to the output end of the level output circuit 700, and the output end is connected to the other input end of the first XOR gate XOR1; the output end of the first XOR gate XOR1 is connected to the control signal input end of the first switch S1, the control signal input end of the second switch S2 and the control signal input end of the third switch S3; when the switch control signal output by the first XOR gate XOR1 is at a high level, the first switch S1, the second switch S2 and the third switch S3 are closed; when the switch control signal output by the first XOR gate XOR1 is at a low level, the first switch S1, the second switch S2 and the third switch S3 are opened.

[0047] In this embodiment, the first switch S1, the second switch S2 and the third switch S3 adopt transmission gate switches; the switch control signal output by the first XOR gate XOR1 is directly output to the C end of the first switch S1, the second switch S2 and the third switch S3, and the switch control signal output by the first XOR gate XOR1 is inverted and output to the C reverse end of the first switch S1, the second switch S2 and the third switch S3.

[0048] Embodiment 2

[0049] like Figure 4 As shown, the difference between this embodiment and the first embodiment is that the series resistor group 310 includes a first resistor R 01 , the second resistor R 02 ...Nth resistor R 0N , N is a positive integer, and N ≥ 3; one end of the second switch S2 is connected to the first resistor R 01 One end of the third switch S3 is connected to the reference voltage output point ref, and the other end is connected to the input end of the first energy storage circuit 410; one end of the third switch S3 is connected to the first resistor R 01 The other end is connected to the input end of the second energy storage circuit 420.

[0050] Embodiment 3

[0051] like Figure 5 , as shown in FIG6 , the difference between this embodiment and the first embodiment is that: one end of the second switch S2 is connected to the nth resistor R 0n The third switch S3 is connected to the common end of the previous resistor, and the other end is connected to the input end of the first energy storage circuit 410; one end of the third switch S3 is connected to the nth resistor R 0n and the common end of the latter resistor, and the other end is connected to the input end of the second energy storage circuit 420, n is a positive integer, and 2≤n≤(N-1); the low-power bandgap reference voltage generating circuit also includes a fourth switch S4, one end of the fourth switch S4 is connected to the first resistor R 01 One end of the first energy storage circuit 410 and the second energy storage circuit 420 respectively store the nth resistor R 0n The voltage comparison circuit 600 compares the voltage of the nth resistor R 0n The voltage at both ends of the resistor R 0n The voltage at the common end of the resistor and the reference voltage VCM output by the reference voltage output circuit 500 outputs a second comparison result to the logic circuit 800; the output end of the logic circuit 800 outputs a switch control signal to the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to control the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to be closed or opened.

[0052] In the present embodiment, when the power supply VDD is not supplied, the level output circuit 700 is powered off, the level output circuit 700 outputs a low level to the logic circuit 800, and the switch control signal output by the logic circuit 800 is a low level, which controls the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to be disconnected, the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 are not charged, and the first voltage V1 and the second voltage V2 are both equal to 0; when the power supply VDD is supplied, the level output circuit 700 is powered on, and outputs a high level to the logic circuit 800, at the beginning, the first voltage V1 is less than the reference voltage VCM, and the voltage The second comparison result output by the comparison circuit 600 is a low level, and the switch control signal output by the logic circuit 800 is a high level, which controls the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to be closed, and the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 start to charge, and the bandgap reference voltage generation circuit enters a normal working mode, and the first voltage V1 and the second voltage V2 start to increase until the difference between the first voltage and the second voltage V2 is less than or equal to the preset difference voltage. The first comparison result output by the comparison circuit 600 is a low level, and the first voltage V1 is greater than or equal to the reference voltage VCM. The second comparison result becomes a high level, and the switch control signal output by the logic circuit 800 becomes a low level, controlling the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to be disconnected, the startup circuit 100, the bandgap core circuit 200 and the output circuit 300 stop consuming energy, the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 stop charging and start discharging, and the bandgap reference voltage generating circuit enters a low power consumption mode; the discharge speed of the second energy storage circuit 420 is greater than the discharge speed of the first energy storage circuit 410, and when the difference between the first voltage V1 and the second voltage V2 is greater than the preset difference or the first voltage V2 is greater than the preset difference, the first voltage V1 is lowered to the low power consumption mode. When V1 is less than the reference voltage VCM (both represent that the voltage output by the output circuit 300 is leaked too much), the first comparison result output by the voltage comparison circuit 600 becomes a high level or the second comparison result becomes a low level, and the switch control signal output by the logic circuit 800 becomes a high level, controlling the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 to close, and the first energy storage circuit 410, the second energy storage circuit 420 and the third energy storage circuit 430 restart charging, and in this cycle, the bandgap reference voltage generating circuit dynamically switches between the low power consumption mode and the normal working mode, thereby reducing power consumption compared to being in the normal working mode all the time.

[0053] Embodiment 4

[0054] like Figure 7As shown, the difference between this embodiment and the third embodiment is that: the third energy storage circuit 430 includes a first energy storage circuit 431 and a second energy storage circuit 432 connected in sequence, the first energy storage circuit includes a seventh resistor R7 and a fifth capacitor C5, and the second energy storage circuit 432 includes an eighth resistor R8 and a sixth capacitor C6; the other end of the fourth switch S4 is connected to one end of the seventh resistor R7, the other end of the seventh resistor R7 is connected to one end of the fifth capacitor C5 and one end of the eighth resistor R8, the other end of the fifth capacitor C5 is grounded GND, the other end of the eighth resistor R8 is connected to one end of the sixth capacitor C6, the other end of the sixth capacitor C6 is grounded GND, and the common end of the eighth resistor R8 and the sixth capacitor C6 outputs the bandgap reference voltage VREF.

[0055] In this embodiment, the charging speed of the third energy storage circuit 430 is greater than or equal to the charging speed of the first energy storage circuit 410, and the discharging speed is less than or equal to the discharging speed of the first energy storage circuit 410; R10=R3, C5=C1, R11=R5, C6=C3, and the charging speed and discharging speed of the first energy storage circuit 431 are equal to those of the first energy storage circuit 410; the first energy storage circuit 431 and the second energy storage circuit 432 are charged and discharged together, and the bandgap reference voltage VREF output is more stable compared with the first energy storage circuit 432 or the second energy storage circuit 432 acting alone.

[0056] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiment. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A low power consumption bandgap reference voltage generating circuit, comprising a startup circuit, a bandgap core circuit and an output circuit; characterized in that: The output circuit includes a series resistor group consisting of a first resistor, a second resistor ... an Nth resistor connected in series in sequence, the first resistor is connected to a reference voltage output point of the output circuit, and N is a positive integer; the low-power bandgap reference voltage generating circuit also includes a first energy storage circuit, a second energy storage circuit, a third energy storage circuit, a reference voltage generating circuit, a voltage comparison circuit, a level output circuit, a logic circuit, a first switch, a second switch, and a third switch; The power supply is connected to one end of the first switch, the power supply end of the reference voltage generating circuit and the power supply end of the level output circuit, and the other end of the first switch is connected to the power supply end of the startup circuit, the power supply end of the bandgap core circuit and the power supply end of the output circuit; N≥2, one end of the second switch is connected to one end of the reference voltage output point of the first resistor-connected output circuit, and the other end is connected to the input end of the first energy storage circuit, one end of the third switch is connected to the other end of the first resistor, and the other end is connected to the input end of the second energy storage circuit, and the input end of the third energy storage circuit is connected to the output end of the first energy storage circuit, or, N≥3, the low-power bandgap reference voltage generating circuit also includes a fourth switch, one end of the second switch is connected to one end of the nth resistor connected to the previous resistor, and the other end is connected to the input end of the first energy storage circuit, one end of the third switch is connected to one end of the nth resistor connected to the next resistor, and the other end is connected to the input end of the second energy storage circuit, n is a positive integer, and 2≤n≤N-1, one end of the fourth switch is connected to one end of the reference voltage output point of the first resistor-connected output circuit, and the other end is connected to the input end of the third energy storage circuit; The first energy storage circuit, the second energy storage circuit and the reference voltage output circuit respectively output the first voltage, the second voltage and the reference voltage to the voltage comparison circuit; the voltage comparison circuit outputs the comparison result of the first voltage and the second voltage and the comparison result of the first voltage and the reference voltage to the logic circuit; the output end of the third energy storage circuit outputs the bandgap reference voltage; the level output circuit outputs the first level / the second level to the logic circuit during a period of power-off or power-on / after a period of power-on or power-on; the charging speed of the first energy storage circuit is equal to the charging speed of the second energy storage circuit, and the discharging speed is less than the discharging speed of the second energy storage circuit; When the level output circuit outputs the first level, the first switch, the second switch and the third switch are controlled to be disconnected through the logic circuit; when the level output circuit outputs the second level and the difference between the first voltage and the second voltage is greater than the preset difference or the first voltage is less than the reference voltage, the first switch, the second switch and the third switch are controlled to be closed; when the level output circuit outputs the second level and the difference between the first voltage and the second voltage is less than the preset difference and the first voltage is greater than the reference voltage, the first switch, the second switch and the third switch are controlled to be disconnected, so that when the voltage output by the energy storage circuit is in a stable state, the logic circuit controls the power supply to stop supplying power to the startup circuit, the bandgap core circuit and the output circuit, so that the bandgap reference voltage generating circuit enters a low power consumption mode until the voltage output by the energy storage circuit leaks to a boundary value, and the logic circuit controls the power supply to supply power to the startup circuit, the bandgap core circuit and the output circuit again, so that the voltage output by the energy storage circuit is maintained in a stable range, and the bandgap reference voltage generating circuit is dynamically switched between the low power consumption mode and the normal working mode.

2. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The first energy storage circuit includes a first resistor and a first capacitor; the second energy storage circuit includes a second resistor and a second capacitor; one end of the first resistor is connected to the other end of the second switch, the other end is connected to one end of the first capacitor, the input end of the third energy storage circuit and the voltage comparison circuit, and the other end of the first capacitor is grounded; one end of the second resistor is connected to the other end of the third switch, the other end is connected to one end of the second capacitor and the voltage comparison circuit, and the other end of the second capacitor is grounded; the product of the resistance value of the first resistor and the capacitance value of the first capacitor is equal to the product of the resistance value of the second resistor and the capacitance value of the second capacitor, and the capacitance value of the first capacitor is greater than the capacitance value of the second capacitor.

3. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The third energy storage circuit includes a third resistor and a third capacitor; one end of the third resistor is connected to the output end of the first energy storage circuit, and the other end is connected to one end of the third capacitor, and the other end of the third capacitor is grounded; the common end of the third resistor and the third capacitor outputs a bandgap reference voltage.

4. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The reference voltage generating circuit includes a fifth resistor and a second PNP transistor; one end of the fifth resistor is connected to a power supply, and the other end is connected to the emitter of the second PNP transistor and a voltage comparison circuit; the base of the second PNP transistor is connected to the collector and is grounded.

5. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The voltage comparison circuit includes a first comparator and a second comparator; the first comparator has a non-inverting input terminal receiving the first voltage, an inverting input terminal receiving the second voltage, and an output terminal connected to a logic circuit; the second comparator has a non-inverting input terminal receiving the first voltage, an inverting input terminal receiving the reference voltage, and an output terminal connected to the logic circuit.

6. The low power consumption bandgap reference voltage generating circuit according to claim 5, characterized in that: The voltage comparison circuit further comprises a latch, which is connected between the first comparator and the logic circuit and / or between the second comparator and the logic circuit.

7. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The first level is a low level; the second level is a high level; when the difference between the first voltage and the second voltage is greater than a preset difference, the first output end of the voltage comparison circuit outputs a high level; when the difference between the first voltage and the second voltage is less than or equal to the preset difference, the first output end of the voltage comparison circuit outputs a low level; when the first voltage is greater than or equal to the reference voltage, the second output end of the voltage comparison circuit outputs a high level; when the first voltage is less than the reference voltage, the second output end of the voltage comparison circuit outputs a low level.

8. The low power consumption bandgap reference voltage generating circuit according to claim 7, characterized in that: The level output circuit includes a fourth resistor, a fourth capacitor, a first inverter and a second inverter; one end of the fourth resistor is connected to a power supply, and the other end is connected to one end of the fourth capacitor and an input end of the first inverter, the other end of the fourth capacitor is grounded, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter outputs a low level to the logic circuit within a period of time after being powered on, and outputs a high level to the logic circuit after being powered on for a period of time.

9. The low power consumption bandgap reference voltage generating circuit according to claim 7, characterized in that: The logic circuit includes a third inverter, a first AND gate, a second AND gate and a first XOR gate; one input end of the first AND gate receives the comparison result of the first voltage and the second voltage, the other input end is connected to the output end of the level output circuit, and the output end is connected to an input end of the first XOR gate; the input end of the third inverter receives the comparison result of the first voltage and the reference voltage, and the output end is connected to an input end of the second AND gate; the other input end of the second AND gate is connected to the output end of the level output circuit, and the output end is connected to the other input end of the first XOR gate; the output end of the first XOR gate is connected to the control signal input end of the first switch, the control signal input end of the second switch and the control signal input end of the third switch, or the output end of the first XOR gate is connected to the control signal input end of the first switch, the control signal input end of the second switch, the control signal input end of the third switch and the control signal input end of the fourth switch.

10. The low power consumption bandgap reference voltage generating circuit according to claim 1, characterized in that: The charging speed of the third energy storage circuit is greater than or equal to the charging speed of the first energy storage circuit, and the discharging speed of the third energy storage circuit is less than or equal to the discharging speed of the first energy storage circuit.

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