A charge pump circuit and non-volatile memory

Abstract

The embodiment of the present invention provides a charge pump circuit and a non-volatile memory, wherein the charge pump circuit comprises: a standby switch unit, a capacitor sampling unit, a resistor sampling unit, a comparator unit, and a charge pump unit. In the embodiment of the present invention, when the charge pump circuit is selected to be in a capacitor sampling state, the capacitor sampling unit samples the voltage at the output end of the charge pump unit and feeds back to the input end of the charge pump unit, so as to control the start or stop of the charge pump. Because the capacitor sampling unit has a capacitor characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of memory, and in particular to a charge pump circuit and a non-volatile memory. Background Art

[0002] In a non-volatile memory, a charge pump circuit is usually required to provide an operating voltage for each load.

[0003] In the prior art, such as Figure 1 As shown, the charge pump circuit generally includes a comparator cmp, a charge pump unit pump, a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2 connected in series, and a feedback line is led out at the connection between the first voltage-dividing resistor and the second voltage-dividing resistor to the comparison voltage input terminal of the comparator to form a feedback circuit. By comparing the voltage received at the comparison voltage input terminal with the reference voltage of the comparator, the comparator can output an enable signal EN to control the opening and closing of the pump.

[0004] However, the inventors discovered during the process of studying the above technical solution that the above technical solution has the following defects: when the charge pump circuit is in standby mode, because the negative feedback circuit is still a pathway, the current drawn by the first voltage-dividing resistor and the second voltage-dividing resistor remains unchanged, and the pump still needs to provide this part of the current, resulting in greater energy consumption. Summary of the invention

[0005] In view of the above problems, a charge pump circuit and a non-volatile memory according to an embodiment of the present invention are proposed to reduce the energy consumption of the charge pump circuit when in standby mode.

[0006] According to a first aspect of the present invention, there is provided a charge pump circuit, comprising: a standby switch unit, a capacitance sampling unit, a resistance sampling unit, a comparator unit, and a charge pump unit;

[0007] The standby switch unit is connected to the output end of the charge pump unit, the input end of the resistance sampling unit, and the input end of the capacitance sampling unit respectively; the standby switch unit is used to select the charge pump circuit to be in the resistance sampling state or the capacitance sampling state;

[0008] The capacitance sampling unit is also connected to the output end of the charge pump unit and the first input end of the charge pump unit respectively; the capacitance sampling unit is used to input a first enable signal to the first input end of the charge pump unit according to the voltage of the output end of the charge pump unit when the charge pump circuit is in the capacitance sampling state;

[0009] The resistance sampling unit is also connected to the sampling voltage input terminal of the comparator unit, and the resistance sampling unit is used to input a sampling voltage to the sampling voltage input terminal of the comparator unit according to the voltage at the output terminal of the charge pump unit when the charge pump circuit is in the resistance sampling state;

[0010] The output end of the comparator unit is connected to the second input end of the charge pump unit, and is used to input a second enable signal to the second input end of the charge pump unit according to the sampling voltage and a preset reference voltage.

[0011] Preferably, the standby switch unit comprises: a first P-type field effect transistor;

[0012] The source end of the first P-type field effect transistor is connected to the output end of the charge pump unit;

[0013] The drain terminal of the first P-type field effect transistor is connected to the input terminal of the resistance sampling unit;

[0014] The gate terminal of the first P-type field effect transistor is connected to the input terminal of the capacitance sampling unit.

[0015] Preferably, the capacitance sampling unit comprises:

[0016] A second P-type field effect transistor, a first N-type field effect transistor, a second N-type field effect transistor, a third N-type field effect transistor, a fourth N-type field effect transistor, a fifth N-type field effect transistor, a sampling capacitor, a first current source, a second current source, a third current source, a first inverter, and a second inverter;

[0017] The output end of the charge pump unit is connected to one end of the sampling capacitor and the input end of the first current source respectively;

[0018] The output end of the first current source is connected to the source end of the second P-type field effect transistor;

[0019] One end of the sampling capacitor is respectively connected to the drain end of the second P-type field effect transistor, the drain end of the first N-type field effect transistor, the gate end of the first N-type field effect transistor, and the gate end of the second N-type field effect transistor;

[0020] The gate terminal of the second P-type field effect transistor, the input terminal of the first inverter and the input terminal of the capacitance sampling unit are connected;

[0021] The output end of the first inverter is connected to the gate end of the third N-type field effect transistor;

[0022] The source end of the first N-type field effect transistor is connected to the drain end of the third N-type field effect transistor;

[0023] The input end of the second current source, the input end of the third current source, and the gate end of the fourth N-type field effect transistor are respectively connected to a preset power supply;

[0024] The output end of the second current source is connected to the drain end of the second N-type field effect transistor and the gate end of the fifth N-type field effect transistor respectively;

[0025] The source terminal of the second N-type field effect transistor is connected to the drain terminal of the fourth N-type field effect transistor;

[0026] The output end of the third current source is connected to the drain end of the fifth N-type field effect transistor and the input end of the second inverter respectively; the output end of the second inverter is the output end of the charge pump unit;

[0027] The source end of the third N-type field effect transistor, the source end of the fourth N-type field effect transistor, and the source end of the fifth N-type field effect transistor are grounded respectively.

[0028] Preferably, the charge pump circuit further comprises: a counter unit;

[0029] The counter unit is connected to the output end of the capacitance sampling unit, the input end of the capacitance sampling unit, and the comparator unit respectively; the counter unit is used to output a restart signal to the standby switch unit after the flipping of the first enable signal reaches a preset number of times, so that the standby switch unit selects the charge pump circuit to enter the resistance sampling state.

[0030] Preferably, the resistance sampling unit comprises: a first resistor and a second resistor;

[0031] One end of the first resistor is connected to the standby switch unit;

[0032] The other end of the first resistor is connected to one end of the second resistor;

[0033] One end of the second resistor is grounded.

[0034] Preferably, the charge pump circuit further comprises: a capacitive load and a resistive load;

[0035] One end of the capacitive load and one end of the resistive load are respectively connected to the output end of the charge pump unit;

[0036] One end of the capacitive load and one end of the resistive load are grounded respectively.

[0037] An embodiment of the present invention further provides a non-volatile memory, comprising the charge pump circuit.

[0038] In the embodiment of the present invention, the charge pump circuit is additionally provided with a capacitor sampling unit and a standby switch unit. The standby switch unit can select the charge pump circuit to be in a resistance sampling state or a capacitance sampling state. When the charge pump circuit is selected to be in the capacitance sampling state, the voltage at the output end of the charge pump unit is sampled by the capacitor sampling unit and fed back to the input end of the charge pump unit, so as to control the start or stop of the charge pump. Because the capacitor sampling unit has a capacitor characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced. Specifically, the standby switch unit is respectively connected to the output end of the charge pump unit, the input end of the resistor sampling unit, and the input end of the capacitor sampling unit; the standby switch unit is used to select the charge pump circuit to be in the resistance sampling state or the capacitance sampling state; the capacitor sampling unit is also respectively connected to the output end of the charge pump unit and the first input end of the charge pump unit; the capacitor sampling unit is used to input a first enable signal to the first input end of the charge pump unit according to the voltage at the output end of the charge pump unit when the charge pump circuit is in the capacitance sampling state; the resistor sampling unit is also connected to the sampling voltage input end of the comparator unit, and the resistor sampling unit is used to input a first enable signal to the first input end of the charge pump unit when the charge pump circuit is in the resistance sampling state. In the case of the capacitor sampling state, the sampling voltage is input to the sampling voltage input terminal of the comparator unit according to the voltage at the output terminal of the charge pump unit; the output terminal of the comparator unit is connected to the second input terminal of the charge pump unit, and is used to input a second enable signal to the second input terminal of the charge pump unit according to the sampling voltage and a preset reference voltage. When the charge pump circuit is selected to be in the capacitor sampling state, the voltage at the output terminal of the charge pump unit is sampled by the capacitor sampling unit and fed back to the input terminal of the charge pump unit, so as to control the start or stop of the charge pump. Because the capacitor sampling unit has a capacitor characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced.

[0039] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0041] Figure 1 It is a schematic diagram of a charge pump circuit provided by the prior art;

[0042] Figure 2is a schematic diagram of a charge pump circuit provided by an embodiment of the present invention;

[0043] Figure 3 is a schematic diagram of a capacitance sampling unit provided by an embodiment of the present invention;

[0044] Figure 4 It is a working timing diagram of the charge pump circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, are only part of the embodiments of the present invention, not all of the embodiments, and are not used to limit the present invention.

[0046] Reference Figure 2 , shows a charge pump circuit, which may specifically include:

[0047] A standby switch unit 10, a capacitance sampling unit 20, a resistance sampling unit 30, a comparator unit 40, and a charge pump unit 50;

[0048] The standby switch unit 10 is respectively connected to the output terminal VP of the charge pump unit 50, the input terminal of the resistance sampling unit 30, and the input terminal S1 of the capacitance sampling unit 20; the standby switch unit 10 is used to select the charge pump circuit to be in the resistance sampling state or the capacitance sampling state; the capacitance sampling unit 20 is also respectively connected to the output terminal VP of the charge pump unit and the first input terminal of the charge pump unit 50; the capacitance sampling unit 20 is used to, when the charge pump circuit is in the capacitance sampling state, supply a voltage to the charge pump unit according to the voltage of the output terminal VP of the charge pump unit. The first input terminal of the charge pump unit 50 inputs a first enable signal EN1; the resistance sampling unit 30 is also connected to the sampling voltage input terminal VFB of the comparator unit 40. The resistance sampling unit 30 is used to input a sampling voltage to the sampling voltage input terminal VFB of the comparator unit 40 according to the voltage of the output terminal VP of the charge pump unit when the charge pump circuit is in the resistance sampling state; the output terminal of the comparator unit 40 is connected to the second input terminal of the charge pump unit 50, and is used to input a second enable signal EN1 to the second input terminal of the charge pump unit according to the sampling voltage and a preset reference voltage.

[0049] In the embodiment of the present invention, when the charge pump circuit works normally, a resistance sampling unit and a comparator unit are used to form a feedback circuit, so as to control the voltage VP output by the charge pump; when the charge pump circuit enters the standby state, in the first stage, the standby switch unit still keeps selecting the resistance sampling unit for sampling, and when the sampling voltage collected by the resistance sampling unit is less than the preset reference voltage of the comparator unit, the comparator unit outputs EN as a high level, and charges the VP terminal once, and when the voltage at the VP terminal reaches the expected value, the sampling voltage is higher than the preset reference voltage, and EN flips to 0, and when the sampling voltage at the VP terminal is lower than the preset reference voltage again, EN flips to a high level again, and at this time, the charge pump circuit enters the second stage, in which the resistance sampling unit is turned off, the comparator unit is turned off, and the standby switch unit selects the capacitance sampling unit for sampling, and when the capacitance sampling unit decreases to the voltage threshold of the capacitance sampling unit according to the output terminal VP of the charge pump unit, the capacitance sampling voltage inputs the first enable signal EN1 to the charge pump unit as high, and the charge pump is started; because the capacitance sampling unit has a capacitance characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced.

[0050] As a preferred solution of the embodiment of the present invention, refer to Figure 2 , the standby switch unit 10 comprises: a first P-type field effect transistor MP1;

[0051] The source end of the first P-type field effect transistor is connected to the output end of the charge pump unit; the drain end of the first P-type field effect transistor is connected to the input end of the resistance sampling unit 30; and the gate end of the first P-type field effect transistor is connected to the input end of the capacitance sampling unit 20.

[0052] In a specific application, when the gate terminal of MP1 is at a low level, MP1 is turned on, sampling is selected through the resistance sampling unit, and the charge pump circuit is in a resistance sampling state; when the gate terminal of MP1 is at a high level, MP1 is turned off, sampling is selected through the capacitance sampling unit 20, and the charge pump circuit is in a capacitance sampling state.

[0053] As a preferred solution of the embodiment of the present invention, refer to Figure 3 , the capacitance sampling unit 20 comprises:

[0054] The second P-type field effect transistor MP2, the first N-type field effect transistor MN1, the second N-type field effect transistor MN2, the third N-type field effect transistor MN3, the fourth N-type field effect transistor MN4, the fifth N-type field effect transistor MN5, the sampling capacitor Cs, the first current source I1, the second current source I2, the third current source I3, the first inverter INV1, and the second inverter INV2.

[0055] The output terminal VP of the charge pump unit is respectively connected to one end of the sampling capacitor Cs and the input end of the first current source I1; the output end of the first current source I1 is connected to the source end of the second P-type field effect transistor MP2; one end of the sampling capacitor Cs is respectively connected to the drain end of the second P-type field effect transistor MP2, the drain end of the first N-type field effect transistor MN1, the gate end of the first N-type field effect transistor MN1, and the gate end of the second N-type field effect transistor MN2; the gate end of the second P-type field effect transistor MP2 and the input end of the first inverter INV1 are connected to the input end S1 of the capacitor sampling unit; the output end of the first inverter INV1 is connected to the gate end of the third N-type field effect transistor MN3; the source end of the first N-type field effect transistor MN1 is connected to the drain end of the third N-type field effect transistor MN3; the second current source The input end of I2, the input end of the third current source I3, and the gate end of the fourth N-type field effect transistor MN4 are respectively connected to the preset power supply VDD; the output end of the second current source I2 is respectively connected to the drain end of the second N-type field effect transistor MN2 and the gate end of the fifth N-type field effect transistor; the source end of the second N-type field effect transistor MN2 is connected to the drain end of the fourth N-type field effect transistor MN4; the output end of the third current source I3 is respectively connected to the drain end of the fifth N-type field effect transistor MN5 and the input end of the second inverter INV2; the output end of the second inverter INV2 is the output end of the charge pump unit 20, and outputs the first enable signal EN1; the source end of the third N-type field effect transistor INV3, the source end of the fourth N-type field effect transistor INV4, and the source end of the fifth N-type field effect transistor INV5 are respectively grounded.

[0056] In the embodiment of the present invention, the first current source I1 can provide a stable current for MP2, the second current source I2 can provide a stable current for MN2, and the third current source I3 can provide a stable current for MN5. By setting the first current source I1, the second current source I2, and the third current source I3, the capacitance sampling unit can operate stably.

[0057] Reference Figure 4 , the working principle of the charge pump circuit of the embodiment of the present invention is:

[0058] When either EN or EN1 is at a high level, the charge pump unit 50 works; when both EN and EN1 are at a low level, the charge pump unit 50 stops.

[0059] In the normal working stage of the charge pump circuit (step0), S1 is 0, MP1 is turned on, and the resistance sampling unit 30 is working; after the charge pump circuit enters the standby state, it first enters the first stage (step1), S1 is 0, MP1 is turned on, the resistance sampling unit 30 is working, and MP2 is turned on, the voltage V1 at the connection between the sampling capacitor Cs and the drain terminal of MP2 is maintained at the threshold voltage Vth of MP2, and does not change with VP. Then the charge pump circuit enters the second stage (step2), S1 is 1, MP1 is turned off, the resistance sampling unit 30 and the comparator unit 40 are turned off, the voltage across Cs remains unchanged, and V1 changes synchronously with VP. First, the charge pump unit 50 charges VP, EN1 is 0, when VP drops to a certain value, V1 is lower than Vth, MN2 is turned off, MN5 is turned on, the voltage at the drain terminal of MN5 is pulled down, EN1 becomes 1, and the charge pump unit 50 starts again, and this cycle is repeated to realize the control of the charge pump unit through the feedback circuit composed of the capacitor sampling unit 30 and the charge pump. Furthermore, since there is no impedance load in the capacitance sampling unit 30 , no power consumption is caused.

[0060] As a preferred solution of the embodiment of the present invention, refer to Figure 2 , the charge pump circuit further includes: a counter unit 60;

[0061] The counter unit 60 is connected to the output end of the capacitance sampling unit 20, the input end S1 of the capacitance sampling unit 20, and the comparator unit 40 respectively; the counter unit 60 is used to output a restart signal to the standby switch unit 10 after the flipping of the first enable signal EN1 reaches a preset number of times, so that the standby switch unit 10 selects the charge pump circuit to enter the resistance sampling state.

[0062] In the embodiment of the present invention, Figure 2 As shown, S1 and S2 are output signals of the counter unit 60. When S2 is at a high level, the comparator unit 40 works, and when S2 is at a low level, the comparator unit 40 is turned off.

[0063] In a specific application, EN1 serves as the counting clock of the counter unit 60. Each time EN1 flips, the counter unit 60 counts once. When the number of counts reaches a preset number, the charge pump circuit enters step 1 again, enters the resistance sampling state, the comparator unit 40 is turned on, and Cs is resampled to avoid the voltage deviation at both ends of Cs due to its own leakage, which makes it impossible to accurately sample. It can be understood that the preset number can be actually set according to the leakage situation of Cs, and the embodiment of the present invention does not make specific limitations on this.

[0064] Reference Figure 4, through S1 and S2 output by the counter unit 60, the charge pump circuit performs step1-step2-step1-step2, and repeats the cycle until it enters step0 again. The power consumption of the charge pump circuit in standby mode can be considered to be only the power consumption in the step 1 stage. Taking the preset number of times as N as an example, the power consumption of the charge pump circuit in standby mode is the quotient of Ifb / (N+1) and the current efficiency A of the charge pump unit 50, which is reduced to 1 / (N+1) of the standby power consumption of the prior art. It can be understood that in actual applications, considering that the leakage current Ileak may still be turned off in the load in the standby state, the power consumption of the charge pump circuit in the embodiment of the present invention can be (Ifb / (N+1)+Ileak) / A.

[0065] In a specific application, the resistance sampling unit 30 includes: a first resistor 31 and a second resistor 32; one end of the first resistor 31 is connected to the standby switch unit 10; the other end of the first resistor 31 is connected to one end of the second resistor 32; one end of the second resistor 32 is grounded. The charge pump circuit also includes: a resistive load 70 and a capacitive load 80; one end of the resistive load 70 and one end of the capacitive load 80 are respectively connected to the output end of the charge pump unit; one end of the resistive load 70 and one end of the capacitive load 80 are respectively grounded.

[0066] In the embodiment of the present invention, a first resistor and a second resistor connected in series are used as a resistor sampling unit 30, and the sampling voltage can be VP multiplied by the resistance of the first resistor and then divided by the sum of the resistance values ​​of the first resistor and the second resistor; the charge pump unit 50 can provide an operating voltage for the resistive load 70 and the capacitive load 80.

[0067] An embodiment of the present invention further provides a non-volatile memory, comprising any one of the above charge pump circuits.

[0068] In summary, in the embodiment of the present invention, the charge pump circuit is additionally provided with a capacitor sampling unit and a standby switch unit. The standby switch unit can select the charge pump circuit to be in a resistance sampling state or a capacitance sampling state. When the charge pump circuit is selected to be in the capacitance sampling state, the voltage at the output end of the charge pump unit is sampled by the capacitor sampling unit and fed back to the input end of the charge pump unit, so as to control the start or stop of the charge pump. Because the capacitor sampling unit has a capacitor characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced. Specifically, the standby switch unit is respectively connected to the output end of the charge pump unit, the input end of the resistor sampling unit, and the input end of the capacitor sampling unit; the standby switch unit is used to select the charge pump circuit to be in the resistance sampling state or the capacitance sampling state; the capacitor sampling unit is also respectively connected to the output end of the charge pump unit and the first input end of the charge pump unit; the capacitor sampling unit is used to input a first enable signal to the first input end of the charge pump unit according to the voltage at the output end of the charge pump unit when the charge pump circuit is in the capacitance sampling state; the resistor sampling unit is also connected to the sampling voltage input end of the comparator unit, and the resistor sampling unit is used to input a first enable signal to the first input end of the charge pump unit when the charge pump circuit is in the resistance sampling state. In the case of the capacitor sampling state, the sampling voltage is input to the sampling voltage input terminal of the comparator unit according to the voltage at the output terminal of the charge pump unit; the output terminal of the comparator unit is connected to the second input terminal of the charge pump unit, and is used to input a second enable signal to the second input terminal of the charge pump unit according to the sampling voltage and a preset reference voltage. When the charge pump circuit is selected to be in the capacitor sampling state, the voltage at the output terminal of the charge pump unit is sampled by the capacitor sampling unit and fed back to the input terminal of the charge pump unit, so as to control the start or stop of the charge pump. Because the capacitor sampling unit has a capacitor characteristic, no sampling current is generated in the sampling feedback, so the power consumption of the charge pump circuit can be greatly reduced.

[0069] It should be noted that, for the sake of simplicity, each embodiment is described as a series of circuit combinations, but those skilled in the art should know that the embodiments of the present invention are not limited to the description. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the circuit connections involved are not necessarily required for the embodiments of the present invention.

[0070] The present invention is shown and described in detail above through the accompanying drawings and preferred embodiments. However, the present invention is not limited to these disclosed embodiments, and other solutions derived therefrom by those skilled in the art are also within the protection scope of the present invention.

[0071] It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention, and these improvements and modifications should also be regarded as within the scope of protection of the present invention.

[0072] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0073] The charge pump circuit and non-volatile memory provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A charge pump circuit, characterized in that: The charge pump circuit comprises: Standby switch unit, capacitance sampling unit, resistance sampling unit, comparator unit, charge pump unit; The standby switch unit is connected to the output end of the charge pump unit, the input end of the resistance sampling unit, and the input end of the capacitance sampling unit respectively; the standby switch unit is used to select the charge pump circuit to be in the resistance sampling state or the capacitance sampling state; The capacitance sampling unit is also connected to the output end of the charge pump unit and the first input end of the charge pump unit respectively; the capacitance sampling unit is used to input a first enable signal to the first input end of the charge pump unit according to the voltage of the output end of the charge pump unit when the charge pump circuit is in the capacitance sampling state; The resistance sampling unit is also connected to the sampling voltage input terminal of the comparator unit, and the resistance sampling unit is used to input a sampling voltage to the sampling voltage input terminal of the comparator unit according to the voltage at the output terminal of the charge pump unit when the charge pump circuit is in the resistance sampling state; The output end of the comparator unit is connected to the second input end of the charge pump unit, and is used to input a second enable signal to the second input end of the charge pump unit according to the sampling voltage and a preset reference voltage.

2. The charge pump circuit according to claim 1, characterized in that: The standby switch unit includes: a first P-type field effect transistor; The source end of the first P-type field effect transistor is connected to the output end of the charge pump unit; The drain terminal of the first P-type field effect transistor is connected to the input terminal of the resistance sampling unit; The gate terminal of the first P-type field effect transistor is connected to the input terminal of the capacitance sampling unit.

3. The charge pump circuit according to claim 2, characterized in that: The capacitance sampling unit comprises: A second P-type field effect transistor, a first N-type field effect transistor, a second N-type field effect transistor, a third N-type field effect transistor, a fourth N-type field effect transistor, a fifth N-type field effect transistor, a sampling capacitor, a first current source, a second current source, a third current source, a first inverter, and a second inverter; The output end of the charge pump unit is connected to one end of the sampling capacitor and the input end of the first current source respectively; The output end of the first current source is connected to the source end of the second P-type field effect transistor; One end of the sampling capacitor is respectively connected to the drain end of the second P-type field effect transistor, the drain end of the first N-type field effect transistor, the gate end of the first N-type field effect transistor, and the gate end of the second N-type field effect transistor; The gate terminal of the second P-type field effect transistor, the input terminal of the first inverter and the input terminal of the capacitance sampling unit are connected; The output end of the first inverter is connected to the gate end of the third N-type field effect transistor; The source end of the first N-type field effect transistor is connected to the drain end of the third N-type field effect transistor; The input end of the second current source, the input end of the third current source, and the gate end of the fourth N-type field effect transistor are respectively connected to a preset power supply; The output end of the second current source is connected to the drain end of the second N-type field effect transistor and the gate end of the fifth N-type field effect transistor respectively; The source terminal of the second N-type field effect transistor is connected to the drain terminal of the fourth N-type field effect transistor; The output end of the third current source is connected to the drain end of the fifth N-type field effect transistor and the input end of the second inverter respectively; the output end of the second inverter is the output end of the charge pump unit; A source end of the third N-type field effect transistor, a source end of the fourth N-type field effect transistor, and a source end of the fifth N-type field effect transistor are grounded respectively.

4. The charge pump circuit according to any one of claims 1 to 3, characterized in that: The charge pump circuit further includes: a counter unit; The counter unit is connected to the output end of the capacitance sampling unit, the input end of the capacitance sampling unit, and the comparator unit respectively; the counter unit is used to output a restart signal to the standby switch unit after the flipping of the first enable signal reaches a preset number of times, so that the standby switch unit selects the charge pump circuit to enter the resistance sampling state.

5. The charge pump circuit according to claim 4, characterized in that: The resistance sampling unit comprises: a first resistor and a second resistor; One end of the first resistor is connected to the standby switch unit; The other end of the first resistor is connected to one end of the second resistor; One end of the second resistor is grounded.

6. The charge pump circuit according to claim 1, characterized in that: The charge pump circuit also includes: a capacitive load and a resistive load; One end of the capacitive load and one end of the resistive load are respectively connected to the output end of the charge pump unit; One end of the capacitive load and one end of the resistive load are grounded respectively.

7. A non-volatile memory, characterized in that: The charge pump circuit comprises the charge pump circuit according to any one of claims 1 to 6.

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