Deep UV LEDs

Abstract

A deep ultraviolet light emitting diode is provided. The deep ultraviolet light emitting diode of one embodiment comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; an n-ohm contact layer in contact with the n-type semiconductor layer; a p-ohm contact layer in contact with the p-type semiconductor layer; an n-bump electrically connected to the n-ohm contact layer; and a p-bump electrically connected to the p-ohm contact layer, the table comprising a plurality of vias exposing a first conductive type semiconductor layer, the table having a rectangular shape long in a length direction, the vias being arranged parallel to each other in a direction perpendicular to the length direction of the table, and the n-ohm contact layer being respectively formed on the first conductive type semiconductor layer exposed around the table and the first conductive type semiconductor layer exposed to the vias.

Description

Technical Field

[0001] The present invention relates to an inorganic semiconductor light emitting diode, and in particular to a light emitting diode which emits deep ultraviolet light below 300nm. Background Art

[0002] Generally, light emitting diodes that emit ultraviolet light in the range of 200nm to 300nm can be used for various purposes including sterilization devices, water or air purification devices, high-density optical recording devices, and excitation sources for bioaerosol fluorescence detection systems.

[0003] Unlike near-ultraviolet or blue light-emitting diodes, light-emitting diodes that emit deep ultraviolet light include a well layer containing Al, such as AlGaN. Due to the composition of this gallium nitride-based semiconductor layer, deep ultraviolet light-emitting diodes have a structure that is quite different from that of blue light-emitting diodes or near-ultraviolet light-emitting diodes.

[0004] In particular, the deep ultraviolet light-emitting diode of the prior art has a structure in which the shape and position of the mesa arranged on the n-type semiconductor layer are different from those of the ordinary cyan light-emitting diode or the near ultraviolet light-emitting diode. That is, the mesa is formed to be inclined toward one side from the center of the n-type semiconductor layer, the p-bump is arranged on the mesa, and the n-bump is formed to be separated from the mesa near the other side opposite to the above-mentioned one side.

[0005] Such conventional ultraviolet light-emitting diodes generally have the disadvantages of low light output and high forward voltage. In particular, the p-type semiconductor layer includes a p-type GaN layer for ohmic contact, so ultraviolet rays incident on the p-type semiconductor layer are absorbed and lost in the p-type semiconductor layer. In addition, the n-ohmic contact layer joined to the n-type semiconductor layer also absorbs light, so the light traveling toward the n-ohmic contact layer is absorbed and lost in the n-ohmic contact layer.

[0006] Furthermore, it is difficult for conventional ultraviolet light-emitting diodes to fully utilize the light emitted from the side of the mesa, so there is a tendency to reduce the side of the mesa as much as possible. That is, the width of the mesa is formed relatively wide. However, the larger the width of the mesa, the longer the distance from the n-ohmic contact layer to the central area of ​​the mesa, which is not conducive to current dispersion, so the forward voltage becomes higher. Summary of the invention

[0007] The problem to be solved by the present invention is to provide a deep ultraviolet light emitting diode with a new structure capable of improving electrical characteristics and / or light output.

[0008] Another problem to be solved by the present invention is to provide a deep ultraviolet light emitting diode capable of improving current spreading performance.

[0009] A deep ultraviolet light-emitting diode according to an embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; an n-ohmic contact layer in contact with the n-type semiconductor layer; a p-ohmic contact layer in contact with the p-type semiconductor layer; an n-bump electrically connected to the n-ohmic contact layer; and a p-bump electrically connected to the p-ohmic contact layer, the table comprising a plurality of vias exposing a first conductive semiconductor layer, the table having a rectangular shape long in a length direction, the vias being arranged parallel to each other in a direction perpendicular to the length direction of the table, the n-ohmic contact layer being respectively formed on the first conductive semiconductor layer exposed around the table and the first conductive semiconductor layer exposed to the vias.

[0010] A deep ultraviolet light-emitting diode according to another embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; an n-ohmic contact layer in contact with the n-type semiconductor layer; and a p-ohmic contact layer in contact with the p-type semiconductor layer, the table comprising a plurality of vias exposing a first conductive semiconductor layer, the table having a rectangular shape that is long along a length direction, the table having a mirror-symmetrical structure with respect to a plane passing through a center of the table along a length direction of the table, and having a mirror-symmetrical structure with respect to a plane passing through a center of the table along a direction perpendicular to the length direction of the table.

[0011] A deep ultraviolet light-emitting diode according to another embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer, a p-type semiconductor layer and a plurality of vias exposing the n-type semiconductor layer; an n-ohmic contact layer respectively contacting the n-type semiconductor layer exposed around the table and the n-type semiconductor layer exposed to the plurality of vias; a first reflective layer covering the top surface and side surfaces of the n-ohmic contact layer; a second reflective layer connected to the first reflective layer; an n-bump connected to the second reflective layer; and a p-bump electrically connected to the p-type semiconductor layer, wherein the n-ohmic contact layer, the first reflective layer and the second reflective layer comprise an Al layer.

[0012] According to an embodiment of the present invention, a deep ultraviolet light-emitting diode can be provided, which can ensure a wide light-emitting area by having a table with multiple vias parallel to each other in a direction perpendicular to the length direction of the table, and can evenly disperse current in the table by adopting a table with a symmetrical structure.

[0013] The advantages and features of the present invention will become apparent through careful discussion or detailed description in the detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 FIG. 1 is a top view of a deep ultraviolet light emitting diode for explaining an embodiment of the present invention.

[0015] Figure 2 is along Figure 1 A cross-sectional view taken along the cutting line AA.

[0016] Figure 3 It is a schematic top view of a table for explaining one embodiment of the present invention.

[0017] Figure 4 The figure is a schematic cross-sectional view for explaining a deep ultraviolet light emitting diode mounted on a substrate according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. The embodiments described below are provided as examples so that the concept of the present invention can be fully conveyed to the general technicians in the technical field to which the present invention belongs. Therefore, the present invention is not limited to the embodiments described below, and may also be embodied in other ways. Moreover, in the accompanying drawings, the width, length, thickness, etc. of the constituent elements may also be exaggerated for the sake of convenience. In addition, when it is recorded that a constituent element is "above" or "on" other constituent elements, it not only includes the situation that each part is "directly above" other parts or "directly on" other parts, but also includes the situation that other constituent elements are interposed between each constituent element and other constituent elements. Throughout the entire specification, the same reference numerals represent the same constituent elements.

[0019] The nitride-based semiconductor layer described below can be grown using various commonly known methods, for example, it can be grown using MOCVD (Metal Organic Chemical Vapor Depositi on), MBE (Molecular Beam Epitaxy) or HVPE (Hydride Vapor Phase Epitaxy) and other techniques. However, in the embodiments described below, the semiconductor layer is grown in a growth chamber using MOCVD. During the growth of the nitride-based semiconductor layer, the source flowing into the growth chamber can use commonly known sources, for example, the Ga source can use TMGa, TEGa, etc., the Al source can use TMAl, TEAl, etc., the In source can use TMIn, TEIn, etc., and the N source can use NH3. However, the present invention is not limited to this.

[0020] An ultraviolet light emitting diode according to an embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; an n-ohmic contact layer in contact with the n-type semiconductor layer; a p-ohmic contact layer in contact with the p-type semiconductor layer; an n-bump electrically connected to the n-ohmic contact layer; and a p-bump electrically connected to the p-ohmic contact layer, the table comprising a plurality of vias exposing a first conductive type semiconductor layer, the table having a rectangular shape long in a length direction, the vias being arranged parallel to each other in a direction perpendicular to the length direction of the table, and the n-ohmic contact layer being respectively formed on the first conductive type semiconductor layer exposed around the table and the first conductive type semiconductor layer exposed to the vias.

[0021] A plurality of vias are formed inside the mesa, thereby preventing a non-luminous area from being formed inside the mesa. In the past, when the width of the mesa was wide, the distance from the n-ohm contact layer to the inside of the mesa became larger, forming a non-luminous area. In contrast, in the present application, a plurality of vias are arranged inside the mesa, and an n-ohm contact layer is formed inside the vias, thereby making it possible to evenly disperse the current inside the mesa.

[0022] On the other hand, the plurality of via holes may be spaced apart from each other at the same interval. Such intervals may be adjusted so that no non-light emitting region is formed inside the mesas between the via holes.

[0023] Furthermore, the table may have a mirror-symmetric structure with respect to a plane passing through the center of the table along the length direction of the table, and a mirror-symmetric structure with respect to a plane passing through the center of the table along a direction perpendicular to the length direction of the table.

[0024] The mesa has a symmetrical structure as described above, so that current concentration can be prevented at a specific position of the mesa.

[0025] On the other hand, the spacing between the vias may be the same as or greater than the spacing between one end of the via and one edge of the mesa. In addition, the spacing between the short side edge of the mesa and the vias may be the same as or greater than the spacing between the vias.

[0026] The n-ohmic contact layer disposed on the first conductive type semiconductor layer exposed around the mesa may surround the mesa, thereby evenly dispersing the current across the entire area of ​​the mesa.

[0027] On the other hand, the deep ultraviolet light emitting diode may further include an n coupling layer and a p coupling layer covering the n ohmic contact layer and the p ohmic contact layer respectively, and the n coupling layer and the p coupling layer cover the top surface and the side surface of the ohmic contact layer.

[0028] It may be that the deep ultraviolet light emitting diode includes: a lower insulating layer, covering the table, the n-ohmic contact layer and the p-ohmic contact layer, and having an opening portion above the n-ohmic contact layer and the p-ohmic contact layer; an n-pad metal layer and a p-pad metal layer, arranged on the lower insulating layer, and electrically connected to the n-ohmic contact layer and the p-ohmic contact layer respectively through the opening portion of the lower insulating layer; and an upper insulating layer, covering the n-pad metal layer and the p-pad metal layer, the n-bump and the p-bump are arranged on the upper insulating layer, and electrically connected to the n-pad metal layer and the p-pad metal layer through the opening portion of the upper insulating layer.

[0029] Furthermore, the n-pad metal layer may include a reflective metal layer, such as an Al layer.

[0030] In addition, the n-pad metal layer may reflect the light emitted through the side surface of the mesa, thereby reducing the light lost through the side surface of the mesa and improving the light efficiency of the deep ultraviolet light emitting diode.

[0031] The deep ultraviolet light emitting diode may further include an n coupling layer and a p coupling layer covering the n ohmic contact layer and the p ohmic contact layer respectively, and the n pad metal layer is connected to the n coupling layer and electrically connected to the n ohmic contact layer.

[0032] Furthermore, the n-coupling layer may include a reflective metal layer, such as an Al layer. Thus, the n-coupling layer can reflect light emitted from the n-type semiconductor layer, thereby improving the light efficiency of the deep ultraviolet light emitting diode.

[0033] In one embodiment, the n pad metal layer may surround the p pad metal layer. However, the present invention is not necessarily limited thereto.

[0034] A deep ultraviolet light-emitting diode according to another embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a table arranged on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; an n-ohmic contact layer in contact with the n-type semiconductor layer; and a p-ohmic contact layer in contact with the p-type semiconductor layer, the table comprising a plurality of vias exposing a first conductive semiconductor layer, the table having a rectangular shape that is long along a length direction, the table having a mirror-symmetrical structure with respect to a plane passing through a center of the table along a length direction of the table, and having a mirror-symmetrical structure with respect to a plane passing through a center of the table along a direction perpendicular to the length direction of the table.

[0035] The table has a symmetrical structure, so that current concentration can be prevented through a specific position of the table, and a deep ultraviolet light emitting diode capable of uniformly dispersing current inside the table can be provided.

[0036] The vias may be long in a direction perpendicular to the length direction of the mesa and arranged in parallel with each other. The vias are formed in a long shape so that current can be evenly dispersed not only in the area between the vias but also in the area between the vias and the edge of the mesa.

[0037] On the other hand, the n-ohm contact layer may include an n-ohm contact layer surrounding the mesa and an n-ohm contact layer disposed in the via hole.

[0038] On the other hand, the deep ultraviolet light emitting diode may further include: an n pad metal layer electrically connected to the n ohmic contact layer; and a p pad metal layer electrically connected to the p ohmic contact layer, wherein the n pad metal layer surrounds the p pad metal layer.

[0039] The n-pad metal layer and the p-pad metal layer may be formed in the same process and located at the same level.

[0040] It may be that the deep ultraviolet light emitting diode also includes a lower insulating layer covering the mesas, the n-ohmic contact layer and the p-ohmic contact layer, the n-pad metal layer and the p-pad metal layer are arranged on the lower insulating layer, and are electrically connected to the n-ohmic contact layer and the p-ohmic contact layer respectively through openings formed in the lower insulating layer.

[0041] Furthermore, the deep ultraviolet light emitting diode may further include: an upper insulating layer covering the n pad metal layer and the p pad metal layer; and an n bump and a p bump arranged on the upper insulating layer, the n bump being electrically connected to the n pad metal layer, and the p bump being electrically connected to the p pad metal layer.

[0042] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0043] Figure 1 is a schematic top view of a deep ultraviolet light emitting diode for illustrating an embodiment of the present invention. Figure 2 is along Figure 1 On the other hand, Figure 3 It is a schematic top view of a table for explaining one embodiment of the present invention.

[0044] Reference Figure 1 , Figure 2 and Figure 3The ultraviolet light emitting diode of this embodiment may include a substrate 121, an n-type semiconductor layer 123, an active layer 125, a p-type semiconductor layer 127, an n-ohmic contact layer 129a, a p-ohmic contact layer 129b, an n-coupling layer 131a, a p-coupling layer 131b, a lower insulating layer 132, an n-pad metal layer 133a, a p-pad metal layer 133b, an upper insulating layer 135, an n-bump 137a, a p-bump 137b, and an anti-reflection layer 139.

[0045] The substrate 121 is not limited as long as it can grow nitride-based semiconductors, and can include, for example, heterogeneous substrates such as sapphire substrates, silicon substrates, silicon carbide substrates, or spinel substrates, or homogeneous substrates such as gallium nitride substrates and aluminum nitride substrates.

[0046] The n-type semiconductor layer 123 is located on the substrate 121. The n-type semiconductor layer 123 may include, for example, an AlN buffer layer (about 3.79um) and an n-type AlGaN layer. The n-type AlGaN may include a lower n-type AlGaN layer (about 2.15um) with an Al molar ratio of more than 0.8, an intermediate AlGaN layer (1.7nm) with an Al molar ratio of 0.7 to 0.8, and an upper n-type AlGaN with a thickness of about 66.5nm. The n-type semiconductor layer 123 is formed of a nitride-based semiconductor having a higher band gap than the active layer so that light generated in the active layer can pass through. When the gallium nitride-based semiconductor layer is grown on the sapphire substrate 121, the n-type semiconductor layer 123 may generally include multiple layers in order to improve the crystal quality.

[0047] The mesa M is arranged on a part of the n-type semiconductor layer 123. The mesa M includes an active layer 125 and a p-type semiconductor layer 127. Generally, after the n-type semiconductor layer 123, the active layer 125 and the p-type semiconductor layer 127 are grown in sequence, the p-type semiconductor layer 127 and the active layer 125 are patterned by a mesa etching process, thereby forming the mesa M.

[0048] The active layer 125 may be a single quantum well structure or a multiple quantum well structure including a well layer and a barrier layer. The well layer may be formed of AlGaN or AlInGaN, and the barrier layer may be formed of AlGaN or AlInGaN having a wider band gap than the well layer. For example, each well layer may be formed of AlGaN having an Al mole ratio of about 0.5 and a thickness of about 3.1 nm, and each barrier layer may be formed of AlGaN having an Al mole ratio of more than 0.7 and a thickness of more than about 9 nm. In particular, the first barrier layer may be formed thicker than other barrier layers with a thickness of more than 12 nm. On the other hand, the AlGaN layers connected to the upper and lower well layers and having an Al mole ratio of 0.7 to 0.8 may be arranged with a thickness of about 1 nm respectively. However, considering the connection with the electron blocking layer, the Al mole ratio of the AlGaN layer connected to the last well layer may be more than 0.8.

[0049] On the other hand, the p-type semiconductor layer 127 may include an electron blocking layer and a p-type GaN contact layer. The electron blocking layer prevents electrons from overflowing from the active layer to the p-type semiconductor layer and increases the recombination rate of electrons and holes. The electron blocking layer may be formed of, for example, p-type AlGaN having an Al molar ratio of about 0.8 and may be formed with a thickness of, for example, 55 nm. On the other hand, the p-type GaN contact layer may be formed with a thickness of about 300 nm.

[0050] like Figure 3 As shown, the mesa M may have a rectangular shape that is long in one direction and include a plurality of vias 127a that expose the n-type semiconductor layer 123. The vias 127a may each have a long shape and may be arranged in a direction perpendicular to the length direction of the mesa M. The vias 127a may be spaced apart from each other and arranged in parallel, and further, the vias 127a may be spaced apart from each other at the same interval s1. On the other hand, the spacing s2 between one end of the via 127a in the length direction and the edge of the mesa M adjacent thereto may be the same as or less than the spacing s1 between the vias 127a. In addition, the spacing s3 between the short edge of the mesa M and the via 127a adjacent thereto is the same as or greater than the spacing s1 between the vias 127a.

[0051] Furthermore, the mesa M may have a mirror-symmetric structure for a surface that crosses the center of the mesa along the length direction of the mesa, and also has a mirror-symmetric structure for a surface that crosses the center of the mesa along a direction perpendicular to the length direction of the mesa. With this shape, the current can be evenly dispersed in the mesa M.

[0052] Refer again Figure 1 and Figure 2, an n-ohm contact layer 129a is arranged on the n-type semiconductor layer 123 exposed around the mesa M and the via 127a. The n-ohm contact layer 129a can be formed by alloying the metal layers by evaporating multiple metal layers through a rapid thermal alloy (RTA) process. For example, the n-ohm contact layer 129a can be alloyed by evaporating Cr / Ti / Al / Ti / Au in sequence. Therefore, the n-ohm contact layer 129a forms an alloy layer containing Cr, Ti, Al, and Au.

[0053] The n-ohm contact layer 129a surrounds the mesa M along the edge of the mesa M. In addition, the n-ohm contact layer 129a is arranged in the via hole 127a. The width w1 of the n-ohm contact layer 129a surrounding the mesa M along the edge of the mesa M may be smaller than the width w2 of the n-ohm contact layer 129a arranged in the via hole 127a. The width w2 of the n-ohm contact layer 129a arranged in the via hole 127a is made larger than the width w1 of the n-ohm contact layer around the mesa, so that current can be easily supplied to the inside of the mesa M. The width w1 may be, for example, in the range of 5um to 30um, and the width w2 may be in the range of 10um to 40um.

[0054] The n-ohmic contact layer 129a is spaced apart from the mesa M. Therefore, a region without the n-ohmic contact layer 129a is formed between the mesa M and the n-ohmic contact layer 129a. The spaced apart distance between the n-ohmic contact layer 129a and the mesa M may be constant along the edge of the mesa M, but is not necessarily limited thereto.

[0055] After forming the n-ohmic contact layer 129a, a p-ohmic contact layer 129b is formed on the mesa M. The p-ohmic contact layer 129b can be formed by, for example, evaporating nickel / gold and then using an RTA process. The p-ohmic contact layer 129b is in ohmic contact with the p-type semiconductor layer 127, covering most of the area above the mesa M, for example, more than 80%.

[0056] On the other hand, an n-coupling layer 131a and a p-coupling layer 131b may be formed on the n-ohmic contact layer 129a and the p-ohmic contact layer 129b, respectively. The n-coupling layer 131a and the p-coupling layer 131b may cover the top surface and the side surface of the n-ohmic contact layer 129a and the p-ohmic contact layer 129b. These coupling layers 131a and 131b may include a reflective metal layer, such as an Al layer, and may be specifically formed of Cr / Al / Ti / Ni / Ti / Ni / Ti / Ni / Au / Ti. In particular, the n-coupling layer 131a has a larger width than the n-ohmic contact layer 129a, and therefore, can function as an emission layer (first reflective layer) that reflects light emitted through the n-type semiconductor layer 123. Furthermore, the n-coupling layer 131a may have a height lower than the mesa M, and therefore, the top surface of the n-coupling layer 131a may be located at a position lower than the top surface of the mesa M.

[0057] The lower insulating layer 132 covers the mesa M and covers the n-coupling layer 131a and the p-coupling layer 131b. The lower insulating layer 132 also covers the n-type semiconductor layer 123 around the mesa M and exposed in the via 127a. On the other hand, the lower insulating layer 132 has an opening 132a for allowing electrical contact with the n-ohmic contact layer 129a and an opening 132b for allowing electrical contact with the p-ohmic contact layer 129b. The openings 132a and 132b that expose the coupling layers 131a and 131b can be formed by etching the lower insulating layer 132. At this time, the Ti layer on the top surface of the exposed coupling layers 131a and 131b can be removed by an etching process.

[0058] The lower insulating layer 132 may be formed of, for example, SiO 2 , but is not limited thereto, and may be formed of a distributed Bragg reflector.

[0059] On the other hand, the n pad metal layer 133a and the p pad metal layer 133b are arranged on the lower insulating layer 132. The n pad metal layer 133a and the p pad metal layer 133b can be formed together with the same metal layer under the same process and arranged at the same level, that is, on the lower insulating layer 132. In order to have a high reflectivity, the n pad metal layer 133a and the p pad metal layer 133b can include a reflective metal layer, such as an Al layer. For example, the pad metal layer 133a and the p pad metal layer 133b can be formed with the same layer structure as the coupling layers 131a and 131b.

[0060] The n pad metal layer 133a is electrically in contact with the n ohmic contact layer 129a through the opening 132a of the lower insulating layer 132. The n ohmic contact layers 129a are electrically connected to each other through the n pad metal layer 133a. The n pad metal layer 133a may extend from the n ohmic contact layer 129a below the mesa M to above the mesa M.

[0061] On the other hand, the p pad metal layers 133b may be electrically connected to the p ohmic contact layers 129b through the openings 132b of the lower insulating layer 132. The p pad metal layers 133b may be separated from each other and surrounded by the n pad metal layers 133a, respectively.

[0062] The n-pad metal layer 133a can function as a reflective layer (second reflective layer) that reflects light emitted through the side surface of the mesa M, thereby improving the light efficiency of the light-emitting diode. In addition, the n-coupling layer 131a and the n-pad metal layer 133a can reflect light emitted from the n-type semiconductor layer 123 exposed in the region between the mesa M and the n-ohmic contact layer 129a.

[0063] The upper insulating layer 135 covers the n-pad metal layer 133a and the p-pad metal layer 133b. However, the upper insulating layer 135 has an opening 135a that exposes the n-pad metal layer 133a and an opening 135b that exposes the p-pad metal layer 133b above the mesa M. The opening 135a can be formed to have a shape that is long along the via 127a. As shown in the figure, the opening 135a can be arranged on the upper side relative to a line passing through the center of the mesa along the short axis direction of the mesa M. On the other hand, the opening 135b can be arranged on the lower side relative to a line passing through the center of the mesa along the short axis direction of the mesa M. The upper insulating layer 135 can be formed, for example, with silicon nitride or silicon oxide.

[0064] The n-bump 137a and the p-bump 137b are located on the upper insulating layer 135. The n-bump 137a covers the opening 135a and is connected to the n-pad metal layer 133a through the opening 135a. The n-bump 137a is electrically contacted to the n-type semiconductor layer 123 through the n-pad metal layer 133a and the n-ohmic contact layer 129a. The outer edges of the n-bump 137a and the p-bump 137b may be located on the n-ohmic contact layer 129a surrounding the mesa M.

[0065] The p-bump 137b covers the opening 135b and is connected to the p-pad metal layer 133b through the opening 135b. The p-bump 137b is electrically connected to the p-type semiconductor layer 127 through the p-pad metal layer 133b and the p-ohmic contact layer 129b. The p-pad metal layers 133b can be electrically connected to each other through the p-bump 137b.

[0066] The n-bump 137a and the p-bump 137b may be formed of, for example, Ti / Au / Cr / Au. Figure 1As shown, the n-bump 137a and the p-bump 137b can be arranged along the length direction of the mesa M. The n-bump 137a and the p-bump 137b can be spaced about 90um apart. By narrowing the spacing between the n-bump 137a and the p-bump 137b, the area of ​​the n-bump 137a and the p-bump 137b can be relatively wide. As a result, the heat generated in the light-emitting diode can be easily discharged, thereby improving the performance of the light-emitting diode.

[0067] Furthermore, the openings 135a and 135b are shielded by the n-bumps 137a and the p-bumps 137b, so that moisture or solder can be prevented from penetrating from the outside through the openings 135a and 135b, thereby improving reliability.

[0068] On the other hand, Figure 2 As shown, the top surfaces of the n-bump 137a and the p-bump 137b may be uneven due to the height difference between the mesa M and the n-pad metal layer 133a.

[0069] The anti-reflection layer 139 is arranged on the light emitting surface side of the substrate 121. The anti-reflection layer 139 can be formed of a transparent insulating layer such as SiO2 with a thickness of, for example, an integral multiple of 1 / 4 of the wavelength of ultraviolet rays. Alternatively, the anti-reflection layer 139 can also be formed of a bandpass filter in which layers having different refractive indices are repeatedly stacked.

[0070] Figure 4 The figure is a schematic cross-sectional view for explaining a deep ultraviolet light emitting diode mounted on a substrate according to an embodiment of the present invention.

[0071] Reference Figure 4 The deep ultraviolet light emitting diode is flip-chip bonded on a base substrate 200. The base substrate 200 may have electrode pads 201a and 201b on an insulating substrate such as AlN.

[0072] The n-bump 137a and the p-bump 137b can be soldered to the electrode pads 201a and 201b of the base substrate 200 by solder paste 203a and 203b. However, the present invention is not limited thereto, and the deep ultraviolet light emitting diode can also be soldered to the base substrate 200 by using a thermosonic bonding technique or using AuSN soldering.

[0073] The embodiments described above can be variously modified and altered without departing from the technical concept of the claims of the present invention, and all of the technical concepts of the claims are included in the present invention.

Claims

1. A deep ultraviolet light emitting diode, comprising: substrate; An n-type semiconductor layer is located on the substrate; A mesa, arranged on the n-type semiconductor layer, and comprising an active layer and a p-type semiconductor layer; n ohmic contact layer, contacting the n-type semiconductor layer; A p-ohmic contact layer, contacting the p-type semiconductor layer; n bumps, electrically connected to the n ohmic contact layers; as well as A p-bump is electrically connected to the p-ohmic contact layer. The mesa includes a plurality of via holes exposing the first conductive type semiconductor layer, The mesa has a rectangular shape in which the length of the side along a first direction is longer than the length of the side along a second direction perpendicular to the first direction, The plurality of vias are arranged parallel to each other along the first direction, The n-bumps and the p-bumps are arranged along the first direction, The n-ohmic contact layer is formed on the first conductive type semiconductor layer exposed at the periphery of the mesa and the first conductive type semiconductor layer exposed at the via hole, respectively.

2. The deep ultraviolet light emitting diode according to claim 1, wherein: The plurality of via holes are spaced apart from each other at the same interval.

3. The deep ultraviolet light emitting diode according to claim 2, wherein: The mesa has a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the first direction, and has a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the second direction.

4. The deep ultraviolet light emitting diode according to claim 3, wherein: The spacing between the via holes is the same as or greater than the spacing between one end of the via hole and one edge of the mesa.

5. The deep ultraviolet light emitting diode according to claim 4, wherein: The distance between the short side edge of the mesa and the via hole is the same as or greater than the distance between the via holes.

6. The deep ultraviolet light emitting diode according to claim 1, wherein: An n-ohmic contact layer disposed on the first conductive type semiconductor layer exposed around the mesa surrounds the mesa.

7. The deep ultraviolet light emitting diode according to claim 1, wherein: The deep ultraviolet light emitting diode further includes an n coupling layer and a p coupling layer covering the n ohmic contact layer and the p ohmic contact layer respectively, and the n coupling layer and the p coupling layer cover the top surface and the side surface of the ohmic contact layer.

8. The deep ultraviolet light emitting diode according to claim 1, wherein: The deep ultraviolet light emitting diode comprises: a lower insulating layer covering the mesa, the n-ohm contact layer and the p-ohm contact layer, and having an opening above the n-ohm contact layer and the p-ohm contact layer; an n pad metal layer and a p pad metal layer, which are arranged on the lower insulating layer and are electrically connected to the n ohmic contact layer and the p ohmic contact layer respectively through openings of the lower insulating layer; and an upper insulating layer, covering the n pad metal layer and the p pad metal layer, The n-bump and the p-bump are arranged on the upper insulating layer and are electrically connected to the n-pad metal layer and the p-pad metal layer through the opening of the upper insulating layer.

9. The deep ultraviolet light emitting diode according to claim 8, wherein: The n-pad metal layer includes an Al layer.

10. The deep ultraviolet light emitting diode according to claim 9, wherein: The n-pad metal layer reflects light emitted through the side surfaces of the mesa.

11. The deep ultraviolet light emitting diode according to claim 8, wherein: The deep ultraviolet light emitting diode further includes an n-coupling layer and a p-coupling layer covering the n-ohmic contact layer and the p-ohmic contact layer respectively. The n pad metal layer is connected to the n coupling layer and electrically connected to the n ohmic contact layer.

12. The deep ultraviolet light emitting diode according to claim 11, wherein: The n-coupling layer includes an Al layer.

13. The deep ultraviolet light emitting diode according to claim 8, wherein: The n-pad metal layer surrounds the p-pad metal layer.

14. A deep ultraviolet light emitting diode, comprising: substrate; An n-type semiconductor layer is located on the substrate; A mesa, arranged on the n-type semiconductor layer, and comprising an active layer and a p-type semiconductor layer; n ohmic contact layer, contacting the n-type semiconductor layer; A p-ohmic contact layer, contacting the p-type semiconductor layer; n bumps, electrically connected to the n ohmic contact layers; as well as A p-bump is electrically connected to the p-ohmic contact layer. The mesa includes a plurality of via holes exposing the first conductive type semiconductor layer, The mesa has a rectangular shape in which the length of the side along a first direction is longer than the length of the side along a second direction perpendicular to the first direction, The plurality of vias are arranged parallel to each other along the first direction, The n-bumps and the p-bumps are arranged along the first direction, The mesa has a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the first direction, and has a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the second direction.

15. The deep ultraviolet light emitting diode according to claim 14, wherein: The via hole has a shape in which a length of a side along the second direction is longer than a length of a side along the first direction.

16. The deep ultraviolet light emitting diode according to claim 15, wherein: The n-ohm contact layer includes an n-ohm contact layer surrounding the mesa around the mesa and an n-ohm contact layer arranged in the via hole.

17. The deep ultraviolet light emitting diode according to claim 16, wherein: The deep ultraviolet light emitting diode further comprises: n pad metal layer, electrically connected to the n ohmic contact layer; and A p pad metal layer is electrically connected to the p ohmic contact layer, The n-pad metal layer surrounds the p-pad metal layer.

18. The deep ultraviolet light emitting diode according to claim 17, wherein: The n-pad metal layer and the p-pad metal layer are formed in the same process.

19. The deep ultraviolet light emitting diode according to claim 18, wherein: The deep ultraviolet light emitting diode further includes a lower insulating layer covering the mesa, the n-ohm contact layer and the p-ohm contact layer. The n pad metal layer and the p pad metal layer are arranged on the lower insulating layer, and are electrically connected to the n ohmic contact layer and the p ohmic contact layer respectively through openings formed in the lower insulating layer.

20. The deep ultraviolet light emitting diode according to claim 19, wherein: The deep ultraviolet light emitting diode further comprises: an upper insulating layer, covering the n pad metal layer and the p pad metal layer, The n-bump and the p-bump are arranged on the upper insulating layer. The n-bump is electrically connected to the n-pad metal layer, and the p-bump is electrically connected to the p-pad metal layer.

21. A deep ultraviolet light emitting diode, comprising: substrate; An n-type semiconductor layer is located on the substrate; a mesa disposed on the n-type semiconductor layer and comprising an active layer, a p-type semiconductor layer, and a plurality of via holes exposing the n-type semiconductor layer; n ohmic contact layers, respectively contacting the n-type semiconductor layer exposed around the mesa and the n-type semiconductor layer exposed to the plurality of via holes; A first reflective layer, covering the top surface and side surfaces of the n-ohmic contact layer; a second reflective layer connected to the first reflective layer; n bumps connected to the second reflective layer; and A p-bump is electrically connected to the p-type semiconductor layer. The n-ohmic contact layer, the first reflective layer and the second reflective layer include an Al layer, The mesa has a rectangular shape in which the length of the side along a first direction is longer than the length of the side along a second direction perpendicular to the first direction, The plurality of vias are arranged parallel to each other along the first direction, The n-bumps and the p-bumps are arranged along the first direction.

22. The deep ultraviolet light emitting diode according to claim 21, wherein: The width of the n-ohmic contact layer contacting the n-type semiconductor layer around the mesa is narrower than the width of the n-ohmic contact layer contacting the n-type semiconductor layer in the via hole.

23. The deep ultraviolet light emitting diode according to claim 21, wherein: The first reflective layer is arranged to be lower than the table surface. The second reflective layer extends from the first reflective layer toward above the mesa.

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