Detection circuit and method of fast charging system, fast charging protocol circuit and fast charging system

Abstract

The present invention discloses a detection circuit and method for a fast charging system, a fast charging protocol circuit and a fast charging system. According to an embodiment of the present invention, the detection circuit includes: a first resistor, connected between an input terminal and ground; a first comparator, used to compare the voltage on the first resistor with a first preset threshold value, and output a first comparison result; and a first timer, used to time the first comparison result, and output a first information indicating the state of the line voltage; wherein the input terminal is used to input the VD terminal voltage of the fast charging system, and wherein the VD terminal voltage reflects the magnitude of the line voltage. Through the above technical solution, it is possible to determine whether the line voltage is at high voltage or low voltage by timing the first comparison result, thereby adjusting the output power according to the line voltage state, thereby increasing the charging speed or preventing insufficient input power on the primary side.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuits, and in particular relates to a detection circuit and method for a fast charging system, a fast charging protocol circuit, and a fast charging system. Background Art

[0002] In applications such as fast charging, when the line voltage input is high, the fast charging protocol circuit will appropriately increase the output power to increase the charging speed; conversely, when the line voltage input is low, the fast charging protocol circuit will correspondingly reduce the output power to avoid insufficient primary input power.

[0003] Therefore, it is necessary to detect the information related to the line voltage of the primary input of the fast charging system in real time, so that the fast charging protocol circuit can output appropriate output power based on the detected information related to the line voltage. Summary of the invention

[0004] The embodiments of the present invention provide a detection circuit and method for a fast charging system, a fast charging protocol circuit and a fast charging system, which can determine whether the line voltage is in a high voltage or low voltage state by timing the output result of the first comparator, thereby adjusting the output power according to the line voltage state, thereby increasing the charging speed or preventing insufficient primary input power, etc.

[0005] In a first aspect, an embodiment of the present invention provides a detection circuit for a fast charging system, comprising: a first resistor connected between an input terminal and ground; a first comparator, used to compare the voltage on the first resistor with a first preset threshold value, and output a first comparison result; and a first timer, used to time the first comparison result, and output first information indicating a state of the line voltage; wherein the input terminal is used to input the VD terminal voltage of the fast charging system, and wherein the VD terminal voltage reflects the magnitude of the line voltage.

[0006] According to the detection circuit provided by the first aspect of the present invention, the first timer is specifically used for: if during the first timing period, the voltage on the first resistor is always lower than the first preset threshold value, then outputting the first information indicating that the line voltage is at a low voltage; or if during the first timing period, the voltage on the first resistor is higher than the first preset threshold value, then outputting the first information indicating that the line voltage is at a high voltage.

[0007] The detection circuit provided according to the first aspect of the present invention further includes a first switch, and the first resistor is connected to the ground via the first switch.

[0008] According to the detection circuit provided by the first aspect of the present invention, the first switch is a MOS transistor, and the MOS transistor receives a control signal to turn the MOS transistor on and off based on the control signal.

[0009] The detection circuit provided according to the first aspect of the present invention also includes: a first clamping circuit connected between the input terminal and the ground; a second comparator, used to compare the voltage on the first clamping circuit with the second preset threshold when the first switch is disconnected, and output a second comparison result; and a second timer, used to time the second comparison result and output second information indicating the state of the line voltage.

[0010] According to the detection circuit provided by the first aspect of the present invention, the second timer is specifically used to: if the voltage on the first clamp circuit is always greater than the second preset threshold value during the second timing period, then output second information indicating that the line voltage is in the unplugged state.

[0011] The detection circuit provided according to the first aspect of the present invention also includes: a third comparator, used to compare the output voltage and a third preset threshold value, and output a third comparison result; and a first short-circuit detection module, used to output third information indicating whether the output current detection resistor is short-circuited based on the second comparison result and the third comparison result.

[0012] According to the detection circuit provided by the first aspect of the present invention, the first short-circuit detection module is specifically used to: calculate the operating frequency of the primary pulse width modulation module of the fast charging system based on the second comparison result; and output third information based on the operating frequency and the third comparison result.

[0013] The detection circuit provided according to the first aspect of the present invention also includes: a second clamping circuit connected between the input terminal and the ground; a fourth comparator, used to compare the voltage on the second clamping circuit with a fourth preset threshold when the first switch is disconnected, and output a fourth comparison result; a de-jitter module, used to de-jitter the fourth comparison result; and a third timer, used to time the de-jittered signal and output fourth information indicating the state of the line voltage.

[0014] The detection circuit provided according to the first aspect of the present invention also includes: a fifth comparator, used to compare the output voltage and the fifth preset threshold value, and output a fifth comparison result; and a second short-circuit detection module, used to output fifth information indicating whether the output current detection resistor is short-circuited based on the de-jittered signal and the fifth comparison result.

[0015] According to the detection circuit provided by the first aspect of the present invention, the first preset threshold is set based on the second resistor and the peak voltage of the VD terminal, wherein the second resistor is connected between the input terminal and the VD terminal.

[0016] In a second aspect, an embodiment of the present invention provides a fast charging protocol circuit, including: a detection circuit as described in the first aspect.

[0017] In a third aspect, an embodiment of the present invention provides a fast charging system, including: a fast charging protocol circuit as described in the second aspect.

[0018] In a fourth aspect, an embodiment of the present invention provides a detection method for a fast charging system, comprising: dividing the voltage at the VD terminal of the fast charging system to obtain a first voltage; comparing the first voltage with a first preset threshold and outputting a first comparison result; and timing the first comparison result and outputting first information indicating the state of the line voltage; wherein the VD terminal voltage reflects the magnitude of the line voltage.

[0019] The detection method provided according to the fourth aspect of the present invention also includes: clamping the VD terminal voltage to obtain a second voltage; comparing the second voltage with a second preset threshold and outputting a second comparison result; and timing the second comparison result and outputting second information indicating the state of the line voltage.

[0020] The detection method provided according to the fourth aspect of the present invention further includes: comparing the output voltage with a third preset threshold and outputting a third comparison result; and outputting third information indicating whether the output current detection resistor is short-circuited based on the second comparison result and the third comparison result.

[0021] The detection method provided according to the fourth aspect of the present invention also includes: clamping the VD terminal voltage to obtain a third voltage; comparing the third voltage with a fourth preset threshold and outputting a fourth comparison result; de-jittering the fourth comparison result; and timing the de-jittered signal and outputting fourth information indicating the state of the line voltage.

[0022] The detection method provided according to the fourth aspect of the present invention further includes: comparing the output voltage with a fifth preset threshold and outputting a fifth comparison result; and outputting fifth information indicating whether the output current detection resistor is short-circuited based on the de-jittered signal and the fifth comparison result.

[0023] The detection circuit and method of the fast charging system, the fast charging protocol circuit and the fast charging system of the embodiments of the present invention can determine whether the line voltage is at high voltage or low voltage, and thus adjust the output power according to the line voltage state, thereby increasing the charging speed or preventing insufficient primary input power, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solution of the embodiment of the present invention, the following is a brief introduction to the drawings required for use in the embodiment of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 A structural block diagram of a flyback architecture in the prior art is shown;

[0026] Figure 2 A schematic diagram showing a waveform of the VD terminal during the on / off period of the power tube in the prior art is shown;

[0027] Figure 3 A schematic diagram of the structure of a fast charging system provided by an embodiment of the present invention is shown;

[0028] Figure 4 A schematic diagram of the structure of a fast charging protocol circuit provided by an embodiment of the present invention is shown;

[0029] Figure 5 FIG. 5 is a schematic diagram showing the structure of a detection circuit 500 provided in a first embodiment of the present invention;

[0030] Figure 6 A schematic diagram showing the corresponding waveforms of the VD terminal voltage when the primary side is turned on / off and under different line voltages provided by an embodiment of the present invention;

[0031] Figure 7 FIG. 7 is a schematic diagram showing the structure of a detection circuit 700 provided in a second embodiment of the present invention;

[0032] Figure 8 A schematic diagram showing the structure of a detection circuit 800 provided in a third embodiment of the present invention is shown;

[0033] Fig. 9 FIG. 4 is a schematic diagram showing the structure of a detection circuit 900 provided in a fourth embodiment of the present invention;

[0034] Fig.10 FIG. 1 shows a schematic structural diagram of a detection circuit 1000 provided in a fifth embodiment of the present invention;

[0035] Fig.11 A schematic diagram showing corresponding waveforms of the voltages at the VD and ACD terminals during the primary side on / off period provided by an embodiment of the present invention; and

[0036] Fig.12 A schematic flow chart of a method for detecting a fast charging system provided in accordance with an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0037] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention.

[0038] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0039] First, in order to better understand the present invention, the architecture and basic working principle of the AC / DC fast charging system are introduced below. Figure 1 , Figure 1 The structure block diagram of the flyback architecture in the prior art is shown.

[0040] like Figure 1 As shown, the primary / secondary inductance of transformer T1 is opposite-name terminal. When power tube M1 is turned on, primary inductance Np stores energy; when power tube M1 is turned off, primary inductance Np transfers the stored energy to secondary inductance, and secondary inductance demagnetizes and provides energy to the load.

[0041] Among them, reference Figure 2 , Figure 2 A schematic diagram showing the waveform of the VD terminal during the on / off period of the power tube in the prior art is shown.

[0042] like Figure 2 As shown, when the pulse width modulation (PWM) signal is at a high level, the power tube M1 is turned on, the excitation voltage across the primary inductor can be Vbulk, the excitation voltage across the secondary inductor can be VD-Vo, and the primary / secondary excitation voltage ratio is:

[0043]

[0044] Furthermore, Vbulk is the output of the input AC signal through the rectifier bridge, and Vac is the effective value of the input AC signal.

[0045]

[0046] From formulas (1) and (2), we can get VD:

[0047]

[0048] It can be seen from formula (3) that when the power tube M1 is turned on, the voltage at the VD terminal can reflect the level of the input voltage, so the line voltage and the AC-OFF state can be detected through the VD terminal.

[0049] In order to solve the problems of the prior art, an embodiment of the present invention provides a detection circuit and method of a fast charging system, a fast charging protocol circuit and a fast charging system. The fast charging system provided by an embodiment of the present invention is first introduced below.

[0050] Figure 3 FIG. 1 is a schematic diagram showing the structure of a fast charging system provided by an embodiment of the present invention. Figure 3 As shown, the fast charging system mainly includes: a PWM controller, a synchronous rectification (SR) chip and a fast charging protocol circuit (shown as QC).

[0051] The PWM controller may include the following terminals: a GATE terminal, a CS terminal, a DET terminal, a VDD terminal, a GND terminal, and a FB terminal.

[0052] The SR chip may include the following terminals: GATE, VD, NC, VIN, VDD and GND. The node where the VD of the SR chip is connected to the MOS tube M3 is the VD of the fast charging system.

[0053] The QC circuit may include the following terminals: OPTO, VDD, ACD, CC2, CC1, DN, DP, GATE, ISP, ISN, GND, VIN, VFB, and IFB. The ACD may be connected to the VD via a resistor R1.

[0054] exist Figure 3In the illustrated embodiment, the PWM controller controls the on and off of the power tube M2. During the on-time of the power tube M2, the primary inductor of the transformer T2 can store energy, and the secondary SR chip turns off the synchronous rectifier metal-oxide-semiconductor (MOS) tube M3 (e.g., NMOS tube); during the off-time of the power tube M2, the primary inductor of the transformer T2 transfers the stored energy to the secondary inductor, the SR chip turns on the synchronous rectifier MOS tube M3, the secondary inductor demagnetizes and transfers the primary energy to, for example, the output capacitor and the load.

[0055] Among them, the QC circuit can integrate the fast charging protocol and the voltage / current loop, which can communicate with the device to be charged through the CC1 / CC2 / DP / DN terminals, in which different voltages, currents and / or powers are set.

[0056] The following is a specific example of Figure 3 The QC circuit in the fast charging system shown in the figure is introduced, refer to Figure 4 , Figure 4 A schematic diagram of the structure of a fast charging protocol circuit provided by an embodiment of the present invention is shown.

[0057] exist Figure 4 In the illustrated embodiment, the QC circuit may include an under voltage lockout (UVLO) module / low dropout regulator (LDO), a clock module (CLK), a protection circuit, a communication interface, a detection circuit, a microcontroller unit (MCU) and a gate driver, a first digital-to-analog converter (DAC) DAC, a constant voltage error amplifier (CV_EA), a second DAC, a constant current error amplifier (CC_EA), transistors M5 and M6, and an output current amplifier (AVCCR), etc.

[0058] In such Figure 4In the illustrated embodiment, the two input terminals of the UVLO / LDO module can be connected to the VIN and VDD terminals respectively, and the two output terminals of the UVLO / LDO module can be connected to the input terminals of the MCU and the clock module (CLK) respectively, the output terminal of the clock module (CLK) can be connected to the input terminal of the MCU, the output terminal of the protection circuit can be connected to the input terminal of the MCU, the communication interface can be connected to the DP, DN, CC1 and CC2 terminals and the MCU respectively, and one input terminal of the detection circuit can be connected to the ACD terminal, another input terminal can be connected to the output terminal of the AVCCR to receive the signal Vcs_det, and another input terminal can be connected to the MCU to receive the signal ac_low_ctrl, and the three output terminals of the detection circuit can be connected to the three input terminals of the MCU respectively to provide, for example, three signals ac_low, ac_off and Rense_short to the MCU.

[0059] Furthermore, the input terminal of the gate driver can be connected to an output terminal of the MCU to receive a signal gate_ctrl from the MCU, the output terminal of the gate driver can be connected to the gate terminal (GATE), the input terminal of the first DAC can be connected to another output terminal of the MCU to receive a signal VC<0:10> from the MCU, the output terminal of the first DAC can be connected to an input terminal of CV_EA (for example, a negative phase input terminal) to provide it with a signal Vref_cv, the other input terminal of CV_EA (for example, a positive phase input terminal) can be connected to the VFB terminal, the output terminal of CV_EA can be connected to the gate of the transistor M5, the drain of the transistor M5 can be connected to the OPTO terminal, and the source of the transistor M5 can be grounded; the input terminal of the second DAC can be connected to another output terminal of the MCU to receive a signal IC<0:9>, the output terminal of the second DAC can be connected to one input terminal (e.g., the negative phase input terminal) of CC_EA to provide the signal Vref_cc thereto, the other input terminal (e.g., the positive phase input terminal) of CC_EA can be connected to the IFB terminal and one output terminal of AVCCR, the output terminal of CC_EA can be connected to the gate of transistor M6, the drain of transistor M6 can be connected to the OPTO terminal, the source of transistor M6 can be connected to the GND terminal, and one input terminal (e.g., the positive phase input terminal) of AVCCR can be connected to the ISP terminal, and the other input terminal (e.g., the negative phase input terminal) can be connected to the ISN terminal, and the two output terminals of AVCCR can be respectively connected to one input terminal (e.g., the positive phase input terminal) of CC_EA and the detection circuit and comparator 170 (see Figure 8 and 10 ) is an input terminal.

[0060] In such Figure 4In the embodiment shown, the QC circuit can communicate with the device to be charged through the CC1 / CC2 or DP / DN terminals, and inform the device to be charged of the voltage, current, power and other information supported by the QC circuit, and can respond to the voltage and current and other information required by the device to be charged; and can monitor abnormal conditions such as output voltage / current / temperature in real time to shut down the VBUS high-end MOS tube M4, and discharge the VBUS capacitor at the same time to protect the device to be charged from damage.

[0061] As an example, the QC circuit can detect information about the state of the AC line voltage (i.e., whether it is high voltage or low voltage) through the ACD terminal, and output an ac_low signal to inform the MCU. When the AC line voltage is detected to be in a low voltage state, the output ac_low signal can be a high level, so that the MCU reduces the output power and informs the device to be charged through the CC1 / CC2 or DP / DN terminal to prevent the QC current from overheating; on the contrary, when the AC line voltage is detected to be in a high voltage state, the output ac_low signal can be a low level, so that the MCU increases the output power and informs the device to be charged through the CC1 / CC2 or DP / DN terminal, which can increase the charging speed.

[0062] It should be noted that for ease of description, Figure 4 The detection circuit shown in FIG. 1 is only an example and is not intended to be limiting.

[0063] First, the detection circuit can perform any one or more of the following detections: detection of whether the line voltage is high or low, plug removal detection, and resistance short circuit detection. In this case, the detection circuit may include the following terminals: ACD, vcs_det, ac_low_ctrl, ac_low, ac_off, and Rense_short (see Figure 4 ). This situation can correspond to Figure 8 and Fig.10 The embodiment shown.

[0064] Secondly, when the detection circuit can only detect whether the line voltage is at a high voltage or a low voltage, the detection circuit may include the following terminals: ACD and ac_low (not shown). This situation may correspond to Figure 5 The embodiment shown.

[0065] Again, when the detection circuit is capable of performing line voltage high or low voltage and plug pull detection, the detection circuit may include the following terminals: ACD, ac_low_ctrl, ac_low and ac_off (not shown). This situation may correspond to Figure 7 and Fig. 9 The embodiment shown.

[0066] The following is a specific example of Figure 4 Several implementations of the detection circuit in the QC circuit shown are introduced in detail.

[0067] Firstly, for the purpose of detecting whether the line voltage is in a high voltage state or a low voltage state, an embodiment of the present invention provides an implementation method of a detection circuit.

[0068] refer to Figure 5 , Figure 5 FIG. 5 is a schematic diagram showing the structure of a detection circuit 500 provided in a first embodiment of the present invention.

[0069] exist Figure 5 In the illustrated embodiment, the detection circuit 500 may include: a resistor R2, which may be connected between an input terminal (i.e., an ACD terminal) and ground; a comparator 110, which may be used to compare the voltage on the resistor R2 with a first preset threshold value (i.e., VR1), and output a first comparison result; and a timer 120, which may be used to time the first comparison result and output first information indicating the state of the line voltage (i.e., ac_low); wherein the input terminal is used to input the VD terminal voltage of the fast charging system, and wherein the VD terminal voltage reflects the magnitude of the line voltage.

[0070] Among them, the input end of the detection circuit 500 can be connected to the VD end of the fast charging system via the resistor R1, and the input end can also be grounded via the resistor R2. An input end of the comparator 110 (for example, the positive input end) can receive VR1, and the other input end of the comparator 110 (for example, the negative input end) can be connected to the end of the resistor R2 away from the ground, and the output end of the comparator 110 can be connected to the input end of the timer 120, and the output signal of the timer 120 is ac_low.

[0071] Reference again Figure 4 , the output signal ac_low can be transmitted to the MCU.

[0072] As an example, for the purpose of detecting whether the line voltage is at a high voltage or a low voltage, a voltage divider circuit is formed by resistor R2 and resistor R1, wherein resistor R2 is located inside the detection circuit, and resistor R1 is located outside the detection circuit (that is, between the input terminal of the detection circuit 500 and the VD terminal). Resistors R1 and R2 can divide the voltage at the VD terminal, so that the comparator 110 can compare the voltage on the resistor R2 with the first preset threshold VR1 and output the comparison result; the timer 120 can be used to time the first preset time period to output first information indicating the state of the line voltage based on the first preset time period and the comparison result of the comparator 110.

[0073] Through the detection circuit provided in the above embodiment of the present invention, it is possible to determine whether the line voltage is in a high voltage or low voltage state according to the output result of the first comparator within a first preset time period, thereby adjusting the output power according to the line voltage state, thereby increasing the charging speed or preventing insufficient primary input power, etc.

[0074] If the voltage on the resistor R2 (ie, the input terminal voltage) is always lower than the first preset threshold VR1 during the first preset period of time counted by the timer 120, the timer 120 outputs the first information indicating that the line voltage is at a low voltage, and ac_low is at a high level.

[0075] Alternatively, if the voltage across the resistor R2 is higher than the first preset threshold VR1 during the first preset period of time counted by the timer 120 , the timer 120 outputs first information indicating that the line voltage is at a high voltage, and ac_low is at a low level.

[0076] refer to Figure 6 , Figure 6 A schematic diagram showing the corresponding waveforms of the VD terminal voltage when the primary side is turned on / off and under different line voltages provided by an embodiment of the present invention.

[0077] exist Figure 6 In the illustrated embodiment, primary side PWM GATE represents the GATE terminal voltage of the primary side PWM controller, SRGATE represents the GATE terminal voltage of the SR chip, VD represents the VD terminal voltage, Vp represents the peak voltage of the VD terminal voltage, and QC ACD represents the ACD terminal voltage of the QC circuit.

[0078] As an example, when the voltage at the GATE terminal of the primary PWM is high and the power tube is turned on, the peak voltage Vp can be expressed as follows from the above formula (3):

[0079]

[0080] Where Ns / Np is the secondary / primary inductance turns ratio, and Vac is the AC input voltage. From formula (4), it can be seen that the peak voltage Vp reflects the information about the primary line voltage.

[0081] In some embodiments, the high / low voltage decision point can be set by comparing the voltage division of Vp with a preset threshold VR1:

[0082] Vp*R2 / (R1+R2)=VR1 (5)

[0083] It can be seen from formula (5) that the preset threshold VR1 is set based on the resistor R1 and the peak voltage Vp. The resistor R2 remains unchanged, so the preset threshold VR1 can be changed by adjusting the value of the resistor R1.

[0084] By using formula (4) and formula (5), the line voltage high and low judgment threshold voltage Vac_det can be obtained as:

[0085]

[0086] That is, if the line voltage is always lower than the threshold voltage Vac_det during the first preset period of time counted by the timer 120 , the AC input can be considered to be a low voltage; otherwise, the AC input can be considered to be a high voltage.

[0087] In other embodiments, the detection circuit includes the detection circuit 500 (see Figure 5 ), in addition to the components included in the circuit, a switch may be included, and the switch may be connected between the resistor R2 and the ground. When the switch is turned on, the resistor R2 may be grounded; when the switch is turned off, the resistor R2 may be suspended.

[0088] As an example, the switch may be a MOS tube, wherein the MOS tube may receive a control signal (eg, a signal from an MCU (eg, ac_low_ctrl)) to turn the MOS tube on and off based on the control signal.

[0089] For example, when ac_low_ctrl is at a high level, the MOS tube is turned on; when ac_low_ctrl is at a low level, the MOS tube is turned off.

[0090] It should be noted that when detecting whether the line voltage is a high voltage or a low voltage, the MOS tube is turned on, so that the resistor R2 is grounded; when detecting whether the line voltage is in a plug-out state and whether the output current detection resistor is in a short-circuit state, the MOS tube is disconnected, which will be described in detail below.

[0091] Secondly, in order to detect whether the AC is in the unplugged state, another embodiment of the present invention further provides another implementation of the detection circuit.

[0092] refer to Figure 7 , Figure 7 FIG. 7 is a schematic diagram showing the structure of a detection circuit 700 provided in a second embodiment of the present invention.

[0093] exist Figure 7 In the embodiment shown, the detection circuit 700 includes the following Figure 5In addition to the various components included in the detection circuit 500 shown, it can also include: a switch 130 (for example, a transistor M7), which can be connected between the resistor R2 and the ground; a clamp circuit 140, which can be connected between the input terminal and the ground; a comparator 150, which can be used to compare the voltage on the clamp circuit 140 with the second preset threshold VR2 when the switch 130 is disconnected, and output a second comparison result; and a timer 160, which is used to time the second comparison result and output second information indicating the state of the line voltage (i.e., ac_off).

[0094] For ease of description, Figure 7 and Figure 5 The same components are designated by the same reference numerals.

[0095] The detection circuit provided by the above embodiment of the present invention can not only determine whether the line voltage is in a high voltage or low voltage state, but also detect whether the line voltage is in a plug-out state.

[0096] In some embodiments, the clamp circuit 140 may be a Zener diode, whose negative terminal may be connected to an input terminal (e.g., the negative phase input terminal) and the ACD terminal of the comparator 110, and whose positive terminal is grounded. An input terminal (e.g., the positive phase input terminal) of the comparator 150 may be connected to the ACD terminal, and another input terminal (e.g., the negative phase input terminal) may be used to receive a preset threshold VR2. The output terminal of the comparator 150 may be connected to the input terminal of the timer 160, and the output signal of the timer 160 is ac_off.

[0097] Reference again Figure 4 , the output signal ac_off can be transmitted to the MCU.

[0098] As an example, when the switch 130 is disconnected, the resistor R2 is suspended, and the resistor R2 no longer forms a voltage divider circuit with the resistor R1. At this time, the clamping circuit 140 can clamp the voltage at the VD terminal. For example, when the voltage at the VD terminal is higher than 5V, the voltage is clamped at 5V; the timer 160 can be used to time a second preset time period to output second information ac_off indicating the state of the line voltage based on the second preset time period and the output result of the comparator 150.

[0099] As an example, the timer 160 is specifically used to: if the voltage on the clamp circuit 140 is always greater than the preset threshold VR2 within the second preset time period, then output the second information indicating that the line voltage is in the unplugged state; otherwise, output the second information indicating that the line voltage is not in the unplugged state.

[0100] It should be noted that the resistor Rsense (see Figure 3) can be used to detect the output current and obtain a constant output current through current loop modulation, and can also implement over current protection (OCP) to prevent the device from being damaged due to over current.

[0101] However, in actual use, the resistor Rsense may short-circuit due to aging / welding, etc., resulting in uncontrolled current. When the resistor Rsense is short-circuited, the current loop is open, the overcurrent protection fails, and the uncontrolled maximum output current will damage the system components and the device to be charged.

[0102] Again, generally speaking, in order to prevent the above situation, another embodiment of the present invention provides another implementation of the detection circuit.

[0103] See also Figure 8 , Figure 8 FIG. 8 is a schematic structural diagram of a detection circuit 800 provided in a third embodiment of the present invention.

[0104] exist Figure 8 In the embodiment shown, the detection circuit 800 includes the following Figure 7 In addition to the various components included in the detection circuit 700 shown, it can also include: a comparator 170, which can be used to compare the output voltage (vcs_det) and the third preset threshold VR3, and output a third comparison result; and a short-circuit detection module 180, which can be used to output third information (i.e., Rsense_short) indicating whether the output current detection resistor is short-circuited based on the second comparison result and the third comparison result.

[0105] For ease of description, Figure 8 and Figure 7 The same components are designated by the same reference numerals.

[0106] The detection circuit provided by the above embodiment of the present invention can not only determine whether the line voltage is in a high voltage or low voltage state and detect whether the line voltage is in a plug-out state, but also detect whether the output current detection resistor is in a short circuit state.

[0107] In some embodiments, one input terminal (e.g., the positive input terminal) of the comparator 170 can be used to receive a preset threshold VR3, and another input terminal (e.g., the negative input terminal) of the comparator 170 can be used to receive a current from an output current amplifier (AVCCR, see Figure 4 ), the output end of the comparator 170 can be connected to an input end of the short-circuit detection module 180, the other input end of the short-circuit detection module 180 can be connected to the output end of the comparator 150, and the output signal of the short-circuit detection module 180 is Rsense_short.

[0108] The output voltage vcs_det can be determined by AVCCR (see Figure 4 ) and resistor Rsense (see Figure 3 ), wherein one input terminal of AVCCR can be connected to the ISP terminal, another input terminal of AVCCR can be connected to the ISN terminal, and the ISP and ISN terminals can be connected to the resistor Rsense, and one output terminal of AVCCR can be connected to the comparator 170 (see Figure 8 , Fig.10 ) and an input terminal of the detection circuit to provide a signal vcs_det to the detection circuit and the comparator 170, and the other output terminal of the AVCCR can be connected to the CC_EA module and the IFB terminal (see Figure 4 ).

[0109] Reference again Figure 4 , the output signal Rsense_short can be transmitted to the MCU.

[0110] As an example, the short-circuit detection module 180 is specifically used to calculate the operating frequency of the primary PWM of the fast charging system based on the comparison result of the comparator 150; and to output a signal Rsense_short indicating whether the resistor is in a short-circuit state based on the operating frequency and the comparison result of the comparator 170.

[0111] Specifically, the detection circuit 800 can detect the operating frequency of the primary PWM through the ACD terminal. When it is detected that the operating frequency of the PWM is higher than a preset threshold (for example, 40KHz), and the output voltage vcs_det of the output current amplifier is lower than the preset threshold VR3 (for example, the corresponding output voltage is less than 0.5A), it is considered that the output current detection resistor Rsense is in an abnormal short-circuit state. At this time, the MCU controls the GATE terminal to shut down the VBUS NMOS.

[0112] As an example, when detecting the operating frequency of the primary PWM, the control signal ac_low_ctrl of the switch 130 is always at a low level, and the ACD terminal is clamped by the built-in Zener diode D1.

[0113] In order to further improve the detection accuracy of the plug removal and the output current detection resistor, other embodiments of the present invention add a de-jitter module on the basis of the above embodiments.

[0114] refer to Fig. 9 , Fig. 9 FIG. 4 is a schematic diagram showing the structure of a detection circuit 900 provided in a fourth embodiment of the present invention.

[0115] exist Fig. 9In the embodiment shown, the detection circuit 900 is similar to Figure 7 The detection circuit 700 described in the above is different in that the detection circuit 900 includes the following Figure 7 In addition to the components included in the detection circuit 700 shown, the detection circuit 700 may also include: a de-jitter module 190 for de-jittering the output result of the comparator 150 to obtain a de-jittered signal Vd_low_det. And a timer 160 may be used to time the de-jittered signal Vd_low_det and output fourth information indicating the state of the line voltage (i.e., ac_off).

[0116] The input end of the de-jitter module 190 may be connected to the output end of the comparator 150 , and the output end of the de-jitter module 190 may be connected to the input end of the timer 160 .

[0117] In addition, if Vd_low_det is in a high level state for a long time and the timer 160 counts the full time (for example, 2s), it can be considered that the line voltage is in an unplugged state, and the ac_off signal in a high level is output to the MCU. At the same time, the MCU informs the device to be charged through the CC1 / CC2 or DP / DN terminal that the current charger is in an unplugged state. The device to be charged can turn off the charging indication to improve the user experience.

[0118] For ease of description, Fig. 9 and Figure 7 The same components are marked with the same reference numerals, and the connection method and working principle of the same components are not described in detail here.

[0119] As an example, in order to prevent the influence of jitter (Ring), Td-de-bounce time (for example, 1uS) is added to the output of the comparator 150. Since the period of normal jitter is shorter than Td-de-bounce time, it can be filtered out by the de-jitter module.

[0120] Through the above solution provided by the embodiment of the present invention, the output result of the comparator 150 can be de-jittered, thereby further improving the accuracy of plug unplugging detection.

[0121] refer to Fig.10 , Fig.10 FIG. 1 is a schematic diagram showing the structure of a detection circuit 1000 provided in a fifth embodiment of the present invention.

[0122] exist Fig.10 In the embodiment shown, the detection circuit 1000 is similar to Figure 8 The detection circuit 800 described in the above is different in that the detection circuit 1000 includes the following Figure 8In addition to the components included in the detection circuit 800 shown, the detection circuit 800 may also include: a de-jitter module 190 for de-jittering the output result of the comparator 150 to obtain a de-jittered signal Vd_low_det. And the timer 160 may be used to time the de-jittered signal Vd_low_det and output fourth information indicating the state of the line voltage (i.e., ac_off).

[0123] In addition, the short circuit detection module 180 may be configured to output fifth information Rsense_short indicating whether the output current detection resistor is short-circuited based on the de-jittered signal Vd_low_det and the comparison result of the comparator 170 .

[0124] Through the above solution provided by the embodiment of the present invention, the output result of the comparator 150 can be de-jittered, so as to further improve the accuracy of the short-circuit detection of the output current detection resistor.

[0125] In addition, reference Fig.11 , Fig.11 A schematic diagram showing corresponding waveforms of the voltages at the VD and ACD terminals during the primary side turn-on / off period provided by an embodiment of the present invention.

[0126] exist Fig.11 In the illustrated embodiment, primary side PWM GATE represents the GATE terminal voltage of the primary side PWM controller, SRGATE represents the GATE terminal voltage of the SR chip, VD represents the VD terminal voltage, Vp represents the peak voltage of the VD terminal voltage, ACD represents the ACD terminal voltage, and Vd_low_det represents the de-jittered signal.

[0127] It can be seen from the ACD waveform that under normal working conditions, during the synchronous rectification conduction period, the voltage may be lower than the preset threshold VR2 (for example, 0.1V) and the minimum conduction time may exceed Td. The short circuit detection module 180 can calculate the operating frequency of the primary PWM by timing the time between two adjacent rising edges of the signal Vd_low_det.

[0128] Among them, when the operating frequency is higher than a preset threshold (for example, 40KHz) and the output voltage vcs_det of the output current amplifier is lower than the preset threshold VR3, it is considered that the Rsense resistor is short-circuited and the VBUS output is turned off to avoid uncontrolled current and damage to system components and charged devices.

[0129] The embodiment of the present invention also provides a detection method for a fast charging system, referring to Fig.12 , Fig.12A schematic flow chart of a method for detecting a fast charging system provided in accordance with an embodiment of the present invention is shown.

[0130] exist Fig.12 In the illustrated embodiment, the detection method of the fast charging system may include the following steps: S1201, dividing the voltage at the VD terminal of the fast charging system to obtain a first voltage, wherein the voltage at the VD terminal reflects the magnitude of the line voltage; S1202, comparing the first voltage with a first preset threshold value, and outputting a first comparison result; and S1203, timing the first comparison result, and outputting first information indicating the state of the line voltage.

[0131] In some embodiments, the first comparison result is timed and first information indicating the state of the line voltage is output, including: if the first voltage is always lower than the first preset threshold value during the first timing period, then the first information indicating that the line voltage is at a low voltage is output; or if the first voltage is higher than the first preset threshold value during the first timing period, then the first information indicating that the line voltage is at a high voltage is output.

[0132] Through the above detection method provided by the embodiment of the present invention, it is possible to determine whether the line voltage is in a high voltage or low voltage state according to the first comparison result within a first preset time period, thereby adjusting the output power according to the line voltage state, thereby increasing the charging speed or preventing insufficient primary input power, etc.

[0133] As an example, in addition to the various steps mentioned in the aforementioned embodiments, the detection method may also include the following steps: clamping the VD terminal voltage to obtain a second voltage; comparing the second voltage with a second preset threshold and outputting a second comparison result; and timing the second comparison result and outputting second information indicating the state of the line voltage.

[0134] In some embodiments, the second comparison result is timed and second information indicating the state of the line voltage is output, including: if the second voltage is always greater than the second preset threshold during the second timing period, then second information indicating that the line voltage is in the unplugged state is output.

[0135] The detection method provided by the embodiment of the present invention can not only determine whether the line voltage is in a high voltage or low voltage state, but also detect whether the line voltage is in a plug-out state.

[0136] As an example, in addition to the various steps mentioned in the aforementioned embodiments, the detection method may also include the following steps: comparing the output voltage with a third preset threshold and outputting a third comparison result; and based on the second comparison result and the third comparison result, outputting third information indicating whether the output current detection resistor is short-circuited.

[0137] In some embodiments, based on the second comparison result and the third comparison result, third information indicating whether the output current detection resistor is short-circuited is output, including: calculating the operating frequency of the primary PWM of the fast charging system based on the second comparison result, and outputting the third information indicating whether the output current detection resistor is short-circuited based on the operating frequency and the third comparison result.

[0138] When the operating frequency is higher than a preset threshold (eg, 40 KHz) and the output voltage vcs_det is lower than a third preset threshold VR3, it is considered that the output current detection resistor Rsense is in a short circuit abnormal state.

[0139] The detection method provided by the above embodiment of the present invention can not only determine whether the line voltage is in a high voltage or low voltage state and detect whether the line voltage is in a plug-out state, but also detect whether the output current detection resistor is in a short circuit state.

[0140] In order to further improve the detection accuracy of the plug removal and the output current detection resistor, other embodiments of the present invention add a de-jittering step based on the above embodiments.

[0141] In addition to the steps in the aforementioned embodiments, the detection method provided in other embodiments of the present invention may also include the following steps: de-jittering the second comparison result and timing the de-jittered signal to output second information indicating the state of the line voltage.

[0142] The detection method provided by the embodiment of the present invention further improves the accuracy of plug unplugging detection on the basis of the above-mentioned embodiment.

[0143] In addition to the steps in the aforementioned embodiments, the detection method provided by other embodiments of the present invention may also include the following steps: comparing the output voltage with a fifth preset threshold and outputting a fifth comparison result; and outputting third information indicating whether the output current detection resistor is short-circuited based on the de-jittered signal and the fifth comparison result.

[0144] The detection method provided by the embodiment of the present invention further improves the accuracy of short-circuit detection of the output current detection resistor on the basis of the above-mentioned embodiment.

[0145] In addition, in the method embodiment provided by the present invention, the technical details on how to detect whether the line voltage is in a high voltage or low voltage state, plug unplugging detection, and resistance short circuit detection in each step can be referred to the details introduced in the product embodiment and will not be repeated here.

[0146] It should be clear that the present invention is not limited to the specific configurations and processes described above and shown in the figures. For the sake of simplicity, detailed descriptions of known circuits and their connection modes and methods are omitted here. Where specific details (e.g., circuits) are set forth to describe example embodiments of the present disclosure, it should be apparent to those skilled in the art that the present disclosure can be practiced without these specific details or with variations of these specific details. Therefore, this specification should be considered illustrative rather than restrictive.

[0147] In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.

[0148] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present invention are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0149] It should also be noted that the exemplary embodiments mentioned in the present invention describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiments, or in a different order from the embodiments, or several steps can be performed simultaneously.

[0150] The above is only a specific implementation of the present invention. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the system, module and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be covered within the protection scope of the present invention.

Claims

1. A detection circuit for a fast charging system, comprising: A first resistor connected between the input terminal and ground; a first comparator, configured to compare the voltage on the first resistor with a first preset threshold value, and output a first comparison result; a first timer, configured to time the first comparison result and output first information indicating whether the line voltage is at a high voltage or a low voltage; a switch, wherein the first resistor is connected to ground via the switch; a clamp circuit connected to the input terminal and connected to ground via the first resistor and the switch; A second comparator, used for comparing the voltage on the clamping circuit with a second preset threshold value when the switch is disconnected, and outputting a second comparison result; a second timer, configured to time the second comparison result and output second information indicating whether the line voltage is in a plug-out state; A third comparator, configured to compare an output voltage of an output current amplifier with a third preset threshold value and output a third comparison result, wherein the output current amplifier is located in a fast charging protocol circuit of the fast charging system; and a short circuit detection module, configured to output third information indicating whether the output current detection resistor is short-circuited based on the second comparison result and the third comparison result, Among them, the input end is used to input the VD terminal voltage of the fast charging system, the VD terminal voltage reflects the size of the line voltage, and can adjust the output power of the fast charging system according to the first information. The first resistor and the second resistor connected between the input end and the VD terminal constitute a voltage divider circuit for dividing the VD terminal voltage, and the two input ends of the output current amplifier are respectively connected to the two ends of the output current detection resistor.

2. The detection circuit according to claim 1, characterized in that: The first timer is specifically used for: If the voltage on the first resistor is always lower than the first preset threshold value during the first timing period, outputting first information indicating that the line voltage is at a low voltage; or If, during the first timing period, the voltage on the first resistor is higher than the first preset threshold, first information indicating that the line voltage is at a high voltage is output.

3. The detection circuit according to claim 1, characterized in that: The switch is a MOS transistor, and the MOS transistor receives a control signal so as to turn the MOS transistor on and off based on the control signal.

4. The detection circuit according to claim 1, characterized in that: The second timer is specifically used for: If the voltage on the clamp circuit is always greater than the second preset threshold value during the second timing period, second information indicating that the line voltage is in a plug-out state is output.

5. The detection circuit according to claim 1, characterized in that: The short circuit detection module is specifically used for: Based on the second comparison result, calculating the operating frequency of the primary pulse width modulation module of the fast charging system; and The third information is output based on the operating frequency and the third comparison result.

6. The detection circuit according to claim 1, characterized in that: Also includes: a de-jitter module, configured to perform de-jitter processing on the second comparison result, The second timer is used to time the de-jittered signal and output second information indicating whether the line voltage is in a plug-out state.

7. The detection circuit according to claim 6, characterized in that: The short-circuit detection module is used to output third information indicating whether the output current detection resistor is short-circuited based on the de-jittered signal and the third comparison result.

8. The detection circuit according to claim 1, characterized in that: The first preset threshold is set based on the second resistor and the peak voltage of the VD terminal.

9. A fast charging protocol circuit, characterized in that: include: A detection circuit as claimed in any one of claims 1 to 8.

10. A fast charging system, comprising the fast charging protocol circuit as claimed in claim 9.

11. A method for detecting a fast charging system, comprising: Performing voltage division processing on the VD terminal voltage of the fast charging system to obtain a first voltage, wherein the VD terminal voltage reflects the magnitude of the line voltage; comparing the first voltage with a first preset threshold, and outputting a first comparison result; timing the first comparison result and outputting first information indicating whether the line voltage is at a high voltage or a low voltage; Clamping the VD terminal voltage without dividing the VD terminal voltage of the fast charging system to obtain a second voltage; comparing the second voltage with a second preset threshold, and outputting a second comparison result; timing the second comparison result, and outputting second information indicating whether the line voltage is in a plug-out state; Comparing an output voltage of an output current amplifier with a third preset threshold, and outputting a third comparison result, wherein the output current amplifier is located in a fast charging protocol circuit of the fast charging system; Based on the second comparison result, calculating the operating frequency of the primary pulse width modulation module of the fast charging system; and Based on the operating frequency and the third comparison result, third information indicating whether the output current detection resistor is short-circuited is output.

12. The detection method according to claim 11, characterized in that: Also includes: The second comparison result is de-jittered, wherein the de-jittered signal is timed, and second information indicating whether the line voltage is in a plug-unplugged state is output.

13. The detection method according to claim 12, characterized in that: in, Based on the debounced signal and the third comparison result, third information indicating whether the output current detection resistor is short-circuited is output.

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