Packaging structure and packaging method of fan-out fingerprint recognition chip

Abstract

The present invention provides a packaging structure and packaging method for a fan-out fingerprint recognition chip, the structure comprising: a circuit layer; a fingerprint processing chip, the first surface of the fingerprint processing chip has a rewiring layer, and the second surface of the fingerprint chip adheres to the first surface of the circuit layer; a fingerprint collection chip, the fingerprint collection chip is electrically connected to the second surface of the rewiring layer; a metal connection, connected to the second surface of the rewiring layer and the first surface of the circuit layer; a packaging layer, covering the fingerprint processing chip and the fingerprint collection chip; a metal bump, formed on the second surface of the circuit layer. The present invention adopts a fan-out packaging fingerprint recognition chip, and the fingerprint collection chip and the fingerprint processing chip can be integrated in the same packaging structure, and the fingerprint collection chip and the fingerprint processing chip are vertically stacked. Compared with other existing fingerprint recognition chip packages, it has the advantages of low cost, small thickness, and high yield, and can effectively improve the response speed of the packaging structure.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor packaging, and in particular relates to a packaging structure and a packaging method of a fan-out fingerprint recognition chip. Background Art

[0002] As integrated circuits become more powerful, with higher performance and integration, and new types of integrated circuits emerge, packaging technology plays an increasingly important role in integrated circuit products, accounting for an increasing proportion of the value of the entire electronic system. At the same time, as the feature size of integrated circuits reaches the nanometer level, transistors develop towards higher density and higher clock frequency, and packaging also develops towards higher density.

[0003] Due to the advantages of miniaturization, low cost and high integration, as well as better performance and higher energy efficiency, fan-out wafer-level packaging (FOWLP) technology has become an important packaging method for electronic devices such as high-demand mobile / wireless networks, and is one of the most promising packaging technologies at present.

[0004] Fingerprint recognition technology is the most mature and inexpensive biometric recognition technology. At present, fingerprint recognition technology is the most widely used. It can be seen not only in access control and attendance systems, but also in many other applications on the market: such as laptops, mobile phones, cars, and bank payments.

[0005] An existing packaging method for fingerprint recognition chips is to solder the fingerprint collection chip and the fingerprint processing chip to the PCB circuit board respectively. This packaging method requires a large packaging area, the PCB circuit board is thick, and the packaging circuit is long, which will lead to the shortcomings of large specific volume of the packaging structure and slow response speed.

[0006] Based on the above, it is necessary to provide a packaging structure and a packaging method of a fingerprint recognition chip with low cost, small volume and high response speed. Summary of the invention

[0007] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a packaging structure and packaging method of a fan-out fingerprint recognition chip, which are used to solve the problems of high packaging cost, large size and slow response speed of the fingerprint recognition chip in the prior art.

[0008] To achieve the above-mentioned purpose and other related purposes, the present invention provides a packaging structure of a fan-out fingerprint recognition chip, the packaging structure comprising: a circuit layer, the circuit layer comprising an electrically connected first surface and a second surface; a fingerprint processing chip, the first surface of the fingerprint processing chip having a rewiring layer, the rewiring layer being used for electrical lead-out of the fingerprint processing chip, the second surface of the fingerprint chip being adhered to the first surface of the circuit layer; a fingerprint collection chip, the fingerprint collection chip being electrically bonded to the second surface of the rewiring layer; a metal connection, connected to the second surface of the rewiring layer and the first surface of the circuit layer; a packaging layer, covering the fingerprint processing chip and the fingerprint collection chip; and a metal bump, formed on the second surface of the circuit layer.

[0009] Optionally, the fingerprint collection chip and the fingerprint processing chip are vertically stacked.

[0010] Optionally, the material of the encapsulation layer includes one of polyimide, silica gel and epoxy resin.

[0011] Optionally, the fingerprint acquisition chip is exposed on the top surface of the packaging layer.

[0012] Optionally, the metal bump includes one of tin solder, silver solder and gold-tin alloy solder.

[0013] Optionally, the metal connection wire includes one of a gold wire and a silver wire.

[0014] The present invention also provides a packaging method for a fan-out fingerprint recognition chip, comprising the following steps: 1) providing a fingerprint processing chip wafer, forming a rewiring layer on the fingerprint processing chip wafer, wherein the first surface of the rewiring layer is connected to the fingerprint processing chip wafer, and the rewiring layer is used for electrical lead-out of the fingerprint processing chip; 2) cutting the fingerprint processing chip wafer and the rewiring layer to obtain an independent fingerprint processing chip; 3) providing a circuit layer, adhering the fingerprint processing chip to the first surface of the circuit layer, and the rewiring layer faces away from the circuit layer; 4) providing a fingerprint collection chip, electrically connecting the fingerprint collection chip to the second surface of the rewiring layer, and the fingerprint collection chip and the fingerprint processing chip are vertically stacked; 5) connecting the second surface of the rewiring layer and the first surface of the circuit layer with metal wires; 6) encapsulating the fingerprint processing chip and the fingerprint collection chip with a packaging layer; 7) forming metal bumps on the second surface of the circuit layer; 8) cutting the circuit layer to obtain a packaging structure of an independent fan-out fingerprint recognition chip.

[0015] Optionally, step 3) providing the circuit layer includes the steps of: 3-1) providing a supporting substrate and forming a separation layer on the supporting substrate; 3-2) forming the circuit layer on the separation layer; step 7) before forming the metal bump, also includes the step of peeling off the supporting substrate and the circuit layer based on the separation layer to expose the second side of the circuit layer.

[0016] Optionally, the supporting substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate and a ceramic substrate.

[0017] Optionally, the separation layer includes a light-to-heat conversion layer; in step 7), laser is used to irradiate the light-to-heat conversion layer to separate the light-to-heat conversion layer from the encapsulation layer and the supporting substrate, thereby peeling off the encapsulation layer and the supporting substrate.

[0018] Optionally, the method of encapsulating the fingerprint processing chip and the fingerprint collection chip with an encapsulation layer includes one of compression molding, transfer molding, liquid sealing molding, vacuum lamination and spin coating, and the material of the encapsulation layer includes one of polyimide, silicone and epoxy resin.

[0019] Optionally, in step 6), after the fingerprint processing chip and the fingerprint collection chip are encapsulated by a packaging layer, the fingerprint collection chip is exposed on the top surface of the packaging layer.

[0020] Optionally, in step 5), the metal connection is formed between the second surface of the rewiring layer and the first surface of the circuit layer using a wire bonding process.

[0021] Optionally, the metal connection wire includes one of a gold wire and a silver wire.

[0022] Optionally, the metal bump includes one of tin solder, silver solder and gold-tin alloy solder.

[0023] As described above, the packaging structure and packaging method of the fan-out fingerprint recognition chip of the present invention have the following beneficial effects:

[0024] 1) The present invention adopts a fan-out package (Fan out) fingerprint recognition chip, which can integrate the fingerprint collection chip and the fingerprint processing chip in the same packaging structure, and the fingerprint collection chip and the fingerprint processing chip are vertically stacked. Compared with other existing fingerprint recognition chip packages, it has the advantages of low cost, small thickness and high yield.

[0025] 2) The fingerprint collection chip and the fingerprint processing chip of the present invention are vertically stacked, which can effectively improve the response speed of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figures 1 to 11It is a schematic diagram showing the structure of each step of the packaging method of the fan-out fingerprint recognition chip of the present invention, wherein: Fig.11 A schematic diagram showing the packaging structure of a fan-out fingerprint recognition chip.

[0027] Component number description

[0028] 201 Fingerprint processing chip wafer

[0029] 202 Rewiring Layer

[0030] 20 Fingerprint processing chip

[0031] 203 Film

[0032] 301 Line Layer

[0033] 401 Fingerprint Collection Chip

[0034] 402 Metal Connection

[0035] 403 Encapsulation Layer

[0036] 501 metal bumps DETAILED DESCRIPTION

[0037] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0038] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0039] For ease of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

[0040] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0041] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0042] like Figures 1 to 11 As shown, this embodiment provides a packaging method for a fan-out fingerprint recognition chip, and the packaging method includes the following steps:

[0043] like Figure 1-2 As shown, firstly, step 1) is performed to provide a fingerprint processing chip wafer 201, and a rewiring layer 202 is formed on the fingerprint processing chip wafer 201. The first surface of the rewiring layer 202 is connected to the fingerprint processing chip wafer 201. The rewiring layer 202 is used for electrical lead-out of the fingerprint processing chip 20. The fingerprint processing chip 20 is used to perform feature extraction and feature comparison on the fingerprint signal collected by the fingerprint collection chip 401 to realize the fingerprint recognition function.

[0044] The fingerprint processing chip wafer 201 has a plurality of fingerprint processing chips 20 arranged in an array, and each fingerprint processing chip 20 is provided with a corresponding electrode. First, a seed layer, such as a Cu / Ti stack, is formed on the fingerprint processing chip wafer 201, and then the seed layer is etched to form a patterned seed layer, which is connected to the electrode of the fingerprint processing chip 20, and then based on the patterned seed layer, a rewiring layer 202 is formed on the fingerprint processing chip wafer 201. The rewiring layer 202 may include a plurality of dielectric layers and a plurality of metal wiring layers arranged according to the graphic requirements, and the adjacent two metal wiring layers are connected by conductive plugs. The dielectric layer may be formed by a method such as coating or deposition, and its material may be one or a combination of two or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphorus silicon glass, and fluorine-containing glass. In this embodiment, the material of the dielectric layer may be PI (polyimide) to further reduce the process difficulty and process cost. The metal wiring layer can be formed by a method such as electroplating or sputtering and an etching process, or by a metal stripping process, and its material includes one or a combination of two or more of copper, aluminum, nickel, gold, silver, and titanium. In this embodiment, the material of the metal wiring layer is copper.

[0045] like Figure 3 to Figure 5 As shown, step 2) is then performed to cut the fingerprint processing chip wafer 201 and the rewiring layer 202 to obtain an independent fingerprint processing chip 20.

[0046] Specifically, the back side of the fingerprint processing chip wafer 201 is first adhered to a film 203 , such as a blue film, and then the fingerprint processing chip wafer 201 is cut by a mechanical cutter or a laser cutter to obtain an independent fingerprint processing chip 20 .

[0047] like Figure 6 and Figure 7 As shown, step 3) is then performed to provide a circuit layer 301 , and the fingerprint processing chip 20 is adhered to the first surface of the circuit layer 301 , and the rewiring layer 202 faces away from the circuit layer 301 .

[0048] For example, step 3) providing the circuit layer 301 includes the steps of:

[0049] 3-1) Providing a supporting substrate and forming a separation layer on the supporting substrate.

[0050] For example, the supporting substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate and a ceramic substrate. In this embodiment, the supporting substrate is selected as a glass substrate, which has a low cost, is easy to form a separation layer on its surface, and can reduce the difficulty of the subsequent stripping process. The separation layer includes a light-to-heat conversion layer, which is formed on the supporting substrate by a spin coating process and then cured by a curing process. The light-to-heat conversion layer (LTHC) has stable performance and a relatively smooth surface, which is conducive to obtaining a flat surface later. In the subsequent stripping process, the difficulty of stripping is relatively low.

[0051] 3-2) The circuit layer 301 is formed on the separation layer. The circuit layer 301 may include several dielectric layers and several metal wiring layers arranged according to graphic requirements, and two adjacent metal wiring layers are connected by conductive plugs. The dielectric layer may be formed by methods such as coating or deposition, and its material may be one or a combination of two or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphorus silicon glass, and fluorine-containing glass. In this embodiment, the material of the dielectric layer may be PI (polyimide) to further reduce the process difficulty and process cost. The metal wiring layer may be formed by methods such as electroplating or sputtering and etching processes, or may be formed by metal stripping processes, and its material includes one or a combination of two or more of copper, aluminum, nickel, gold, silver, and titanium. In this embodiment, the material of the metal wiring layer is copper.

[0052] After forming the circuit layer 301, the fingerprint processing chip 20 can be adhered to the first surface of the circuit layer 301 by using adhesive glue. The fingerprint processing chip 20 is placed with the side having the rewiring layer 202 facing upward, that is, facing away from the circuit layer 301, and the metal wiring layer is exposed on the surface of the rewiring layer 202.

[0053] like Figure 8 As shown, the next step is to provide a fingerprint collection chip 401, and the fingerprint collection chip 401 is electrically connected to the second surface of the rewiring layer 202. The fingerprint collection chip 401 and the fingerprint processing chip 20 are vertically stacked. The fingerprint collection chip 401 is used to collect human fingerprints and transmit the collected signals to the fingerprint processing chip 20 for processing.

[0054] For example, the fingerprint collection chip 401 may be bonded to the second surface of the rewiring layer 202 by a welding process, and the fingerprint collection chip 401 and the fingerprint processing chip 20 are vertically stacked.

[0055] like Fig. 9 As shown, the next step is to perform step 5), using metal wiring 402 to connect the second surface of the rewiring layer 202 and the first surface of the circuit layer 301.

[0056] For example, a wire bonding process may be used to form the metal connection line 402 between the second surface of the rewiring layer 202 and the first surface of the circuit layer 301. The metal connection line 402 may be one of a gold wire and a silver wire.

[0057] like Fig.10 As shown, the next step is to proceed to step 6), using a packaging layer 403 to package the fingerprint processing chip 20 and the fingerprint collection chip 401.

[0058] For example, the method of using the encapsulation layer 403 to encapsulate the fingerprint processing chip 20 and the fingerprint collection chip 401 includes one of compression molding, transfer molding, liquid sealing molding, vacuum lamination and spin coating, and the material of the encapsulation layer 403 includes one of polyimide, silica gel and epoxy resin. After the fingerprint processing chip 20 and the fingerprint collection chip 401 are encapsulated by the encapsulation layer 403, the fingerprint collection chip 401 is exposed on the top surface of the encapsulation layer 403 to improve the collection accuracy of the fingerprint collection chip 401.

[0059] like Fig.11 As shown, step 7) is then performed to form metal bumps 501 on the second surface of the circuit layer 301 .

[0060] Step 7) Before forming the metal bump 501, the step further includes peeling off the support substrate and the circuit layer 301 based on the separation layer to expose the second surface of the circuit layer 301. In this embodiment, the light-to-heat conversion layer is irradiated with a laser to separate the light-to-heat conversion layer from the encapsulation layer 403 and the support substrate, and then the encapsulation layer 403 and the support substrate are peeled off.

[0061] The metal bump 501 can be one of tin solder, silver solder and gold-tin alloy solder.

[0062] Finally, step 8) is performed to cut the circuit layer 301 to obtain a packaging structure of an independent fan-out fingerprint recognition chip.

[0063] like Fig.11 As shown, this embodiment also provides a packaging structure of a fan-out fingerprint recognition chip, the packaging structure comprising: a circuit layer 301, the circuit layer 301 comprising a first surface and a second surface electrically connected; a fingerprint processing chip 20, the first surface of the fingerprint processing chip 20 having a rewiring layer 202, the rewiring layer 202 being used for electrical lead-out of the fingerprint processing chip 20, the second surface of the fingerprint chip being adhered to the first surface of the circuit layer 301; a fingerprint collection chip 401, the fingerprint collection chip 401 being electrically bonded to the second surface of the rewiring layer 202; a metal connection 402, connected to the second surface of the rewiring layer 202 and the first surface of the circuit layer 301; a packaging layer 403, covering the fingerprint processing chip 20 and the fingerprint collection chip 401; and a metal bump 501, formed on the second surface of the circuit layer 301.

[0064] Optionally, the fingerprint collection chip 401 and the fingerprint processing chip 20 are vertically stacked. The present invention adopts a fan-out package (Fan out) fingerprint recognition chip, which can integrate the fingerprint collection chip 401 and the fingerprint processing chip 20 in the same packaging structure, and the fingerprint collection chip 401 and the fingerprint processing chip 20 are vertically stacked. Compared with other existing fingerprint recognition chip packages, it has the advantages of low cost, small thickness, and high yield, and at the same time, it can effectively improve the response speed of the packaging structure.

[0065] The material of the packaging layer 403 includes one of polyimide, silicone and epoxy resin. The metal bump 501 includes one of tin solder, silver solder and gold-tin alloy solder. The metal connection line 402 includes one of gold wire and silver wire.

[0066] The fingerprint collection chip 401 is exposed on the top surface of the packaging layer 403 to improve the collection accuracy of the fingerprint collection chip 401 .

[0067] As described above, the packaging structure and packaging method of the fan-out fingerprint recognition chip of the present invention have the following beneficial effects:

[0068] 1) The present invention adopts a fan-out package (Fan out) fingerprint recognition chip, which can integrate the fingerprint collection chip 401 and the fingerprint processing chip 20 in the same packaging structure, and the fingerprint collection chip 401 and the fingerprint processing chip 20 are vertically stacked. Compared with other existing fingerprint recognition chip packages, it has the advantages of low cost, small thickness and high yield.

[0069] 2) The fingerprint collection chip 401 and the fingerprint processing chip 20 of the present invention are vertically stacked, which can effectively improve the response speed of the packaging structure.

[0070] Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0071] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A packaging method for a fan-out fingerprint recognition chip, characterized in that: Includes steps: 1) providing a fingerprint processing chip wafer, wherein the fingerprint processing chip wafer has a plurality of fingerprint processing chips arranged in an array, each of the fingerprint processing chips being provided with corresponding electrodes, firstly forming a seed layer on the fingerprint processing chip wafer, then etching the seed layer to form a patterned seed layer, wherein the patterned seed layer is connected to the electrodes of the fingerprint processing chip, and then forming a rewiring layer on the fingerprint processing chip wafer based on the patterned seed layer, wherein the first surface of the rewiring layer is connected to the fingerprint processing chip wafer, and the rewiring layer is used for electrical lead-out of the fingerprint processing chip; 2) cutting the fingerprint processing chip wafer and the rewiring layer to obtain an independent fingerprint processing chip; 3) providing a circuit layer, adhering the fingerprint processing chip to a first surface of the circuit layer, with the rewiring layer facing away from the circuit layer; 4) providing a fingerprint collection chip, and electrically bonding the fingerprint collection chip to the second surface of the rewiring layer, wherein the fingerprint collection chip and the fingerprint processing chip are vertically stacked; 5) connecting the second surface of the rewiring layer and the first surface of the circuit layer using metal wires; 6) Using a packaging layer to encapsulate the fingerprint processing chip and the fingerprint collection chip; 7) forming metal bumps on the second surface of the circuit layer; 8) Cutting the circuit layer to obtain an independent fan-out fingerprint recognition chip packaging structure.

2. The packaging method of the fan-out fingerprint recognition chip according to claim 1, characterized in that: The method of using the packaging layer to package the fingerprint processing chip and the fingerprint collection chip includes one of compression molding, transfer molding, liquid sealing molding, vacuum lamination and spin coating, and the material of the packaging layer includes one of polyimide, silicone and epoxy resin.

3. The packaging method of the fan-out fingerprint recognition chip according to claim 1, characterized in that: Step 6) After the fingerprint processing chip and the fingerprint collection chip are encapsulated by a packaging layer, the fingerprint collection chip is exposed on the top surface of the packaging layer.

4. The packaging method of the fan-out fingerprint recognition chip according to claim 1, characterized in that: Step 5) Using a wire bonding process to form the metal connection between the second surface of the rewiring layer and the first surface of the circuit layer.

5. The packaging method of the fan-out fingerprint recognition chip according to claim 4, characterized in that: The metal connection wire includes one of a gold wire and a silver wire.

6. The packaging method of the fan-out fingerprint recognition chip according to claim 1, characterized in that: The metal bump includes one of tin solder, silver solder and gold-tin alloy solder.

Images