Three-dimensional stacking structure and preparation method thereof

Abstract

The present invention provides a three-dimensional stacked structure and a preparation method thereof, wherein the three-dimensional stacked structure comprises a plurality of electrically connected semiconductor packaging structures, wherein the semiconductor packaging structure comprises a circuit board, a chip, a metal welding wire, a packaging layer body, a first metal bump and a second metal bump; the first metal bump is located on the top surface of the packaging layer body and is electrically connected to the first metal welding wire, and the second metal bump is located on the side surface of the packaging layer body and is electrically connected to the second metal welding wire; the electrical lead-out end of the semiconductor packaging structure comprises the first metal bump, the second metal bump and the second surface of the circuit board, and the plurality of semiconductor packaging structures are electrically connected through the electrical lead-out end to form a three-dimensional stacked structure. The present invention has a simple preparation process, and the semiconductor packaging structure can be electrically connected longitudinally, transversely and laterally as required, which can improve the flexibility of the three-dimensional packaging, expand the application of the three-dimensional packaging, and improve the density of the semiconductor packaging structure.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a three-dimensional stacking structure and a preparation method thereof. Background Art

[0002] As integrated circuits become more powerful, more performant and more integrated, packaging technology plays an increasingly important role in integrated circuit products. Lower cost, more reliable, faster and higher density circuits are the goals pursued by integrated circuit packaging. With the rapid development of electronic information technology and the continuous improvement of people's consumption level, the functions of electronic devices are becoming increasingly diversified and their sizes are becoming increasingly miniaturized, which makes the density of chips and functional components in the internal structure of electronic devices continue to increase, while the key dimensions of devices continue to decrease, which brings great challenges to the semiconductor packaging industry.

[0003] At present, in order to improve the density of semiconductor packaging structure, through silicon via (TSV) technology is usually used to achieve 3D packaging, that is, using short vertical electrical connections or "through holes" through silicon wafers to establish electrical connections from the effective side of the chip to the back side. This method can only be stacked in a single direction along the vertical direction, and circuit connections can only be achieved horizontally through the circuits in the substrate or circuit board, thus limiting the flexibility and application of 3D packaging.

[0004] Therefore, it is necessary to provide a three-dimensional stacking structure and a preparation method thereof to improve the flexibility of 3D packaging, expand the application of 3D packaging, and increase the density of semiconductor packaging structure. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a three-dimensional stacking structure and a preparation method thereof, so as to improve the flexibility of 3D packaging, expand the application of 3D packaging, and increase the density of semiconductor packaging structure.

[0006] To achieve the above object and other related objects, the present invention provides a method for preparing a three-dimensional stacked structure, comprising the following steps:

[0007] Providing a circuit board, the circuit board comprising a first circuit board surface and a correspondingly arranged second circuit board surface;

[0008] Providing a chip, and bonding the chip to the first surface of the circuit board;

[0009] Using a wire bonding process to electrically connect the chip and the circuit board through metal bonding wires;

[0010] Forming a packaging layer, and removing part of the packaging layer to expose a packaging layer body, wherein the packaging layer body covers the first surface of the circuit board, the chip and the metal bonding wires; in the packaging layer body, the metal bonding wires include first metal bonding wires, second metal bonding wires and third metal bonding wires, the first metal bonding wires are exposed on the top surface of the packaging layer body, the second metal bonding wires are exposed on the side surface of the packaging layer body, and the circuit board and the chip are electrically connected through the third metal bonding wires;

[0011] A first metal bump is formed on the top surface of the packaging layer body, and the first metal bump is electrically connected to the first metal bonding wire; a second metal bump is formed on the side surface of the packaging layer body, and the second metal bump is electrically connected to the second metal bonding wire to form a semiconductor packaging structure, wherein the electrical lead-out end of the semiconductor packaging structure includes the first metal bump, the second metal bump, and the second surface of the circuit board;

[0012] A plurality of the semiconductor package structures are electrically connected via the electrical lead-out terminals to form the three-dimensional stacking structure.

[0013] Optionally, the method for forming the three-dimensional stacked structure includes electrically connecting a plurality of the semiconductor package structures through one or a combination of the first metal bump, the second metal bump and the second surface of the circuit board to form the three-dimensional stacked structure.

[0014] Optionally, the method of forming the three-dimensional stacked structure includes one or a combination of a welding method and a bonding method.

[0015] Optionally, a method of removing part of the encapsulation layer to expose the main body of the encapsulation layer includes one or a combination of chemical mechanical polishing, laser cutting and blade cutting.

[0016] Optionally, the method of forming the first metal bump includes one or a combination of electroplating, PVD, CVD and welding; the method of forming the second metal bump includes one or a combination of electroplating, PVD, CVD and welding.

[0017] The present invention further provides a three-dimensional stacked structure, the three-dimensional stacked structure comprising a plurality of electrically connected semiconductor package structures, the semiconductor package structure comprising:

[0018] A circuit board, the circuit board comprising a first circuit board surface and a correspondingly arranged second circuit board surface;

[0019] A chip, wherein the chip is bonded to the first surface of the circuit board;

[0020] Metal bonding wires, the metal bonding wires comprising a first metal bonding wire, a second metal bonding wire and a third metal bonding wire, the first ends of the metal bonding wires are electrically connected to the chip, and the second ends of the third metal bonding wires are electrically connected to the circuit board;

[0021] A packaging layer body, wherein the packaging layer body covers the first surface of the circuit board, the chip and the metal bonding wire, and the top surface of the packaging layer body exposes the second end of the first metal bonding wire, and the side surface of the packaging layer body exposes the second end of the second metal bonding wire;

[0022] a first metal bump, the first metal bump being located on the top surface of the packaging layer body and being electrically connected to the second end of the first metal bonding wire;

[0023] a second metal bump, the second metal bump being located on a side surface of the packaging layer body and being electrically connected to a second end of the second metal bonding wire;

[0024] The electrical lead-out ends of the semiconductor package structure include the first metal bump, the second metal bump and the second surface of the circuit board, and a plurality of the semiconductor package structures are electrically connected through the electrical lead-out ends to form the three-dimensional stacked structure.

[0025] Optionally, the plurality of semiconductor package structures are electrically connected via one or a combination of the first metal bump, the second metal bump and the second surface of the circuit board.

[0026] Optionally, the first metal bump includes one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump; the second metal bump includes one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump.

[0027] Optionally, the metal bonding wire includes one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

[0028] Optionally, the packaging layer body includes one of a polyimide packaging layer, a silicone packaging layer and an epoxy resin packaging layer.

[0029] As described above, the three-dimensional stacked structure and preparation method of the present invention, by removing part of the packaging layer, expose the main body of the packaging layer, expose the first metal welding wire through the top surface of the main body of the packaging layer, expose the second metal welding wire on the side of the main body of the packaging layer, and form a first metal bump electrically connected to the first metal welding wire and a second metal bump electrically connected to the second metal welding wire, thereby forming a semiconductor packaging structure including the first metal bump, the second metal bump and the electrical lead-out terminal of the second surface of the circuit board, so as to electrically connect multiple semiconductor packaging structures to form a three-dimensional stacked structure through the electrical lead-out terminal. The preparation process of the present invention is simple, and the semiconductor packaging structure can be electrically connected in the longitudinal, transverse and lateral directions as required, which can improve the flexibility of the three-dimensional packaging, expand the application of the three-dimensional packaging, and improve the density of the semiconductor packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 Shown is a schematic diagram of the process flow for preparing a three-dimensional stacked structure in the present invention.

[0031] Figure 2 to Figure 7 It is a schematic diagram showing the structure of each step of forming a three-dimensional stacked structure in the present invention, wherein Figure 6 It is a schematic diagram showing a structure for forming a semiconductor package structure. Figure 7 A schematic diagram showing the structure forming a three-dimensional stacked structure.

[0032] Component number description

[0033] 100 Circuit Boards

[0034] 200 chips

[0035] 300 Metal welding wire

[0036] 301 First Metal Bonding Wire

[0037] 302 Second Metal Bonding Wire

[0038] 303 Third Metal Bonding Wire

[0039] 400 Encapsulation Layer

[0040] 401 Encapsulation main layer

[0041] 402 Encapsulation layer to be removed

[0042] 501 First metal bump

[0043] 502 second metal bump

[0044] 110 Semiconductor packaging structure

[0045] 120 Three-dimensional stacking structure DETAILED DESCRIPTION

[0046] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0047] See also Figure 1 to Figure 7 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0048] like Figure 1 The present embodiment provides a method for preparing a three-dimensional stacked structure, by removing part of the packaging layer to expose the main body of the packaging layer, so as to expose the first metal welding wire through the top surface of the main body of the packaging layer, and expose the second metal welding wire through the side surface of the main body of the packaging layer, and form a first metal bump electrically connected to the first metal welding wire and a second metal bump electrically connected to the second metal welding wire, thereby forming a semiconductor packaging structure including the first metal bump, the second metal bump and the electrical lead-out terminal of the second surface of the circuit board, so as to electrically connect multiple semiconductor packaging structures to form a three-dimensional stacked structure through the electrical lead-out terminal. The preparation process of the present embodiment is simple, and the semiconductor packaging structure can be electrically connected in the longitudinal, transverse and lateral directions as required, which can improve the flexibility of the three-dimensional packaging, expand the application of the three-dimensional packaging, and improve the density of the semiconductor packaging structure.

[0049] like Figure 2 to Figure 7 , which illustrates the structural schematic diagram of each step in preparing a three-dimensional stacked structure.

[0050] like Figure 2 , providing a circuit board 100, wherein the circuit board 100 includes a first surface of the circuit board and a corresponding second surface of the circuit board, wherein the circuit board 100 includes electrical leads, and the types of the circuit board 100 may include a rigid circuit board, a flexible circuit board, and RDL, etc., which are not excessively restricted here.

[0051] A chip 200 is provided, and the chip 200 is bonded to the first surface of the circuit board. The type, number and distribution of the chip 200 are not limited here. The method of bonding the chip 200 to the first surface of the circuit board can be a film bonding method or a gluing method, which is selected according to specific needs and is not excessively limited here.

[0052] like Figure 3 , using a wire bonding process, the chip 200 and the circuit board 100 are electrically connected through metal bonding wires 300.

[0053] Specifically, one end of the metal bonding wire 300 may be electrically connected to the chip pad on the chip 200, and the other end of the metal bonding wire 300 may be electrically connected to the circuit board pad on the first surface of the circuit board. The bonding wire process may adopt a thermosonic bonding wire process, and the number and distribution of the metal bonding wires 300 may be selected as required, and no excessive restrictions are imposed here.

[0054] As a further embodiment of this embodiment, the metal bonding wire 300 may include one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire. Preferably, the metal bonding wire 300 uses the inexpensive Cu wire to reduce costs.

[0055] like Figure 4 , forming a packaging layer 400, wherein the packaging layer 400 covers the first surface of the circuit board, the chip 200 and the metal bonding wire 300, wherein the packaging layer 400 includes a packaging layer body 401 ( Figure 4 dotted box area) and the packaging layer 402 to be removed.

[0056] As a further embodiment of this embodiment, the encapsulation layer 400 may include one of a polyimide encapsulation layer, a silicone encapsulation layer and an epoxy resin encapsulation layer; the method of forming the encapsulation layer 400 may include one of compression molding, transfer molding, liquid sealing molding, vacuum lamination and spin coating.

[0057] like Figure 5 , remove the packaging layer 402 to be removed, and at the same time remove part of the metal bonding wire 300 located in the packaging layer 402 to be removed, so as to expose the packaging layer body 401. The packaging layer body 401 covers the first surface of the circuit board, the chip 200 and the metal bonding wire 300. Specifically, in the packaging layer body 401, the metal bonding wire 300 includes a first metal bonding wire 301, a second metal bonding wire 302 and a third metal bonding wire 303, the top surface of the packaging layer body 401 exposes the first metal bonding wire 301, the side surface of the packaging layer body 401 exposes the second metal bonding wire 302, and the circuit board 100 and the chip 200 are electrically connected through the third metal bonding wire 303.

[0058] As a further embodiment of this embodiment, a method of removing the packaging layer 402 to be removed and exposing the packaging layer body 401 includes one or a combination of chemical mechanical polishing, laser cutting and blade cutting.

[0059] Specifically, the encapsulation layer 400 may be thinned from the upper surface of the encapsulation layer 400 or from the side of the encapsulation layer 400 to expose the surface of the encapsulation layer body 401 , but this is not limited thereto and the specific method is not overly limited here.

[0060] like Figure 6 A first metal bump 501 is formed on the top surface of the packaging layer body 401, and the first metal bump 501 is electrically connected to the first metal welding wire 301; a second metal bump 502 is formed on the side surface of the packaging layer body 401, and the second metal bump 502 is electrically connected to the second metal welding wire 303 to form a semiconductor packaging structure 110, and the electrical lead-out end of the semiconductor packaging structure 110 includes the first metal bump 501, the second metal bump 502 and the second surface of the circuit board.

[0061] like Figure 7 , the plurality of semiconductor package structures 110 are electrically connected through the electrical lead-out terminals to form the three-dimensional stacked structure 120 .

[0062] As a further embodiment of this embodiment, the method for forming the three-dimensional stacked structure 120 includes electrically connecting multiple semiconductor packaging structures 110 through one or a combination of the first metal bump 501, the second metal bump 502 and the second surface of the circuit board to form the three-dimensional stacked structure 120.

[0063] Specifically, Figure 7 , the plurality of semiconductor package structures 110 can be electrically connected through one or a combination of the first metal bump 501, the second metal bump 502 and the second surface of the circuit board, wherein the specific morphology, quantity and distribution of the semiconductor package structure 110 can be set as required. In this embodiment, the semiconductor package structure 110 can be electrically connected longitudinally, transversely and laterally as required through the first metal bump 501, the second metal bump 502 and the second surface of the circuit board, which can improve the flexibility of three-dimensional packaging, expand the application of three-dimensional packaging, and improve the density of the semiconductor package structure 110.

[0064] As a further embodiment of this embodiment, the method for forming the first metal bump 501 includes one or a combination of electroplating, PVD, CVD and welding; the method for forming the second metal bump 502 includes one or a combination of electroplating, PVD, CVD and welding.

[0065] Specifically, the first metal bump 501 includes one of a copper metal bump, a nickel metal bump, a tin metal bump, and a silver metal bump; the second metal bump 502 includes one of a copper metal bump, a nickel metal bump, a tin metal bump, and a silver metal bump. The first metal bump 501 and the second metal bump 502 can be prepared by the same preparation method and the same material to reduce the process cost, but are not limited thereto.

[0066] like Figure 6 and Figure 7 This embodiment further provides a three-dimensional stacked structure 120. The preparation of the three-dimensional stacked structure 120 can refer to the above preparation method, but is not limited thereto.

[0067] The three-dimensional stacked junction 120 includes a plurality of electrically connected semiconductor package structures 110, and the semiconductor package structure 110 includes:

[0068] A circuit board 100, wherein the circuit board 100 comprises a first circuit board surface and a corresponding second circuit board surface;

[0069] A chip 200, wherein the chip 200 is bonded to the first surface of the circuit board;

[0070] Metal bonding wires, the metal bonding wires comprising a first metal bonding wire 301, a second metal bonding wire 302 and a third metal bonding wire 303, the first ends of the metal bonding wires are electrically connected to the chip 200, and the second ends of the third metal bonding wires 303 are electrically connected to the circuit board 100;

[0071] A packaging layer body 401, wherein the packaging layer body 401 covers the first surface of the circuit board, the chip 200 and the metal bonding wire, and the top surface of the packaging layer body 401 exposes the second end of the first metal bonding wire 301, and the side surface of the packaging layer body 401 exposes the second end of the second metal bonding wire 303;

[0072] a first metal bump 501, wherein the first metal bump 501 is located on the top surface of the packaging layer body 401 and is electrically connected to the second end of the first metal bonding wire 301;

[0073] a second metal bump 502 , the second metal bump 502 being located on a side surface of the packaging layer body 401 and being electrically connected to a second end of the second metal bonding wire 302 ;

[0074] The electrical lead-out terminals of the semiconductor package structure 110 include the first metal bump 501 , the second metal bump 502 and the second surface of the circuit board, and a plurality of the semiconductor package structures 110 are electrically connected through the electrical lead-out terminals to form the three-dimensional stacked structure 120 .

[0075] As a further embodiment of this embodiment, the plurality of semiconductor package structures 110 are electrically connected through one or a combination of the first metal bump 501 , the second metal bump 502 and the second surface of the circuit board.

[0076] As a further embodiment of this embodiment, the first metal bump 501 includes one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump; the second metal bump 502 includes one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump.

[0077] As a further embodiment of this embodiment, the metal bonding wire includes one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

[0078] As a further embodiment of this embodiment, the packaging layer body 401 includes one of a polyimide packaging layer, a silicone packaging layer and an epoxy resin packaging layer.

[0079] In summary, the three-dimensional stacking structure and preparation method of the present invention, by removing part of the packaging layer, exposes the main body of the packaging layer, exposes the first metal welding wire through the top surface of the main body of the packaging layer, exposes the second metal welding wire on the side of the main body of the packaging layer, and forms a first metal bump electrically connected to the first metal welding wire and a second metal bump electrically connected to the second metal welding wire, thereby forming a semiconductor packaging structure including the first metal bump, the second metal bump and the electrical lead-out terminal of the second surface of the circuit board, so as to electrically connect multiple semiconductor packaging structures through the electrical lead-out terminal to form a three-dimensional stacking structure. The preparation process of the present invention is simple, and the semiconductor packaging structure can be electrically connected in the longitudinal, transverse and lateral directions as required, which can improve the flexibility of the three-dimensional packaging, expand the application of the three-dimensional packaging, and improve the density of the semiconductor packaging structure. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.

[0080] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a three-dimensional stacked structure, characterized in that: The following steps are involved: Providing a circuit board, the circuit board comprising a first circuit board surface and a correspondingly arranged second circuit board surface; Providing a chip, and bonding the chip to the first surface of the circuit board; Using a wire bonding process to electrically connect the chip and the circuit board through metal bonding wires; Forming a packaging layer, and removing part of the packaging layer to expose a packaging layer body, wherein the packaging layer body covers the first surface of the circuit board, the chip and the metal bonding wires; in the packaging layer body, the metal bonding wires include first metal bonding wires, second metal bonding wires and third metal bonding wires, the first metal bonding wires are exposed on the top surface of the packaging layer body, the second metal bonding wires are exposed on the side surface of the packaging layer body, and the circuit board and the chip are electrically connected through the third metal bonding wires; A first metal bump is formed on the top surface of the packaging layer body, and the first metal bump is electrically connected to the first metal bonding wire; a second metal bump is formed on the side surface of the packaging layer body, and the second metal bump is electrically connected to the second metal bonding wire to form a semiconductor packaging structure, wherein the electrical lead-out end of the semiconductor packaging structure includes the first metal bump, the second metal bump, and the second surface of the circuit board; A plurality of the semiconductor package structures are electrically connected via the electrical lead-out terminals to form the three-dimensional stacking structure.

2. The method for preparing a three-dimensional stacked structure according to claim 1, characterized in that: The method for forming the three-dimensional stacked structure includes electrically connecting a plurality of the semiconductor package structures through one of a combination of the first metal bump, the second metal bump, and the second surface of the circuit board to form the three-dimensional stacked structure.

3. The method for preparing a three-dimensional stacked structure according to claim 1, characterized in that: The method of forming the three-dimensional stacked structure includes one or a combination of a welding method and a bonding method.

4. The method for preparing a three-dimensional stacked structure according to claim 1, characterized in that: The method of removing part of the packaging layer to expose the main body of the packaging layer includes one or a combination of chemical mechanical polishing, laser cutting and blade cutting.

5. The method for preparing a three-dimensional stacked structure according to claim 1, characterized in that: The method of forming the first metal bump includes one or a combination of electroplating, PVD, CVD and welding; the method of forming the second metal bump includes one or a combination of electroplating, PVD, CVD and welding.

6. A three-dimensional stacked structure, characterized in that: The three-dimensional stacked structure includes a plurality of electrically connected semiconductor package structures, and the semiconductor package structure includes: A circuit board, the circuit board comprising a first circuit board surface and a correspondingly arranged second circuit board surface; A chip, wherein the chip is bonded to the first surface of the circuit board; Metal bonding wires, the metal bonding wires comprising a first metal bonding wire, a second metal bonding wire and a third metal bonding wire, the first ends of the metal bonding wires are electrically connected to the chip, and the second ends of the third metal bonding wires are electrically connected to the circuit board, the metal bonding wires comprising one or a combination of Cu wires, Au wires, Cu alloy wires, Au alloy wires and Cu / Au alloy wires; A packaging layer body, wherein the packaging layer body covers the first surface of the circuit board, the chip and the metal bonding wire, and the top surface of the packaging layer body exposes the second end of the first metal bonding wire, and the side surface of the packaging layer body exposes the second end of the second metal bonding wire; a first metal bump, the first metal bump being located on the top surface of the packaging layer body and being electrically connected to the second end of the first metal bonding wire, the first metal bump comprising one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump; a second metal bump, the second metal bump being located on a side surface of the encapsulation layer body and being electrically connected to a second end of the second metal bonding wire, the second metal bump comprising one of a copper metal bump, a nickel metal bump, a tin metal bump and a silver metal bump; The electrical lead-out ends of the semiconductor package structure include the first metal bump, the second metal bump and the second surface of the circuit board, and a plurality of the semiconductor package structures are electrically connected through the electrical lead-out ends to form the three-dimensional stacked structure.

7. The three-dimensional stacked structure according to claim 6, characterized in that: The plurality of semiconductor package structures are electrically connected via a combination of the first metal bump, the second metal bump and the second surface of the circuit board.

8. The three-dimensional stacked structure according to claim 6, characterized in that: The packaging layer body includes one of a polyimide packaging layer, a silicone packaging layer and an epoxy resin packaging layer.

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