Display device

Abstract

According to an exemplary embodiment, a display device includes: a plurality of transistors disposed on a substrate; a plurality of pixel electrodes electrically connected to the plurality of transistors; a plurality of first color filters, a plurality of second color filters, and a plurality of third color filters disposed between the plurality of transistors and the plurality of pixel electrodes; and a plurality of main spacers and a plurality of sub-spacers disposed on the plurality of pixel electrodes, wherein the plurality of main spacers and the plurality of sub-spacers are arranged to overlap with selected portions of the plurality of first color filters, respectively, in a plan view, and do not overlap with the plurality of second color filters and the plurality of third color filters in a plan view.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0087533 filed in the Korean Intellectual Property Office on July 19, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] A display device such as a liquid crystal display (LCD) and an organic light emitting diode display (OLED) generally includes a display panel including a plurality of pixels as a unit for displaying an image.

[0005] The display panel of the liquid crystal display includes: a liquid crystal layer including liquid crystals; a field generating electrode for controlling the orientation of the liquid crystals of the liquid crystal layer; a plurality of signal lines for applying voltage to at least a portion of the field generating electrodes; and a plurality of switching elements connected thereto. When a voltage is applied to the field generating electrodes, an electric field is generated in the liquid crystal layer, causing the liquid crystals to rearrange, thereby adjusting the amount of light transmitted to display a desired image. The display panel may include at least one polarizer, which is a filter that allows light waves of a specific polarization to pass while blocking light waves of other polarizations.

[0006] The field generating electrodes included in the liquid crystal display include a pixel electrode receiving a data voltage and a common electrode receiving a common voltage. The pixel electrode may receive the data voltage through a switching element, which may be a transistor.

[0007] The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Summary of the invention

[0008] The present disclosure is directed to providing a display device which reduces a threshold voltage variation of a transistor included in the display device and improves reliability of the device because a partition is stably formed.

[0009] According to an exemplary embodiment, a display device includes: a plurality of transistors disposed on a substrate; a plurality of pixel electrodes electrically connected to the plurality of transistors; a plurality of first color filters, a plurality of second color filters, and a plurality of third color filters disposed between the plurality of transistors and the plurality of pixel electrodes; and a plurality of main spacers and a plurality of sub-spacers disposed on the plurality of pixel electrodes, wherein the plurality of main spacers and the plurality of sub-spacers are arranged to overlap with selected portions of the plurality of first color filters, respectively, in a plan view, and do not overlap with the plurality of second color filters and the plurality of third color filters in a plan view.

[0010] The plurality of first color filters may be red color filters.

[0011] The method may further include: a plurality of color filter patterns overlapping at least one selected portion of the selected portions of the plurality of second color filters and the plurality of third color filters in a plan view.

[0012] The plurality of color filter patterns may overlap with the plurality of transistors overlapping with the plurality of second color filters and the plurality of transistors overlapping with the plurality of third color filters in a plan view.

[0013] The plurality of color filter patterns may be disposed between the plurality of second color filters and the substrate and between the plurality of third color filters and the substrate. The plurality of color filter patterns may present the same color as the plurality of first color filters.

[0014] Each of the plurality of transistors may include a first transistor and a second transistor, and each of the plurality of main spacers may be disposed between the first transistor and the second transistor in a plan view.

[0015] Each of the plurality of sub-spacers may overlap the first transistor or the second transistor.

[0016] Each of the plurality of color filter patterns may overlap the first transistor and the second transistor at the same time.

[0017] The plurality of sub-spacers may include a plurality of first sub-spacers disposed to simultaneously overlap selected portions of the plurality of second color filters and the plurality of third color filters disposed adjacent to each other.

[0018] The plurality of sub-spacers may include: a plurality of second sub-spacers arranged to overlap with a selected portion of the selected portions of the plurality of second color filters or the plurality of third color filters and a plurality of data lines arranged to be adjacent to the selected portion of the selected portions of the plurality of second color filters or the plurality of third color filters.

[0019] A display device according to an exemplary embodiment includes: a plurality of transistors disposed on a substrate; a plurality of pixel electrodes electrically connected to the plurality of transistors; a plurality of color filters overlapping the plurality of pixel electrodes; and a plurality of main spacers and a plurality of sub-spacers disposed on the plurality of pixel electrodes, wherein the plurality of main spacers and the plurality of sub-spacers overlap selected portions of the plurality of color filters presenting the same color.

[0020] The plurality of color filter patterns may be connected to the first color filter.

[0021] The display device according to the exemplary embodiments may reduce a threshold voltage variation of a transistor and improve reliability of the device through a stably disposed spacer. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a layout diagram of three adjacent pixels of a display device according to an exemplary embodiment.

[0023] Figure 2 It is taken along line IIa-IIb Figure 1 A cross-sectional view of a display device shown in FIG.

[0024] Figure 3 is a layout diagram of a portion of three adjacent pixels of a display device according to an exemplary embodiment.

[0025] Figure 4 It is taken along line IVa-IVb Figure 3 A cross-sectional view of a display device shown in FIG.

[0026] Figure 5 is a layout diagram of another portion of three adjacent pixels of a display device according to an exemplary embodiment.

[0027] Figure 6 It is taken along line VIa-VIb Figure 5 A cross-sectional view of a display device shown in FIG.

[0028] Figure 7 and Figure 8 1 and 2 are layout diagrams of a portion of three adjacent pixels of a display device according to an exemplary embodiment, respectively.

[0029] Fig. 9 and Fig.10 1 and 2 are layout diagrams of a portion of three adjacent pixels of a display device according to an exemplary embodiment, respectively.

[0030] Fig.11 It is along Fig.10 A cross-sectional view taken along line XIa-XIb.

[0031] Fig.12 is a graph illustrating a stain generation leakage voltage according to an exemplary embodiment. DETAILED DESCRIPTION

[0032] The inventive concept will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the inventive concept are shown. As will be appreciated by those skilled in the art, the described embodiments may be modified in various different ways, all without departing from the spirit and scope of the inventive concept.

[0033] Description of parts not related to the present inventive concept is omitted, and the same reference numerals denote the same elements throughout the specification.

[0034] In addition, because the sizes and thicknesses of the constituent members shown in the drawings are arbitrarily given for better understanding and ease of description, the inventive concept is not limited to the sizes and thicknesses shown. In the drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. In the drawings, the thicknesses of some layers and regions are exaggerated for better understanding and ease of description.

[0035] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on the other element, or there may be intervening elements. Conversely, when an element is referred to as being "directly on" another element, there are no intervening elements. In addition, in this specification, the term "on" or "above" refers to being located on or below an object portion, and does not necessarily mean being located on the upper side of an object portion based on the direction of gravity.

[0036] In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “include” or “comprising”, will be understood to imply the inclusion of listed elements but not the exclusion of any other elements.

[0037] Furthermore, in this specification, the phrase "on a plane" means observing an object portion from the top, and the phrase "on a cross section" means observing a cross section cutting the object portion vertically from the side.

[0038] Throughout this specification and the appended claims, a plan view refers to a view when observing a surface parallel to two directions intersecting each other (e.g., direction DR1 and direction DR2), and a cross-sectional view refers to a view when observing a surface cut in a direction perpendicular to the surface parallel to directions DR1 and DR2 (e.g., direction DR3). In addition, overlapping two constituent elements means that, unless otherwise specified, the two constituent elements overlap in direction DR3 (e.g., a direction perpendicular to the upper surface of the substrate).

[0039] Now, refer to Figure 1 and Figure 2A display device according to an exemplary embodiment is described. Figure 1 is a layout diagram of three adjacent pixels of a display device according to an exemplary embodiment, and Figure 2 It is taken along line IIa-IIb Figure 1 A cross-sectional view of a display device shown in FIG.

[0040] Reference Figure 1 and Figure 2 In a plan view, the display device according to the exemplary embodiment includes a display area capable of displaying an image, and the display area includes a plurality of pixels PXa, PXb, and PXc. The pixels PXa, PXb, and PXc may be alternately arranged along a first direction DR1.

[0041] The display device according to an exemplary embodiment may include a first display panel 100 , a second display panel 200 overlapping the first display panel 100 , and a liquid crystal layer 3 disposed between the first display panel 100 and the second display panel 200 .

[0042] The first display panel 100 includes a gate conductive layer ( 121 and 131 ) disposed on a first substrate 110 including an insulating material such as glass, plastic, etc. The gate conductive layer ( 121 and 131 ) includes a gate line 121 , a storage electrode line 131 , and the like.

[0043] The gate line 121 may extend mainly in the first direction DR1 and transmit a gate signal. The gate line 121 may include a first gate electrode 124a and a second gate electrode 124b disposed in each pixel PXa, PXb, or PXc.

[0044] The gate line 121 in each pixel PXa, PXb or PXc may include openings 21a and 21b disposed between the first data line 171a and the second data line 171b. The opening 21a may be disposed between the first data line 171a and the first gate electrode 124a, and the opening 21b may be disposed between the second data line 171b and the second gate electrode 124b. The openings 21a and 21b may be completely surrounded by the gate line 121.

[0045] The storage electrode line 131 may include a transverse portion 131a extending substantially parallel to the gate line 121, and a longitudinal portion 131b connected to the transverse portion 131a and extending substantially perpendicular to the gate line 121. The longitudinal portion 131b of the storage electrode line 131 may extend along a boundary between two adjacent pixels of PXa, PXb, and PXc.

[0046] The gate insulating layer 140 is disposed on the gate conductive layer (121 and 131). The gate insulating layer 140 may include an inorganic insulating material such as silicon nitride (SiN x), silicon oxide (SiO x ) and silicon oxynitride (SiON).

[0047] Semiconductor layers (154a and 154b) including a first semiconductor layer 154a and a second semiconductor layer 154b are disposed on the gate insulating layer 140. The first semiconductor layer 154a may overlap the first gate electrode 124a, and the second semiconductor layer 154b may overlap the second gate electrode 124b.

[0048] The semiconductor layer (154a and 154b) may include amorphous silicon, polysilicon, or metal oxide.

[0049] The ohmic contact layers 163a and 165a may be disposed on the semiconductor layers (154a and 154b). One pair of ohmic contact layers 163a and 165a may be disposed on the first semiconductor layer 154a, and another pair of ohmic contact layers may be disposed on the second semiconductor layer 154b. The ohmic contact layers may be made of a material such as silicide or n+ hydrogenated amorphous silicon doped with n-type impurities at a high concentration. The ohmic contact layers 163a and 165a may be omitted.

[0050] On the ohmic contact layers 163a and 165a, a data conductive layer (171a, 171b, 175a and 175b) including a plurality of data lines 171a and 171b including a first data line 171a and a second data line 171b, a plurality of first drain electrodes 175a and a plurality of second drain electrodes 175b is disposed.

[0051] The first and second data lines 171 a and 171 b transmit data signals and may extend mainly in the second direction DR2 to intersect the transverse portions 131 a of the storage electrode lines 131 and the gate lines 121 .

[0052] For one pixel displaying the same image signal, the first data line 171a and the second data line 171b corresponding to each pixel of the pixels PXa, PXb and PXc can respectively transmit data voltages representing different brightness. For example, for the same image signal of one pixel, the data voltage transmitted by the second data line 171b can be lower than the data voltage transmitted by the first data line 171a. The first data line 171a and the second data line 171b respectively disposed in adjacent pixels PXa, PXb and PXc can transmit data voltages for different image signals.

[0053] The first data line 171 a may include a first source electrode 173 a overlapping the first gate electrode 124 a , and the second data line 171 b may include a second source electrode 173 b overlapping the second gate electrode 124 b .

[0054] The first drain electrode 175a and the second drain electrode 175b may include a rod-shaped end and pad portions 177a and 177b, respectively. The pad portions 177a and 177b of the first drain electrode 175a and the second drain electrode 175b may be disposed between the storage electrode line 131 and the gate line 121.

[0055] Rod-shaped ends of the first drain electrode 175 a and the second drain electrode 175 b may be partially surrounded by the first source electrode 173 a and the second source electrode 173 b , respectively.

[0056] The first gate electrode 124a, the first source electrode 173a, and the first drain electrode 175a together with the first semiconductor layer 154a form a first transistor Qa, and the second gate electrode 124b, the second source electrode 173b, and the second drain electrode 175b together with the second semiconductor layer 154b form a second transistor Qb. The channels of the first transistor Qa and the second transistor Qb may be disposed in the first semiconductor layer 154a and the second semiconductor layer 154b facing each other, the first semiconductor layer 154a is located between the first source electrode 173a and the first drain electrode 175a, and the second semiconductor layer 154b is disposed between the second source electrode 173b and the second drain electrode 175b.

[0057] The first transistor Qa and the second transistor Qb disposed in each pixel PXa, PXb, and PXc may be disposed in an extension direction (i.e., a first direction DR1) of the gate line 121. In addition, in a plan view, the first transistor Qa and the second transistor Qb may be disposed between the first data line 171a and the second data line 171b corresponding to each pixel PXa, PXb, and PXc.

[0058] The first transistor Qa and the second transistor Qb may function as switching elements that transfer data voltages transmitted by the first data line 171 a and the second data line 171 b according to a gate signal transmitted by the gate line 121 .

[0059] Reference Figure 1 and Figure 2 , the region where the gate line 121, the transverse portion 131a of the storage electrode line 131, and the first transistor Qa and the second transistor Qb are disposed may be covered by the light blocking member 220. The light blocking member 220 may extend mainly in the first direction DR1 to form a light blocking region of each pixel PXa, PXb, and PXc.

[0060] The first insulating layer 180a is disposed on the data conductive layer (171a, 171b, 175a, and 175b). The first insulating layer 180a may include an organic insulating material or an inorganic insulating material.

[0061] A plurality of color filters 230 a , 230 b , and 230 c and a color filter pattern 230D may be disposed on the first insulating layer 180 a .

[0062] Each color filter 230a, 230b, and 230c can display one of the primary colors such as three primary colors or four primary colors of red, green, and blue. The color filters 230a, 230b, and 230c are not limited to the three primary colors of red, green, and blue, and can display the primary colors of cyan, magenta, yellow, and white. For example, the first color filter 230a can display red, the second color filter 230b can display green, and the third color filter 230c can display blue, but the colors of the color filters are not limited thereto.

[0063] The first color filter 230a may be arranged to correspond to the first pixel PXa, the second color filter 230b may be arranged to correspond to the second pixel PXb, and the third color filter 230c may be arranged to correspond to the third pixel PXc. In other words, the first color filter 230a may overlap with the first pixel PXa, the second color filter 230b may overlap with the second pixel PXb, and the third color filter 230c may overlap with the third pixel PXc. Each color filter 230a, 230b and 230c may extend and elongate in the second direction DR2 to correspond to a plurality of pixels arranged in a column. A group of color filters including three color filters 230a, 230b and 230c may be repeatedly arranged in the first direction DR1. That is, the three color filters 230a, 230b and 230c may be alternately arranged along the first direction DR1.

[0064] Two color filters of the color filters 230a, 230b, and 230c corresponding to two pixels of the adjacent pixels PXa, PXb, and PXc at the boundary between two pixels of the adjacent pixels PXa, PXb, and PXc may overlap each other along the third direction DR3 on the first substrate 110. For example, the color filter 230a of the first pixel PXa may overlap the color filter 230b of the adjacent second pixel PXb at the boundary between the two adjacent pixels PXa and PXb. The overlapping portion of the two color filters 230a and 230b overlapping each other may overlap the longitudinal portion 131b of the storage electrode line 131.

[0065] Two of the color filters 230a, 230b, and 230c overlapping each other between two adjacent pixels of the pixels PXa, PXb, and PXc may have a light blocking function to prevent light leakage between two adjacent pixels of the pixels PXa, PXb, and PXc.

[0066] Each of the color filters 230 a , 230 b , and 230 c may include openings 235 a and 235 b overlapping the pad portion 177 a of the first drain electrode 175 a and the pad portion 177 b of the second drain electrode 175 b , respectively.

[0067] The color filter pattern 230D presents the same color, is disposed on the same layer, contains the same material, and can be formed simultaneously with the first color filter 230a in the same process. For example, the color filter pattern 230D can present red, but the color of the color filter pattern 230D is not limited thereto, and when the first color filter 230a is a green filter, the color filter pattern 230D can present green, and when the first color filter 230a is a blue filter, the color filter pattern 230D can present blue.

[0068] The color filter pattern 230D is separated from the first color filter 230a or the first pixel PXa presenting the same color as the color filter pattern 230D, and the color filter pattern 230D can be set in the second pixel PXb and the third pixel PXc, and the second color filter 230b and the third color filter 230c presenting different colors from the first color filter 230a are formed in the second pixel PXb and the third pixel PXc.

[0069] The color filter pattern 230D disposed in the second pixel PXb and the third pixel PXc may overlap the first transistor Qa and the second transistor Qb, respectively. In detail, the color filter pattern 230D disposed in each of the second pixel PXb and the third pixel PXc may overlap the channel of the first semiconductor layer 154a of the first transistor Qa and the channel of the second semiconductor layer 154b of the second transistor Qb, respectively.

[0070] According to an exemplary embodiment, two color filter patterns 230D may be provided at each pixel PXb and PXc. The number of color filter patterns 230D included in each pixel PXb and PXc may vary according to the number of transistors included in each pixel PXb and PXc.

[0071] The color filter pattern 230D may have an island shape overlapping the transistors Qa and Qb in a plan view, but the shape of the color filter pattern 230D is not limited thereto and may have any shape for overlapping the channels of the transistors Qa and Qb.

[0072] Each color filter pattern 230D, together with the color filter disposed thereunder, can absorb most of the light incident on the channels of the first transistor Qa and the second transistor Qb to prevent the light from reaching the first transistor Qa and the second transistor Qb. Accordingly, the photocurrent caused by external light can be prevented, thereby improving the initial threshold voltage of the first transistor Qa and the second transistor Qb, reducing the deviation of the threshold voltage, and thus improving the reliability by reducing the color change of the display device.

[0073] In the cross-sectional view, the color filter pattern 230D may be disposed between the second color filter 230b and the third color filter 230c and the first substrate 110, and in detail, between the second color filter 230b and the third color filter 230c and the first insulating layer 180a. In the plan view, the color filter pattern 230D may overlap with a region where the light blocking member 220 is disposed. In addition, each color filter pattern 230D may be disposed between the first data line 171a and the second data line 171b corresponding to each pixel PXb and PXc.

[0074] The opening 21a of the gate line 121 may overlap a portion of the first data line 171a and the first source electrode 173a, and the opening 21b of the gate line 121 may overlap a portion of the second data line 171b and the second source electrode 173b. When a pixel is defective, a laser is irradiated to the first source electrode 173a and / or the second source electrode 173b through the openings 21a and 21b to cut the first transistor Qa and / or the second transistor Qb from the first data line 171a and / or the second data line 171b, thereby repairing the defective pixel.

[0075] The color filter pattern 230D may be disposed so as not to overlap the openings 21a and 21b. Therefore, since only one color filter 230a, 230b, or 230c is disposed on the openings 21a and 21b of each pixel PXa, PXb, or PXc, when repairing a defective pixel, display defects such as black spots generated by laser irradiation of two or more color filters are minimized.

[0076] The second insulating layer 180b may be disposed on the color filters 230a, 230b, and 230c and the color filter pattern 230D. The second insulating layer 180b may include an inorganic insulating material or an organic insulating material. According to an exemplary embodiment, the second insulating layer 180b may include an organic insulating material to provide an almost flat top surface. The second insulating layer 180b serves as an overlying layer of the color filters 230a, 230b, and 230c and the color filter pattern 230D to prevent the color filters 230a, 230b, and 230c and the color filter pattern 230D from being exposed and to prevent impurities of the pigment from flowing into the liquid crystal layer 3.

[0077] The first and second insulating layers 180a and 180b include a contact hole 185a disposed on the pad portion 177a of the first drain electrode 175a and a contact hole 185b disposed on the pad portion 177b of the second drain electrode 175b.

[0078] A pixel electrode layer (191a, 191b, and 199) including a plurality of first subpixel electrodes 191a and a plurality of second subpixel electrodes 191b and a shielding electrode 199 may be disposed on the second insulating layer 180b. For each pixel PXa, PXb, or PXc, the first subpixel electrode 191a may be disposed on one side, and the second subpixel electrode 191b may be disposed on the opposite side of a transistor formation region on which the first transistor Qa and the second transistor Qb are disposed.

[0079] The overall shape of each of the first subpixel electrode 191a and the second subpixel electrode 191b may be a rectangle. The first subpixel electrode 191a may include a cross-shaped trunk portion and a plurality of branch portions 194a extending outward from the cross-shaped trunk portion, the cross-shaped trunk portion including a transverse trunk portion 192a and a longitudinal trunk portion 193a. The second subpixel electrode 191b may include a cross-shaped trunk portion and a plurality of branch portions 194b extending outward from the cross-shaped trunk portion, the cross-shaped trunk portion including a transverse trunk portion 192b and a longitudinal trunk portion 193b.

[0080] In a plan view, a size of the first subpixel electrode 191 a may be smaller than a size of the second subpixel electrode 191 b .

[0081] The first subpixel electrode 191a may include an extension 195a protruding toward the pad portion 177a of the first drain electrode 175a and a contact portion 196a connected to an end of the extension 195a. The second subpixel electrode 191b may include an extension 195b protruding toward the pad portion 177b of the second drain electrode 175b and a contact portion 196b connected to an end of the extension 195b. The contact portion 196a is electrically connected to the pad portion 177a of the first drain electrode 175a through the contact hole 185a. The contact portion 196b is electrically connected to the pad portion 177b of the second drain electrode 175b through the contact hole 185b.

[0082] When the first transistor Qa and the second transistor Qb are turned on, the first subpixel electrode 191 a and the second subpixel electrode 191 b may receive a data voltage from the first drain electrode 175 a and the second drain electrode 175 b , respectively.

[0083] The shielding electrode 199 may include a transverse portion extending in the first direction DR1 and a longitudinal portion extending in the second direction DR2. The shielding electrode 199 may be disposed between pixels PXa, PXb, and PXc adjacent along the first direction DR1 and / or between pixels PXa, PXb, and PXc adjacent in the second direction DR2. The shielding electrode 199 prevents coupling and light leakage between adjacent pixels PXa, PXb, and PXc. The longitudinal portion of the shielding electrode 199 may overlap the longitudinal portion 131b of the storage electrode line 131.

[0084] The pixel electrode layer (191a, 191b, and 199) may include a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or a metal thin film.

[0085] The arrangement, shape, and structure of the transistors and the shape of the pixel electrodes described in this embodiment are merely exemplary and may be variously modified.

[0086] The spacers MCS and SCS may be disposed on the pixel electrode layer (191a, 191b, and 199) and the second insulating layer 180b. Figures 3 to 6 The separators MCS and SCS are described in detail.

[0087] The first alignment layer 11 may be disposed on the pixel electrode layer (191a, 191b, and 199) and the second insulating layer 180b. As an example, the first alignment layer 11 may be a vertical alignment layer. The first alignment layer 11 may be a photo alignment layer including a photoreactive material.

[0088] Next, the second display panel 200 may be disposed on the first display panel 100. The second display panel 200 may include a light blocking member 220 disposed between the second substrate 210 and the liquid crystal layer 3, and the second substrate 210 includes an insulating material such as glass and plastic. As described above, the light blocking member 220 may include a portion extending in the first direction DR1 and overlapping a transistor forming region on which the first transistor Qa and the second transistor Qb are disposed. However, it is not limited thereto, and according to another exemplary embodiment, the light blocking member 220 may be disposed on the first display panel 100 instead of the second display panel 200.

[0089] The common electrode 270 may be disposed between the light blocking member 220 and the liquid crystal layer 3. The common electrode 270 may be formed in a plate shape on the entire surface of the second substrate 210. That is, the common electrode 270 may not have a removed portion such as a slit. The common electrode 270 may transmit a common voltage Vcom having a predetermined voltage.

[0090] The common electrode 270 may include a transparent conductive material such as ITO, IZO, or a metal thin film.

[0091] The second alignment layer 21 may be disposed between the common electrode 270 and the liquid crystal layer 3. The second alignment layer 21 may be a vertical alignment layer. The second alignment layer 21 may be a photo alignment layer including a photoreactive material.

[0092] The liquid crystal layer 3 includes a plurality of liquid crystal molecules 31. The liquid crystal molecules 31 may have negative dielectric anisotropy and may be oriented in a direction substantially perpendicular to the first substrate 110 and the second substrate 210 when no electric field is generated in the liquid crystal layer 3. When no electric field is generated in the liquid crystal layer 3, the liquid crystal molecules 31 may be pre-tilted in a predetermined direction. For example, the liquid crystal molecules 31 may be tilted at a pre-tilted angle in a direction substantially parallel to the branch portions 194a of the first subpixel electrode 191a and the branch portions 194b of the second subpixel electrode 191b.

[0093] A backlight unit providing light may be disposed under or behind the first display panel 100. Figure 2 As shown in , when light from the backlight unit passes between the gate conductive layer and the data conductive layer, is reflected at the surface of the common electrode 270 of the second display panel 200, and then is incident again toward the first transistor Qa or the second transistor Qb of the first display panel 100, most of the light is absorbed in the color filter pattern 230D without reaching the first transistor Qa or the second transistor Qb, thereby improving the reliability of the display device as described above.

[0094] Next, refer to Figures 3 to 6 A display device according to an exemplary embodiment is described. Figure 3 is a layout diagram of a portion of three adjacent pixels of a display device according to an exemplary embodiment, Figure 4 It is taken along line IVa-IVb. Figure 3 A cross-sectional view of a display device shown in FIG. Figure 5 is a layout diagram of another portion of three adjacent pixels of a display device according to an exemplary embodiment, Figure 6 is taken along line VIa-VIb Figure 5 A cross-sectional view of a display device shown in FIG.

[0095] First, refer to Figure 3 and Figure 4, a display device according to an exemplary embodiment may include a main spacer MCS disposed on a first pixel PXa. In other words, the display device may include a main spacer MCS overlapping with a first color filter 230a. The main spacer MCS may be located on a flat surface of the first color filter 230a. The main spacer MCS does not overlap with the second pixel PXb and / or the third pixel PXc, and may be spaced apart from each other. That is, the main spacer MCS may be arranged not to overlap with the second color filter 230b and / or the third color filter 230c. The main spacer MCS may also not overlap with the color filter pattern 230D located at the second pixel PXb and the third pixel PXc.

[0096] The main spacer MCS may maintain a gap between the first display panel 100 and the second display panel 200 in a normal non-pressurized state. The main spacer MCS need not be disposed on every first pixel PXa, and may be disposed on some of the plurality of first pixels PXa.

[0097] like Figure 3 As shown, in a plan view, the main spacer MCS may be disposed between the first transistor Qa and the second transistor Qb. However, it is not limited to this position, and it may be disposed at any position. In addition, this specification shows an exemplary embodiment in which the main spacer MCS has a circular shape in a plan view, but it is not limited thereto, and the main spacer MCS may have various shapes.

[0098] Next, refer to Figure 5 and Figure 6 , a display device according to an exemplary embodiment may include a sub-spacer SCS disposed in a first pixel PXa. In other words, the sub-spacer SCS may overlap with the first color filter 230a. The sub-spacer SCS may be disposed on a flat surface of the first color filter 230a. The sub-spacer SCS does not overlap with the second pixel PXb and / or the third pixel PXc, and may be spaced apart from each other. That is, the sub-spacer SCS may be disposed so as not to overlap with the second color filter 230b and / or the third color filter 230c. The sub-spacer SCS may not overlap with the color filter pattern 230D disposed at the second pixel PXb and the third pixel PXc.

[0099] The sub-spacers SCS may maintain a gap between the first display panel 100 and the second display panel 200 in a compressed state. The main spacers MCS and the sub-spacers SCS may have different heights.

[0100] The height of the main spacer MCS may be greater than that of the sub-spacer SCS. The sub-spacer SCS also need not be disposed on every first pixel PXa, and may be disposed on some of the plurality of first pixels PXa.

[0101] In a plan view, the sub-spacer SCS may overlap the first transistor Qa and the second transistor Qb. The sub-spacer SCS may have a rectangular shape overlapping the first transistor Qa and the second transistor Qb in a plan view, and may have a protruding portion protruding toward a space provided between the first contact hole 185a and the second contact hole 185b. However, the sub-spacer SCS is not limited to this form and may be modified in various forms.

[0102] A display device according to an exemplary embodiment may include a main spacer MCS and a sub-spacer SCS disposed at a first pixel PXa. The main spacer MCS and the sub-spacer SCS may both be disposed on pixels presenting the same color. As an example, the main spacer MCS and the sub-spacer SCS may both be disposed at the first pixel PXa, and may not overlap with the second pixel PXb and / or the third pixel PXc. According to an exemplary embodiment, the main spacer MCS and the sub-spacer SCS may both overlap with the first color filter 230a, and may be disposed to overlap with a color filter presenting red. In other words, the main spacer MCS and the sub-spacer SCS may not overlap with the second color filter 230b and / or the third color filter 230c.

[0103] However, the present invention is not limited thereto, and when the first pixel PXa presents green, the main spacer MCS and the sub-spacer SCS may overlap with the color filter presenting green and not overlap with the color filters presenting red and blue; and when the first pixel PXa presents blue, the main spacer MCS and the sub-spacer SCS may overlap with the color filter presenting blue and not overlap with the color filters presenting red and green.

[0104] According to the above Figure 1 and Figure 2 In the exemplary embodiment described in the embodiment of the present invention, the second pixel PXb and the third pixel PXc may include a color filter pattern 230D. Therefore, the second color filter 230b and the third color filter 230c and the second insulating layer 180b may have a step region, and the color filter pattern 230D is disposed in the step region. If the main spacer MCS is disposed in the second pixel PXb and the third pixel PXc, the main spacer MCS may be disposed to overlap with the step region. The main spacer MCS disposed to overlap with the step region may have difficulty in maintaining a stable interval between the first display panel 100 and the second display panel 200.

[0105] like Figure 6As shown in , the sub-spacer SCS may be spaced apart from the second display panel 200 to have a predetermined gap. When the sub-spacer SCS is disposed in the second pixel PXb and the third pixel PXc having the step region to overlap the step region, the gap from the sub-spacer SCS to the second display panel 200 may vary depending on the position. In this case, it may also be difficult to maintain the interval between the first display panel 100 and the second display panel 200 under pressure by the sub-spacer SCS.

[0106] However, when the main spacers MCS and the sub-spacers SCS are disposed only in the first pixel PXa as in the exemplary embodiment, the main spacers MCS and the sub-spacers SCS may be disposed in a flat region provided by the first color filter 230a without overlapping the separate color filter pattern 230D. Therefore, the main spacers MCS and the sub-spacers SCS may be stably formed without an additional step, thereby improving the reliability of the display device.

[0107] Next, refer to Figure 7 and Figure 8 A display device according to an exemplary embodiment is described. Figure 7 and Figure 8 1 and 2 are layout diagrams of a portion of three adjacent pixels of a display device according to an exemplary embodiment. Description of constituent elements that are the same as those described above are omitted.

[0108] Reference Figure 7 and Figure 8 , the color filter pattern 230D according to an exemplary embodiment may overlap the second pixel PXb and the third pixel PXc. In this case, the color filter pattern 230D overlapping the second pixel PXb and the third pixel PXc may overlap the first transistor Qa and the second transistor Qb and the space disposed between the first transistor Qa and the second transistor Qb at the same time. The color filter pattern 230D may have a shape extending along the first direction DR1 to overlap both the first transistor Qa and the second transistor Qb and the space disposed between the first transistor Qa and the second transistor Qb.

[0109] According to an exemplary embodiment, the length of each color filter pattern 230D in the first direction DR1 may be longer than the length in the second direction DR2. The length of each color filter pattern 230D in the first direction DR1 may be greater than about 30 micrometers.

[0110] As described above, the color filter pattern 230D disposed in each pixel PXb and PXc and blocking light incident to the transistors Qa and Qb is formed by a single pattern overlapping all of the plurality of transistors Qa and Qb and the space between the first transistor Qa and the second transistor Qb disposed in each pixel PXb and PXc, so that the color filter pattern 230D can extend along the first direction DR1, thereby effectively managing the uniformity of the size of the color filter pattern 230D in the manufacturing process of the display device. In addition, since only one color filter pattern 230D is formed for the plurality of transistors Qa and Qb in each pixel PXb and PXc, peeling of the color filter pattern 230D can be reduced.

[0111] Next, refer to Figures 9 to 11 A display device according to an exemplary embodiment is described. Fig. 9 and Fig.10 is a layout diagram of a portion of three adjacent pixels of a display device according to an exemplary embodiment, and Fig.11 It is along Fig.10 Description of the same constituent elements as those described above is omitted.

[0112] Reference Figures 9 to 11 The display device according to this exemplary embodiment is different from the display device described above. Figures 7 and 8 The display devices shown in are mostly the same, however, the structures of the multiple color filters 230a, 230b and 230c can be different, and color filter patterns 230D1, 230D2 and 230D3 that are set on the same layer as the color filter pattern 230D but have different structures from the color filter pattern 230D can be set.

[0113] The first color filter pattern 230D1 is disposed at the same layer and exhibits the same color as the first color filter 230a overlapping the first pixel PXa, is separated from the first color filter 230a or the first pixel PXa, and may be continuously formed on two adjacent pixels PXb and PXc.

[0114] In detail, the first color filter pattern 230D1 may overlap both the second transistor Qb located on the right side of the second pixel PXb and the first transistor Qa located on the left side of the third pixel PXc. Specifically, the first color filter pattern 230D1 may overlap both the channel of the semiconductor layer 154a of the first transistor Qa disposed on the left side of the third pixel PXc and the channel of the semiconductor layer 154b of the second transistor Qb disposed on the right side of the second pixel PXb. The first transistor Qa and the second transistor Qb of the two pixels PXb and PXc overlapping with a single first color filter pattern 230D1 may be generally arranged in the first direction DR1.

[0115] The first color filter pattern 230D1 may overlap the second data line 171b electrically connected to the second transistor Qb disposed on the right side of the second pixel PXb and the first data line 171a electrically connected to the first transistor Qa disposed on the left side of the third pixel PXc.

[0116] The second color filter pattern 230D2 is disposed at the same layer as the first color filter 230a and can display the same color, and the second color filter pattern 230D2 is connected to the left portion of the first color filter 230a and can overlap the second transistor Qb of the third pixel PXc adjacent to the first pixel PXa. Specifically, the second color filter pattern 230D2 can overlap the channel of the second semiconductor layer 154b of the second transistor Qb of the third pixel PXc.

[0117] The third color filter pattern 230D3 is disposed at the same layer as the first color filter 230a and may present the same color, and the third color filter pattern 230D3 is connected to the right portion of the first color filter 230a and may overlap the first transistor Qa of the second pixel PXb adjacent to the first pixel PXa. Specifically, the third color filter pattern 230D3 may overlap the channel of the first semiconductor layer 154a of the first transistor Qa of the second pixel PXb.

[0118] That is, the second color filter pattern 230D2 and the third color filter pattern 230D3 may protrude from the first color filter 230a without being separated from the first color filter 230a. Therefore, only one first color filter pattern 230D1 may exist in three adjacent pixels PXa, PXb, and PXc as an island-shaped color filter pattern separated from the first color filter 230a. The length of the first color filter pattern 230D1 in the first direction DR1 may be longer than the length in the second direction DR2, and the length of the first color filter pattern 230D1 in the first direction DR1 may be greater than about 30 micrometers.

[0119] In this way, since there is only one first color filter pattern 230D1 having an island shape for three adjacent pixels PXa, PXb and PXc, and the sizes of the color filter patterns 230D1, 230D2 and 230D3 can be increased, the uniformity of the sizes of the color filter patterns 230D1, 230D2 and 230D3 can be effectively managed in the manufacturing process of the display device, and the peeling of the color filter patterns 230D1, 230D2 and 230D3 can be reduced.

[0120] Like the color filter pattern 230D described above, the color filter patterns 230D1, 230D2, and 230D3, together with the color filters 230a, 230b, and 230c disposed below the color filter patterns 230D1, 230D2, and 230D3, also absorb most of the light incident from the top to the channels of the first transistor Qa and the second transistor Qb, whereby the light incident from the top toward the channels of the first transistor Qa and the second transistor Qb does not reach the first transistor Qa and the second transistor Qb. Therefore, the photocurrent caused by external light can be prevented, so that the initial threshold voltage of the first transistor Qa and the second transistor Qb can be improved, the deviation of the threshold voltage can be reduced, and therefore, the reliability of the display device can be improved by reducing the color variation of the display device.

[0121] The first, second, and third color filter patterns 230D1, 230D2, and 230D3 may be disposed to overlap the light blocking member 220 in a plan view.

[0122] exist Fig. 9 In, with Fig.10 Differently, the second color filter 230b and the third color filter 230c have respective color filter patterns 23b1, 23b2, and 23c.

[0123] The second color filter 230b has two color filter patterns 23b1, 23b2. The color filter pattern 23b1 is a concave portion of the second color filter 230b in the first direction DR1. The color filter pattern 23b2 is a concave portion of the second color filter 230b in the opposite direction of the first direction DR1.

[0124] The third color filter 230 c also has a color filter pattern 23 c , and the color filter pattern 23 c is a concave portion of the third color filter 230 c in the first direction DR1 .

[0125] Next, refer to Fig.12 Effects of the display device according to the exemplary embodiment are described. Fig.12 is a graph illustrating a stain occurrence leakage voltage according to an exemplary embodiment.

[0126] Fig.12 is a graph showing the degree of change in the stain occurrence leakage voltage of the display device according to exemplary embodiments 1 to 3 as time passes to about 500 hours. In the case of exemplary embodiments 1 to 3 in which the color filter pattern overlaps each of the second color filter and the third color filter, it is confirmed that when the backlight unit is 870,000 nits, after 500 hours, the stain occurrence leakage voltage is about -3.9 V. It is confirmed that there is a voltage margin of about 3.6 V to the reference value (Ref) at which the stain is recognized.

[0127] In the case of the display device according to the comparative example where the color filter pattern does not exist, when the backlight unit is 870,000 nits, after 500 hours, the stain occurrence leakage voltage is about -4.5 V. It is confirmed that there is a voltage margin of about 3 V to the reference value (Ref) where the stain is recognized.

[0128] The generation of stain is a case where the brightness is recognized to be bright compared to the surrounding parts. As the difference between the predetermined reference value and the stain generation leakage voltage increases, the stain can be more easily controlled. In the case of the exemplary embodiment, since the difference between the predetermined reference value and the stain generation leakage voltage is large compared to the comparative example, the stain can be easily controlled. Although the stain may be easily affected by the amount of light emitted from the backlight unit, it is confirmed that the voltage margin of the stain generation is improved by providing a color filter overlapping the transistor.

[0129] In summary, according to the exemplary embodiments, it is confirmed that the margin of the voltage at which stains are generated is better maintained, thereby improving the initial threshold voltage, and the deviation of the threshold voltage and the color change of the display device can be reduced, thereby improving the reliability of the display device.

[0130] In addition, the above-described exemplary embodiments and comparative examples were evaluated for tailing characteristics and liquid crystal margin.

[0131] It was confirmed by the trailing characteristic evaluation that the power withstood by the display device can be evaluated that in the exemplary embodiment, the display device can withstand up to about 9kgf, but in the case of the comparative example, the display device can withstand up to about 6kgf. With the main partition and the sub-partition formed stably, it was confirmed that the durability of the display device is improved.

[0132] As a result of evaluating the number of sections for evaluating the margin of the liquid crystal, 10 sections were obtained according to the exemplary embodiment, but about 7 sections were obtained according to the comparative example. By ensuring many sections for the margin of the liquid crystal, failure of the effective unfilled area (AUA) where light leakage occurs due to lack of liquid crystal in any one part can be prevented. In addition, gravity failure caused by overfilling of the liquid crystal can be prevented. Because the interval between the first display panel and the second display panel is stabilized by the spacer, sufficient margin for filling the liquid crystal is ensured, which means that the reliability of the display device can be improved.

[0133] While the inventive concept has been described in conjunction with what are currently considered to be practical exemplary embodiments, it should be understood that the inventive concept is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the present disclosure.

Claims

1. A display device, wherein: The display device comprises: A plurality of transistors are disposed on a substrate; a plurality of pixel electrodes electrically connected to the plurality of transistors; a plurality of first color filters, a plurality of second color filters, and a plurality of third color filters, disposed between the plurality of transistors and the plurality of pixel electrodes; a plurality of main spacers and a plurality of sub-spacers disposed on the plurality of pixel electrodes; and a plurality of color filter patterns overlapping with transistors among the plurality of transistors overlapping with the plurality of second color filters and transistors among the plurality of transistors overlapping with the plurality of third color filters in a plan view, The plurality of main spacers and the plurality of sub-spacers are disposed to overlap with planar areas of the plurality of first color filters in a plan view, respectively, and not to overlap with the plurality of second color filters and the plurality of third color filters in a plan view.

2. The display device according to claim 1, wherein: The plurality of first color filters are red color filters.

3. The display device according to claim 1, wherein: The plurality of color filter patterns are disposed between the plurality of second color filters and the substrate and between the plurality of third color filters and the substrate, and The plurality of color filter patterns present the same color as the plurality of first color filters.

4. The display device according to claim 1, wherein: Each of the plurality of transistors includes a first transistor and a second transistor, and Each of the plurality of main spacers is disposed between the first transistor and the second transistor in a plan view.

5. The display device according to claim 4, wherein: Each of the plurality of sub-spacers overlaps the first transistor or the second transistor.

6. The display device according to claim 4, wherein: Each of the plurality of color filter patterns overlaps the first transistor and the second transistor at the same time.

7. A display device, wherein: The display device comprises: A plurality of transistors are disposed on a substrate; a plurality of pixel electrodes electrically connected to the plurality of transistors; a plurality of color filters overlapping the plurality of pixel electrodes; a plurality of main spacers and a plurality of sub-spacers disposed on the plurality of pixel electrodes; and a plurality of color filter patterns overlapping a portion of the plurality of transistors in a plan view, wherein the plurality of main spacers and the plurality of sub-spacers overlap with the flat areas of the plurality of color filters exhibiting the same color, and The plurality of color filter patterns are spaced apart from the plurality of main spacers and the plurality of sub-spacers.

8. The display device according to claim 7, wherein: The plurality of color filters include a plurality of first color filters, a plurality of second color filters, and a plurality of third color filters, and The plurality of main spacers and the plurality of sub-spacers overlap the planar regions of the plurality of first color filters.

Images