A method for preventing undercutting and etching of three-dimensional microstructure sidewalls in microelectronic mechanical manufacturing process

Abstract

The present invention relates to a method for preventing undercut etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process, belonging to the field of microelectronic mechanical system manufacturing technology, comprising firstly, depositing a conformal film layer as a protective layer on the surface of a wafer substrate having generated a three-dimensional microstructure by an LPCVD process; then, removing the conformal film layer at the area not requiring protection by dry etching, and performing subsequent wet / vapor phase etching, wherein the conformal film layer can form a dense and uniformly covered protective layer on the surface, sidewall, bottom and any narrow corner of the etched three-dimensional microstructure to prevent the invasion of corrosive substances; finally, after the subsequent wet / vapor phase etching is completed, the conformal film layer is removed by ordinary dry etching technology. The present invention has strong protectiveness and reliable effect, can effectively prevent the occurrence of undercut etching in subsequent hydrofluoric acid wet etching or vapor phase etching, and improve the performance of waveguide devices.

Description

Technical Field

[0001] The present invention relates to a method for preventing undercut etching of a three-dimensional microstructure side wall in a microelectronic mechanical manufacturing process, in particular to preventing undercut etching in subsequent wet / vapor phase etching containing hydrofluoric acid (HF), and belongs to the technical field of microelectronic mechanical system (MEMS) manufacturing. Background Art

[0002] In the manufacture of micro-electromechanical systems, three-dimensional microstructures with high aspect ratios can be manufactured on wafer substrates through a series of commonly used cleanroom process flows, including cleaning, photolithography, dry and wet etching, coating, bonding and other processes. In order to complete a complete micro-device or three-dimensional structure, in most cases, these commonly used cleanroom process steps need to be repeated or alternating, which will lead to potential mutual influence between process steps. Therefore, in this case, there is a compatibility problem of process steps: the subsequent process may affect or destroy the previously completed structure, especially in the isotropic wet etching process, some completed structures or parts that need to be retained may suffer a certain degree of etching or even destruction due to isotropic corrosion. Especially in the manufacture of microwave / millimeter wave / terahertz wave waveguide devices based on MEMS technology, silicon on insulating substrate (SOI) is a very potential micro-nano manufacturing substrate material. SOI wafers generally consist of a three-layer structure: an upper layer, a bottom layer and a middle layer. The middle layer (such as a silicon dioxide layer) can be used as a stop layer for dry etching or a sacrificial layer for wet etching. Therefore, SOI wafers can be used to obtain high-precision, high-aspect ratio microstructures and movable parts.

[0003] However, in some complex MEMS device designs, the middle layer, generally a dielectric layer, is used as a stop layer for dry etching and a sacrificial layer for wet etching. Therefore, when using highly corrosive wet / vapor etching, such as hydrofluoric acid (HF), all exposed areas of the middle layer will be etched away, and the etching will continue to be etched laterally inward along the etched section, which is called undercut etching. If these undercut etches happen to occur on the hollow waveguide wall in the microwave / millimeter wave / terahertz wave waveguide device, they will form a long gap on the waveguide wall. This gap will cause the waveguide wall to be unable to form a continuous conductor structure, thereby causing serious leakage of the RF transmission signal, a significant decrease in performance, and even device failure. Therefore, how to prevent the occurrence of this undercut etching will become the key to the success or failure of the development of microwave / millimeter wave / terahertz wave waveguide high-performance devices. At present, there is no public report on any relevant solutions to the above problems. Summary of the invention

[0004] With the development of new generation communication and space exploration technology, the demand for new high-frequency waveguide devices (such as terahertz waveguide devices) has increased dramatically. MEMS manufacturing technology is an important means of realization. In view of the shortcomings of the prior art, the present invention proposes a method for preventing undercut etching of the side walls of a three-dimensional microstructure in a microelectronic mechanical manufacturing process. The method has strong protectiveness and reliable effect, and can effectively prevent the occurrence of undercut etching in subsequent hydrofluoric acid wet etching or vapor phase etching, thereby improving the performance of microwave / millimeter wave / terahertz waveguide devices and preventing device failure.

[0005] The present invention adopts the following technical solutions:

[0006] A method for preventing undercut etching of the sidewalls of a three-dimensional microstructure in a microelectronic mechanical manufacturing process. First, a conformal film layer is deposited on the surface of a wafer substrate on which a three-dimensional microstructure has been generated as a protective layer by a low-pressure chemical vapor deposition (LPCVD) process; then, the conformal film layer is removed from the area that does not need to be protected by a commonly used dry etching method, and subsequent wet / vapor etching is performed. The conformal film layer can form a dense and uniform protective layer on the surface, sidewalls, bottom and any narrow corners of the etched three-dimensional microstructure to prevent the invasion of corrosive substances; finally, after the subsequent wet / vapor etching is completed, all conformal film layers are removed by a common dry etching technique.

[0007] The conformal film layer of the present invention can well cover the surface, side walls and bottom of the etched three-dimensional microstructure to prevent the intrusion and corrosion of corrosive substances from all corners, thereby protecting the etched three-dimensional microstructure from the influence and damage of subsequent processes, especially for preventing the occurrence of side wall undercut etching of the multi-layer substrate structure caused by subsequent hydrofluoric acid (HF) wet / vapor phase etching.

[0008] Preferably, the conformal film layer includes a polysilicon film or a silicon-rich material film.

[0009] Preferably, the thickness of the conformal film layer ranges from 10 nm to 2 μm, and can be adjusted according to the required protection time.

[0010] Preferably, the wafer substrate may be any one or a combination of an SOI silicon wafer, a silicon / dielectric layer stacked multilayer structure or a silicon / metal layer multilayer structure, wherein at least one silicon layer and one material layer that is easily etched by HF are included.

[0011] Preferably, the corrosive substance for wet / vapor phase etching is hydrofluoric acid or a solvent / vapor containing hydrofluoric acid.

[0012] Preferably, the wafer substrate is a multilayer silicon substrate structure containing a dielectric or metal material interlayer, and the conformal film layer is a polycrystalline silicon film of 10nm-1μm, and the specific thickness to be deposited can be adjusted according to the required protection time;

[0013] Preferably, the wafer substrate is an SOI silicon wafer, comprising a three-layer structure, namely an upper silicon layer, an intermediate layer and a bottom silicon layer, wherein the intermediate layer is silicon dioxide, and a three-dimensional microstructure is engraved on the sidewall of the bottom silicon layer.

[0014] Preferably, the upper silicon layer can be etched into different structures as required, such as etched holes, cantilever beams, microactuators, etc.

[0015] Preferably, the angle between the side wall and the bottom surface of the bottom silicon is any inclination angle between 0° and 180°.

[0016] Preferably, there is a groove or shielding between the side wall of the bottom silicon and the middle interlayer;

[0017] Furthermore, the transverse width U of the groove is 1 μm to 100 μm, and the thickness of the intermediate layer is 1 μm to 100 μm.

[0018] Preferably, the thickness of the intermediate interlayer is greater than 500 nm, and the number of interlayers in the intermediate interlayer is greater than or equal to one layer.

[0019] Preferably, the side wall of the wafer substrate is penetrated to form a through-hole structure, and the number of the through-hole structures is multiple.

[0020] For any details not provided in the present invention, please refer to the prior art.

[0021] The beneficial effects of the present invention are:

[0022] The present invention deposits a conformal film layer on a wafer multilayer substrate containing a three-dimensional complex microstructure to cover the side wall of the three-dimensional microstructure, thereby preventing the occurrence of undercut etching in the subsequent wet / vapor phase hydrofluoric acid etching. The method of the present invention first deposits a conformal film layer on the surface of the wafer substrate by a low-pressure chemical vapor deposition method. The conformal film layer can protect the side of the etched three-dimensional microstructure from being eroded by subsequent corrosive solvents / gases, thereby ensuring the integrity of the side structure. After the subsequent wet / vapor phase etching is completed, the conformal film layer can be easily removed by using traditional clean room dry etching, which only requires a few seconds to tens of seconds of dry silicon etching without affecting the integrity and accuracy of the main microstructure.

[0023] The method of the present invention can effectively protect the complex high aspect ratio structure generated in the previous process from being affected and damaged by the subsequent process, especially preventing the occurrence of undercut etching of the side wall of the multi-layer structure.

[0024] The present invention has strong process compatibility, simple and reliable operation, high feasibility, obvious effect, and convenient and thorough removal, providing a guarantee for realizing more complex process flows, thereby manufacturing devices with more complex structures and higher-end performance, such as high-performance microwave / millimeter wave / terahertz wave waveguide devices based on MEMS technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 ae is a schematic diagram of a process flow of a common embodiment of the present invention;

[0026] Figure 2 a is a cross-sectional side view of a second common specific embodiment of the present invention Figure 1 ;

[0027] Figure 2 b is a cross-sectional side view of a second common specific embodiment of the present invention Figure 2 ;

[0028] Figure 3 a is a cross-sectional side view of a third specific embodiment of the present invention Figure 1 ;

[0029] Figure 3 b is a cross-sectional side view of the third specific embodiment of the present invention Figure 2 ;

[0030] Figure 4 a is a cross-sectional side view of a fourth embodiment of the present invention having a through-hole structure. Figure 1 ;

[0031] Figure 4 b is a cross-sectional side view of a fourth embodiment of the present invention having a through-hole structure. Figure 1 ;

[0032] Figure 5 a is a SEM image of the silicon / silicon dioxide / silicon three-layer substrate structure of Example 1 of the present invention;

[0033] Figure 5 b is a SEM image of the experimental results without using the method proposed by the present invention;

[0034] Figure 5 c is a SEM image of the experimental results using the method of the present invention;

[0035] In the figure, 1-upper silicon layer, 2-middle interlayer, 3-bottom silicon layer, 4-etched sidewall, 5-wafer substrate, 6-three-dimensional microstructure, 7-polysilicon film, 8-release structure, 9-bottom cut etching, 10-groove, 11-multi-layer middle interlayer, 12-through hole structure. DETAILED DESCRIPTION

[0036] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, they will be described in detail with reference to the accompanying drawings and specific embodiments, but are not limited to these. Anything not fully described in the present invention shall be based on conventional techniques in the art.

[0037] Embodiment 1:

[0038] A method for preventing undercut etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process. First, a conformal film layer is deposited on the surface of a wafer substrate on which a three-dimensional microstructure has been generated as a protective layer through an LPCVD process; then, the conformal film layer is removed from the area that does not need to be protected by dry etching, and subsequent wet / vapor phase etching is performed. The conformal film layer can form a dense and uniform protective layer on the surface, sidewall, bottom and any narrow corner of the etched three-dimensional microstructure to prevent the invasion of corrosive substances; finally, after the subsequent wet / vapor phase etching is completed, the conformal film layer is removed by ordinary dry etching technology.

[0039] Specifically, Figure 1 As shown in FIG. 8 , the main operation steps of the present invention are shown by adopting a cross-sectional side view of a wafer substrate. The wafer substrate involved in this embodiment 1 is an SOI silicon wafer, which is composed of three layers, including an upper silicon layer 1, an intermediate interlayer 2 of silicon dioxide and a bottom silicon layer 3, and the bottom silicon 3 is engraved with a three-dimensional microstructure 6. The entire wafer substrate 5 is placed in an LPCVD device, and a layer of a conformal film layer of about 200-300nm is deposited as a protective layer. The conformal film layer in this embodiment 1 is a polysilicon film 7. Since the LPCVD deposition technology has good coverage and conformality, the entire structure of the etched three-dimensional microstructure 6 can be well coated, especially the etched sidewall 4 in a narrow cavity. The polysilicon film on the surface of the upper silicon 1 of the wafer substrate 5 can be removed by a silicon dry etching device commonly used in clean rooms, and then the entire wafer substrate 5 is exposed to the hydrofluoric acid etching liquid / gas. Since the release structure 8 of the upper silicon 1 is not protected, the intermediate interlayer 2 is entered into the intermediate interlayer 2 from the upper gap by the etching liquid / gas and is undercut etched 9, and the corresponding release structure 8 is released. The three-dimensional microstructure 6 of the bottom silicon 3, especially the etching sidewall 4, is protected by being covered by LPCVD polysilicon, and the etching liquid cannot invade the etching sidewall 4, so that the intermediate interlayer 2 in the corresponding area cannot be etched, thereby achieving the structural release of the upper structure and effectively preventing the potential undercut etching of the three-dimensional microstructure 6 of the bottom silicon 3. Therefore, in the subsequent metal sputtering process, since the integrity of the etched structure is protected, the entire etching sidewall 4 of the three-dimensional microstructure 6 can be covered by the metal film, thereby avoiding the occurrence of undercut etching.

[0040] The etching structures on the upper silicon layer 1 and the bottom silicon layer 3 described in this embodiment can be at any position on the same layer and do not need to correspond to each other from top to bottom.

[0041] The dry removal or etching of the LPCVD polysilicon described in this embodiment can be performed using common clean room silicon dry etching equipment such as ICP and RIE.

[0042] In this embodiment Figure 1 The etched sidewall 4 shown may be exactly 90° perpendicular to the bottom surface, or may have a certain inclination angle.

[0043] Embodiment 2:

[0044] A method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process is as shown in Example 1, except that: Figure 2 2a and 2b are cross-sectional side views of the second embodiment of the present invention. Figure 1 , Side View Figure 2 , wherein there are certain grooves 10 on the side wall of the wafer substrate;

[0045] The polysilicon film 7 covers the entire wafer substrate, including the groove 10 portion. Due to the excellent conformal property of the polysilicon film, it can completely cover the recessed portion or the partially blocked area.

[0046] The groove 10 described in this embodiment may also be any sidewall depression or shielding that needs to be protected. The lateral width U of the sidewall shielding is 1 μm to 100 μm, and the thickness of the intermediate layer 2 is 1 μm to 100 μm.

[0047] Embodiment 3:

[0048] A method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process is as shown in Example 1, except that: Figure 3 a and b are cross-sectional side views of the third embodiment of the present invention. Figure 1 , two The wafer substrate structure includes a multi-layer intermediate layer 11, with two intermediate layers; the polysilicon film 7 covers the entire wafer substrate.

[0049] Due to the existence of the multi-layer intermediate interlayer 11, more interface layers appear on the side, but due to the excellent conformal properties of the polysilicon film, it can well cover the entire side of the multi-layer structure including the interface layer without any voids, so the corrosive liquid or gas will not invade through the interface layer to bottom cut and etch the intermediate interlayer.

[0050] The multi-layer intermediate layer 11 described in this embodiment may also be a multi-layer structure with more than two layers.

[0051] Embodiment 4:

[0052] A method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process is as shown in Example 1, except that: Figure 4 a and b are cross-sectional side views of the fourth embodiment of the present invention. Figure 1 , two The wafer substrate structure contains a through-hole structure 12, which has no bottom surface, and the polysilicon film 7 protects the side wall of the entire through-hole structure.

[0053] The wafer substrate structure described in this embodiment may have more than three layers.

[0054] The number of the through hole structures 12 described in this embodiment is not limited.

[0055] Figure 5 a is a SEM image of the silicon / silicon dioxide / silicon three-layer substrate structure of Example 1 of the present invention; 5b. is a SEM image of the experimental results without using the method proposed by the present invention; 5c. is a SEM image of the experimental results with the method proposed by the present invention. Figures 5b and c respectively show the comparative effects of not using and using the LPCVD process to deposit polysilicon thin film on preventing hydrofluoric acid from undercutting and etching the middle silicon dioxide layer;

[0056] First, the conventional dry deep silicon etching technique is used to obtain Figure 5 a) shows the three-dimensional microstructure; then one of the samples was directly placed in a 50% hydrofluoric acid etching solution and taken out after about 5 minutes. Figure 5 a The middle interlayer silicon dioxide is obviously etched partly, such as Figure 5 As shown in b, undercut etching occurs.

[0057] Another sample was first deposited with a 250nm polysilicon film using LPCVD, then placed in 50% hydrofluoric acid and taken out after 1 hour; then, dry etching was used to remove the surface polysilicon film; scanning electron microscopy was used to observe that there was no undercut etching trace, such as Figure 5 As shown in c, the side wall is intact.

[0058] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process, characterized in that: First, a conformal film layer is deposited on the surface of the wafer substrate with a three-dimensional microstructure as a protective layer through the LPCVD process; then, the conformal film layer is removed from the area that does not need to be protected by dry etching, and subsequent wet / vapor phase etching is performed; finally, all the conformal film layers are removed by ordinary dry etching technology; The corrosive substance for wet etching is a solvent containing hydrofluoric acid, and the corrosive substance for gas phase etching is steam containing hydrofluoric acid; The wafer substrate is a multi-layer silicon substrate structure containing a dielectric or metal material interlayer, and the conformal film layer is a 10nm-1μm polycrystalline silicon film; The wafer substrate is an SOI silicon wafer, comprising a three-layer structure, namely an upper silicon layer, an intermediate layer and a bottom silicon layer, wherein the intermediate layer is silicon dioxide, and a three-dimensional microstructure is engraved on the sidewall of the bottom silicon layer; The included angle between the side wall and the bottom surface of the bottom silicon is any tilt angle between 0° and 180°.

2. The method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process according to claim 1, characterized in that: There is a groove or shielding between the side wall of the bottom silicon and the middle interlayer; The transverse width U of the groove is 1 μm-100 μm, and the thickness of the intermediate interlayer is 1 μm-100 μm.

3. The method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process according to claim 1, characterized in that: The thickness of the intermediate interlayer is greater than 500 nm, and the number of the intermediate interlayer is greater than or equal to one layer.

4. The method for preventing undercutting and etching of the sidewall of a three-dimensional microstructure in a microelectronic mechanical manufacturing process according to claim 1, characterized in that: The sidewalls of the wafer substrate are penetrated to form a through-hole structure, and the number of the through-hole structures is multiple.

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