Nand Flash voltage control method and non-volatile memory
By monitoring and shared storage unit arrays in the NAND Flash, the problem of high power consumption in the eradication operation is solved, and the repetitive use of charge and the reduction of power consumption are achieved.
Patent Information
- Application Number
- CN201911144229.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-11-20
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2039-11-20
AI Technical Summary
Nand Flash consumes a high power consumption in erasing operations, mainly due to the large substrate capacitance in the memory cell array, which consumes a large amount of power supply during charging and discharging.
By monitoring the first base of the selected storage unit array, it shares its charge to the second background of the non -selected storage unit array, so that the second base is One base is charged to obtain the second voltage; finally, the first base lining is charged to the target voltage on the basis of the second voltage to achieve repeated use of the charge.
Through charge sharing and repetitive use, the power consumption of charging and discharge in the eradication operation is reduced, and the efficiency and life of NAND FLASH are improved.
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Figure CN112825262B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the technical field of storage device hardware, and in particular to a Nand Flash voltage control method and a non-volatile memory. Background Art
[0002] Nand Flash is a type of Flash memory, which belongs to non-volatile memory device. It uses nonlinear macro cell mode internally, has the advantages of large capacity and fast rewrite speed, and is suitable for storing large amounts of data. The storage cell array of Nand Flash is arranged based on the word line and bit line of each storage cell. Specifically, the storage cells are first connected by word lines and bit lines to form pages, and then multiple pages form blocks, and finally multiple blocks form a storage cell array. Figure 1 FIG. 1 is a schematic diagram of the structure of a storage unit of Nand Flash. Figure 1 As shown, when performing an erase operation, a high voltage is applied to the substrate of the selected memory cell array, 0V is applied to the control gate, and the source and drain are kept floating, so that a high electric field strength is formed between the substrate and the floating gate. When the electric field strength reaches the intensity of tunnel breakdown, the electrons on the floating gate are discharged to the substrate due to the tunneling effect, causing the memory cell to change from a programmed state to an erased state.
[0003] When the memory cell array is selected for erasing, the operation is performed in units of erase blocks in the memory cell array. In one erase operation, an erase pulse is applied to the substrate, and the charging and discharging process is repeated until the charged voltage meets the erase condition. Since the substrate of each memory cell in the erase block is shared, its capacitance is very large, and the process of charging and discharging the substrate makes the power consumption of the erase operation very high. Summary of the invention
[0004] The invention provides a Nand Flash voltage control method and a non-volatile memory, so as to reduce the power consumption in the erasing operation.
[0005] In a first aspect, an embodiment of the present invention provides a Nand Flash voltage control method, including:
[0006] When it is detected that the first substrate of the selected memory cell array begins to be discharged, the charge in the first substrate is shared with the second substrate of the non-selected memory cell array so that the second substrate obtains the first voltage;
[0007] When it is detected that the first substrate starts to be charged, the first substrate is charged based on the first voltage so that the first substrate obtains a second voltage;
[0008] The first substrate is charged to a target voltage according to the second voltage.
[0009] Furthermore, the step of sharing the charges in the first substrate to the second substrate of the non-selected memory cell array includes:
[0010] connecting the first substrate and the second substrate to share charges until the charges in the first substrate and the second substrate are stable;
[0011] The connection between the first substrate and the second substrate is disconnected, and the first substrate is discharged to the ground.
[0012] Further, charging the first substrate based on the first voltage includes:
[0013] connecting the first substrate and the second substrate to share the charges in the first voltage until the charges in the first substrate and the second substrate are stable;
[0014] The first substrate is disconnected from the second substrate.
[0015] Further, charging the first substrate to a target voltage based on the second voltage includes:
[0016] The power supply is controlled to charge the first substrate at a determined charging voltage value, where the charging voltage value is a difference between the second voltage and the target voltage.
[0017] Furthermore, before monitoring the start of discharging the first substrate of the selected memory cell array, the method further includes:
[0018] The control power source charges the first substrate to an initial voltage, so that the first substrate starts to discharge from the initial voltage.
[0019] Furthermore, the target voltage is the sum of the initial voltage and a set voltage increment value.
[0020] Further, after charging the first substrate to a target voltage according to the second voltage, the method further includes:
[0021] If the erase state is detected, the first substrate and the second substrate are discharged to the ground.
[0022] In a second aspect, an embodiment of the present invention provides a non-volatile memory, comprising: a voltage control device, wherein the voltage control device comprises:
[0023] A charge sharing module, configured to share the charge in the first substrate with the second substrate of the non-selected memory cell array when detecting that the first substrate of the selected memory cell array begins to be discharged, so that the second substrate obtains the first voltage;
[0024] A first charging module is used for charging the first substrate based on the first voltage when detecting that the first substrate starts to be charged, so that the first substrate obtains a second voltage;
[0025] The second charging module is used to charge the first substrate to a target voltage according to the second voltage.
[0026] Furthermore, the charge sharing module is specifically used for:
[0027] connecting the first substrate and the second substrate to share charges until the charges in the first substrate and the second substrate are stable;
[0028] The connection between the first substrate and the second substrate is disconnected, and the first substrate is discharged to the ground.
[0029] Furthermore, the first charging module is specifically used for:
[0030] connecting the first substrate and the second substrate to share the charges in the first voltage until the charges in the first substrate and the second substrate are stable;
[0031] The first substrate is disconnected from the second substrate.
[0032] The embodiment of the present invention provides a Nand Flash voltage control method and a non-volatile memory, the method comprising: when it is detected that the first substrate of the selected memory cell array begins to be discharged, the charge in the first substrate is shared with the second substrate of the non-selected memory cell array, so that the second substrate obtains a first voltage; when it is detected that the first substrate begins to be charged, the first substrate is charged based on the first voltage, so that the first substrate obtains a second voltage; based on the second voltage, the first substrate is charged to a target voltage. Through the above technical solution, the charge discharged from the first substrate is shared with the second substrate, and the charge stored in the second substrate is used to charge the first substrate, so that the discharged charge is reused, and the power consumption of charging and discharging in the erase operation is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 It is a schematic diagram of the structure of the storage unit of Nand Flash;
[0034] Figure 2 A flowchart of a Nand Flash voltage control method provided in Embodiment 1 of the present invention;
[0035] Figure 3 A flowchart of a Nand Flash voltage control method provided in Embodiment 2 of the present invention;
[0036] Figure 4 This is a schematic diagram of a voltage control method of Nand Flash in Embodiment 2 of the present invention;
[0037] Figure 5 This is a signal timing diagram of the voltage control process of Nand Flash in the second embodiment of the present invention;
[0038] Figure 6 This is a schematic diagram of the structure of a voltage control device provided in Embodiment 3 of the present invention. DETAILED DESCRIPTION
[0039] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.
[0040] Embodiment 1
[0041] Figure 2 This is a flow chart of a Nand Flash voltage control method provided in Embodiment 1 of the present invention. This embodiment can be applied to the case where the voltage for charging and discharging the substrate is controlled when performing an erase operation on a memory cell array in the Nand Flash. Specifically, the voltage control method can be executed by a voltage control device, which can be implemented by software and / or hardware and integrated in a non-volatile memory.
[0042] refer to Figure 2 , the method specifically comprises the following steps:
[0043] S110, when it is monitored that the first substrate of the selected memory cell array begins to be discharged, the charges in the first substrate are shared with the second substrate of the unselected memory cell array, so that the second substrate obtains a first voltage.
[0044] Specifically, each memory cell array in Nand Flash corresponds to a substrate. When performing an erase operation on a selected memory cell array, the corresponding first substrate is repeatedly charged and discharged. The target voltage of each charge is increased by a certain step value until the erase condition is met. The erase operation is completed after the discharge. In the erase operation, the process of charging the first substrate is to apply high voltage to the first substrate, and 0V is applied to the corresponding control gate to form a high electric field strength to achieve the erase operation; for the erase blocks that do not need to be erased in the selected memory cell array, the corresponding gate is floated, so that the gate voltage changes with the voltage of the first substrate, and there is no electric field strength; for the second substrate corresponding to the non-selected memory cell array, no high voltage is applied, so that these erase blocks and the non-selected memory cell array will not be erased.
[0045] When it is monitored that the first substrate of the selected storage cell array begins to be discharged, at least one second substrate of the non-selected storage cell array is selected to temporarily store the discharged charge of the first substrate, and reuse it when the first substrate needs to be charged next time. The specific process is that when the discharge of the first substrate is detected, the first substrate and the second substrate are connected. At this time, the voltage of the first substrate is higher than that of the second substrate, and the charge in the first substrate moves to the second substrate, so that the charge of the first substrate is shared to the second substrate for temporary storage. It should be noted that when the charge sharing between the first substrate and the second substrate reaches a stable state, the charge no longer moves. Since the capacitance of the two substrates is basically the same, the second substrate obtains part of the charge discharged by the first substrate, and the second substrate rises to the first voltage. At this time, the remaining part of the charge in the first substrate is discharged, and the discharge of the first substrate is completed. The second substrate is in a floating state at this time, and the charge therein will be saved for the next charging of the first substrate.
[0046] S120: When it is detected that the first substrate starts to be charged, the first substrate is charged based on the first voltage so that the first substrate obtains a second voltage.
[0047] Specifically, when the first substrate is discharged, the current erasing state will be detected. If erasing has not been achieved, the next charging process will be continued, and the target voltage of the next charging is higher than the voltage before the current discharge. When the first substrate is monitored to start charging, the voltage of the first substrate is 0V, and the voltage of the second substrate is the first voltage. At this time, the first substrate and the second substrate are connected, and the charge temporarily stored in the second substrate is used to charge the first substrate, that is, the charge discharged by the first substrate is repeatedly used to charge the first substrate, so that the first substrate obtains the second voltage, thereby improving the utilization rate of the discharged charge and reducing the consumption of power.
[0048] S130 , charging the first substrate to a target voltage according to the second voltage.
[0049] Specifically, the second voltage comes from the partial charge discharged from the first substrate, and the target voltage is higher than the voltage of the first substrate before discharge, that is, the second voltage is a certain distance away from the target voltage. At this time, the first substrate is continuously charged by the power supply until the first substrate reaches the target voltage, thus completing one discharge and charge of the first substrate.
[0050] It should be noted that since the charge sharing time between the two substrates is much shorter than the time for charging the first substrate through the power supply, charging the first substrate using the charge stored in the second substrate can also reduce the charging time and increase the speed of the erase operation.
[0051] A Nand Flash voltage control method provided in the first embodiment of the present invention realizes the reuse of discharged charges and reduces power consumption, thereby reducing power consumption of charging and discharging during erase operation, by sharing the charges discharged from the first substrate to the second substrate and reusing the charges temporarily stored in the second substrate to charge the first substrate.
[0052] Embodiment 2
[0053] Figure 3 A flowchart of a voltage control method of Nand Flash provided in Embodiment 2 of the present invention. This embodiment is optimized on the basis of the above embodiment, and specifically describes the charge sharing process and the process of charging the first substrate based on the first voltage. It should be noted that the technical details not described in detail in this embodiment can be referred to any of the above embodiments.
[0054] Specifically, refer to Figure 2 , the method specifically comprises the following steps:
[0055] S210 , controlling a power supply to charge the first substrate to an initial voltage, so that the first substrate starts to discharge from the initial voltage.
[0056] Specifically, the power supply is a charge pump. In the erase operation, the initial voltage of the first substrate of the selected memory cell array is provided by the power supply, and the subsequent charging is provided by the charge stored in the second substrate and the power supply. Specifically, the charge stored in the second substrate is first used to charge the first substrate, and then the power supply is used to charge the first substrate to the target voltage.
[0057] S220, when it is monitored that the first substrate of the selected memory cell array begins to be discharged, the first substrate and the second substrate are connected to perform charge sharing until the charges in the first substrate and the second substrate are stabilized.
[0058] Specifically, in Nand Flash, electronic components such as MOS tubes between the selected memory cell array and the unselected memory cell array can realize the function of a switch, which is used to connect the first substrate and the second substrate for charge sharing. After the charge is stabilized, the first substrate and the second substrate have the same voltage.
[0059] S230 , disconnecting the first substrate from the second substrate.
[0060] Specifically, after the second substrate obtains the first voltage, the connection between the first substrate and the second substrate is disconnected, the charge sharing is stopped, and the first substrate and the second substrate are isolated, so that the first substrate continues to discharge.
[0061] S240, discharging the first substrate to ground.
[0062] Specifically, the first substrate is discharged to the ground to discharge the remaining charge of the first substrate, thereby completing a charging and discharging process, and continuing to monitor the next charging.
[0063] S250: When it is detected that the first substrate starts to be charged, the first substrate and the second substrate are connected to share the charge in the first voltage until the charge in the first substrate and the second substrate is stable.
[0064] Specifically, when it is monitored that the first substrate starts to be charged, the first substrate and the second substrate are connected by electronic components such as MOS tubes and switch tubes to share charges, so that the charges stored in the second substrate move to the first substrate. After the charges are stabilized, the first substrate and the second substrate have the same voltage.
[0065] S260: disconnect the first substrate from the second substrate.
[0066] Specifically, after the first substrate obtains the second voltage, the connection is disconnected to isolate the first substrate from the second substrate, so as to continue charging the first substrate.
[0067] S270 , controlling the power supply to charge the first substrate at a determined charging voltage, where the charging voltage is a difference between the second voltage and the target voltage.
[0068] Specifically, the power supply is controlled to charge the first substrate, and the charged voltage is the difference between the second voltage and the target voltage, so that the first substrate rises to the target voltage based on the second voltage.
[0069] Furthermore, the target voltage is the sum of the initial voltage and a set voltage increment value.
[0070] Specifically, the target voltage of each charge is increased by a set step value. Exemplarily, the initial voltage of the first substrate is U0, then the target voltage of the first substrate when it is charged after being discharged from U0 is U1=U0+U', and U1 is composed of the first voltage of the second substrate and the charging voltage of the power supply; the target voltage of the first substrate when it is charged after being discharged from U1 is U2=U0+2·U', and the target voltage when it is charged after being discharged from U2 is U3=U0+3·U', and so on, until the target voltage meets the preset voltage of the erase operation. By charging to the target voltage in this way, the threshold voltage of the floating gate can be gradually changed, so that the storage cells in the erase block gradually reach the erase state, the effect of charge traps generated during the erase process is weakened, the number of erase times of NandFlash is increased, and the service life is extended.
[0071] S280, whether the erase state is detected, if yes, execute step S290; if not, return to execute step S220.
[0072] S290, discharging the first substrate and the second substrate to ground.
[0073] Specifically, if the erase state is detected, there is no need to perform charge sharing and charging, and the first substrate and the second substrate are discharged to the ground to complete an erase operation.
[0074] Figure 4 This is a schematic diagram of the voltage control method of Nand Flash in the second embodiment of the present invention. For ease of understanding, this embodiment equates the first substrate (CW0) and the second substrate (CW1) to capacitors C_cw, and equates the MOS tubes, switch tubes and other electronic devices used to connect the first substrate and the second substrate in Nand Flash and discharge the substrate to the ground (voltage is VSS) to switches (S0-S3), and explains the principle of the voltage control method. Figure 4 As shown, S0 is a switch for charging the first substrate, S1 is a switch for discharging the first substrate, S2 is a connecting switch between the first substrate and the second substrate, and S3 is a switch for discharging the second substrate.
[0075] Figure 5 This is a signal timing diagram of the voltage control process of Nand Flash in the second embodiment of the present invention. Figure 5 The voltage changes of the first substrate and the second substrate and the switch states of S0-S3 are shown.
[0076] Reference Figure 4 and Figure 5 The erase operation starts at time t0. First, S0 is turned on, S1-S3 are turned off, and the first substrate is charged to the initial voltage VERA through the charge pump (represented by PUMP);
[0077] At time t1, it is monitored that the first substrate begins to discharge, at which time S0 is disconnected and S2 is connected, so that the first substrate is connected to the second substrate for charge sharing, so that the second substrate obtains the first voltage V0, and the voltage of the first substrate is the same as that of the second substrate;
[0078] After the charge sharing is stable, S2 is disconnected to disconnect the first substrate from the second substrate, and S1 is connected to discharge the remaining charge in the first substrate to the ground;
[0079] At time t2, it is detected that the first substrate begins to discharge. At this time, S1 is disconnected and S2 is connected to connect the first substrate to the second substrate. The charge stored in the second substrate (first voltage V0) is used to charge the first substrate until the charge between the two substrates is stable and the first substrate obtains the second voltage V1. In this process, the second substrate drops from V0 to V1, and the first substrate rises from VSS to V1;
[0080] After the charge is stabilized, S2 is disconnected to disconnect the first substrate from the second substrate, and S0 is connected at the same time, and the charge pump is used to continue charging the first substrate to the target voltage VERA+DVERA.
[0081] Furthermore, if the target voltage does not meet the preset voltage of the erase operation, the above process is repeated except charging the first substrate to the initial voltage VERA, the discharge of the first substrate is continuously monitored, and the discharged charge of the first substrate is stored in the second substrate to realize the reuse of the discharged charge (as shown at time t3-t5); if the target voltage meets the preset voltage of the erase operation, after erasing, the first substrate and the second substrate are both discharged to the ground to complete the erase operation. It should be noted that if the target voltage meets the preset voltage of the erase operation, the first substrate and the second substrate can be directly discharged to the ground, or after the charge of the first substrate is shared with the second substrate and the discharge of the first substrate is completed (as shown at time t6), the second substrate can be discharged to the ground to complete the voltage control process of the erase operation.
[0082] It should be noted that, in the process of the first substrate changing from VERA to VERA+DVERA, the voltage from VSS to V1 is obtained by repeatedly utilizing the discharged charge of the first substrate, and the voltage from V1 to VERA+DVERA is obtained by charging the power supply; similarly, in the process from VERA+DVERA to VERA+2*DVERA, part of the voltage (VSS to V3) is also obtained by repeatedly utilizing the discharged charge of the first substrate, thereby reducing power consumption and reducing the power consumption of charging and discharging during the erase operation.
[0083] It should be noted that the above-mentioned equivalent schematic diagram and timing diagram are only exemplary descriptions and can be adjusted according to actual conditions in the application. For example, when the discharge of the first substrate is detected, the order of disconnecting S0 and connecting S2 is not limited; for another example, all the charges that need to be discharged by the first substrate can be shared with the second substrate, and then the remaining charges can be discharged, or only part of the charges that need to be discharged by the first substrate can be shared with the second substrate; for another example, when discharging the substrate, it is not limited to the discharge method of discharging the substrate to the ground, and the charge can also be transferred to other electronic devices. The second substrate can be one or more. When there are multiple second substrates, a corresponding number of multiple equivalent switches are used to control the connection and disconnection between the first substrate and the second substrate to achieve charge sharing and reuse.
[0084] A voltage control method provided in the second embodiment of the present invention is optimized on the basis of the above embodiment. By sharing the charge discharged from the first substrate to the second substrate and reusing the charge temporarily stored in the second substrate to charge the first substrate, the discharged charge is reused, the power consumption is reduced, and thus the power consumption of charging and discharging in the erase operation is reduced; by setting the target voltage of each charge to the sum of the initial voltage and the set voltage increment value, the storage unit in the erase block gradually reaches the erase state, the number of erase times of the Nand Flash is increased, and the service life is extended.
[0085] Embodiment 3
[0086] Figure 6 This is a schematic diagram of the structure of a voltage control device provided in Embodiment 3 of the present invention. The voltage control device provided in this embodiment includes:
[0087] The charge sharing module 310 is used to monitor that when the first substrate of the selected memory cell array starts to be discharged, share the charge in the first substrate with the second substrate of the non-selected memory cell array so that the second substrate obtains the first voltage;
[0088] A first charging module 320 is configured to charge the first substrate based on the first voltage when detecting that the first substrate starts to be charged, so that the first substrate obtains a second voltage;
[0089] The second charging module 330 is configured to charge the first substrate to a target voltage based on the second voltage.
[0090] A voltage control device provided in the third embodiment of the present invention shares the charge discharged from the first substrate to the second substrate and charges the first substrate with the charge stored in the second substrate, thereby achieving the reuse of the discharged charge and reducing the charging power consumption in the erase operation.
[0091] Based on the above embodiment, the charge sharing module 310 is specifically used for:
[0092] connecting the first substrate and the second substrate to share charges until the charges in the first substrate and the second substrate are stable;
[0093] The connection between the first substrate and the second substrate is disconnected, and the first substrate is discharged to the ground.
[0094] Furthermore, the first charging module 320 is specifically used for:
[0095] connecting the first substrate and the second substrate to share the charges in the first voltage until the charges in the first substrate and the second substrate are stable;
[0096] The first substrate is disconnected from the second substrate.
[0097] Furthermore, the second charging module 330 is specifically used for:
[0098] The power supply is controlled to charge the first substrate at a determined charging voltage value, where the charging voltage value is a difference between the second voltage and the target voltage.
[0099] Furthermore, the device also includes:
[0100] The initial charging module is used to control the power supply to charge the first substrate to an initial voltage, so that the first substrate starts to discharge from the initial voltage.
[0101] Furthermore, the target voltage is the sum of the initial voltage and a set voltage increment value.
[0102] Furthermore, the device also includes:
[0103] The discharge module is used for discharging the first substrate and the second substrate to the ground if the erase state is detected.
[0104] The voltage control device provided in the third embodiment of the present invention can be used to execute the voltage control method provided in any of the above embodiments, and has corresponding functions and beneficial effects.
[0105] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A Nand Flash voltage control method, characterized in that: include: When it is detected that the first substrate of the selected memory cell array begins to be discharged, the charge in the first substrate is shared with the second substrate of the non-selected memory cell array, so that the second substrate obtains a first voltage; wherein the charge in the first substrate is shared with the second substrate of the non-selected memory cell array by selecting at least one second substrate of the non-selected memory cell array to temporarily store the discharged charge of the first substrate, and when the charge sharing between the first substrate and the second substrate reaches a stable state, the charge no longer moves; When it is detected that the first substrate starts to be charged, the first substrate is charged based on the first voltage so that the first substrate obtains a second voltage; when it is detected that the first substrate starts to be charged, the first substrate is charged based on the first voltage so that the first substrate obtains the second voltage, including: connecting the first substrate and the second substrate, and charging the first substrate by using the charge temporarily stored in the second substrate; The first substrate is charged to a target voltage based on the second voltage.
2. The method according to claim 1, characterized in that: The method of sharing the charges in the first substrate to the second substrate of the non-selected memory cell array comprises: connecting the first substrate and the second substrate to share charges until the charges in the first substrate and the second substrate are stable; The connection between the first substrate and the second substrate is disconnected, and the first substrate is discharged to the ground.
3. The method according to claim 1, characterized in that The charging the first substrate based on the first voltage comprises: connecting the first substrate and the second substrate to share the charges in the first voltage until the charges in the first substrate and the second substrate are stable; The first substrate is disconnected from the second substrate.
4. The method according to claim 1, characterized in that The step of charging the first substrate to a target voltage based on the second voltage comprises: A power supply is controlled to charge the first substrate at a determined charging voltage value, where the charging voltage value is a difference between a second voltage and the target voltage.
5. The method according to claim 1, characterized in that: Before monitoring the start of discharging the first substrate of the selected memory cell array, the method further includes: The control power source charges the first substrate to an initial voltage, so that the first substrate starts to discharge from the initial voltage.
6. The method according to claim 5, characterized in that The target voltage is the sum of the initial voltage and a set voltage increment value.
7. The method according to claim 1, characterized in that After charging the first substrate to a target voltage according to the second voltage, the method further includes: If the erase state is detected, the first substrate and the second substrate are discharged to the ground.
8. A non-volatile memory, characterized in that: include: A voltage control device, wherein The voltage control device comprises: A charge sharing module, for monitoring the start of discharging of the first substrate of the selected storage cell array, sharing the charge in the first substrate with the second substrate of the non-selected storage cell array, so that the second substrate obtains a first voltage; wherein the sharing of the charge in the first substrate with the second substrate of the non-selected storage cell array is to select at least one second substrate of the non-selected storage cell array to temporarily store the discharged charge of the first substrate, and when the charge sharing between the first substrate and the second substrate reaches a stable state, the charge no longer moves; The first charging module is configured to charge the first substrate based on the first voltage when detecting that the first substrate starts to be charged, so that the first substrate obtains a second voltage; the charging of the first substrate based on the first voltage when detecting that the first substrate starts to be charged, so that the first substrate obtains the second voltage comprises: connecting the first substrate and the second substrate, and charging the first substrate using the charge temporarily stored in the second substrate; The second charging module is used to charge the first substrate to a target voltage according to the second voltage.
9. The nonvolatile memory according to claim 8, wherein: The charge sharing module is specifically used for: connecting the first substrate and the second substrate to share charges until the charges in the first substrate and the second substrate are stable; The connection between the first substrate and the second substrate is disconnected, and the first substrate is discharged to the ground.
10. The nonvolatile memory according to claim 8, wherein: The first charging module is specifically used for: connecting the first substrate and the second substrate to share the charges in the first voltage until the charges in the first substrate and the second substrate are stable; The first substrate is disconnected from the second substrate.
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