Overvoltage protection module and adaptive power adapter

Abstract

In order to overcome the problem that the adaptive adapter in the prior art cannot provide overvoltage protection for electronic devices of various specifications, the present invention provides an adaptive power adapter that can effectively provide overvoltage protection for electronic devices of various specifications. The adaptive power adapter provided by the present invention adds an overvoltage protection reference voltage selection module and an FB voltage detection module in the overvoltage protection module, so that it does not adopt a fixed threshold overvoltage protection threshold, but can select different overvoltage protection thresholds according to the specifications of the electronic device. To avoid the occurrence of damage to electronic equipment caused by excessive overvoltage protection thresholds. When it is detected that the output voltage is greater than the set overvoltage protection threshold, the FB voltage needs to be detected. If the FB voltage is greater than the preset reference voltage, the overvoltage protection threshold is adjusted; if the FB is less than the preset reference voltage, the overvoltage protection is triggered.

Description

Technical Field

[0001] The present invention relates to the field of power adapters, and in particular to an overvoltage protection circuit in an adaptive power adapter. Background Art

[0002] At present, the existing requirements for the charging speed of electronic devices are getting faster and faster. The current fast charging technology, such as QC2.0 (Quick Charger 2.0), requires not only that the power adapter can output 5V voltage, but also that the power adapter can output 9V, 12V, 15V, 20V and other specifications to adapt to electronic devices of different specifications; for example, in QC3.0 (QuickCharger 2.0), the power adapter is required to output any voltage from 3.6V to 20V with 200mV as a gear. For example, a plug-in charger can adaptively change its output voltage for different electronic devices.

[0003] Existing adaptive power adapters such as Figure 1 As shown. The adaptive power adapter includes a transformer 101, a primary side circuit and a secondary side circuit located on both sides of the transformer 101; wherein the primary side circuit includes a primary main circuit and a primary control module 105; the primary main circuit is used to connect to the AC line source 100, and is provided with a charging switch M1; the primary control module 105 is connected to the charging switch M1 to control the on and off of the charging switch M1; the secondary side circuit includes a secondary side main circuit and a secondary control module 104; the secondary side main circuit is provided with a connector 102 for connecting to an external electronic device; the secondary control module 104 is used to monitor and control the secondary side main circuit;

[0004] The power adapter inputs voltage from the AC line source 100 and outputs voltage from the VBUS port of the connector 102. Depending on the electronic device, the voltage of the VBUS port on the connector can be adjusted to 5V, 9V, 12V, 15V, or 20V.

[0005] The primary control module 105 includes an overvoltage protection module 106 and a pulse width control module; the pulse width control module includes a trigger unit 110, a PWM (pulse width modulation) comparison module 112 and a first NOR gate 113; the in-phase terminal and the out-phase terminal of the PWM comparison module 112 are respectively connected to the PWM signal and the FB voltage; the output terminal of the PWM comparison module 112 and the output terminal of the overvoltage protection module 106 are respectively connected to the two input terminals of the first NOR gate 113, and the output terminal of the first NOR gate 113 is connected to the reset terminal of the trigger unit 110; the input terminal of the trigger unit 110 is connected to the high level input terminal; the output terminal is connected to the control terminal of the charging switch M1. Its clock terminal is connected to the clock signal OSC.

[0006] The overvoltage protection module 106 includes an overvoltage detection comparator 107, a first RS trigger 108, a power supply voltage detection module 109 and a sampling and holding circuit 111. The power supply voltage detection module 109 is used to detect the power supply voltage of the auxiliary winding 114 corresponding to the secondary side voltage; the sampling and holding circuit 111 is used to sample the output voltage; the two input terminals of the overvoltage detection comparator 107 are respectively connected to the sampling and holding circuit 111 and the overvoltage protection threshold input terminal; its output terminal is connected to the set terminal of the first RS trigger 108; the reset terminal of the first RS trigger 108 is grounded;

[0007] When the transformer 101 is reversed, the voltage on the auxiliary winding 114 is equal to the voltage of the secondary winding multiplied by the turns ratio of the auxiliary winding 114 and the secondary winding. Based on this, the voltage of the secondary winding can be detected using the voltage of the auxiliary winding 114. For example, the auxiliary winding is set to a specific turns ratio with the secondary winding, such as 1:1; wherein the overvoltage protection threshold input terminal is used to input the overvoltage protection threshold Vref_ovp, and the overvoltage protection threshold Vref_ovp is a fixed voltage, such as 1V. If the turns ratio of the auxiliary winding 114 and the secondary winding in the auxiliary power supply is 1:1, a voltage divider circuit is provided in the auxiliary winding, and its resistance ratio is 23:1; the voltage drop of the secondary rectifier diode is ignored; then the corresponding protection output voltage overvoltage threshold is 24V.

[0008] The reset terminal of the first RS flip-flop 108 is grounded and keeps a low level. In the initial state, the initial state of the output terminal Q is 0.

[0009] Taking the output voltage overvoltage protection threshold of 24V and the turns ratio of the auxiliary winding 114 to the secondary winding as 1:1 as an example, when the output voltage VBUS of the connector 102 is less than 24V, the overvoltage comparison signal outputted from the output terminal of the overvoltage detection comparator 107 is low level, the first RS trigger 108 outputs a low level, and the primary control module 105 works normally;

[0010] When the output voltage VBUS of the connector 102 is greater than 24V, the overvoltage detection comparator 107 outputs a high level, and the first RS trigger 108 outputs a high level; the trigger unit 110 is cleared, the control loop of the primary control module 105 is shielded, and the output port DRV of the primary control module 105 outputs a low level, the charging switch M1 is turned off, the primary main circuit is disconnected, and the secondary main circuit has no output, thereby protecting the electronic device from overcharging.

[0011] However, in order to meet the application of 20V output voltage, the output voltage overvoltage protection threshold Vref_ovp of this solution using a fixed threshold must be greater than 20V. When the electronic device 103 connected to the VBUS terminal is an electronic device 103 with a smaller voltage specification (such as 5V, 9V, 12V, 15V), for example, when the electronic device 103 is a 5V electronic device 103, due to some abnormality, if the output voltage VBUS voltage changes to 10V, the output overvoltage protection cannot be triggered, but it is likely that the electronic device 103 has been damaged. It is impossible to form protection for the electronic device 105 whose specification of the output terminal VBUS connected to the connector 102 is a smaller voltage specification (such as 5V, 9V, 12V, 15V). Summary of the invention

[0012] In order to overcome the problem that the adaptive adapter in the prior art cannot provide overvoltage protection for electronic devices of various specifications, the present invention provides an adaptive power adapter that can effectively provide overvoltage protection for electronic devices of various specifications.

[0013] The present invention provides an adaptive power adapter, which is provided with an overvoltage protection module; the overvoltage protection module includes an overvoltage detection comparator, a first RS trigger, a power supply voltage detection module and a sampling and holding circuit;

[0014] Wherein, the overvoltage protection module also includes an overvoltage protection reference voltage selection module, an FB voltage detection module, a first AND gate and a second AND gate;

[0015] The power supply voltage detection module is used to detect the power supply voltage; the sample and hold circuit is used to sample the output voltage to obtain the sampled voltage;

[0016] The out-of-phase terminal of the FB voltage detection module is connected to a preset reference voltage, and the in-phase terminal is connected to the FB voltage;

[0017] The overvoltage protection reference voltage selection module includes a plurality of threshold setting ports, a threshold selection port and an overvoltage protection threshold output port; the threshold setting port is used to input a multi-level threshold setting signal, and the threshold selection port is used to input a port selection signal to select the threshold setting signal from the threshold setting port to be transmitted to the overvoltage protection threshold output port to output the overvoltage protection threshold;

[0018] The out-of-phase terminal of the overvoltage detection comparator is connected to the overvoltage protection threshold output port of the overvoltage protection reference voltage selection module, and the in-phase terminal is connected to the output terminal of the sample and hold circuit;

[0019] The output end of the overvoltage detection comparator and the output end of the FB voltage detection module are respectively connected to the two input ends of the first AND gate, and the output end of the first AND gate is connected to the threshold selection port of the overvoltage protection reference voltage selection module;

[0020] The output end of the overvoltage detection comparator and the output end of the FB voltage detection module are respectively connected to the two input ends of the second AND gate after passing through a NOT gate, and the output end of the second AND gate is connected to the set end of the first RS trigger; the reset end of the first RS trigger is grounded.

[0021] The adaptive power adapter provided by the present invention adds an overvoltage protection reference voltage selection module and an FB voltage detection module in the overvoltage protection module, so that it does not use a fixed threshold overvoltage protection threshold, but can select different overvoltage protection thresholds according to the specifications of the electronic device. This is to avoid the occurrence of electronic equipment damage caused by excessive overvoltage protection thresholds. When it is detected that the output voltage is greater than the set overvoltage protection threshold, it is also necessary to detect the FB voltage. If the FB voltage is greater than the set preset reference voltage, the overvoltage protection threshold is adjusted; if FB is less than the set preset reference voltage, the overvoltage protection is triggered.

[0022] Further, the adaptive power adapter includes a transformer, a primary side circuit and a secondary side circuit located on both sides of the transformer;

[0023] The primary side circuit includes a primary main circuit and a primary control module; the primary main circuit is used to connect to an AC line source and is provided with a charging switch; the primary control module is connected to the charging switch to control the on and off of the charging switch;

[0024] The secondary side circuit includes a secondary side main loop and a secondary control module; the secondary side main loop is provided with a connector for connecting to an electronic device; the secondary control module is used to monitor and control the secondary side main loop;

[0025] The overvoltage protection module is disposed in the primary control module.

[0026] Furthermore, the primary control module also includes a pulse width control module;

[0027] The pulse width control module includes a trigger unit, a PWM comparison module and a first NOR gate;

[0028] The in-phase terminal and the out-of-phase terminal of the PWM comparison module are respectively connected to the PWM signal and the FB voltage; the output terminal of the PWM comparison module and the output terminal of the overvoltage protection module are respectively connected to the two input terminals of the first NOR gate, and the output terminal of the first NOR gate is connected to the reset terminal of the trigger unit;

[0029] The input end of the trigger unit is connected to a low-voltage power supply, the clock end is connected to a clock signal, and the output end is connected to the control end of the charging switch.

[0030] Further, the overvoltage protection reference voltage selection module includes a switch selection circuit;

[0031] The switch selection circuit is arranged between the threshold setting port and the overvoltage protection threshold output port, and is used to select the threshold setting signal input from each threshold setting port to be transmitted to the overvoltage protection threshold output port according to the port selection signal input from the threshold selection port, and output the overvoltage protection threshold from the overvoltage protection threshold output port.

[0032] Furthermore, the overvoltage protection reference voltage selection module is provided with an N-level threshold setting port;

[0033] The switch selection circuit is arranged between the N-level threshold setting port and the overvoltage protection threshold output port, and is used to select and connect each of the threshold setting ports and the overvoltage protection threshold output port step by step according to the port selection signal input by the threshold selection port, and transmit the threshold setting signal input by each threshold setting port to the overvoltage protection threshold output port step by step, and output the overvoltage protection threshold from the overvoltage protection threshold output port step by step; wherein N is greater than or equal to 2.

[0034] Furthermore, the overvoltage protection reference voltage selection module also includes a shift circuit;

[0035] The shift circuit is used for selectively shifting and outputting a control signal to the switch selection circuit according to the port selection signal inputted by the threshold selection port.

[0036] Further, the switch selection circuit includes N selection switches and N-2 AND gates; the shift circuit includes a first D flip-flop group and a second D flip-flop group; wherein N is greater than or equal to 5;

[0037] The first D flip-flop group is provided with N-1 D flip-flops, the N-1 D flip-flops are connected in series, the clock end of each D flip-flop is synchronously connected to the threshold selection port, and the input end of the first D flip-flop is input with a high level;

[0038] The second D flip-flop group is provided with N-1 D flip-flops; the input terminals of the D flip-flops in the second D flip-flop group are all connected to a high level; the D flip-flops in the second D flip-flop group correspond to the D flip-flops in the first D flip-flop group one by one, and the clock terminals thereof are respectively connected to the output terminals of the corresponding D flip-flops in the first D flip-flop group;

[0039] Among them, N-2 AND gates are set to be the third AND gate, the fourth AND gate, ... the Nth AND gate in sequence;

[0040] The output end of the first D flip-flop in the second D flip-flop group is connected to a pin of the third AND gate, and the output end of the second D flip-flop is connected to another pin of the third AND gate after a NOT gate; the output end of the second D flip-flop is connected to a pin of the fourth AND gate, and the output end of the third D flip-flop is connected to another pin of the fourth AND gate after a NOT gate; and so on and so forth, the output end of the N-1th D flip-flop is connected to a pin of the Nth AND gate, and the output end of the N-1th D flip-flop is connected to another pin of the Nth AND gate after a NOT gate;

[0041] The N selection switches are sequentially set to be a first selection switch, a second selection switch, ... an Nth selection switch;

[0042] The output end of the third AND gate is connected to the control end of the first selection switch through an RS trigger, and the output end of the third AND gate is directly connected to the control end of the second selection switch; the output end of the fourth AND gate is directly connected to the control end of the third selection switch; and so on, the output end of the Nth AND gate is directly connected to the control end of the N-1th selection switch; wherein, the output end of the N-1th D trigger is directly connected to the control end of the Nth selection switch.

[0043] Furthermore, the primary side circuit includes an auxiliary winding, the input end of the power supply voltage detection module is connected to the auxiliary winding; the auxiliary winding is connected to a voltage divider circuit, and the sampling and holding circuit is connected to the voltage divider circuit.

[0044] Furthermore, the voltage-dividing circuit comprises a first voltage-dividing resistor and a second voltage-dividing resistor connected in series between the positive end of the auxiliary winding and the ground end; and the sampling and holding circuit is electrically connected between the first voltage-dividing resistor and the second voltage-dividing resistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a schematic diagram of the principle of the adaptive power adapter circuit provided in the prior art;

[0046] Figure 2 is a schematic diagram of the principle of an adaptive power adapter circuit provided in a specific embodiment of the present invention;

[0047] Figure 3 is a schematic diagram of an overvoltage protection reference voltage selection module provided in a specific embodiment of the present invention;

[0048] Figure 4 It is a further preferred overvoltage protection reference voltage selection module provided in a specific embodiment of the present invention;

[0049] Figure 5 yes Figure 4 A further refined schematic diagram of the optimization principle of an overvoltage protection reference voltage selection module;

[0050] Figure 6 : is a schematic diagram of waveforms of each node of the overvoltage protection reference voltage selection module provided in a specific embodiment of the present invention;

[0051] Figure 7 is a waveform diagram of an adaptive power adapter provided in a specific embodiment of the present invention;

[0052] Figure 8 It is a waveform diagram of a 5V electronic device triggering overvoltage protection provided in a specific embodiment of the present invention;

[0053] Fig. 9 It is a waveform diagram of a 12V electronic device triggering overvoltage protection provided in a specific implementation manner of the present invention.

[0054] Among them, M1, charging switch; 100, AC line source; 101, transformer; 102, connector; 103, electronic equipment; 104, secondary control module; 105, primary control module;

[0055] 106, overvoltage protection module; 107, overvoltage detection comparator; 108, first RS trigger; 109, power supply voltage detection module; 110, trigger unit; 111, sample and hold circuit; 112, PWM comparison module; 113, first NOR gate; 114, auxiliary winding; 115, overvoltage protection reference voltage selection module; 116, FB voltage detection module; 117, first AND gate; 118, second AND gate; 119, first NOR gate;

[0056] 1151, switch selection circuit; 1152, shift circuit; D11, fifth D flip-flop; D12, sixth D flip-flop; D13, seventh D flip-flop; D14, eighth D flip-flop; D21, first D flip-flop; D22, second D flip-flop; D23, third D flip-flop; D24, fourth D flip-flop; Y1, third AND gate; Y2, fourth AND gate; Y3, fifth AND gate; 301, second RS flip-flop; 302, second NOT gate; 303, third NOT gate; 304, fourth NOT gate; Q0, first selection switch; Q1, second selection switch; Q2, third selection switch; Q3, fourth selection switch; Q4, fifth selection switch; R1, first voltage-dividing resistor; R2, second voltage-dividing resistor. DETAILED DESCRIPTION

[0057] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0058] In the description of the present invention, it should be understood that the terms "longitudinal", "radial", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0059] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0060] Example

[0061] This example will specifically explain the adaptive power adapter disclosed in the present invention. Figure 2 As shown, the adaptive power adapter includes a transformer 101, a primary side circuit and a secondary side circuit located on both sides of the transformer 101;

[0062] The primary side circuit includes a primary main circuit (not marked in the figure) and a primary control module 105; the primary main circuit is used to connect the AC line source 100, and a charging switch M1 is provided on it; the primary control module 105 is connected to the charging switch M1 to control the on and off of the charging switch M1; the circuit of the primary main circuit is well known to the public, and rectification, filtering and other modules can be provided on it, and the charging switch M1 is generally controlled by a power MOS tube. No more details are given. The primary control module 105 is usually a control chip.

[0063] The secondary side circuit includes a secondary side main loop (not marked in the figure) and a secondary control module 104; the secondary side main loop is provided with a connector 102 for connecting to an electronic device 103; the secondary control module 104 is used to monitor and control the secondary side main loop; the connector 102 on the secondary side main loop is well known to the public, and generally has four terminals: VBUS, DP, DN, GND; VBUS is the output voltage terminal. The secondary control module 104 on the secondary side is generally provided with a protocol module; the protocol module is connected to the DP and DN terminals of the connector 102; and interacts with the electronic device 103 through the DP and DN terminals. No more details will be given.

[0064] like Figure 1 As shown in , similar to the conventional solution, the overvoltage protection module 106 includes an overvoltage detection comparator 107, a first RS trigger 108, a power supply voltage detection module 109 and a sampling and holding circuit 111; in this example, the core idea is that the overvoltage protection module 106 in the primary control module 105 also includes an overvoltage protection reference voltage selection module 115, an FB voltage detection module 116, a first AND gate 117 and a second AND gate 118;

[0065] The power supply voltage detection module 109 is used to detect the power supply voltage, and the power supply voltage mentioned here refers to the power supply voltage of the primary side circuit. The sampling and holding circuit 111 is used to sample the output voltage to obtain the sampled voltage; in this example, the power supply voltage detection module 109 is connected to the power supply end of the primary control module 105, and the power supply end can be connected to an external power supply as needed, or as shown in this example, an auxiliary winding 114 is set, and the power supply voltage detection module 109 is connected to the auxiliary winding 114. As a preferred embodiment, an auxiliary winding 114 is set in the primary side circuit, and the input end of the power supply voltage detection module 109 is connected to the auxiliary winding 114; the auxiliary winding 114 is connected to a voltage divider circuit, and the sampling and holding circuit 111 is connected to the voltage divider circuit. In this example, the voltage divider circuit includes a first voltage divider resistor R1 and a second voltage divider resistor R2 connected in series between the positive end and the ground end of the auxiliary winding 114; the sampling and holding circuit 111 is electrically connected between the first voltage divider resistor and the second voltage divider resistor.

[0066] Similarly, in this example, when the transformer 101 is reversed, the voltage on the auxiliary winding 114 is equal to the voltage of the secondary winding multiplied by the turns ratio of the auxiliary winding 114 and the secondary winding. Based on this, the voltage of the secondary winding can be detected using the voltage of the auxiliary winding 114. For example, the auxiliary power supply is set to a specific turns ratio with the secondary winding, such as 1:1; in this example, the ratio of the first voltage divider resistor to the second voltage divider resistor is 23:1. As can be understood, the sampled voltage collected by the sample and hold circuit 111 is one 24th of the output voltage VBUS (ignoring the voltage drop of the secondary rectifier diode).

[0067] The out-of-phase end of the FB voltage detection module 116 is connected to a preset reference voltage Vref_fb, and the in-phase end is connected to the FB voltage; the FB voltage is known to the public and is a feedback voltage. The preset reference voltage Vref_fb is a fixed voltage, specifically, for example, set to 4V. The FB voltage can be understood as the output of an error amplifier. The in-phase end of the error amplifier is a reference voltage, generally 2.5V, and the out-of-phase end is the voltage after the output voltage VBUS is divided by a resistor. By adjusting the ratio of the resistor divider, it can be adjusted to the output target voltage. During normal operation, the in-phase and out-of-phase ends of the error amplifier are equal, and the FB voltage is an analog voltage. The specific voltage size is determined by the loop duty cycle. When the output voltage VBUS is greater than the output target voltage, the voltage of VBUS after the resistor divider, that is, the out-of-phase end of the error amplifier, will be greater than the output target voltage of the in-phase end, and the output of the error voltage device will become a low level. When the output voltage VBUS is lower than the output target voltage, the voltage after the output voltage VBUS is divided by the resistor, that is, the out-of-phase end of the error amplifier, will be lower than the output target voltage at the in-phase end, and the output of the error voltage device will become high. That is, the FB voltage has three states. In the normal state, the analog voltage is output. In the abnormal state, if the output voltage VBUS is higher than the output target voltage, the FB voltage outputs a low level. If VBUS is lower than the output target voltage, the FB voltage outputs a high level.

[0068] The overvoltage protection reference voltage selection module 115 includes several threshold setting ports (marked as V0, V1, V2, V3, V4 in the figure), a threshold selection port Vs and an overvoltage protection threshold output port Vref_ovp; it is explained here that the above-mentioned figure marks representing the ports are also used to represent the signals of the relevant ports for the convenience of description, so that they can be explained more concisely in the subsequent principle explanation. That is, V0, V1, V2, V3, V4 are also used to represent the threshold setting signal. Vs is also used to represent the port selection signal. Vref_ovp is also used to represent the overvoltage protection threshold. The threshold setting ports V0, V1, V2, V3, V4 are used to input multi-level threshold setting signals, and the threshold selection port Vs is used to input port selection signals to select the threshold setting signals from the threshold setting ports V0~V4 to pass to the overvoltage protection threshold output port Vref_ovp to output the overvoltage protection threshold;

[0069] The out-of-phase terminal of the overvoltage detection comparator 107 is connected to the overvoltage protection threshold output port Vref_ovp of the overvoltage protection reference voltage selection module 115, and the in-phase terminal is connected to the output terminal of the sample and hold circuit 111;

[0070] The output end of the overvoltage detection comparator 107 and the output end of the FB voltage detection module 116 are respectively connected to the two input ends of the first AND gate 117, and the output end of the first AND gate 117 is connected to the threshold selection port Vs of the overvoltage protection reference voltage selection module 115;

[0071] The output end of the overvoltage detection comparator 107 and the output end of the FB voltage detection module 116 are respectively connected to the two input ends of the second AND gate 118 after passing through a NOT gate (in this example, called the first NOT gate 119), and the output end of the second AND gate 118 is connected to the set end of the first RS trigger 108; the reset end of the first RS trigger 108 is grounded.

[0072] In this example, similarly, the reset terminal of the first RS flip-flop 108 is grounded and always maintains a low level. In the initial state, the initial state of the output terminal Q is 0.

[0073] In this example, as a preferred method, Figure 2 As shown, the primary control module 105 also includes a pulse width control module;

[0074] The pulse width control module includes a trigger unit 110, a PWM comparison module 112 and a first NOR gate 113;

[0075] The in-phase terminal and the out-of-phase terminal of the PWM comparison module 112 are connected to the PWM signal and the FB voltage respectively; the output terminal of the PWM comparison module 112 and the output terminal of the overvoltage protection module 106 are connected to the two input terminals of the first NOR gate 113 respectively, and the output terminal of the first NOR gate 113 is connected to the reset terminal of the trigger unit 110;

[0076] The trigger unit 110 has an input terminal connected to a low voltage power supply, a clock terminal connected to a clock signal OSC, and an output terminal connected to a control terminal of the charging switch M1.

[0077] In this example, the trigger unit is a D flip-flop.

[0078] The pulse width control module in this application is the same as the existing solution and is not the main innovation of this application. Those skilled in the art may also choose other pulse width control circuits to implement it.

[0079] like Figure 3 As shown, in this example, the overvoltage protection reference voltage selection module 115 includes a switch selection circuit 1151;

[0080] The switch selection circuit 1151 is arranged between the threshold setting ports V0~V4 and the overvoltage protection threshold output port Vref_ovp, and is used to select the threshold setting signals input from each threshold setting port V0~V5 to be transmitted to the overvoltage protection threshold output port Vref_ovp according to the port selection signal input from the threshold selection port Vs, and output the overvoltage protection threshold from the overvoltage protection threshold output port Vref_ovp.

[0081] As a preferred embodiment, the overvoltage protection reference voltage selection module 115 is provided with an N-level threshold setting port;

[0082] The switch selection circuit 1151 is arranged between the N-level threshold setting ports V0~V4 and the overvoltage protection threshold output port Vref_ovp, and is used to select and connect each of the threshold setting ports V0~V4 and the overvoltage protection threshold output port Vref_ovp step by step according to the port selection signal input by the threshold selection port Vs, and transmit the threshold setting signal input by each threshold setting port V0~V4 to the overvoltage protection threshold output port step by step, and output the overvoltage protection threshold from the overvoltage protection threshold output port Vref_ovp step by step; wherein N is greater than or equal to 2.

[0083] like Figure 4 As shown, further preferably, the overvoltage protection reference voltage selection module 115 further includes a shift circuit 1152;

[0084] The shift circuit 1152 is used for selectively shifting and outputting a control signal to the switch selection circuit 1151 according to the port selection signal inputted from the threshold selection port Vs.

[0085] like Figure 5 As shown, in this example, the switch selection circuit 1151 includes N selection switches and N-2 AND gates; the shift circuit 1152 includes a first D flip-flop group and a second D flip-flop group; wherein N is greater than or equal to 5; in this example, N is taken as 5 for illustration.

[0086] The first D flip-flop group is provided with 4 D flip-flops, the 4 D flip-flops are connected in series, the clock end of each D flip-flop is synchronously connected to the threshold selection port, and a high level is input to the input end of the first D flip-flop; in this example, for the sake of distinction, the D flip-flops are named the fifth D flip-flop D11, the sixth D flip-flop D12, the seventh D flip-flop D13, and the eighth D flip-flop D14 from the left; that is, the first D flip-flop in the first D flip-flop group is the fifth D flip-flop D11, the second D flip-flop is the sixth D flip-flop D12, the third D flip-flop is the seventh D flip-flop D13, and the fourth D flip-flop is the eighth D flip-flop D14.

[0087] The second D flip-flop group is provided with 4 D flip-flops; the input terminals of the D flip-flops in the second D flip-flop group are all connected to a high level; the D flip-flops in the second D flip-flop group correspond to the D flip-flops in the first D flip-flop group one by one, and the clock terminals thereof are respectively connected to the output terminals of the corresponding D flip-flops in the first D flip-flop group; in this example, for the sake of distinction, the D flip-flops are named the first D flip-flop D21, the second D flip-flop D22, the third D flip-flop D23, and the fourth D flip-flop D24 from the left in sequence;

[0088] Among them, the N-2 AND gates are sequentially set as the third AND gate Y1, the fourth AND gate Y2, ... the Nth AND gate; in this example, the third AND gate Y1, the fourth AND gate Y2, and the fifth AND gate Y3 are sequentially set from the left.

[0089] The output end of the first D flip-flop (the first D flip-flop D21) in the second D flip-flop group is connected to one of the pins of the third AND gate Y1, and the output end of the second D flip-flop (the second D flip-flop D22) is connected to another pin of the third AND gate Y1 after a NOT gate; the output end of the second D flip-flop is connected to a pin of the fourth AND gate Y2, and the output end of the third D flip-flop (the third D flip-flop D23) is connected to another pin of the fourth AND gate Y2 after a NOT gate; the output end of the third D flip-flop (i.e., the fourth D flip-flop D24) is connected to a pin of the fifth AND gate Y3, and the output end of the fourth D flip-flop (the fourth D flip-flop) is connected to another pin of the fifth AND gate Y3 after a NOT gate.

[0090] In this example, the five selection switches are sequentially set to be the first selection switch Q0, the second selection switch Q1, ..., the fifth selection switch Q4;

[0091] The output end of the third AND gate Y1 is connected to the control end SV0 of the first selection switch Q0 through an RS trigger (to distinguish it from the above-mentioned RS trigger, the RS trigger is named as the second RS trigger 301 here), and the output end of the third AND gate Y1 is directly connected to the control end SV1 of the second selection switch Q1; the output end of the fourth AND gate Y2 is directly connected to the control end SV2 of the third selection switch Q2; the output end of the fifth AND gate Y3 is directly connected to the control end SV3 of the fourth selection switch Q3; wherein, the output end of the fourth D trigger is directly connected to the control end SV4 of the fifth selection switch Q4.

[0092] In this example, the Figure 5 The working principle of the overvoltage protection reference voltage selection module 115 is explained as follows:

[0093] The D flip-flops in the first D flip-flop group are synchronously connected to the connection Figure 2 The output terminal of the first AND gate 117 in the figure is connected to the Vref_ovp terminal marked in the figure with the input port selection signal Vs. Figure 2 Vref_ovp in.

[0094] Shown Figure 5 In the figure, after power-on is completed, Vref-ok (a signal indicating that the voltage and current inside the chip are stably established) will be set to a high level, so that each D flip-flop and the second RS flip-flop 301 are cleared and reset. When the first rising edge of the input port selection signal Vs arrives, the output terminal QA of the first D flip-flop (fifth D flip-flop D11) in the first D flip-flop group will be set to a high level, and the rising edge of QA output to the first D flip-flop (first D flip-flop D21) in the second D flip-flop group will set the output terminal QB to a high level. The remaining D flip-flops are in the initial state at this time, so that the initial state of the output terminal QD of the second D flip-flop (second D flip-flop D22) in the second D flip-flop group is a low level. The low level signal is converted to a high level through the second NOT gate 302, so that the third AND gate Y1 outputs a high level, which will make the control terminal SV1 of the second selection switch Q1Q1 a high level, and the second selection switch Q1 is turned on. At the same time, the control terminal SV2 of the remaining third selection switch Q2, the control terminal SV3 of the fourth selection switch Q3, and the control terminal SV4 of the fifth selection switch Q4 are low levels and not turned on. After SV1 is at a high level, the control terminal SV0 of the first selection switch Q0 is set to a low level through the second RS trigger 301. The connection between V0 and the Vref_ovp terminal is disconnected. The control terminal SV1 of the second selection switch Q1 is at a high level, and V1 is transmitted to the overvoltage protection threshold output port Vref_ovp, outputting the overvoltage protection threshold Vref_ovp.

[0095] When the second rising edge of the port selection signal Vs arrives, the output terminal QC of the second D flip-flop (sixth D flip-flop D12) in the first D flip-flop group will be set to a high level, and the signal is output to the clock terminal of the second D flip-flop (second D flip-flop D22) in the second D flip-flop group. When the clock signal is a rising edge, the second D flip-flop D22 will set the output terminal QD to a high level. The high level of QD, through the second NOT gate 302, will set the control terminal SV1 of the second selection switch Q1 to a low level, disconnecting the connection between V1 and Vref_ovp. Since the initial state of QE is a low level, the high level of QD will also make SV2 a high level, passing V2 to the overvoltage protection threshold output port Vref_ovp, and outputting the overvoltage protection threshold Vref_ovp.

[0096] When the third rising edge of the port selection signal Vs arrives, the output terminal QF of the third D flip-flop (the seventh D flip-flop D13) in the first D flip-flop group will be set to a high level. This signal is output to the clock terminal of the third D flip-flop (the third D flip-flop D23) in the second D flip-flop group. When the clock signal is a rising edge, the third D flip-flop D23 will set the output terminal QE to a high level. The high level of the output terminal QE, through the third NOT gate 303, will set the control terminal SV2 of the third selection switch Q2 to a low level, disconnecting the connection between V2 and Vref_ovp. Since the initial state of the fourth D flip-flop (the fourth D flip-flop D24) in the second D flip-flop group is a low level, the low level signal output by its output terminal QH outputs a high level after passing through the fourth NOT gate 304, so the high level of the output terminal QE of the third D flip-flop D23 and the high level output of the fourth NOT gate 304 will make the control terminal SV3 of the fourth selection switch Q3 a high level, and pass V3 to the overvoltage protection threshold output port Vref_ovp, and output the overvoltage protection threshold Vref_ovp.

[0097] When the fourth rising edge of the port selection signal Vs arrives, the output terminal QG of the fourth D flip-flop (eighth D flip-flop D14) in the first D flip-flop group will be set to a high level. This signal is output to the clock terminal of the fourth D flip-flop (fourth D flip-flop D24) in the second D flip-flop group. When the clock signal is a rising edge, the fourth D flip-flop D24 will set the output terminal QH to a high level. The rising edge of QG will set the control terminal SV4 of the fifth selection switch Q4 to a high level. The fifth selection switch Q4 is turned on and V4 is passed to Vref_ovp. Since the high-level signal output by the output terminal QH of the fourth D flip-flop (fourth D flip-flop D24) in the second D flip-flop group outputs a low level after passing through the fourth NOT gate 304, the fourth selection switch Q3 is closed, disconnecting V3.

[0098] Thereafter, no matter how the port selection signal Vs changes, the control terminal SV4 of the fifth selection switch Q4 is always at a high level and remains at a high level, and V4 is always transmitted to the overvoltage protection threshold output port Vref_ovp to output the overvoltage protection threshold Vref_ovp.

[0099] like Figure 6As shown, its initial setting will make the control end SV0 of the first selection switch Q0 high level, and pass V0 to the overvoltage protection threshold Vref_ovp. When the first rising edge of the port selection signal Vs comes, the control end SV0 of the first selection switch Q0 is set to a low level, and the control end SV1 of the second selection switch Q1 is set to a high level, and V1 is passed to Vref_ovp. When the second rising edge of the port selection signal Vs comes, the control end SV1 of the second selection switch Q1 is set to a low level, and the control end SV2 of the third selection switch Q2 is set to a high level, and V2 is passed to Vref_ovp. Similarly, when the third and fourth rising edges of the port selection signal Vs come, V3 and V4 will be passed to the overvoltage protection threshold output port Vref_ovp, and the overvoltage protection threshold Vref_ovp will be output.

[0100] The working principle of the primary control module 105 of the present application is explained below.

[0101] The overvoltage detection comparator 107 compares the sampled voltage of the sampling and holding module with the adaptively changing overvoltage protection threshold Vref_ovp to detect whether the output voltage exceeds the overvoltage protection threshold Vref_ovp. If the sampled voltage exceeds the protection threshold, the FB voltage detection module 116 detects whether the FB voltage is less than the preset reference voltage Vref_fb. If the FB voltage is less than the preset reference voltage Vref_fb, the output voltage overvoltage protection is triggered. If the FB voltage is greater than the preset reference voltage Vref_fb, the first AND gate 117 outputs a high level to the threshold selection port, and the overvoltage protection reference voltage selection module 115 adjusts the adaptively changing overvoltage protection threshold Vref_ovp by one gear every time it receives a rising edge.

[0102] like Figure 7 As shown, for ease of understanding, in this example, the output terminal (OVP signal) of the first RS trigger 108 is first set to a high level, and the waveform nodes are as follows:

[0103] When the output OVP of the first RS trigger 108 is at a low level, the clock signal OSC is input to the clock terminal of the trigger unit 110 (a D trigger in this example). At the rising edge of the clock signal OSC, the output signal DRV of the trigger unit 110 is set to a high level, turning on the power tube M1.

[0104] At the same time, the two input terminals of the PWM comparison module 112, one input FB voltage, and the other input pulse width modulation signal Vramp, when Vramp is greater than the Fb voltage, the PWM comparison module 112 outputs a high level. The high level will set DRV to a low level, turning off the power tube M1. This is the pulse width modulation working process of the loop.

[0105] When the overvoltage protection signal OVP outputted from the output terminal of the first RS trigger 108 is at a high level, the output signal DRV at the output terminal is directly set to a low level. At this time, no matter how the clock signal OSC and the Vramp signal change, the DRV signal always remains at a low level, shielding the pulse width modulation loop.

[0106] In order to enable those skilled in the art to further understand the present application scheme, further examples are given below to illustrate its working process.

[0107] Taking the fast charging protocol QC2.0 as an example, the threshold setting voltages of the overvoltage protection reference voltage selection module 115 are V0, V1, V2, V3, and V4, which correspond to the overvoltage protection voltages of the output voltages 5V, 9V, 12V, 15V, and 20V, respectively. Specifically, if VBUS is 5V, 9V, 12V, 15V, and 20V, respectively, the corresponding overvoltage protection voltages are 6V, 10.8V, 14.4V, 18V, and 24V, respectively; among them, the threshold setting voltages V1, V2, V3, V4, and V5 are 0.25V, 0.45V, 0.6V, 0.75V, and 1V, respectively. When it is passed to the overvoltage protection threshold output port, the corresponding overvoltage protection thresholds are output as 0.25V, 0.45V, 0.6V, 0.75V, and 1V.

[0108] like Figure 8 As shown, in the primary control module 105 of the power adapter, the overvoltage protection reference voltage selection module 115 initially outputs the threshold setting voltage V0 (0.25V), corresponding to the output overvoltage protection voltage of 6V. If the output voltage VBUS is always less than 6V, then the overvoltage detection comparator 107 always outputs a low level, and the overvoltage protection reference voltage selection module 115 always keeps the output as V0. If the output voltage VBUS is greater than 6V, Figure 2 The output voltage sensed by the PRT port is processed by the sampling and holding module and then sent to the non-inverting terminal of the overvoltage detection comparator 107, and the overvoltage detection comparator 107 outputs a high level.

[0109] Since the output voltage VBUS is greater than 6V at this time, which is much greater than the output target voltage 5V of the power adapter, the FB voltage (marked as VFB in the figure) is saturated to a low level. The detection threshold voltage of the FB voltage detection module 116 is usually set to 4V, connected to the negative phase terminal, and the non-phase terminal is connected to the FB voltage (marked as VFB in the figure). At this time, the FB voltage detection module 116 outputs a low level, which cooperates with the high level output by the overvoltage detection comparator 107 to act on the first RS trigger 108, causing it to output a high level, triggering the output overvoltage protection signal OVP.

[0110] like Fig. 9As shown, specifically, as an implementation example, the electronic device 103 is a 12V electronic device 103 . Figure 2 In the example, the overvoltage protection reference voltage selection module 115 initially outputs an overvoltage protection threshold of V0 (0.25V), and the corresponding output overvoltage protection voltage is 6V. During the soft start period, when the VBUS voltage exceeds 6V, the overvoltage detection comparator 107 outputs a high level. Since the output target voltage of the power adapter is 12V, which is much greater than 6V, the FB voltage (marked as VFB in the figure) is saturated to a high level, which is greater than the preset reference voltage of 4V of the FB voltage detection module 116. At this time, the FB voltage detection module 116 outputs a high level, which cooperates with the high level output by the overvoltage detection comparator 107 to act on the overvoltage detection reference voltage selection module, so that the output of the overvoltage detection reference voltage selection module changes from V0 to V1. V1 (0.45V) corresponds to an overvoltage protection voltage of 10.8V with an output voltage of 9V. When the output of the overvoltage detection reference voltage selection module changes from V0 to V1, that is, from 0.25V to 0.45V, the output of the overvoltage detection comparator 107 changes to a low level, waiting for the next overvoltage detection. Since the electronic device 103 is a 12V electronic device 103, the output voltage VBUS will continue to rise. When the output voltage VBUS is greater than 10.8V, the overvoltage detection comparator 107 outputs a high level again. Since the output target voltage of the power adapter is 12V, which is greater than 10.8V, the feedback voltage FB is saturated to a high level, which is greater than the preset reference voltage 4V of the FB voltage detection module 116. At this time, the FB voltage detection module 116 outputs a high level, which cooperates with the high level output by the overvoltage detection comparator 107 to act on the overvoltage protection reference voltage selection module 115, so that the output of the overvoltage protection reference voltage selection module 115 is changed from V1 to V2. V2 corresponds to the overvoltage protection threshold value of the 12V output voltage (usually 0.6V), and the corresponding protection voltage is 14.4V. At this point, the output voltage VBUS can be smoothly started to the output target voltage 12V.

[0111] If the output voltage VBUS is always less than 14.4V, the overvoltage detection comparator 107 always outputs a low level, and the overvoltage protection reference voltage selection module 115 always maintains the output as V2. If the output voltage VBUS exceeds 14.4V due to some abnormality, the overvoltage detection comparator 107 outputs a high level. Since the output voltage VBUS is greater than 14.4V at this time, that is, much greater than the output target voltage 12V of the power adapter, the FB voltage (marked VFB in the figure) is saturated to a low level. At this time, the FB voltage detection module 116 outputs a low level, which cooperates with the high level output by the overvoltage detection comparator 107 to act on the first RS trigger 108, causing it to output a high level, triggering the output overvoltage protection signal OVP.

[0112] Similarly, the overvoltage protection working principle of the 15V electronic device 103 and the 20V electronic device 103 can be deduced.

[0113] The adaptive power adapter provided by the present invention adds an overvoltage protection reference voltage selection module 115 and an FB voltage detection module 116 to the overvoltage protection module 106, so that it does not use a fixed threshold overvoltage protection threshold, but can select different overvoltage protection thresholds according to the specifications of the electronic device 103. This is to avoid the occurrence of damage to the electronic device 103 caused by an overvoltage protection threshold being too large. When it is detected that the output voltage is greater than the set overvoltage protection threshold, the FB voltage needs to be detected. If the FB voltage is greater than the set preset reference voltage, the overvoltage protection threshold is adjusted; if the FB is less than the set preset reference voltage, the overvoltage protection is triggered.

[0114] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An adaptive power adapter, comprising an overvoltage protection module; the overvoltage protection module comprises an overvoltage detection comparator, a first RS trigger, a power supply voltage detection module and a sampling and holding circuit; It is characterized in that The overvoltage protection module also includes an overvoltage protection reference voltage selection module, an FB voltage detection module, a first AND gate and a second AND gate; The sample-and-hold circuit is used to sample the output voltage to obtain a sampled voltage; The out-of-phase terminal of the FB voltage detection module is connected to a preset reference voltage, and the in-phase terminal is connected to the FB voltage; The overvoltage protection reference voltage selection module includes a plurality of threshold setting ports, a threshold selection port and an overvoltage protection threshold output port; the threshold setting port is used to input a multi-level threshold setting signal, and the threshold selection port is used to input a port selection signal to select the threshold setting signal from the threshold setting port to be transmitted to the overvoltage protection threshold output port to output the overvoltage protection threshold; The out-of-phase terminal of the overvoltage detection comparator is connected to the overvoltage protection threshold output port of the overvoltage protection reference voltage selection module, and the in-phase terminal is connected to the output terminal of the sample and hold circuit; The output end of the overvoltage detection comparator and the output end of the FB voltage detection module are respectively connected to the two input ends of the first AND gate, and the output end of the first AND gate is connected to the threshold selection port of the overvoltage protection reference voltage selection module; The output end of the overvoltage detection comparator and the output end of the FB voltage detection module are respectively connected to the two input ends of the second AND gate after passing through a NOT gate, and the output end of the second AND gate is connected to the set end of the first RS trigger; the reset end of the first RS trigger is grounded.

2. The adaptive power adapter according to claim 1, characterized in that: The adaptive power adapter includes a transformer, a primary side circuit and a secondary side circuit located on both sides of the transformer; The primary side circuit includes a primary main circuit and a primary control module; the primary main circuit is used to connect to an AC line source and is provided with a charging switch; the primary control module is connected to the charging switch to control the on and off of the charging switch; The secondary side circuit includes a secondary side main loop and a secondary control module; the secondary side main loop is provided with a connector for connecting to an electronic device; the secondary control module is used to monitor and control the secondary side main loop; The overvoltage protection module is disposed in the primary control module.

3. The adaptive power adapter according to claim 2, characterized in that: The primary control module also includes a pulse width control module; The pulse width control module includes a trigger unit, a PWM comparison module and a first NOR gate; The in-phase terminal and the out-of-phase terminal of the PWM comparison module are respectively connected to the PWM signal and the FB voltage; the output terminal of the PWM comparison module and the output terminal of the overvoltage protection module are respectively connected to the two input terminals of the first NOR gate, and the output terminal of the first NOR gate is connected to the reset terminal of the trigger unit; The input end of the trigger unit is connected to a low-voltage power supply, the clock end is connected to a clock signal, and the output end is connected to the control end of the charging switch.

4. The adaptive power adapter according to claim 2, characterized in that: The overvoltage protection reference voltage selection module includes a switch selection circuit; The switch selection circuit is arranged between the threshold setting port and the overvoltage protection threshold output port, and is used to select the threshold setting signal input from each threshold setting port to be transmitted to the overvoltage protection threshold output port according to the port selection signal input from the threshold selection port, and output the overvoltage protection threshold from the overvoltage protection threshold output port.

5. The adaptive power adapter according to claim 4, characterized in that: The overvoltage protection reference voltage selection module is provided with an N-level threshold setting port; The switch selection circuit is arranged between the N-level threshold setting port and the overvoltage protection threshold output port, and is used to select and connect each of the threshold setting ports and the overvoltage protection threshold output port step by step according to the port selection signal input by the threshold selection port, and transmit the threshold setting signal input by each threshold setting port to the overvoltage protection threshold output port step by step, and output the overvoltage protection threshold from the overvoltage protection threshold output port step by step; wherein N is greater than or equal to 2.

6. The adaptive power adapter according to claim 5, characterized in that: The overvoltage protection reference voltage selection module also includes a shift circuit; The shift circuit is used for selectively shifting and outputting a control signal to the switch selection circuit according to the port selection signal inputted by the threshold selection port.

7. The adaptive power adapter according to claim 6, characterized in that: The switch selection circuit includes N selection switches and N-2 AND gates; the shift circuit includes a first D flip-flop group and a second D flip-flop group; wherein N is greater than or equal to 5; The first D flip-flop group is provided with N-1 D flip-flops, the N-1 D flip-flops are connected in series, the clock end of each D flip-flop is synchronously connected to the threshold selection port, and the input end of the first D flip-flop is input with a high level; The second D flip-flop group is provided with N-1 D flip-flops; the input terminals of the D flip-flops in the second D flip-flop group are all connected to a high level; the D flip-flops in the second D flip-flop group correspond to the D flip-flops in the first D flip-flop group one by one, and the clock terminals thereof are respectively connected to the output terminals of the corresponding D flip-flops in the first D flip-flop group; Among them, N-2 AND gates are set to be the third AND gate, the fourth AND gate, ... the Nth AND gate in sequence; The output end of the first D flip-flop in the second D flip-flop group is connected to a pin of the third AND gate, and the output end of the second D flip-flop is connected to another pin of the third AND gate after a NOT gate; the output end of the second D flip-flop is connected to a pin of the fourth AND gate, and the output end of the third D flip-flop is connected to another pin of the fourth AND gate after a NOT gate; and so on and so forth, the output end of the N-1th D flip-flop is connected to a pin of the Nth AND gate, and the output end of the N-1th D flip-flop is connected to another pin of the Nth AND gate after a NOT gate; The N selection switches are sequentially set to be a first selection switch, a second selection switch, ... an Nth selection switch; The output end of the third AND gate is connected to the control end of the first selection switch through an RS trigger, and the output end of the third AND gate is directly connected to the control end of the second selection switch; the output end of the fourth AND gate is directly connected to the control end of the third selection switch; and so on, the output end of the Nth AND gate is directly connected to the control end of the N-1th selection switch; wherein, the output end of the N-1th D trigger is directly connected to the control end of the Nth selection switch.

8. The adaptive power adapter according to claim 3, characterized in that: The primary side circuit includes an auxiliary winding, and the input end of the power supply voltage detection module is connected to the auxiliary winding; the auxiliary winding is connected to a voltage divider circuit, and the sampling and holding circuit is connected to the voltage divider circuit.

9. The adaptive power adapter according to claim 8, characterized in that: The voltage-dividing circuit comprises a first voltage-dividing resistor and a second voltage-dividing resistor connected in series between the positive end of the auxiliary winding and the ground end; and the sampling and holding circuit is electrically connected between the first voltage-dividing resistor and the second voltage-dividing resistor.

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