Multifunctional mobile phone power switching circuit

Abstract

The present invention discloses a multifunctional mobile phone power switching circuit, which includes a charging port and a battery, wherein the charging port includes a USB interface, an OTG interface, and a wireless charging interface, and a power switching circuit is provided between the charging port and the battery; the power switching circuit includes a wired charging circuit, a wireless charging circuit, and a charging chip, wherein the charging chip is connected to the wired charging circuit and the wireless charging circuit respectively, the charging chip is connected to the battery, the wired charging circuit is connected to the OTG interface and the USB interface respectively, and the wireless charging circuit is connected to the wireless charging interface. The multifunctional mobile phone power switching circuit obtained by the present invention utilizes the very small conduction voltage drop of the MOS tube, and the voltage loss of each charging path after conduction is extremely small, thereby improving the use efficiency of the power supply, and the pure hardware switching is conducive to improving the switching speed of the charging path, and the safety is improved, and no special multi-power management chip is required, and the cost is low. It is not only applicable to mobile phone products, but also applicable to other electronic products.

Description

Technical Field

[0001] The invention relates to the field of charging, in particular to a multifunctional mobile phone power switching circuit. Background Art

[0002] Mobile phones consume more and more energy, and charging is becoming more and more important and diverse. Many mobile phones have wireless charging functions and conventional USB charging. In addition, mobile phones also have OTG functions. The OTG function includes identifying peripherals, such as USB flash drives, and can also charge other mobile phones, enabling mobile phones to charge each other.

[0003] Some mobile phones on the market that support multiple charging methods also use multiple power management chips for power management, but this makes the cost of power management higher; some power management relies on software control, which makes the power management easy to modify, has poor security, and causes delays when switching charging methods; and some power management has chaotic coordination when multiple charging methods are in progress at the same time, which can easily cause circulation and backflow between different power sources, which in the least affects the life of the power supply or causes problems such as heat; in the worst case, it can cause the phone to burn out or cause a fire; and some power management designs are very complicated, resulting in greater power management losses when charging the battery. Summary of the invention

[0004] The purpose of the present invention is to solve the above-mentioned deficiencies of the prior art and provide a multifunctional mobile phone power switching circuit that is beneficial to improving the switching speed of the charging path and improving its safety.

[0005] In order to achieve the above-mentioned purpose, the multifunctional mobile phone power switching circuit designed by the present invention includes a charging port and a battery, the charging port includes a USB interface, an OTG interface, and a wireless charging interface, and a power switching circuit is provided between the charging port and the battery; in order to switch the charging, the power switching circuit includes a wired charging circuit, a wireless charging circuit, and a charging chip, the charging chip is respectively connected to the wired charging circuit and the wireless charging circuit, the charging chip is connected to the battery, the wired charging circuit is respectively connected to the OTG interface and the USB interface, and the wireless charging circuit is connected to the wireless charging interface.

[0006] In order to better charge with the USB interface and reversely charge the power supply of the USB interface with the OTG interface, the wired charging circuit includes a PMOS tube Q1, a PMOS tube Q2, an NMOS tube Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a diode D1. The OTG interface is connected to the USB interface through the diode D1, the USB interface is connected to the source of the PMOS tube Q1, the gate of the PMOS tube Q1 is grounded through the resistor R1, and the gate is connected to the OTG interface, the PMOS tube Q1 is connected to the drain of the PMOS tube Q2, and the drain of the PMOS tube Q1 is grounded through the resistors R2 and R3 in turn, the gate of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3, the source of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3 through the resistor R4, the source of the PMOS tube Q2 is also connected to the charging chip, the source of the NMOS tube Q3 is grounded, and the gate of the NMOS tube Q3 is grounded through the resistor R3.

[0007] In order to better wirelessly charge and select and manage charging methods, the wireless charging circuit includes resistors R5, R6, R7, R8, R9, PMOS tube Q4, PMOS tube Q5, NMOS tube Q6, and NMOS tube Q7. The wireless charging interface is connected to the drain of the PMOS tube Q4, and the drain of the PMOS tube Q4 is grounded through resistors R6 and R7 in turn. The PMOS tube Q4 is connected to the source of the PMOS tube Q5, and the gate is connected. A resistor R8 is provided between the source and the gate. The drain of the PMOS tube Q5 is connected to the drain of the PMOS tube Q4. The gate of the PMOS tube Q5 is connected to the drain of the NMOS tube Q7 through R9, the source of the NMOS tube Q7 is grounded, the gate of the NMOS tube Q7 is grounded through the resistor R7, the gate of the NMOS tube Q7 is also connected to the drain of the NMOS tube Q6, the NMOS tube Q6 is connected to the drain of the PMOS tube Q4 through the resistor R6, the source of the NMOS tube Q6 is grounded, the gate of the NMOS tube Q6 is connected to the drain of the PMOS tube Q1, and the resistor R5 is the discharge resistor of the NMOS tube Q6.

[0008] The multifunctional mobile phone power switching circuit obtained by the present invention utilizes the characteristic of very small conduction voltage drop of MOS tube, and the voltage loss of each charging path after conduction is extremely small, thereby improving the use efficiency of power supply, and is pure hardware switching, and does not require software control, which is conducive to improving the switching speed of charging paths, and the safety is improved. It does not need to use multiple special power management chips, and the cost is low. It is not only suitable for mobile phone products, but also suitable for other electronic products. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 1 is a schematic diagram of a power switching circuit for a feature phone in Example 1.

[0010] In the figure: battery 1, USB interface 2, OTG interface 3, wireless charging interface 4, charging chip 5. DETAILED DESCRIPTION

[0011] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0012] Embodiment 1:

[0013] The multifunctional mobile phone power switching circuit described in this embodiment is as follows: Figure 1 As shown, in order to achieve the above-mentioned purpose, the multifunctional mobile phone power switching circuit designed by the present invention includes a charging port and a battery 1, a power switching circuit is arranged between the charging port and the battery 1, and the charging port includes a USB interface 2, an OTG interface 3, and a wireless charging interface 4.

[0014] In order to switch charging, the power switching circuit includes a wired charging circuit, a wireless charging circuit, and a charging chip 5. The charging chip 5 is connected to the wired charging circuit and the wireless charging circuit respectively. The charging chip 5 is connected to the battery 1. The wired charging circuit is connected to the OTG interface 3 and the USB interface 2 respectively. The wireless charging circuit is connected to the wireless charging interface 4.

[0015] In order to better charge with the USB interface and reversely charge the power supply of the USB interface with the OTG interface, the wired charging circuit includes a PMOS tube Q1, a PMOS tube Q2, an NMOS tube Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a diode D1. The OTG interface 3 is connected to the USB interface 2 through the diode D1, the USB interface 2 is connected to the source of the PMOS tube Q1, the gate of the PMOS tube Q1 is grounded through the resistor R1, and the gate is connected to the OTG interface 3, the PMOS tube Q1 is connected to the drain of the PMOS tube Q2, and the drain of the PMOS tube Q1 is grounded through the resistors R2 and R3 in turn, the gate of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3, the source of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3 through the resistor R4, the source of the PMOS tube Q2 is also connected to the charging chip, the source of the NMOS tube Q3 is grounded, and the gate of the NMOS tube Q3 is grounded through the resistor R3.

[0016] In order to better wirelessly charge and select and manage charging methods, the wireless charging circuit includes resistors R5, R6, R7, R8, R9, PMOS tube Q4, PMOS tube Q5, NMOS tube Q6, and NMOS tube Q7. The wireless charging interface 4 is connected to the drain of the PMOS tube Q4, and the drain of the PMOS tube Q4 is grounded through resistors R6 and R7 in turn. The PMOS tube Q4 is connected to the source of the PMOS tube Q5, and the gate is connected. A resistor R8 is provided between the source and the gate. The drain of the PMOS tube Q5 is connected to the drain of the PMOS tube Q5. The gate of the PMOS tube Q5 is connected to the drain of the NMOS tube Q7 through R9, the source of the NMOS tube Q7 is grounded, the gate of the NMOS tube Q7 is grounded through the resistor R7, the gate of the NMOS tube Q7 is also connected to the drain of the NMOS tube Q6, the NMOS tube Q6 is connected to the drain of the PMOS tube Q4 through the resistor R6, the source of the NMOS tube Q6 is grounded, the gate of the NMOS tube Q6 is connected to the drain of the PMOS tube Q1, and the resistor R5 is the discharge resistor of the NMOS tube Q6.

[0017] In this embodiment, the charging port is powered by an external power supply, and the relevant resistor components are selected as follows: resistor R1 = 4.7 kilohms, resistor R2 = 4.7 kilohms, resistor R3 = 4.7 kilohms, resistor R4 = 10 kilohms, resistor R5 = 4.7 kilohms, resistor R6 = 4.7 kilohms, resistor R7 = 4.7 kilohms, resistor R8 = 120 kilohms, and resistor R9 = 4.7 kilohms.

[0018] When only the USB interface 2 is powered, that is, when the VBUS input voltage is in the figure, the PMOS tube Q1 is turned on by the action of the resistor R1, and the NMOS tube Q3 is turned on by the action of the resistor R2 and the resistor R3. The drain of the NMOS tube Q3 is at a low level, so the PMOS tube Q2 is turned on, providing the charging chip 5 with a signal to charge the battery 1, so that the external power supply can charge the battery 1 through the USB interface 2. And because the on-resistance of the PMOS tube Q1 and the PMOS tube Q2 is very small, the on-voltage drop is very small, so during the charging process, the loss of the wired charging circuit is very small, which improves the efficiency of the power supply; and because the NMOS tube Q6 is turned on by the action of VBUS, the gate of the NMOS tube Q7 is at a low level, so the NMOS tube Q7, the PMOS tube Q4, and the PMOS tube Q5 are all turned off, and the voltage of the UBS interface cannot be reversed into the wireless charging interface 4, thereby protecting the wireless charging interface 4; the OTG interface 3 is isolated by the diode D1, and no reverse current enters, thereby protecting the OTG interface 3.

[0019] When only the OTG interface 3 is powered, the OTG interface 3 outputs a high level, the diode D1 is turned on, and because the diode has a voltage drop characteristic, the gate voltage of the PMOS tube Q1 is greater than the source voltage, and the PMOS tube Q1 is cut off, so the OTG interface 3 realizes the external power supply connected to the USB interface 2.

[0020] When only the wireless charging interface 4 is powered, Vbus_Wireless has a high level in the figure, the NMOS tube Q7 is turned on due to the voltage division of the resistors R6 and R7, the PMOS tubes Q4 and Q5 are turned on, and the current passes through the charging chip 5 to charge the battery 1. Because the NMOS tube Q3 is turned off under the action of the resistor R3, the PMOS tube Q2 is also turned off, so the external power will not flow back into the USB interface 2.

[0021] When the wireless charging interface 4 and the USB interface 2 are powered at the same time, VBUS is at a high level and Vbus_Wireless is at a high level in the figure. The PMOS tube Q1 is turned on by the resistor R1, and the PMOS tube Q2 is turned on. The external power supply of the USB interface 2 charges the battery 1. When the external power supply of the USB interface 2 charges the battery 1, the NMOS tube Q6 is turned on, and the gate of the NMOS tube Q7 becomes a low level, resulting in the NMOS tube Q7, the PMOS tube Q4, and the PMOS tube Q5 being cut off, and Vbus_Wireless is isolated by the PMOS tube Q4 and the PMOS tube Q5. Therefore, when the wireless charging interface 4 and the USB interface 2 are powered at the same time, the priority of the power supply of the USB interface 2 is higher than the priority of the wireless charging interface 4. Under the isolation of the diode D1, no backflow current enters the OTG interface 3, which effectively protects the OTG interface 3.

[0022] When the wireless charging interface 4 and the OTG interface 3 are powered at the same time, Vbus_Wireless in the figure has a high level, the NMOS tube Q7 is turned on due to the voltage division of the resistors R6 and R7, the PMOS tubes Q4 and Q5 are turned on, and the current passes through the charging chip 5 to realize charging of the battery 1. Because the NMOS tube Q3 is turned off under the action of the resistor R3, the PMOS tube Q2 is also turned off, so the external power supply will not flow back into the USB interface 2. At the same time, the OTG interface 3 outputs a high level, the diode D1 is turned on, and because the diode has a voltage drop characteristic, the gate voltage of the PMOS tube Q1 is greater than the source voltage, and the PMOS tube Q1 is turned off, so the OTG interface 3 realizes the external power supply connected to the USB interface 2, so the wireless charging interface 4 and the OTG interface 3 can be powered at the same time, and they are independent of each other and there will be no backflow phenomenon.

[0023] The multifunctional mobile phone power switching circuit provided in this embodiment utilizes the characteristic of very small conduction voltage drop of MOS tube. After conduction, the voltage loss of each charging path is extremely small, thereby improving the use efficiency of power supply. It is pure hardware switching and does not require software control, which is beneficial to improving the switching speed of charging paths and improving safety. It does not require multiple dedicated power management chips and has low cost. It is not only suitable for mobile phone products, but also for other electronic products.

Claims

1. A multifunctional mobile phone power switching circuit, comprising a charging port and a battery (1), characterized in that: The charging port comprises a USB interface (2), an OTG interface (3), and a wireless charging interface (4); a power switching circuit is provided between the charging port and the battery (1); the power switching circuit comprises a wired charging circuit, a wireless charging circuit, and a charging chip (5); the charging chip (5) is connected to the wired charging circuit and the wireless charging circuit respectively; the charging chip (5) is connected to the battery (1); the wired charging circuit is connected to the OTG interface (3) and the USB interface (2) respectively; and the wireless charging circuit is connected to the wireless charging interface (4); The wired charging circuit comprises a PMOS tube Q1, a PMOS tube Q2, an NMOS tube Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a diode D1; the OTG interface (3) is connected to the USB interface (2) via the diode D1; the USB interface (2) is connected to the source of the PMOS tube Q1; the gate of the PMOS tube Q1 is grounded via the resistor R1, and the gate is connected to the OTG interface (3); the PMOS tube Q1 is connected to the drain of the PMOS tube Q2, and the drain of the PMOS tube Q1 is grounded via the resistors R2 and R3 in sequence; the gate of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3; the source of the PMOS tube Q2 is connected to the drain of the NMOS tube Q3 via the resistor R4; the source of the PMOS tube Q2 is also connected to the charging chip; the source of the NMOS tube Q3 is grounded; and the gate of the NMOS tube Q3 is grounded via the resistor R3; The wireless charging circuit comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a PMOS tube Q4, a PMOS tube Q5, an NMOS tube Q6, and an NMOS tube Q7. The wireless charging interface (4) is connected to the drain of the PMOS tube Q4. The drain of the PMOS tube Q4 is grounded through the resistor R6 and the resistor R7 in sequence. The source of the PMOS tube Q4 and the gate of the PMOS tube Q5 are connected. A resistor R8 is provided between the source and the gate. The drain of the PMOS tube Q5 is connected to the charging chip (5). The PMOS tube The gate of Q5 is connected to the drain of NMOS tube Q7 through R9, the source of NMOS tube Q7 is grounded, the gate of NMOS tube Q7 is grounded through resistor R7, the gate of NMOS tube Q7 is also connected to the drain of NMOS tube Q6, the drain of NMOS tube Q6 is connected to the drain of PMOS tube Q4 through resistor R6, the source of NMOS tube Q6 is grounded, the gate of NMOS tube Q6 is connected to the drain of PMOS tube Q1, the gate of NMOS tube Q6 is grounded through resistor R5, and the resistance value of resistor R5 is 4.7 kilo-ohms.

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