Superjunction structure and superjunction device

Abstract

The present invention discloses a superjunction structure, which is a natural superjunction structure formed by alternating a first thin layer and a second thin layer; the first thin layer is composed of a gallium nitride material with spontaneous polarization, the material of the second thin layer is a semiconductor material different from gallium nitride and the material of the second thin layer also has spontaneous polarization, and the spontaneous polarization characteristics of the first thin layer and the second thin layer are used to form bound charges at the interface of the first thin layer and the second thin layer, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface. The present invention also discloses a superjunction device. The present invention can form a gallium nitride superjunction structure with completely balanced charges, and at the same time has the advantages of low specific on-resistance and high breakdown voltage.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a superjunction device; the present invention also relates to a superjunction device. Background Art

[0002] The specific on-resistance (Ron,sp) of existing power devices is related to the breakdown voltage (BreakdownVoltage). The higher the breakdown voltage, the higher the specific on-resistance. For traditional power semiconductor devices, there is a physical limit of Ron,sp vs.BV, also known as the one-dimensional physical limit (1-Dlimit).

[0003] The invention of charge power devices can break this limit. The most typical charge balance device structure is the super junction device. Existing super junction devices use different doping in the drift region, such as N-type doping and P-type doping, to form a charge balance structure. This super junction process is relatively mature in silicon devices, but it cannot be applied to wide bandgap semiconductors. Especially in gallium nitride, it is difficult to form P-type doping through ion implantation, so it is difficult to manufacture charge balance devices. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a super junction structure that can form a gallium nitride super junction structure with completely balanced charges, while having the advantages of low specific on-resistance and high breakdown voltage. To this end, the present invention also provides a super junction device.

[0005] In order to solve the above technical problems, the super junction structure provided by the present invention is a natural super junction structure formed by alternating arrangement of a first thin layer and a second thin layer.

[0006] The first thin layer is composed of a gallium nitride material having spontaneous polarization, the material of the second thin layer is a semiconductor material different from gallium nitride and the material of the second thin layer also has spontaneous polarization, and bound charges are formed at the interface between the first thin layer and the second thin layer by utilizing the spontaneous polarization characteristics of the first thin layer and the second thin layer, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0007] A further improvement is that the super junction structure is formed on a gallium nitride substrate heavily doped with the first conductivity type.

[0008] A further improvement is that the first thin layer is a non-doped intrinsic structure.

[0009] A further improvement is that the second thin layer is a non-doped intrinsic structure.

[0010] A further improvement is that the material of the second thin layer includes: AlGaN, AlN, SiC.

[0011] A further improvement is that the carrier concentration at the interface is adjusted by the thickness of the first thin layer and the second thin layer or by the molar composition of the constituent elements of the material of the second thin layer.

[0012] In order to solve the above technical problems, a super junction device provided by the present invention has a super junction structure arranged in a drift region, wherein the super junction structure is a natural super junction structure formed by alternating arrangement of a first thin layer and a second thin layer.

[0013] The first thin layer is composed of a gallium nitride material having spontaneous polarization, the material of the second thin layer is a semiconductor material different from gallium nitride and the material of the second thin layer also has spontaneous polarization, and bound charges are formed at the interface between the first thin layer and the second thin layer by utilizing the spontaneous polarization characteristics of the first thin layer and the second thin layer, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0014] A further improvement is that the super junction structure is formed on a gallium nitride substrate heavily doped with the first conductivity type.

[0015] A further improvement is that the first thin layer is a non-doped intrinsic structure; and the second thin layer is a non-doped intrinsic structure.

[0016] A further improvement is that the material of the second thin layer includes: AlGaN, AlN, SiC.

[0017] A further improvement is that the carrier concentration at the interface is adjusted by the thickness of the first thin layer and the second thin layer or by the molar composition of the constituent elements of the material of the second thin layer.

[0018] A further improvement is that the super junction device is a super junction Schottky diode.

[0019] A cathode composed of a back metal layer is formed on the back side of the gallium nitride substrate.

[0020] A first metal layer is formed on the top surface of the super junction structure to form a Schottky contact with the super junction structure.

[0021] An anode composed of a front metal layer is formed on the surface of the first metal layer.

[0022] A further improvement is that the super junction device is a super junction planar gate field effect transistor.

[0023] A second gallium nitride layer doped with a first conductivity type is formed on the top of the super junction structure, and the second gallium nitride layer serves as a part of the drift region.

[0024] A base region doped with a second conductivity type is formed in a selected region of the second gallium nitride layer.

[0025] A gate structure formed by stacking a gate oxide layer and a polysilicon gate is formed on the surface of the base region and extends to the surface of the second gallium nitride layer outside the base region.

[0026] A heavily doped source region of the first conductivity type is formed in the base region and is self-aligned with the first side surface of the polysilicon gate.

[0027] The top of the source region is connected to a source electrode composed of a front metal layer through a contact hole; the contact hole at the bottom of the source electrode also passes through the source region and contacts the base region.

[0028] The gallium nitride substrate forms a drain region.

[0029] The drain electrode is composed of a back metal layer formed on the back side of the drain region.

[0030] A further improvement is that the super junction device is a super junction trench gate field effect transistor.

[0031] A second gallium nitride layer doped with a first conductivity type is formed on the top of the super junction structure, and the second gallium nitride layer serves as a part of the drift region.

[0032] A base region doped with a second conductivity type is formed in a top region of the second gallium nitride layer.

[0033] The gate structure is composed of a gate oxide layer forming the inner surface of a gate trench and a polysilicon gate filled in the gate trench, and the gate trench passes through the base region.

[0034] A heavily doped source region of the first conductivity type is formed in the base region and is self-aligned with a side surface of the polysilicon gate.

[0035] The top of the source region is connected to a source electrode composed of a front metal layer through a contact hole; the contact hole at the bottom of the source electrode also passes through the source region and contacts the base region.

[0036] The gallium nitride substrate forms a drain region.

[0037] The drain electrode is composed of a back metal layer formed on the back side of the drain region.

[0038] A further improvement is that the superjunction device is a superjunction current aperture vertical electron transistor.

[0039] A second gallium nitride layer doped with a first conductivity type is formed on the top of the super junction structure, and the second gallium nitride layer serves as a part of the drift region.

[0040] A current blocking layer doped with a second conductivity type is formed in the second gallium nitride layer, and the current blocking layer is buried in the second gallium nitride layer.

[0041] A third aluminum gallium nitride layer of the first conductivity type is formed on the surface of the second gallium nitride layer, and a two-dimensional electron gas is formed at an interface between the third aluminum gallium nitride layer and the second gallium nitride layer.

[0042] A fourth semiconductor layer of the second conductivity type is formed on the surface of the third aluminum gallium nitride layer. The material of the fourth semiconductor layer is gallium nitride or aluminum gallium nitride. The fourth semiconductor layer is used to adjust the threshold voltage of the device to a positive value.

[0043] A gate electrode material layer composed of a metal layer is formed on the surface of the fourth semiconductor layer, and the gate electrode material layer and the fourth semiconductor layer form a Schottky contact.

[0044] A source contact hole is formed outside the gate electrode material layer, the bottom of the source contact hole is in contact with the current blocking layer, and the top of the source contact hole is connected to the source composed of the front metal layer.

[0045] The gallium nitride substrate forms a drain region.

[0046] The drain electrode is composed of a back metal layer formed on the back side of the drain region.

[0047] The superjunction structure of the present invention uses gallium nitride material. Different from the prior art superjunction structure that needs to use a P-type doped gallium nitride material thin layer and an N-type doped gallium nitride material thin layer to form a charge balanced superjunction structure, the present invention uses the spontaneous polarization characteristics of the gallium nitride material and combines it with another semiconductor material with spontaneous polarization. Bound charges will be formed at the heterojunction interface formed by the two semiconductor materials with spontaneous polarization. The bound charges will attract carriers and form a conductive channel. Since the bound charges are formed by spontaneous polarization and have nothing to do with the doping of the semiconductor material, complete charge balance can be achieved and the charge balance will be maintained forever. Therefore, the present invention can form a gallium nitride superjunction structure with completely balanced charge, and at the same time has the advantages of low specific on-resistance and high breakdown voltage.

[0048] When the superjunction structure of the present invention is used in the drift region of the semiconductor device, a corresponding superjunction device can be formed, which can reduce the specific on-resistance of the device and greatly reduce the energy loss of the device when it is turned on. Under the condition of the same breakdown voltage, the specific on-resistance of the superjunction device of the present invention is several orders of magnitude lower than that of the existing power device, thereby greatly reducing the power loss of the power semiconductor device and achieving energy conservation and emission reduction; at the same time, since the superjunction structure of the present invention is formed based on gallium nitride materials, it can be very suitable for gallium nitride power devices, and the present invention can give full play to the advantages of gallium nitride materials, reduce the cost of gallium nitride device manufacturing and simplify the process flow.

[0049] In addition, in the super junction structure of the present invention, the carrier concentration at the interface can be adjusted by adjusting the thickness of the semiconductor material of each layer of the heterojunction, thereby adjusting the specific on-resistance; the carrier concentration at the interface of the molar composition conditions of the constituent elements of the semiconductor material can also be adjusted, thereby adjusting the specific on-resistance, which makes the super junction structure of the present invention fully flexible in design. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0051] Figure 1 is a schematic diagram of a super junction structure according to an embodiment of the present invention;

[0052] Figure 2 is a schematic structural diagram of a super junction device according to a first embodiment of the present invention;

[0053] Figure 3 is a schematic structural diagram of a super junction device according to a second embodiment of the present invention;

[0054] Figure 4 is a schematic structural diagram of a super junction device according to a third embodiment of the present invention;

[0055] Figure 5 It is a schematic structural diagram of a super junction device according to a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0056] like Figure 1 , which is a schematic diagram of a super junction structure according to an embodiment of the present invention; the super junction structure according to the embodiment of the present invention is a natural super junction structure formed by alternating arrangement of a first thin layer 2 and a second thin layer 3 .

[0057] The first thin layer 2 is composed of a gallium nitride material with spontaneous polarization, and the material of the second thin layer 3 is a semiconductor material different from gallium nitride and the material of the second thin layer 3 also has spontaneous polarization. The spontaneous polarization characteristics of the first thin layer 2 and the second thin layer 3 are utilized to form bound charges at the interface between the first thin layer 2 and the second thin layer 3, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0058] The super junction structure is formed on a gallium nitride substrate 1 heavily doped with a first conductivity type. Generally, for an N-type device, the first conductivity type is N-type; for a P-type device, the second conductivity type is P-type.

[0059] The first thin layer 2 is a non-doped intrinsic structure.

[0060] The second thin layer 3 is a non-doped intrinsic structure. The material of the second thin layer 3 includes: AlGaN, AlN, SiC.

[0061] The carrier concentration at the interface is adjusted by the thickness of the first thin layer 2 and the second thin layer 3 or by the molar composition of the constituent elements of the material of the second thin layer 3 .

[0062] Gallium nitride material is used in the super junction structure of the embodiment of the present invention. Different from the super junction structure in the prior art that needs to use a P-type doped gallium nitride material thin layer and an N-type doped gallium nitride material thin layer to form a charge balanced structure, the embodiment of the present invention uses the spontaneous polarization characteristics of the gallium nitride material, and combines it with another semiconductor material with spontaneous polarization. Bound charges will be formed at the heterojunction interface formed by the two semiconductor materials with spontaneous polarization. The bound charges will attract carriers and form a conductive channel. Since the bound charges are formed by spontaneous polarization and have nothing to do with the doping of the semiconductor material, complete charge balance can be achieved and the charge balance will be maintained forever. Therefore, the embodiment of the present invention can form a gallium nitride super junction structure with complete charge balance, and at the same time has the advantages of low specific on-resistance and high breakdown voltage.

[0063] When the superjunction structure of the embodiment of the present invention is used in the drift region of the semiconductor device, a corresponding superjunction device can be formed, which can reduce the specific on-resistance of the device and significantly reduce the energy loss of the device when it is turned on. Under the condition of the same breakdown voltage, the specific on-resistance of the superjunction device of the embodiment of the present invention is several orders of magnitude lower than that of the existing power device, thereby significantly reducing the power loss of the power semiconductor device and achieving energy conservation and emission reduction; at the same time, since the superjunction structure of the embodiment of the present invention is formed based on gallium nitride materials, it is very suitable for gallium nitride power devices, and the embodiment of the present invention can give full play to the advantages of gallium nitride materials, reduce the cost of manufacturing gallium nitride devices and simplify the process flow.

[0064] In addition, in the super junction structure of the embodiment of the present invention, the carrier concentration at the interface can be adjusted by adjusting the thickness of the semiconductor material of each layer of the heterojunction, thereby adjusting the specific on-resistance; the carrier concentration at the interface of the molar composition conditions of the constituent elements of the semiconductor material can also be adjusted, thereby adjusting the specific on-resistance, which makes the super junction structure of the embodiment of the present invention fully flexible in design.

[0065] like Figure 2 , which is a schematic diagram of the structure of a superjunction device according to the first embodiment of the present invention; the superjunction device is a superjunction Schottky diode. A superjunction structure is arranged in the drift region of the superjunction device according to the first embodiment of the present invention, and the superjunction structure is a natural superjunction structure formed by alternating the first thin layer 2 and the second thin layer 3.

[0066] The first thin layer 2 is composed of a gallium nitride material with spontaneous polarization, and the material of the second thin layer 3 is a semiconductor material different from gallium nitride and the material of the second thin layer 3 also has spontaneous polarization. The spontaneous polarization characteristics of the first thin layer 2 and the second thin layer 3 are utilized to form bound charges at the interface between the first thin layer 2 and the second thin layer 3, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0067] The super junction structure is formed on a gallium nitride substrate 1 heavily doped with a first conductivity type.

[0068] The first thin layer 2 is a non-doped intrinsic structure; the second thin layer 3 is a non-doped intrinsic structure.

[0069] The material of the second thin layer 3 includes: AlGaN, AlN, SiC.

[0070] The carrier concentration at the interface is adjusted by the thickness of the first thin layer 2 and the second thin layer 3 or by the molar composition of the constituent elements of the material of the second thin layer 3 .

[0071] A cathode 101 composed of a back metal layer is formed on the back side of the gallium nitride substrate 1 .

[0072] A first metal layer 101 is formed on the top surface of the super junction structure to form a Schottky contact with the super junction structure.

[0073] An anode composed of a front metal layer is formed on the surface of the first metal layer 101 .

[0074] In the first embodiment of the present invention, the thickness of the gallium nitride substrate 1 needs to be regulated. If it is too thin, there will be no sufficient mechanical support, and if it is too thick, excessive resistance will be introduced.

[0075] The thickness of the semiconductor material of the first thin layer 2 and the second thin layer 3 needs to be precisely controlled to optimize the drift region specific on-resistance.

[0076] The length of the drift region is the height of the super junction structure, that is, the height of the first thin layer 2 and the second thin layer 3. The length of the drift region determines the breakdown voltage of the device. The longer the drift region is, the higher the breakdown voltage of the device is.

[0077] like Figure 3 , which is a schematic diagram of the structure of a superjunction device according to the second embodiment of the present invention; the superjunction device is a superjunction planar gate field effect transistor. A superjunction structure is arranged in the drift region of the superjunction device according to the second embodiment of the present invention, and the superjunction structure is a natural superjunction structure formed by alternating first thin layers 2 and second thin layers 3.

[0078] The first thin layer 2 is composed of a gallium nitride material with spontaneous polarization, and the material of the second thin layer 3 is a semiconductor material different from gallium nitride and the material of the second thin layer 3 also has spontaneous polarization. The spontaneous polarization characteristics of the first thin layer 2 and the second thin layer 3 are utilized to form bound charges at the interface between the first thin layer 2 and the second thin layer 3, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0079] The super junction structure is formed on a gallium nitride substrate 1 heavily doped with a first conductivity type.

[0080] The first thin layer 2 is a non-doped intrinsic structure; the second thin layer 3 is a non-doped intrinsic structure.

[0081] The material of the second thin layer 3 includes: AlGaN, AlN, SiC.

[0082] The carrier concentration at the interface is adjusted by the thickness of the first thin layer 2 and the second thin layer 3 or by the molar composition of the constituent elements of the material of the second thin layer 3 .

[0083] A second gallium nitride layer 201 doped with the first conductivity type is formed on the top of the super junction structure. The second gallium nitride layer 201 serves as a part of the drift region. The second gallium nitride layer 201 also serves as a current spreading region.

[0084] A base region 203 doped with a second conductivity type is formed in a selected region of the second gallium nitride layer 201 .

[0085] A gate structure formed by stacking a gate oxide layer 204 and a polysilicon gate 205 is formed on the surface of the base region 203 and extends to the surface of the second gallium nitride layer 201 outside the base region 203. The surface of the base region 203 covered by the polysilicon gate 205 is used to form a channel.

[0086] A heavily doped source region 203 of the first conductivity type is formed in the base region 203 and is self-aligned with the first side surface of the polysilicon gate 205 .

[0087] The top of the source region 203 is connected to the source electrode composed of the front metal layer 208 through a contact hole; the contact hole 307 at the bottom of the source electrode also passes through the source region 203 and contacts the base region 203. The contact hole 207 passes through the interlayer film 206.

[0088] The gallium nitride substrate 1 forms a drain region.

[0089] The drain electrode 209 is formed by a back metal layer formed on the back side of the drain region.

[0090] like Figure 4 , which is a schematic diagram of the structure of a superjunction device according to the third embodiment of the present invention; the superjunction device is a superjunction trench gate field effect transistor. A superjunction structure is arranged in the drift region of the superjunction device according to the third embodiment of the present invention, and the superjunction structure is a natural superjunction structure formed by alternating first thin layers 2 and second thin layers 3.

[0091] The first thin layer 2 is composed of a gallium nitride material with spontaneous polarization, and the material of the second thin layer 3 is a semiconductor material different from gallium nitride and the material of the second thin layer 3 also has spontaneous polarization. The spontaneous polarization characteristics of the first thin layer 2 and the second thin layer 3 are utilized to form bound charges at the interface between the first thin layer 2 and the second thin layer 3, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0092] The super junction structure is formed on a gallium nitride substrate 1 heavily doped with a first conductivity type.

[0093] The first thin layer 2 is a non-doped intrinsic structure; the second thin layer 3 is a non-doped intrinsic structure.

[0094] The material of the second thin layer 3 includes: AlGaN, AlN, SiC.

[0095] The carrier concentration at the interface is adjusted by the thickness of the first thin layer 2 and the second thin layer 3 or by the molar composition of the constituent elements of the material of the second thin layer 3 .

[0096] A second gallium nitride layer 301 doped with the first conductivity type is formed on the top of the super junction structure. The second gallium nitride layer 301 serves as a part of the drift region. The second gallium nitride layer 301 also serves as a current spreading region.

[0097] A base region 302 doped with a second conductivity type is formed in a top region of the second gallium nitride layer 301 .

[0098] The gate structure is composed of a gate oxide layer 304 forming the inner surface of a gate trench and a polysilicon gate 305 filled in the gate trench, and the gate trench passes through the base region 302. The surface of the base region 302 covered by the side of the polysilicon gate 305 is used to form a channel.

[0099] A heavily doped source region 303 of the first conductivity type is formed in the base region 302 and is self-aligned with the side surface of the polysilicon gate 305 .

[0100] The top of the source region 303 is connected to the source electrode composed of the front metal layer 308 through a contact hole; the contact hole 307 at the bottom of the source electrode also passes through the source region 303 and contacts the base region 302. The contact hole 307 also passes through the interlayer film 306.

[0101] The gallium nitride substrate 1 forms a drain region.

[0102] The drain electrode 309 is formed by a back metal layer formed on the back side of the drain region.

[0103] like Figure 5 , which is a schematic diagram of the structure of a superjunction device according to a fourth embodiment of the present invention; the superjunction device is a superjunction current aperture vertical electron transistor. A superjunction structure is arranged in the drift region of the superjunction device according to the fourth embodiment of the present invention, and the superjunction structure is a natural superjunction structure formed by alternating the first thin layer 2 and the second thin layer 3.

[0104] The first thin layer 2 is composed of a gallium nitride material with spontaneous polarization, and the material of the second thin layer 3 is a semiconductor material different from gallium nitride and the material of the second thin layer 3 also has spontaneous polarization. The spontaneous polarization characteristics of the first thin layer 2 and the second thin layer 3 are utilized to form bound charges at the interface between the first thin layer 2 and the second thin layer 3, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface.

[0105] The super junction structure is formed on a gallium nitride substrate 1 heavily doped with a first conductivity type.

[0106] The first thin layer 2 is a non-doped intrinsic structure; the second thin layer 3 is a non-doped intrinsic structure.

[0107] The material of the second thin layer 3 includes: AlGaN, AlN, SiC.

[0108] The carrier concentration at the interface is adjusted by the thickness of the first thin layer 2 and the second thin layer 3 or by the molar composition of the constituent elements of the material of the second thin layer 3 .

[0109] A second gallium nitride layer 401 doped with the first conductivity type is formed on the top of the super junction structure. The second gallium nitride layer 401 serves as a part of the drift region and also as a current spreading region.

[0110] A current blocking layer 402 doped with a second conductivity type is formed in the second gallium nitride layer 401 , and the current blocking layer 402 is buried in the second gallium nitride layer 401 .

[0111] A third aluminum gallium nitride layer 403 of the first conductivity type is formed on the surface of the second gallium nitride layer 401 , and a two-dimensional electron gas is formed at the interface between the third aluminum gallium nitride layer 403 and the second gallium nitride layer 401 .

[0112] A fourth semiconductor layer 404 of the second conductivity type is formed on the surface of the third aluminum gallium nitride layer 403 . The material of the fourth semiconductor layer 404 is gallium nitride or aluminum gallium nitride. The fourth semiconductor layer 404 is used to adjust the threshold voltage of the device to a positive value.

[0113] A gate electrode material layer 405 composed of a metal layer is formed on the surface of the fourth semiconductor layer 404 , and the gate electrode material layer 405 and the fourth semiconductor layer 404 form a Schottky contact.

[0114] A source contact hole 407 is formed outside the gate electrode material layer 405 . The bottom of the source contact hole 407 contacts the current blocking layer 402 , and the top of the source contact hole 407 is connected to the source electrode formed by the front metal layer 408 .

[0115] The gallium nitride substrate 1 forms a drain region.

[0116] The drain electrode 409 is formed by a back metal layer formed on the back side of the drain region.

[0117] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be considered as the protection scope of the present invention.

Claims

1. A super junction device, characterized in that: A super junction structure is arranged in the drift region of the super junction device, wherein the super junction structure is a natural super junction structure formed by alternating arrangement of a first thin layer and a second thin layer; The first thin layer is composed of a gallium nitride material having spontaneous polarization, the material of the second thin layer is a semiconductor material different from gallium nitride and the material of the second thin layer also has spontaneous polarization, and bound charges are formed at the interface between the first thin layer and the second thin layer by utilizing the spontaneous polarization characteristics of the first thin layer and the second thin layer, and the bound charges are conducive to attracting carriers and forming a conductive channel at the interface; The first thin layer is a non-doped intrinsic structure; the second thin layer is a non-doped intrinsic structure; The super junction structure is formed on a gallium nitride substrate heavily doped with a first conductivity type; The superjunction device is a superjunction current aperture vertical electron transistor; A second gallium nitride layer doped with a first conductivity type is formed on the top of the super junction structure, and the second gallium nitride layer serves as a part of the drift region; A current blocking layer doped with a second conductivity type is formed in the second gallium nitride layer, and the current blocking layer is buried in the second gallium nitride layer; A third aluminum gallium nitride layer of the first conductivity type is formed on the surface of the second gallium nitride layer, and a two-dimensional electron gas is formed at an interface between the third aluminum gallium nitride layer and the second gallium nitride layer; A fourth semiconductor layer of the second conductivity type is formed on the surface of the third aluminum gallium nitride layer, the material of the fourth semiconductor layer is gallium nitride or aluminum gallium nitride, and the fourth semiconductor layer is used to adjust the threshold voltage of the device to a positive value; A gate electrode material layer composed of a metal layer is formed on the surface of the fourth semiconductor layer, and the gate electrode material layer and the fourth semiconductor layer form a Schottky contact; A source contact hole is formed outside the gate electrode material layer, the bottom of the source contact hole is in contact with the current blocking layer, and the top of the source contact hole is connected to the source composed of the front metal layer; The gallium nitride substrate forms a drain region; The drain electrode is composed of a back metal layer formed on the back side of the drain region.

2. The super junction device according to claim 1, characterized in that: The material of the second thin layer includes: AlGaN, AlN, SiC.

3. The super junction device according to claim 2, characterized in that: The carrier concentration at the interface is adjusted by the thicknesses of the first thin layer and the second thin layer or by the molar composition of constituent elements of the material of the second thin layer.

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