Packaging structure heat dissipation optimization method, device, readable storage medium and electronic device
By conducting orthogonal experiments and thermal simulations on key heat dissipation factors of eMCP chips, optimizing the packaging structure, the heat dissipation problem of embedded multi-layer packaging chips is solved, and the reliability and efficiency of electronic products are improved.
Patent Information
- Application Number
- CN202110337921.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-03-30
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2041-03-30
AI Technical Summary
In electronic products, the high density and high power consumption of embedded multi-layer packaging chips lead to heat dissipation problems, affecting the reliability and life of the product. The existing thermal management methods are inefficient and costly.
By obtaining the key heat dissipation factors of the eMCP chip, conducting orthogonal experiments and thermal simulations, establishing a three-dimensional model, statistically analyzing the maximum temperature of the chip, determining the impact of the key heat dissipation factors, and optimizing the packaging structure to improve heat dissipation performance.
The number of experimental groups is reduced, the accuracy and efficiency of heat dissipation optimization is improved, the risk of failure in packaging design is reduced, and the reliability and efficiency of the product is improved.
Smart Images
Figure CN113139277B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of packaging structure heat dissipation optimization, and in particular to a packaging structure heat dissipation optimization method, device, readable storage medium and electronic equipment. Background Art
[0002] With the rapid development of electronic products such as smart wearables and in-vehicle electronic devices, embedded chips such as eMCP (embedded Multi-Chip Package) are being used in more and more electronic products. The number of transistors per unit volume of the chip has doubled, and the integration is getting higher and higher, resulting in increasing power consumption of the chip. However, in the pursuit of smaller volume, embedded chip packaging pursues a smaller packaging area ratio, that is, more chips can be placed per unit area. Under high-density packaging, the chips are closely connected, resulting in greater heat power consumption, causing the temperature of electronic products to rise. At high temperatures, the reliability of electronic components will be reduced, the life of electronic components will be shortened, and electronic products will fail. Therefore, heat dissipation further restricts the integration and miniaturization of packaged products. Heat dissipation has become a problem that needs to be solved in packaging design.
[0003] At present, thermal management of chip packaging before product production has become an indispensable part. While using high thermal conductivity materials, optimizing the structural parameters of the product has become a new way to manage the thermal management of packaged products.
[0004] Optimizing structural parameters is a new way to effectively improve the heat dissipation of packaged products. However, the conventional procedure is to design the product structure first and then conduct thermal testing, which will cause a lot of waste of manpower and material resources and consume a lot of testing costs. Summary of the invention
[0005] The technical problem to be solved by the present invention is to provide a packaging structure heat dissipation optimization method, device, readable storage medium and electronic equipment, which can efficiently optimize heat dissipation.
[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0007] A method for optimizing heat dissipation of a packaging structure, comprising the steps of:
[0008] Acquire multiple key heat dissipation factors of the eMCP chip to be optimized, perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values, and obtain multiple groups of thermal simulation experiment combinations;
[0009] According to each group of thermal simulation experiments, a three-dimensional eMCP model of the corresponding structure is established;
[0010] Performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0011] A statistical analysis is performed on the maximum chip temperatures of all the eMCP three-dimensional models obtained to determine the analysis results of the effects of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized.
[0012] In order to solve the above technical problems, another technical solution adopted by the present invention is:
[0013] A packaging structure heat dissipation optimization device, comprising:
[0014] An initialization module is used to obtain multiple key heat dissipation factors of the eMCP chip to be optimized, and to perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations;
[0015] A model building module, used to build an eMCP three-dimensional model of a corresponding structure according to each group of thermal simulation experiments;
[0016] A data acquisition module, used for performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0017] The analysis module is used to perform statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determine the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized.
[0018] In order to solve the above technical problems, another technical solution adopted by the present invention is:
[0019] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements each step of the above-mentioned packaging structure heat dissipation optimization method.
[0020] In order to solve the above technical problems, another technical solution adopted by the present invention is:
[0021] An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, each step in the above-mentioned packaging structure heat dissipation optimization method is implemented.
[0022] The beneficial effects of the present invention are as follows: determining multiple heat dissipation factors of an eMCP chip to be optimized, setting an orthogonal experiment based on multiple level values set for each heat dissipation factor, setting an orthogonal experiment only requires simulation testing of a small number of experimental combinations, and when the thermal conductivity of the packaging material is not greatly improved, the method can reduce the number of experimental groups and obtain relatively accurate results; establishing an eMCP three-dimensional model of corresponding structure for different thermal simulation experimental combinations, and calculating the maximum chip temperature of each three-dimensional model under thermal simulation conditions; statistically analyzing all the maximum chip temperatures, and obtaining analysis results of the influence of multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, and pre-simulating the heat dissipation performance of the packaged product in advance through simulation, which can reduce the risk of product failure in packaging design and improve the reliability and packaging efficiency of the packaged product. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 A flow chart of a method for optimizing heat dissipation of a packaging structure according to an embodiment of the present invention;
[0024] Figure 2 A schematic structural diagram of a device for optimizing heat dissipation of a packaging structure according to an embodiment of the present invention;
[0025] Figure 3 A schematic diagram of the structure of an electronic device according to an embodiment of the present invention;
[0026] Figure 4 A schematic diagram of a three-dimensional model of a chassis of a packaging structure heat dissipation optimization method according to an embodiment of the present invention;
[0027] Figure 5 A schematic diagram of a three-dimensional model of a test board of a packaging structure heat dissipation optimization method according to an embodiment of the present invention;
[0028] Figure 6 A schematic diagram of an eMCP three-dimensional model of a packaging structure heat dissipation optimization method according to an embodiment of the present invention;
[0029] Figure 7 A schematic diagram of eMCP package solder joints of a package structure heat dissipation optimization method according to an embodiment of the present invention;
[0030] Figure 8 A temperature simulation cloud diagram of an eMCP three-dimensional model of a standard case of a method for optimizing heat dissipation of a packaging structure according to an embodiment of the present invention;
[0031] Fig. 9 It is a temperature simulation cloud diagram of the best combination among multiple groups of thermal simulation experiment combinations of the packaging structure heat dissipation optimization method according to an embodiment of the present invention. DETAILED DESCRIPTION
[0032] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.
[0033] Please refer to Figure 1 The embodiment of the present invention provides a method for optimizing heat dissipation of a packaging structure, comprising the steps of:
[0034] Acquire multiple key heat dissipation factors of the eMCP chip to be optimized, perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values, and obtain multiple groups of thermal simulation experiment combinations;
[0035] According to each group of thermal simulation experiments, a three-dimensional eMCP model of the corresponding structure is established;
[0036] Performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0037] A statistical analysis is performed on the maximum chip temperatures of all the eMCP three-dimensional models obtained to determine the analysis results of the effects of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized.
[0038] From the above description, it can be seen that the beneficial effects of the present invention are: determining multiple heat dissipation factors of the eMCP chip to be optimized, setting up orthogonal experiments based on multiple level values set for each heat dissipation factor, and setting up orthogonal experiments only requires simulation tests on a small number of experimental combinations. When the thermal conductivity of the packaging material is not greatly improved, this method can reduce the number of experimental groups and obtain relatively accurate results; establishing eMCP three-dimensional models of corresponding structures for different thermal simulation experimental combinations, and calculating the maximum chip temperature of each three-dimensional model under thermal simulation conditions; statistically analyzing all maximum chip temperatures, and obtaining analysis results of the influence of multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, and previewing the heat dissipation performance of the packaged product in advance through simulation, which can reduce the risk of product failure in packaging design and improve the reliability and packaging efficiency of the packaged product.
[0039] Furthermore, the multiple key heat dissipation factors of the eMCP chip to be optimized include:
[0040] Acquire multiple heat dissipation key factors corresponding to the eMCP chip to be optimized according to a preset confidence level, and generate multiple level values corresponding to each heat dissipation key factor based on each of the heat dissipation key factors;
[0041] An orthogonal experiment is performed based on the multiple heat dissipation key factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations including:
[0042] A corresponding orthogonal table is generated according to each of the key heat dissipation factors and the corresponding multiple level values, and an orthogonal experiment is performed according to the orthogonal table to obtain multiple groups of thermal simulation experiment combinations.
[0043] From the above description, it can be seen that according to the preset confidence, the corresponding number of key heat dissipation factors can be obtained, and the factors with less influence on the heat dissipation performance can be analyzed without analysis. Moreover, the corresponding number of level values are selected for each key heat dissipation factor to conduct orthogonal experiments, so as to obtain a smaller number of effective simulation experiment combinations, thereby achieving efficient and reliable heat dissipation optimization.
[0044] Furthermore, establishing the eMCP three-dimensional model of the corresponding structure according to each group of thermal simulation experiments comprises:
[0045] Establishing a three-dimensional model corresponding to a thermal test chassis, and setting a test board in the three-dimensional model of the thermal test chassis;
[0046] The eMCP three-dimensional model is set on the test board for testing.
[0047] From the above description, it can be seen that establishing a three-dimensional model of the thermal test chassis and setting the eMCP three-dimensional model in the test board of the three-dimensional model of the thermal test chassis for simulation can better simulate the actual operating environment of the eMCP three-dimensional model, thereby obtaining simulation data more accurately.
[0048] Further, the step of performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models includes:
[0049] Meshing each group of the eMCP three-dimensional models, and applying corresponding heat loads to all meshes of each of the eMCP three-dimensional models under the same conditions of simulation environment temperature, radiation type and iteration steps;
[0050] When the temperature of each group of the eMCP three-dimensional models is stable, obtaining a temperature cloud map of each group of the eMCP three-dimensional models;
[0051] The maximum chip temperature of each group of the eMCP three-dimensional models is obtained according to the temperature cloud map.
[0052] From the above description, it can be seen that placing each group of three-dimensional models in the same environment for simulation and meshing the eMCP three-dimensional model can evenly apply the corresponding heat load to each grid, ensuring the authenticity of the simulation experiment, thereby obtaining the result data of the simulation experiment more accurately.
[0053] Further, the statistical analysis of the maximum chip temperatures of all the eMCP three-dimensional models obtained to determine the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized includes:
[0054] The maximum chip temperatures of all the eMCP three-dimensional models are input into the orthogonal table, and variance analysis is performed on the orthogonal table to determine the key heat dissipation factors that significantly affect the heat dissipation performance of the eMCP chip package to be optimized.
[0055] From the above description, it can be seen that by performing variance analysis on the maximum temperature of the chips of all eMCP three-dimensional models, the key heat dissipation factors that significantly affect the heat dissipation performance of the eMCP chip package to be optimized can be calculated, so as to subsequently optimize the eMCP chip to be optimized.
[0056] Further, after determining the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, it includes:
[0057] A range analysis is performed on all the eMCP three-dimensional models to determine the primary and secondary relationships among the multiple key heat dissipation factors.
[0058] From the above description, it can be seen that by performing range analysis on all eMCP three-dimensional models, the primary and secondary relationships between the key heat dissipation factors can be obtained, which is conducive to optimizing the eMCP chip to be optimized.
[0059] Further, after determining the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, it includes:
[0060] According to the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, obtaining the optimal level values corresponding to the multiple key heat dissipation factors;
[0061] An optimal eMCP chip three-dimensional model is established according to the optimal level values corresponding to the multiple key heat dissipation factors.
[0062] From the above description, it can be seen that according to the analysis results of statistical analysis, the optimal level values corresponding to multiple key heat dissipation factors can be obtained, and the optimal three-dimensional model is established based on the optimal level values corresponding to multiple key heat dissipation factors, thereby efficiently realizing the optimization of the eMCP chip.
[0063] Please refer to Figure 2 Another embodiment of the present invention provides a packaging structure heat dissipation optimization device, comprising:
[0064] An initialization module is used to obtain multiple key heat dissipation factors of the eMCP chip to be optimized, and to perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations;
[0065] A model building module, used to build an eMCP three-dimensional model of a corresponding structure according to each group of thermal simulation experiments;
[0066] A data acquisition module, used for performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0067] The analysis module is used to perform statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determine the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized.
[0068] Another embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer program implements the various steps in the above-mentioned method for optimizing heat dissipation of a packaging structure.
[0069] Please refer to Figure 3 Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements each step of the above-mentioned packaging structure heat dissipation optimization method when executing the computer program.
[0070] The above-mentioned packaging structure heat dissipation optimization method, device, readable storage medium and electronic device of the present invention can be applied to the heat dissipation optimization in microelectronic packaging structures (various embedded chips, etc.), such as: heat dissipation optimization of eMCP chips, which is described below through specific implementation methods:
[0071] Embodiment 1
[0072] Please refer to Figure 1 , a packaging structure heat dissipation optimization method, comprising the steps of:
[0073] S1. Acquire multiple key heat dissipation factors of the eMCP chip to be optimized, perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values, and obtain multiple groups of thermal simulation experiment combinations;
[0074] The method of obtaining multiple key heat dissipation factors of the eMCP chip to be optimized includes:
[0075] Acquire multiple heat dissipation key factors corresponding to the eMCP chip to be optimized according to a preset confidence level, and generate multiple level values corresponding to each heat dissipation key factor based on each of the heat dissipation key factors;
[0076] Specifically, in this embodiment, when the confidence level is 90%, there are four key heat dissipation factors that have a significant impact on the temperature of the eMCP chip, namely, plastic package thickness, chip thickness, cushion thickness, and substrate thickness, and four level values are generated for each key heat dissipation factor, respectively, as shown in Table 1;
[0077] Table 1 Key factor level value table
[0078]
[0079] Among them, orthogonal experiments are performed according to the multiple heat dissipation key factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations including:
[0080] Generate a corresponding orthogonal table according to each of the key heat dissipation factors and their corresponding multiple level values, and perform an orthogonal experiment according to the orthogonal table to obtain multiple groups of thermal simulation experiment combinations;
[0081] Specifically, in this embodiment, please refer to Table 2, input the four key heat dissipation factors and the level corresponding to each key heat dissipation factor into the orthogonal table, and obtain 16 groups of thermal simulation experiment combinations;
[0082] Table 2 Table of thermal simulation experiments for each group
[0083]
[0084]
[0085] S2. Establishing an eMCP three-dimensional model of the corresponding structure according to each group of thermal simulation experiment combinations;
[0086] Wherein, a three-dimensional model corresponding to the thermal test chassis is established, and a test board is arranged in the three-dimensional model of the thermal test chassis;
[0087] The eMCP three-dimensional model is set on the test board for testing;
[0088] For details, please refer to Figure 4 , establish a three-dimensional model of the JEDEC standard thermal test chassis, where the cabinet size is 30.48mm×30.48mm×30.48mm, the cabinet thickness is 3.15mm, the material is Al (aluminum), and the thermal conductivity is 308w / mK;
[0089] Please refer to Figure 5The size of the test board is 114.3mm×76.2mm×1.6mm, the material grade is FR4, the orthotropic thermal conductivity is set, the thermal conductivity is kxy=22.3w / mK, kz=0.3822.3w / mK, the size of the rack is 190mmx170mmx12.5mm, and the thermal conductivity is 0.2w / mK;
[0090] S3, performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0091] wherein, meshing is performed on each group of the eMCP three-dimensional models, and corresponding heat loads are applied to all meshes of each of the eMCP three-dimensional models under the same conditions of simulation environment temperature, radiation type and number of iteration steps;
[0092] When the temperature of each group of the eMCP three-dimensional models is stable, obtaining a temperature cloud map of each group of the eMCP three-dimensional models;
[0093] Obtaining the maximum chip temperature of each group of the eMCP three-dimensional models according to the temperature cloud map;
[0094] First, you need to establish a standard eMCP 3D model and obtain the maximum chip temperature. For details, please refer to Figure 6 and Figure 7In this embodiment, the solder joints of the standard eMCP are located below the substrate, the solder joint diameter is 0.25 mm, the number is 136, and the spacing between the solder joints is 0.5 mm; the size of the substrate is 10 mm × 10 mm × 0.26 mm, and the thermal conductivity is 0.45 w / mK; capacitors 1 and 2 are set on the substrate, the size of capacitors 1 and 2 are both 0.3 mm × 0.5 mm × 0.3 mm, and the material is Ltcc (Low Temperature Co-fired Ceramic, low temperature co-fired ceramic), with a thermal conductivity of 160w / mK; pad 1, Dram1 chip, pad 2 and Dram2 chip are placed on the substrate in sequence, with thicknesses of 0.02mm, 0.1mm, 0.06mm and 0.1mm respectively, and the length and width are both 7.756mm×8.889mm. Pad 3 and Flash chip are placed on top of Dram2 chip in sequence, with thicknesses of 0.02mm and 0.1mm respectively, and the length and width are both 6.39mm×8. 337mm; pad 4 and control chip, pad 5 and Dummy chip are arranged next to Dram2 chip, wherein the thickness of pad 4 and pad 5 are both 0.02mm, and the thickness of control chip and Dummy chip are both 0.1mm; the material of Dram1 chip, Dram2 chip, Control chip and Flash chip are all Si (silicon), with thermal conductivity of 160w / mK, and the heat generation power under full load is 0.4581w, 0.4581w, 1.905w and 0.231w respectively;
[0095] Perform thermal simulation on the standard eMCP 3D model. Set the boundary conditions of the chassis 3D model to natural convection, set the flow mode of thermal radiation to laminar flow, the radiation type to DO radiation model, and the ambient temperature to 25°C. Mesh each 3D model and apply the corresponding thermal load. Set the number of iterations and perform simulation calculations until the simulation converges and the temperature stabilizes. Please refer to Figure 8 , the temperature cloud diagram of the eMCP three-dimensional model under standard conditions is obtained. At this time, the highest temperature of the model in the eMCP is 148.641℃;
[0096] Substitute the four heat dissipation key factors of the 16 groups of thermal simulation experiments into the eMCP three-dimensional model to obtain the corresponding eMCP three-dimensional model, and the thermal simulation conditions of the 16 groups of three-dimensional models are set to be the same as the thermal simulation conditions of the eMCP three-dimensional model of the standard case, and the highest temperature of the 16 groups of three-dimensional models is obtained;
[0097] S4, performing statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determining analysis results of the effects of the multiple heat dissipation key factors on the heat dissipation performance of the eMCP chip to be optimized;
[0098] After determining the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, the following steps are included:
[0099] According to the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, obtaining the optimal level values corresponding to the multiple key heat dissipation factors;
[0100] Establishing an optimal eMCP chip three-dimensional model according to the optimal level values corresponding to the multiple key heat dissipation factors;
[0101] For details, please refer to Table 2 and Fig. 9 The best simulation experiment among the 16 groups of simulation experiments is experiment 7, and the highest temperature of experiment 7 is 143.274℃. The three-dimensional model of the best simulation experiment is compared with the three-dimensional model of the eMCP chip under standard conditions, and other simulation experiments are statistically analyzed. The key factors affecting the heat dissipation performance can be understood through experiments, and the optimal combination within the determined range of each factor can be obtained, which can provide more effective solutions for product design, conduct pre-research on products in advance, shorten the time to market of products, and reduce the trial and error cost of the process.
[0102] Embodiment 2
[0103] The difference between this embodiment and the first embodiment is that the statistical analysis method for the maximum temperature is further limited:
[0104] The statistical analysis of the maximum chip temperatures of all the obtained eMCP three-dimensional models to determine the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized includes:
[0105] Inputting the maximum chip temperature of all the eMCP three-dimensional models into the orthogonal table, performing variance analysis on the orthogonal table, and determining the key heat dissipation factors that significantly affect the heat dissipation performance of the eMCP chip package to be optimized;
[0106] Specifically, please refer to Table 3, and perform variance analysis on the maximum temperature of the chip of all eMCP three-dimensional models. It can be found that the significant influencing factor affecting the maximum temperature of the chip is the chip thickness. The F value of the chip thickness is greater than the critical value.
[0107] Table 3 ANOVA results
[0108] factor Sum of Squared Deviations Degrees of Freedom F Ratio F critical value Significance Chip thickness 2475.084 3 20.870 9.280 Significant Substrate thickness 298.240 3 2.515 9.280 Pad thickness 165.885 3 1.399 9.280 Plastic sealing thickness 142.011 3 1.197 9.280 error 118.59 3
[0109] After determining the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, the following steps are included:
[0110] Performing range analysis on all the eMCP three-dimensional models to determine the primary and secondary relationships between the multiple key heat dissipation factors;
[0111] Specifically, please refer to Table 4. By performing range analysis on all eMCP three-dimensional models, the primary and secondary relationships and rankings of the key factors of the packaging products are obtained. The order of the key factors of heat dissipation from large to small in terms of range is: chip thickness > cushion thickness > plastic package thickness > substrate thickness;
[0112] Table 4 Range analysis results
[0113] Level average Chip thickness Substrate thickness Pad thickness Plastic sealing thickness Mean 1 183.046 166.43 155.081 163.293 Mean 2 159.654 162.258 163.204 157.154 Mean 3 152.806 159.577 163.040 165.154 Mean 4 152.735 159.976 166.916 162.639 Range R 30.311 6.853 11.835 8 Range sorting 1 4 2 3
[0114] Combining the analysis results of variance analysis and range analysis, it can be seen that in this embodiment, the chip thickness is the most critical factor affecting the heat dissipation performance of the eMCP packaged product, followed by the substrate thickness, the cushion thickness, and the plastic package thickness. In the subsequent packaging design, the chip thickness design is particularly important, thereby improving the heat dissipation performance of the eMCP and the reliability of the product.
[0115] Embodiment 3
[0116] Please refer to Figure 2 , a packaging structure heat dissipation optimization device, comprising:
[0117] An initialization module is used to obtain multiple key heat dissipation factors of the eMCP chip to be optimized, and to perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations;
[0118] A model building module, used to build an eMCP three-dimensional model of a corresponding structure according to each group of thermal simulation experiments;
[0119] A data acquisition module, used for performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models;
[0120] The analysis module is used to perform statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determine the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized.
[0121] Embodiment 4
[0122] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements each step of a method for optimizing heat dissipation of a packaging structure in the first or second embodiment.
[0123] Embodiment 5
[0124] Please refer to Figure 3 , an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, each step in a method for optimizing heat dissipation of a packaging structure in the first or second embodiment is implemented.
[0125] In summary, the present invention provides a packaging structure heat dissipation optimization method, device, readable storage medium and electronic device, which determine multiple heat dissipation factors of the eMCP chip to be optimized, and perform orthogonal experiments based on multiple level values set for each heat dissipation factor. Setting the orthogonal experiment only requires simulation testing of a small number of experimental combinations. When the thermal conductivity of the packaging material is not greatly improved, the method can reduce the number of experimental groups and obtain relatively accurate results; establish an eMCP three-dimensional model of the corresponding structure for different thermal simulation experimental combinations, and calculate the maximum chip temperature of each three-dimensional model under thermal simulation conditions; establish an eMCP three-dimensional model under standard conditions and obtain its maximum chip temperature, select the optimal maximum chip temperature in multiple groups of thermal simulation experimental combinations, and perform variance analysis and range analysis on all maximum chip temperatures, so as to obtain the primary and secondary relationships and criticality ranking of multiple heat dissipation key factors, and improve the heat dissipation key factors with the most significant impact based on the ranking, and preview the heat dissipation performance of the packaged product in advance through simulation, so as to reduce the risk of product failure in packaging design and improve the reliability and packaging efficiency of the packaged product.
[0126] In the above embodiments provided in the present application, it should be understood that the disclosed methods, devices, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple components or modules can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or components or modules, which can be electrical, mechanical or other forms.
[0127] The components described as separate components may or may not be physically separated, and the components shown as components may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the components may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0128] In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each component may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.
[0129] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.
[0130] It should be noted that, for the convenience of description, the aforementioned method embodiments are all described as a series of action combinations, but those skilled in the art should be aware that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.
[0131] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0132] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A method for optimizing heat dissipation of a packaging structure, characterized in that: Includes steps: Acquire multiple key heat dissipation factors of the eMCP chip to be optimized, perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values, and obtain multiple groups of thermal simulation experiment combinations; According to each group of thermal simulation experiments, a three-dimensional eMCP model of the corresponding structure is established; Performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models; Performing statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determining analysis results of the effects of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized; The multiple key factors for heat dissipation of the eMCP chip to be optimized include: Acquire multiple heat dissipation key factors corresponding to the eMCP chip to be optimized according to a preset confidence level, and generate multiple level values corresponding to each heat dissipation key factor based on each of the heat dissipation key factors; An orthogonal experiment is performed based on the multiple heat dissipation key factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations including: Generate a corresponding orthogonal table according to each of the key heat dissipation factors and their corresponding multiple level values, and perform an orthogonal experiment according to the orthogonal table to obtain multiple groups of thermal simulation experiment combinations; The eMCP three-dimensional model of the corresponding structure is established according to each group of thermal simulation experiments, including: Establishing a three-dimensional model corresponding to a thermal test chassis, and setting a test board in the three-dimensional model of the thermal test chassis; The eMCP three-dimensional model is set on the test board for testing.
2. A packaging structure heat dissipation optimization method according to claim 1, characterized in that: The step of performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models comprises: Meshing each group of the eMCP three-dimensional models, and applying corresponding heat loads to all meshes of each of the eMCP three-dimensional models under the same conditions of simulation environment temperature, radiation type and iteration steps; When the temperature of each group of the eMCP three-dimensional models is stable, obtaining a temperature cloud map of each group of the eMCP three-dimensional models; The maximum chip temperature of each group of the eMCP three-dimensional models is obtained according to the temperature cloud map.
3. The method for optimizing heat dissipation of a packaging structure according to claim 1, characterized in that: The statistical analysis of the maximum chip temperatures of all the eMCP three-dimensional models obtained to determine the analysis results of the influence of the multiple heat dissipation key factors on the heat dissipation performance of the eMCP chip to be optimized includes: The maximum chip temperatures of all the eMCP three-dimensional models are input into the orthogonal table, and variance analysis is performed on the orthogonal table to determine the key heat dissipation factors that significantly affect the heat dissipation performance of the eMCP chip package to be optimized.
4. The method for optimizing heat dissipation of a packaging structure according to claim 1, characterized in that: After determining the analysis results of the influence of the multiple heat dissipation key factors on the heat dissipation performance of the eMCP chip to be optimized, the method includes: A range analysis is performed on all the eMCP three-dimensional models to determine the primary and secondary relationships among the multiple key heat dissipation factors.
5. A method for optimizing heat dissipation of a packaging structure according to any one of claims 1 to 4, characterized in that: After determining the analysis results of the influence of the multiple heat dissipation key factors on the heat dissipation performance of the eMCP chip to be optimized, the method includes: According to the analysis results of the influence of the multiple key heat dissipation factors on the heat dissipation performance of the eMCP chip to be optimized, obtaining the optimal level values corresponding to the multiple key heat dissipation factors; An optimal eMCP chip three-dimensional model is established according to the optimal level values corresponding to the multiple key heat dissipation factors.
6. A packaging structure heat dissipation optimization device, characterized in that: include: An initialization module is used to obtain multiple key heat dissipation factors of the eMCP chip to be optimized, and to perform orthogonal experiments according to the multiple key heat dissipation factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations; The multiple key factors for heat dissipation of the eMCP chip to be optimized include: Acquire multiple heat dissipation key factors corresponding to the eMCP chip to be optimized according to a preset confidence level, and generate multiple level values corresponding to each heat dissipation key factor based on each of the heat dissipation key factors; An orthogonal experiment is performed based on the multiple heat dissipation key factors and their corresponding multiple level values to obtain multiple groups of thermal simulation experiment combinations including: Generate a corresponding orthogonal table according to each of the key heat dissipation factors and their corresponding multiple level values, and perform an orthogonal experiment according to the orthogonal table to obtain multiple groups of thermal simulation experiment combinations; The model building module is used to build the eMCP three-dimensional model of the corresponding structure according to each group of thermal simulation experiment combinations, including: Establishing a three-dimensional model corresponding to a thermal test chassis, and setting a test board in the three-dimensional model of the thermal test chassis; The eMCP three-dimensional model is set on the test board for testing; A data acquisition module, used for performing thermal simulation on each group of the eMCP three-dimensional models under the same environment and obtaining the maximum chip temperature of each group of the eMCP three-dimensional models; An analysis module, used to perform statistical analysis on the maximum chip temperatures of all the eMCP three-dimensional models obtained, and determine the analysis results of the influence of the multiple heat dissipation key factors on the heat dissipation performance of the eMCP chip to be optimized; The initialization module, the model building module, the data acquisition module and the analysis module are connected in sequence.
7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, each step of the method for optimizing heat dissipation of a packaging structure as described in any one of claims 1 to 5 is implemented.
8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, each step of the method for optimizing heat dissipation of a packaging structure as described in any one of claims 1 to 5 is implemented.