Optoelectronic device and method for manufacturing an optoelectronic device

Abstract

An optoelectronic component (1) is provided, comprising: an optoelectronic semiconductor chip (2), which is designed to emit or detect electromagnetic radiation; a connection carrier (3), on which the semiconductor chip (2) is arranged; an electrically conductive connection (4), which is electrically conductively connected to the semiconductor chip (2) and / or the connection carrier (3), and an electrically insulating material (5), which at least partially surrounds the semiconductor chip (2) and / or the connection carrier (3), wherein the electrically conductive connection (4) is partially arranged on the electrically insulating material (5). In addition, a method for producing an optoelectronic component is provided.

Description

Technical Field

[0001] An optoelectronic component is specified. Furthermore, a method for producing an optoelectronic component is specified. Summary of the invention

[0002] The object to be achieved is to specify an optoelectronic component which is particularly compact. Another object to be achieved is to specify a method for producing such an optoelectronic component.

[0003] According to at least one embodiment, the optoelectronic component includes an optoelectronic semiconductor chip which is designed to emit or detect electromagnetic radiation during operation. The radiation emitted during operation of the semiconductor chip can be, for example, near-ultraviolet radiation, visible light and / or near-infrared radiation. Alternatively, it is possible that the electromagnetic radiation detected during operation of the semiconductor chip is near-ultraviolet radiation, visible light and / or near-infrared radiation.

[0004] If the optoelectronic semiconductor chip is a radiation-emitting semiconductor chip, the semiconductor chip is, for example, a light-emitting diode chip or a laser diode chip. If the optoelectronic semiconductor chip is a radiation-detecting semiconductor chip, the optoelectronic semiconductor chip is, for example, a photodetector.

[0005] The optoelectronic semiconductor chip comprises in particular a bottom surface, which extends in a lateral direction and is opposite to the top surface of the optoelectronic semiconductor chip. The bottom surface and the top surface are connected to each other via at least one side surface. For example, the bottom surface of the semiconductor chip and the top surface of the semiconductor chip each have a chip contact surface, which can be formed in an electrically conductive contact. That is, in order to energize the semiconductor chip, the chip contact surface is electrically conductively contacted on the bottom surface of the semiconductor chip and on the top surface of the semiconductor chip.

[0006] Alternatively, it is possible that the optoelectronic semiconductor chip is, for example, a flip chip. The flip chip has, for example, two chip contact surfaces. The chip contact surfaces are, for example, arranged on the bottom surface of the semiconductor chip. In this case, the chip contact surfaces are conductively contacted on the bottom surface to energize the semiconductor chip.

[0007] For example, it is possible that the optoelectronic component has a plurality of optoelectronic semiconductor chips. The semiconductor chips are designed in this case to emit or detect electromagnetic radiation during operation. The electromagnetic radiation emitted or detected by different semiconductor chips can be, for example, light of different colors. The semiconductor chips can be designed, for example, to emit or detect red, yellow, green or blue.

[0008] According to at least one embodiment, the optoelectronic component comprises a connection carrier, on which a semiconductor chip is arranged. The semiconductor chip is, for example, electrically conductively connected to the connection carrier. The connection carrier has, for example, a main extension plane. The lateral direction is preferably oriented parallel to the main extension plane and the vertical direction is oriented perpendicular to the lateral direction. The connection carrier and the semiconductor chip are, for example, stacked one above the other in the vertical direction. The semiconductor chip has, for example, an extension in the lateral direction that is smaller than an extension in the lateral direction of the connection carrier. For example, the semiconductor chip and the connection carrier completely overlap in a top view.

[0009] If the optoelectronic component has a plurality of semiconductor chips, the semiconductor chips are arranged, for example, on a connection carrier. The semiconductor chips completely overlap the connection carrier. The semiconductor chips are arranged, for example, in a matrix, that is to say in rows and columns, on the connection carrier. The semiconductor chips are arranged, for example, at the grid points of a regular grid. The regular grid can be a triangular grid, a quadrilateral grid, a hexagonal grid or a polygonal grid.

[0010] The semiconductor chips are arranged, for example, laterally spaced apart from one another.

[0011] The connection carrier comprises, for example, a base body which comprises a semiconductor material or a ceramic material. For example, the semiconductor material comprises silicon and / or gallium nitride. Furthermore, the connection carrier can comprise an electrically conductive metal which is embedded in the base body of the connection carrier and / or applied to the base body. "Embedded" can mean here that the electrically conductive metal lies against the base body, is partially or completely located within the base body and / or is surrounded by the base body on at least a part of its otherwise exposed outer surface. In this case, the electrically conductive metal can be in direct, non-indirect contact with the base body.

[0012] According to at least one embodiment, the optoelectronic device comprises an electrically conductive connection which is electrically conductively connected to the semiconductor chip and / or the connection carrier. The electrically conductive connection is, for example, in direct contact with the semiconductor chip. Furthermore, the electrically conductive connection can be in direct contact with the connection carrier. The electrically conductive connection is, for example, formed of a metal or an electrically conductive adhesive. Furthermore, the electrically conductive connection can comprise a combination of multiple metals.

[0013] The conductive connection has, for example, a height in the vertical direction which is between at least 1 μm and at most 15 μm. The height of the conductive connection is constant within the scope of manufacturing tolerances, in particular over the entire extension of the conductive connection. The conductive connection has, for example, a width in the lateral direction which is relatively large relative to the height of the conductive connection. The width of the conductive connection can be greater than the height of the conductive connection, for example 10 times, 100 times, or 1000 times greater.

[0014] For example, it is possible that the optoelectronic component has a plurality of electrically conductive connections. In particular, the component has a plurality of electrically conductive connections when the component comprises a plurality of semiconductor chips. The electrically conductive connections in this case electrically conductively connect the semiconductor chips and / or the connection carrier to one another.

[0015] At least one electrically conductive connection has, for example, a first mounting surface for a semiconductor chip. In the region of the first mounting surface, the electrically conductive connection can, for example, have an extension that increases in a lateral direction. That is, the width of the electrically conductive connection in the region of the first mounting surface is greater than the width of the electrically conductive connection in the region above the electrically insulating material, for example. If the device has a plurality of semiconductor chips, the first mounting surface is, for example, a mounting surface for all semiconductor chips.

[0016] Alternatively, at least two conductive connections can form a second mounting surface for the semiconductor chip. In the region of the second mounting surface, the conductive connection associated therewith does not have an extension that increases in the lateral direction. In this case, the optoelectronic semiconductor chip is, for example, a flip chip. The chip contact surface is, for example, electrically conductively contacted by each conductive connection.

[0017] If the component comprises a plurality of semiconductor chips, then in the region of the second mounting area at least two electrically conductive connections are mounting areas for a respective semiconductor chip.

[0018] According to at least one embodiment, the optoelectronic component comprises an electrically insulating material which at least partially surrounds the semiconductor chip and / or the connection carrier. The electrically insulating material can be transmissive, transparent, reflective, in particular diffusely reflective, or absorbent for the radiation emitted or detected by the semiconductor chip. The electrically insulating material is formed, for example, from a matrix material. The matrix material is formed, for example, from a plastic, such as a silicone, an epoxide or an epoxy hybrid material.

[0019] Colorants such as carbon black or pigments can be added to the matrix material. As a result, the electrically insulating material can appear black or also white or colored. Alternatively or additionally, particles, in particular light-reflecting and / or light-scattering particles, can be introduced into the matrix material. The particles, for example, include at least one of the following materials or contain at least one of the following materials: TiO2, BaSO4, CnO, Al x O y .

[0020] For example, the side surfaces of the connection carrier are completely covered by the electrically insulating material. The cover surface of the connection carrier is, for example, flush with the electrically insulating material. It is also possible that the side surfaces of the semiconductor chip are completely covered by the electrically insulating material. For example, the electrically insulating material is closed flush or evenly with the cover surface of the semiconductor chip. If the optoelectronic component has a plurality of semiconductor chips, the electrically insulating material completely covers all side surfaces of the semiconductor chip.

[0021] According to at least one embodiment, the electrically conductive connection is arranged in regions on the electrically insulating material. For example, the electrically conductive connection is in direct contact with the electrically insulating material in regions and covers the outer surface thereof in regions.

[0022] In at least one embodiment, an optoelectronic device comprises:

[0023] an optoelectronic semiconductor chip which, during operation, is designed to emit or detect electromagnetic radiation,

[0024] a connection carrier on which the semiconductor chip is arranged,

[0025] an electrically conductive connection which is electrically conductively connected to the semiconductor chip and / or the connection carrier, and

[0026] An electrically insulating material which surrounds the semiconductor chip and / or the connection carrier at least in regions, wherein

[0027] The electrically conductive connection is arranged in places on the electrically insulating material.

[0028] The optoelectronic component described here now also utilizes the concept that the semiconductor chip is arranged on a connection carrier. This arrangement allows the component to have a height in the vertical direction that is particularly small, for example, a maximum of 0.45 mm. In addition, the component can be designed to be particularly compact in the lateral direction and, for example, have a length and width of each of not more than 2.5 mm, in particular not more than 2.2 mm. By arranging the semiconductor chip on the connection carrier, the component can also dissipate heat particularly well.

[0029] According to at least one embodiment, the optoelectronic component comprises a carrier. The carrier is formed, for example, from a metallic material or consists thereof. The carrier is, for example, a lead frame or comprises, for example, a lead frame. The component can be electrically conductively contacted via the carrier.

[0030] According to at least one embodiment, the connection carrier is arranged on the carrier. For example, the connection carrier does not extend beyond the carrier in the transverse direction. That is to say, in a top view, the connection carrier and the carrier completely overlap, for example.

[0031] The semiconductor chip is arranged, for example, on the top surface of the connection carrier. In this case, the opposite bottom surface of the connection carrier is arranged, for example, on the carrier. The bottom surface of the connection carrier is arranged on the carrier over its entire surface, for example, by means of an adhesion layer. The adhesion layer promotes, for example, a mechanically stable and thermally conductive connection of the connection carrier and the carrier. The adhesion layer can be designed, for example, to be electrically conductive or electrically insulating.

[0032] Alternatively, the semiconductor chip is arranged, for example, on the bottom surface of the connection carrier. In this case, a contact element is arranged between the cover surface of the connection carrier and the carrier. The contact element can, for example, facilitate an electrically conductive contact between the connection carrier and the carrier.

[0033] According to at least one embodiment, the electrically conductive connection electrically conductively connects the semiconductor chip, the connection carrier and the carrier. If the optoelectronic component comprises a plurality of semiconductor chips and a plurality of electrically conductive connections, the electrically conductive connection electrically conductively connects the semiconductor chip, the connection carrier and the carrier.

[0034] According to at least one embodiment, the connection carrier is arranged in a cavity of the carrier. For example, the carrier comprises a carrier plate and a carrier wall. The carrier wall, for example, partially surrounds the carrier bottom. The carrier wall can, for example, extend out of the carrier bottom in a vertical direction, so that the carrier wall and the carrier bottom form a cavity.

[0035] The carrier wall is structured, for example. In this case, the carrier wall has regions that are arranged spaced apart from one another in the transverse direction. The regions of the carrier wall that are spaced apart from one another, for example, do not have direct conductive contact with one another. Regions of the carrier wall, for example, partially surround the carrier bottom. At least one region of the carrier wall, for example, is in direct conductive contact with the carrier bottom. It is also possible that at least one further region of the carrier wall is not in direct conductive contact with the carrier bottom.

[0036] The laterally spaced-apart regions of the carrier wall have, in top view, for example, a triangular, quadrilateral, or hexagonal, circular, oval or elliptical shape. It is also possible that different regions have different shapes from one another.

[0037] According to at least one embodiment, the connection carrier is surrounded by the carrier in a transverse direction. For example, the connection carrier is surrounded by a carrier wall in a transverse direction. The cover surface of the carrier wall is arranged, for example, in a common plane with the cover surface of the connection carrier.

[0038] According to at least one embodiment, the cavity of the carrier is filled with a first encapsulation, which is electrically insulating. The first encapsulation is embedded in the connection carrier, for example. "Embedded" can mean that the connection carrier is partially or completely located within the first encapsulation and is surrounded by the first encapsulation on at least a part of its otherwise exposed outer surface. In this case, the first encapsulation is in direct, non-indirect contact with the connection carrier.

[0039] It is also possible that the structured support wall is embedded in the first encapsulation. For example, the side of the structured support wall is completely covered by the first encapsulation. Alternatively, it is possible that the side of the structured support wall facing away from the connection carrier is freely accessible and thus not covered by the first encapsulation.

[0040] According to at least one embodiment, the first encapsulation completely covers the side surface of the connection carrier. The first encapsulation is in direct contact with the connection carrier in this case. In addition, the first encapsulation is flush with the cover surface of the connection carrier, for example. In addition, the first encapsulation is flush with the cover surface of the carrier wall. The cover surface of the carrier bottom is completely covered by the first encapsulation, for example, which cover surface is not covered by the connection carrier.

[0041] According to at least one embodiment, the conductive connection is arranged on the cover surface of the carrier, the cover surface of the connection carrier and the cover surface of the first encapsulation. The conductive connection is, for example, in direct contact with the carrier, the connection carrier and the first encapsulation. For example, it is possible that the semiconductor chip is arranged on the conductive connection. The conductive connection is, for example, arranged between the semiconductor chip and the connection carrier. The semiconductor chip and the conductive connection are, for example, in direct conductive contact.

[0042] If the optoelectronic component has, for example, a plurality of semiconductor chips and a plurality of conductive connections, the conductive connections are arranged on the cover surface of the carrier, the cover surface of the connection carrier and the cover surface of the first encapsulation. The semiconductor chip can, for example, be arranged directly on the conductive connection. In this case, one or more conductive connections are respectively associated with the semiconductor chip.

[0043] According to at least one embodiment, the first encapsulation is at least partially formed from an insulating material. It is also possible that the first encapsulation consists of an electrically insulating material.

[0044] In accordance with at least one embodiment, the semiconductor chip is embedded in the second encapsulation. “Embedded” may mean that the semiconductor chip is partially or completely located within the second encapsulation and is surrounded by the second encapsulation on at least a portion of its otherwise exposed outer surface.

[0045] In this case, the second encapsulation can be in direct, non-indirect contact with the semiconductor chip. If the optoelectronic component has a plurality of semiconductor chips, the second encapsulation embeds all semiconductor chips.

[0046] The second encapsulation body is, for example, arranged on the first encapsulation body. The second encapsulation body, for example, completely covers the covering surface of the first encapsulation body. In addition, the second encapsulation body can completely cover one or more conductive connecting parts. The covering surface of the bearing wall can also be completely covered by the second encapsulation body.

[0047] Furthermore, the second encapsulation can be formed at least in regions from an electrically insulating material. It is possible that the second encapsulation consists of an electrically insulating material.

[0048] It is possible that the first encapsulation and the second encapsulation are formed or consist of the same electrically insulating material. Alternatively, the first encapsulation and the second encapsulation have different materials from each other. For example, the electrically insulating material of the first encapsulation is different from the electrically insulating material of the second encapsulation.

[0049] According to at least one embodiment, the via is arranged locally on the carrier. For example, the via is arranged on at least one of the spaced-apart regions of the carrier wall. The via is in direct contact with the carrier, for example. The via is thus arranged spaced-apart from the semiconductor chip, for example in a lateral direction. That is, the via is arranged next to the semiconductor chip. The cover surface of the via is arranged, for example, in a common plane with the cover surface of the semiconductor chip.

[0050] It is also possible that a plurality of through-holes are arranged locally on the carrier. In this case, the through-holes are each arranged on one of the regions of the carrier wall.

[0051] The via, for example, includes or consists of a conductive material, which is, for example, a metal or a semiconductor material, or contains or consists of silicon, which may be doped or undoped.

[0052] According to at least one embodiment, the via is embedded in the second encapsulation. "Embedded" can mean that the via is partially or completely located within the second encapsulation and is surrounded by the second encapsulation on at least a part of its otherwise exposed outer surface. In this case, the second encapsulation can be in direct, non-indirect contact with the via. If the optoelectronic component has a plurality of vias, the second encapsulation embeds all of the vias.

[0053] According to at least one embodiment, the optoelectronic component comprises a further electrically conductive connection. The further electrically conductive connection is formed, for example, from a metal or an electrically conductive adhesive. Furthermore, the further electrically conductive connection comprises a combination of a plurality of metals.

[0054] The further conductive connection has, for example, a height in the vertical direction of at least 1 μm and at most 15 μm. The height of the further conductive connection is constant within the scope of manufacturing tolerances, in particular over the entire extension of the further conductive connection. The further conductive connection has, for example, a width in the lateral direction, which is relatively large relative to the height of the further conductive connection. The width of the further conductive connection can, for example, be greater than the height of the further conductive connection, for example 10 times, 100 times, or 1000 times greater.

[0055] For example, it is possible that the optoelectronic component has a plurality of further electrically conductive connections. In particular, the component has a plurality of further electrically conductive connections if the component comprises a plurality of semiconductor chips and a plurality of vias.

[0056] According to at least one embodiment, the further conductive connection is arranged on the cover surface of the second encapsulation, the cover surface of the semiconductor chip and the cover surface of the via. The further conductive connection is, for example, in direct contact with the second encapsulation, the semiconductor chip and the via. The via in this case, for example, facilitates an electrically conductive connection between the further conductive connection and the carrier.

[0057] If the optoelectronic component comprises, for example, a plurality of semiconductor chips and a plurality of further electrically conductive connections, the further electrically conductive connections are arranged on the top surface of the second encapsulation, on the top surface of the semiconductor chips and on the top surface of the via.

[0058] According to at least one embodiment, the further conductive connection conductively connects the semiconductor chip and the via. If the optoelectronic component has, for example, a plurality of semiconductor chips, a plurality of vias and a plurality of further conductive connections, then, for example, the further conductive connection is conductively connected to each semiconductor chip and each via and is in direct contact with the associated component.

[0059] According to at least one embodiment, the contact element is arranged on the cover surface of the connection carrier. The contact element comprises, for example, an electrically conductive material. For example, the contact element is formed by a solder bead. By means of the contact element, the connection carrier can be electrically conductively contacted. In this case, the optoelectronic component does not have a carrier, for example. According to this embodiment, the dimensions of the component in the vertical direction and in the lateral direction are advantageously further reduced compared to the component with a carrier described here.

[0060] According to at least one embodiment, the semiconductor chip is arranged on the opposite bottom surface of the connection carrier. In this case, the semiconductor chip is, for example, a flip chip. The chip contact surface of the semiconductor chip is fixed to the connection carrier in an electrically conductive and mechanically stable manner, for example, by means of a further adhesion layer. The further adhesion layer comprises, for example, solder or an electrically conductive adhesive. For example, the bottom surface of the connection carrier has no electrically conductive connection and no further electrically conductive connection in this case.

[0061] According to at least one embodiment, the via is arranged on the connection carrier. For example, the via is arranged on the bottom surface of the connection carrier. In this case, the via can also be embedded in the connection carrier. "Embedded" can mean that the via rests on the connection carrier, is partially or completely located inside the connection carrier and / or is surrounded by the connection carrier on at least a part of its otherwise exposed outer surface. In this case, the via is in direct, non-indirect contact with the connection carrier.

[0062] According to at least one embodiment, the via, the semiconductor chip and the connection carrier are embedded in the third encapsulation. The third encapsulation is, for example, arranged on the bottom surface of the connection carrier and completely covers the bottom surface. "Embedded" can mean that the via, the semiconductor chip and the connection carrier are each partially or completely located within the third encapsulation and are surrounded by the third encapsulation on at least a part of their otherwise exposed outside. In this case, the third encapsulation can be in direct, non-indirect contact with the via, the semiconductor chip and the connection carrier.

[0063] For example, it is possible for the third encapsulation to completely cover the side surfaces of the via, the side surfaces of the semiconductor chip and the side surfaces of the connection carrier.

[0064] According to at least one embodiment, the electrically conductive connection is arranged on a cover surface of the third encapsulation, a cover surface of the semiconductor chip, and a cover surface of the via.

[0065] According to at least one embodiment, the third encapsulation is formed at least partially from an electrically insulating material. It is also possible that the third encapsulation consists of an electrically insulating material.

[0066] According to at least one embodiment, the electrically conductive connection electrically conductively connects the semiconductor chip and the via.

[0067] According to at least one embodiment, the connection carrier comprises an integrated circuit. The integrated circuit is formed, for example, by an integrated circuit (English: "integrated circuit", referred to as "IC") or has such an integrated circuit. The integrated circuit comprises, for example, a control unit, an evaluation unit and / or a control unit. The control unit and the evaluation unit read and check, for example, the state of the semiconductor chip.

[0068] If the optoelectronic component has a plurality of semiconductor chips, the control unit and the evaluation unit can, for example, each read out and check the state of the associated semiconductor chip. The actuation unit can, for example, control the state of the associated semiconductor chip and, for example, switch it on or off.

[0069] If the semiconductor chip is designed as a light detector, the semiconductor chip can be read out, for example, by means of integrated circuits such as a control unit and an evaluation unit.

[0070] According to at least one embodiment, the optoelectronic component is surface mountable. If the optoelectronic component has a carrier, for example, the carrier can be electrically conductively contacted from the side facing away from the connection carrier. If the optoelectronic component does not have a carrier, for example, wherein the contact element is arranged on the top surface of the connection carrier, the contact element can be electrically conductively contacted.

[0071] According to one embodiment, a cover is provided on the electrically insulating material. The cover comprises an opening corresponding to the extension of the semiconductor chip in a lateral direction. In addition, the cover may completely cover the cover surface of the via. In addition, the cover may completely cover the conductive connection. Alternatively, the cover may completely cover another conductive connection.

[0072] The cover is formed, for example, from a further matrix material. The further matrix material is formed, for example, from a plastic, such as silicone, epoxide or epoxy hybrid material. In addition, particles, in particular light-reflecting or light-absorbing particles, can be introduced into the further matrix material, for example. The cover advantageously protects the conductive connection and the insulating material from external influences.

[0073] If the optoelectronic component has a plurality of semiconductor chips, the cover comprises a plurality of openings. The semiconductor chips are arranged in each opening, for example. Alternatively, it is possible that electromagnetic radiation of each semiconductor chip can respectively pass through the openings.

[0074] A method for producing an optoelectronic component is also provided. The method is particularly suitable for producing the optoelectronic component described here. That is to say, the optoelectronic component described here can be produced by means of the described method or can be produced by means of the described method. All features disclosed in conjunction with the optoelectronic component are therefore also disclosed in conjunction with the method and vice versa.

[0075] According to at least one embodiment of the method, a connection carrier is provided.

[0076] In accordance with at least one embodiment of the method, an optoelectronic semiconductor chip is applied to a connection carrier.

[0077] According to at least one embodiment of the method, the semiconductor chip and / or the connection carrier are embedded in an electrically insulating material. The material of the electrically insulating material is, for example, in a flowable form when applied. In this case, the material hardens to form the electrically insulating material after application.

[0078] According to at least one embodiment of the method, an electrically conductive connection is applied, which is electrically conductively connected to the semiconductor chip and / or the connection carrier. The electrically conductive connection can be produced, for example, by sputtering and / or deposition, for example currentless or direct current deposition. By applying the electrically conductive connection, expensive bonding wire connections can be advantageously omitted.

[0079] In accordance with at least one embodiment of the method, the electrically conductive connection is arranged in places on the electrically insulating material.

[0080] According to at least one embodiment of the method, the connection carrier is embedded in a first encapsulation The first encapsulation consists, for example, of an electrically insulating material.

[0081] According to at least one embodiment of the method, the first encapsulation is produced by means of film-assisted casting.

[0082] According to at least one embodiment, the method comprises embedding the semiconductor chip in a second encapsulation body. The second encapsulation body consists, for example, of an electrically insulating material.

[0083] According to at least one embodiment of the method, the second encapsulation is produced by means of film-assisted casting.

[0084] In foil assisted molding (FAM), for example, a tool is used which has two tool halves or consists of two tool halves. At least one tool half is preferably lined with a film. The film has the task of preventing electrically insulating material from adhering to the tool. The connection carrier to be injection-molded together with the carrier, vias and / or semiconductor chip is placed in a cavity of the tool. The electrically insulating material to be injection-molded around the connection carrier together with the carrier, vias and / or semiconductor chip is, for example, initially present in solid form. The electrically insulating material to be injection-molded is placed in liquid form, for example, by heating and sprayed into the cavity. Subsequently, the electrically insulating material is hardened and the connection carrier together with the carrier, vias and / or semiconductor chip is demoulded.

[0085] As an alternative to film-assisted casting, the electrically insulating material can be applied by means of profile casting. BRIEF DESCRIPTION OF THE DRAWINGS

[0086] An optoelectronic component described here and a method described here are explained in more detail below with reference to exemplary embodiments and the associated figures.

[0087] The accompanying drawings show:

[0088] Figure 1 , 2 , 3, 4, 5, 6 and 7 are schematic diagrams showing stages of a method for manufacturing an optoelectronic component according to an embodiment;

[0089] Figure 8 , 9 , 10, 11 and 12 are schematic diagrams showing stages of a method for manufacturing an optoelectronic component according to an embodiment;

[0090] Fig.13 A schematic diagram showing an optoelectronic device according to an embodiment;

[0091] Fig.14 A schematic diagram showing an optoelectronic device according to an embodiment; and

[0092] Fig.15 A schematic cross-sectional view of an optoelectronic component according to one embodiment is shown.

[0093] Identical, similar or identically functioning elements are provided with the same reference numerals in the drawings. The drawings and the size relationships of the elements shown in the drawings to one another are not to be regarded as being true to scale. Rather, individual elements may be shown exaggeratedly for better illustration and / or for better understanding. DETAILED DESCRIPTION

[0094] Figures 1 to 7 The schematic sectional illustrations of FIG. 1 show method steps of an exemplary embodiment of a method described here for producing a radiation-emitting semiconductor component 1 .

[0095] First, provide a connection carrier 3 and a carrier 6, such as in Figure 1 The carrier comprises a carrier plate 8 and a carrier wall 7. The carrier wall 7 extends out of the carrier bottom 8 in a vertical direction, so that the carrier wall 7 and the carrier bottom 8 form a cavity. The connection carrier 3 is arranged in the cavity 6a of the carrier 6 here.

[0096] The carrier wall 7 is structured and has regions 7c which are arranged spaced apart from one another in the lateral direction. The regions 7c of the carrier wall spaced apart from one another do not have direct conductive contact with one another. The regions 7c of the carrier wall partially surround the carrier base 8. Two regions 7c of the carrier wall are in direct conductive contact with the carrier base 8. Other regions 7c of the carrier wall are not in direct conductive contact with the carrier base 8. The laterally spaced apart regions 7c of the carrier wall have a quadrilateral shape in a top view.

[0097] according to Figure 2 In the next method step, insulating material 5 is introduced into chamber 6a. Electrically insulating material 5 at least partially surrounds connection carrier 3 and carrier 7. First encapsulation 11 is formed here by electrically insulating material 5 and is embedded in connection carrier 3 and region 7c of the carrier wall.

[0098] The side surface 3a of the connection carrier is completely covered by the first encapsulation 11. In addition, the first encapsulation 11 is flush with the cover surface 3b of the connection carrier. In addition, the region 7c of the carrier wall is completely covered by the first encapsulation 11, except for the side of the structured carrier wall 7 facing away from the connection carrier 3. The side surface 7a of the structured carrier wall facing away from the connection carrier 3 is inaccessible. The first encapsulation 11 is flush with the cover surface 7b of the carrier wall.

[0099] In another step, as in Figure 3As shown in , the conductive connection 4 is applied to and in direct contact with the cover surface of the connection carrier 3, the cover surface 7b of the region of the carrier wall and the first encapsulation 11. Since the cover surface of the connection carrier 3, the cover surface 7b of the region of the carrier wall and the cover surface of the first encapsulation 11 are arranged in a common plane, the conductive connection 4 extends substantially in the lateral direction. "Substantially" means that the common plane may have small unevenness due to manufacturing tolerances.

[0100] At least one of the electrically conductive connections 4 has a first mounting area 4a for a semiconductor chip. In the region of the first mounting area 4a, the electrically conductive connection 4 has an extension which increases in a lateral direction.

[0101] according to Figure 4 , an optoelectronic semiconductor chip 2 is arranged on a connection carrier 3. The semiconductor chip 2 is designed, for example, to emit or detect light of different colors. The electromagnetic radiation emitted or detected can be, for example, light of different colors. The semiconductor chip 2 can be designed here to emit or detect electromagnetic radiation, in particular red light (R), green light (G) or blue light (B).

[0102] The semiconductor chip is arranged on one of the conductive connections 4, in particular on the first mounting area 4a. The conductive connection 4 is arranged between the semiconductor chip 2 and the connection carrier 3. The semiconductor chip 2 and the region 7c of the carrier wall are in direct conductive contact with the conductive connection 4.

[0103] Furthermore, the via 9 is partially arranged on the carrier. The via 9 is arranged on at least one of the spaced apart regions 7c of the carrier wall and is in direct contact with the carrier wall 7. The via 9 is thus arranged spaced apart from the semiconductor chip in the lateral direction. The via 9 is arranged on the side of the semiconductor chip. The cover surface 9b of the via is arranged in a common plane with the cover surface 2b of the semiconductor chip.

[0104] As in Figure 5 As shown in FIG. 1 , in a further method step, a second encapsulation 12 is applied to the first encapsulation 11. The second encapsulation 12 completely covers the top surface of the first encapsulation 11. In addition, the second encapsulation 12 completely covers the conductive connection 4. The top surface 7b of the carrier wall is also completely covered by the second encapsulation 12.

[0105] Furthermore, the semiconductor chip 2 and the via 9 are embedded in the second encapsulation 12. That is, the side surface 2a of the semiconductor chip and the side surface 9a of the via are completely covered by the second encapsulation 12. The cover surface 2b of the semiconductor chip, the cover surface 9b of the via and the cover surface of the second encapsulation 12 are located in a common plane.

[0106] according to Figure 6 In another method step, other conductive connections 10 are applied to the cover surface 2b of the semiconductor chip, the cover surface 9b of the via, and the cover surface of the second encapsulation 12. The other conductive connections 10 are in direct contact with the cover surface 2b of the semiconductor chip, the cover surface 9b of the via, and the cover surface of the second encapsulation 12. The other conductive connections 10 connect the semiconductor chip 2 and the via 9 in an electrically conductive manner.

[0107] Since the cover area 2b of the semiconductor chip, the cover area 9b of the via and the cover area of ​​the second encapsulation 12 are arranged in a common plane, the further electrically conductive connection 10 extends substantially in a lateral direction. “Substantially” means that the common plane may have small unevenness due to manufacturing tolerances.

[0108] In a next method step, a cover 14 is applied to the second encapsulation 12. The cover comprises an opening 16 for each semiconductor chip 2, through which electromagnetic radiation from the semiconductor chip 2 can pass.

[0109] Figures 8 to 12 The schematic sectional illustrations of FIG. 1 show method steps of an exemplary embodiment of a method described here for producing a radiation-emitting semiconductor component 1 .

[0110] Combined with Figure 1 The method steps are different, according to Figure 8 The regions 7c of the carrier wall spaced apart from each other have different shapes in a top view. The region 7c of the carrier wall in direct contact with the base plate 8 has a quadrilateral shape in a top view. The remaining regions 7c of the carrier wall have a circular shape in a top view.

[0111] according to Fig. 9 , such as in combination Figure 2 As in the embodiment of the present invention, the first encapsulation 11 is applied. The region 7c of the carrier wall having a circular shape in a plan view is completely surrounded by the first encapsulation 11. That is, the side of the region 7c of the carrier wall having a circular shape in a plan view is completely covered by the first encapsulation 11.

[0112] In the next method step, as in Fig.10 As shown in Figure 3 Embodiments of the present invention apply a conductive connection 4. Figure 3 In contrast, the second mounting area 4b for the semiconductor chip is formed by at least two electrically conductive connections 4. In the region of the second mounting area 4b, the electrically conductive connections 4 associated therewith do not have an extension that increases in the lateral direction.

[0113] according to Fig.11 , in a similar Figure 4In a further method step, an optoelectronic semiconductor chip 2 is arranged on a connection carrier 3. The semiconductor chip 2 can be designed to emit or detect electromagnetic radiation, in particular red (R), green (G) or blue (B) light.

[0114] Semiconductor chips are used here Figure 4 Differently arranged on at least two electrically conductive connections 4 , which form a second mounting area 4 b . At least two electrically conductive connections 4 are arranged between the semiconductor chip 2 and the connection carrier 3 .

[0115] In the present exemplary embodiment, the optoelectronic semiconductor chips 2 are flip chips which each have two contact surfaces on the side facing the connection carrier 3. The contact surfaces are each associated with one of the at least two electrically conductive connections 4 of the mounting area 4b.

[0116] As in Fig.12 As shown in Figure 5 In the next step of the embodiment of the present invention, the second encapsulation body 12 is applied to the first encapsulation body 11. Figure 5 In contrast to the exemplary embodiment of FIG. 1 , the optoelectronic component 1 does not have a via 9 .

[0117] according to Fig.13 A schematic diagram of an optoelectronic component according to an embodiment is shown.

[0118] according to Fig.13 Optoelectronic device 1 combined with Fig.12 The component 1 of the exemplary embodiment of FIG. 1 does not have a second encapsulation 12. A cover 14 is applied to the first encapsulation 11. The cover comprises an opening 16 for each semiconductor chip 2, in which the semiconductor chip 2 is arranged.

[0119] according to Fig.14 and 15 A schematic diagram of an optoelectronic component 1 according to an exemplary embodiment is shown.

[0120] In the optoelectronic device 1, as in Fig.14 and 15 , the semiconductor chip 2 is arranged on the bottom surface 3c of the connection carrier. The semiconductor chip 2 is in direct conductive contact with the connection carrier 3. According to the present exemplary embodiment, no conductive connection 4 and no further conductive connection 10 are arranged on the bottom surface 3c of the connection carrier.

[0121] Furthermore, a via 9 is provided on the connection carrier 3. The via 9 is provided on the bottom surface 3c of the connection carrier. The via 9 can also be located partially within the connection carrier 3 according to this embodiment.

[0122] Furthermore, the via 9, the semiconductor chip 2 and the connection carrier 3 are embedded in a third encapsulation 13. The third encapsulation 13 is arranged on the bottom surface of the connection carrier 9c and completely covers the bottom surface. Furthermore, the third encapsulation 13 completely covers the side surface 3a of the connection carrier, the side surface 9a of the via and the side surface 2a of the semiconductor chip. The cover surface 9b of the via, the cover surface 2b of the semiconductor chip and the cover surface of the third encapsulation 13 are located in a common plane. Here, the third encapsulation 13 is formed by an insulating material 5.

[0123] The conductive connection 4 is arranged on the cover surface 9b of the via, the cover surface 2b of the semiconductor chip and the cover surface of the third encapsulation 13 and is in direct contact with the cover surface 9b of the via, the cover surface 2b of the semiconductor chip and the cover surface of the third encapsulation 13. Since the cover surface 9b of the via, the cover surface 2b of the semiconductor chip and the cover surface of the third encapsulation 13 are arranged in a common plane, the conductive connection 4 extends substantially in the lateral direction. "Substantially" means that the common plane may have a small unevenness due to manufacturing tolerances.

[0124] The conductive connecting parts 4 respectively connect the vias 9 to the semiconductor chips 2 in an electrically conductive manner.

[0125] according to Fig.15 , a contact element 15 is arranged on the top surface 3b of the connection carrier. The contact element 15 is formed by a solder bead, for example. The connection carrier 3 can be electrically conductively contacted by means of the contact element 15. In this case, the optoelectronic component 1 has no carrier 6.

[0126] This application claims the priority of German patent application 10 2019 104 436.7, the disclosure content of which is incorporated herein by reference.

[0127] The invention is not limited to the description based on the exemplary embodiments. Rather, the invention includes any new features and any combination of features, which in particular includes any combination of features in the exemplary embodiments, even if the features or the combination themselves are not presented in detail in the exemplary embodiments.

[0128] Reference numerals list

[0129] 1 Optoelectronic devices

[0130] 2 Optoelectronic semiconductor chips

[0131] 2a Side view of a semiconductor chip

[0132] 2b Coverage of semiconductor chips

[0133] 3 Connect the bearings

[0134] 3a Connect the side of the carrier

[0135] 3b Covering surface of the connection bearing

[0136] 3c Connect the bottom surface of the carrier

[0137] 4 Conductive connection

[0138] 4a First mounting surface

[0139] 4b Second mounting surface

[0140] 5 Electrical insulation materials

[0141] 6 Bearing

[0142] 6a Chamber

[0143] 7 Load-bearing wall

[0144] 7a Side of the load-bearing wall

[0145] 7b Covering surface of load-bearing wall

[0146] 7c Area of ​​the load-bearing wall

[0147] 8 Load-bearing bottom

[0148] 9 Vias

[0149] 9a Side view of via

[0150] 9b Via coverage

[0151] 10 Additional conductive connections

[0152] 11. First Encapsulation

[0153] 12. Second Encapsulation

[0154] 13. The third enclosure

[0155] 14 Cover

[0156] 15 Contact elements

[0157] 16 Opening

[0158] 17 Integrated Circuits

[0159] R Red

[0160] G Green

[0161] B Blue

Claims

1. An optoelectronic device (1) having - an optoelectronic semiconductor chip (2) which is designed to emit or detect electromagnetic radiation, - a connection carrier (3) on which the semiconductor chip (2) is arranged, - a carrier (6) on which the connecting carrier (3) is arranged, - an electrically conductive connection (4) which is electrically conductively connected to the semiconductor chip (2) and the connection carrier (3), and - an electrically insulating material (5) which surrounds the semiconductor chip (2) and the connection carrier (3) at least in regions, wherein - the electrically conductive connection part (4) is arranged locally on the electrically insulating material (5), - the conductive connection (4) electrically conductively connects the semiconductor chip (2), the connection carrier (3) and the carrier (6), - the cover surface of the connection carrier (3) and the cover surface of the electrically insulating material (5) extend in a common plane in a transverse direction, - the electrically conductive connection (4) extends in the transverse direction in the common plane, and - The carrier (6) comprises a lead frame.

2. The optoelectronic device (1) according to claim 1, wherein - the connection carrier (3) is arranged in a chamber (6a) of the carrier (6), and - The connection carrier (3) is surrounded by the carrier (6) in the transverse direction.

3. The optoelectronic device (1) according to claim 2, wherein - the chamber (6a) of the carrier (6) is filled with a first encapsulation (11), which is electrically insulating, and The first encapsulation (11) completely covers the side surface (3a) of the connection carrier.

4. The optoelectronic device (1) according to claim 3, wherein - the conductive connection portion (4) is arranged on the covering surface of the carrier (6), the covering surface (3b) of the connection carrier and the covering surface of the first encapsulation body (11), and The first encapsulation (11) is formed at least partially from the electrically insulating material (5).

5. The optoelectronic device (1) according to any one of claims 1 to 3, wherein The semiconductor chip (2) is embedded in a second encapsulation (12).

6. The optoelectronic device (1) according to claim 5, wherein - the via (9) is locally arranged on the carrier (6), and - The via (9) is embedded in the second encapsulation body (12).

7. The optoelectronic device (1) according to claim 6, A further electrically conductive connection (4) is provided, wherein - the further electrically conductive connection (4) is arranged on the cover surface of the second encapsulation (12), the cover surface (2b) of the semiconductor chip and the cover surface (9b) of the via, and The further electrically conductive connection (4) electrically conductively connects the semiconductor chip (2) and the via (9).

8. The optoelectronic device according to claim 1, wherein - a contact element (15) is arranged on the cover surface (3b) of the connection carrier, and The semiconductor chip (2) is arranged on an opposite bottom surface (3c) of the connection carrier.

9. The optoelectronic device according to claim 1 or 8, wherein - a through hole (9) is arranged on the connection carrier (3), - the via (9), the semiconductor chip (2) and the connection carrier (3) are embedded in a third encapsulation body (13), - the conductive connection portion (4) is arranged on the covering surface of the third encapsulation body (13), the covering surface (2b) of the semiconductor chip and the covering surface (9b) of the via hole, - the third encapsulation (13) is at least partially formed from an electrically insulating material (5), and - The conductive connection portion (4) conductively connects the semiconductor chip (2) and the via (9).

10. The optoelectronic device (1) according to any one of claims 1 to 3, The connection carrier (3) comprises an integrated circuit (17).

11. The optoelectronic device (1) according to any one of claims 1 to 3, The optoelectronic component (1) is surface-mountable.

12. A method for producing an optoelectronic component (1), the method comprising the following steps: - providing a connection carrier (3), - applying an optoelectronic semiconductor chip (2) to the connection carrier (3), - embedding the semiconductor chip (2) and the connection carrier (3) in an electrically insulating material (5), and - applying an electrically conductive connection (4) which is electrically conductively connected to the semiconductor chip (2) and the connection carrier (3), wherein - the electrically conductive connection part (4) is arranged locally on the electrically insulating material (5), - the conductive connection (4) electrically conductively connects the semiconductor chip (2), the connection carrier (3) and the carrier (6), - the connecting support (3) is arranged on a support (6), - the cover surface of the connection carrier (3) and the cover surface of the electrically insulating material (5) extend in a common plane in a transverse direction, - the electrically conductive connection (4) extends in a transverse direction in the common plane, and - The carrier (6) comprises a lead frame.

13. The method according to claim 12, wherein - embedding the connection carrier (3) into the first enclosure (11), and The first encapsulation (11) is produced by means of film-assisted casting.

14. The method according to claim 12 or 13, wherein - encapsulating the semiconductor chip (2) with a second encapsulation body (12), and - Producing the second encapsulation (12) by means of film-assisted casting.

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