Chip test carrier

Abstract

The present invention discloses a chip test carrier, including a test carrier body, a chip carrier slot for carrying a chip is provided on the test carrier body, a conductive portion for conducting and cooperating with the chip is provided on the bottom wall of the chip carrier slot, and at least one negative pressure adsorption channel is provided on the bottom wall of the chip carrier slot, and the negative pressure adsorption channel is connected to a gas source. The present invention can improve the chip placement stability and chip picking stability by arranging a negative pressure adsorption channel on the bottom wall of the chip carrier slot to replace the traditional crimping structure, and ensure the chip is loaded in place during testing and the adsorption flatness when the chip is removed. The negative pressure adsorption channel is reasonably designed using the original conductive portion structure, which effectively reduces the carrier cost and ensures the chip test locking stability. It is equipped with a replaceable test body and a chip outer edge contour seat to meet the testing and coordination requirements of chips of different specifications, thereby improving the versatility of the chip test carrier. The overall design is simple and ingenious, and is easy to manufacture and promote and apply.

Description

Technical Field

[0001] The invention relates to a chip test carrier, and belongs to the technical field of chip test fixing fixtures. Background Art

[0002] A chip is a processor whose components are miniaturized into one or more integrated circuits. An integrated circuit can receive coded instructions at one or more of its terminals, execute the instructions and output signals describing its status. These instructions can be input, centralized or stored internally. The chip needs internal programs to work, so it is necessary to burn and test the relevant internal programs through the chip test carrier to meet the chip production needs.

[0003] A chip test carrier is a device used for chip burning and testing. It has a chip test slot. The chip test slot is equipped with a conductive matching part that is conductive with the chip. Loading the chip in the chip test slot to achieve conduction between the conductive part of the chip and the conductive matching part can meet the program burning production needs and program testing and detection needs.

[0004] With the progress of automation in chip testing, a negative pressure adsorption and transport mechanism is generally used in conjunction with a chip test carrier. That is, the chip is adsorbed by the negative pressure adsorption and transport mechanism and automatically loaded into the chip test carrier. After the chip is placed, the chip is pressure-maintained and locked by the crimping and locking structure of the chip test carrier. After the chip is fired or tested, the crimping and locking structure is loosened, and the tested chip is adsorbed by the negative pressure adsorption and transport mechanism for turnover.

[0005] Traditional chip test carriers have the following defects: first, the crimping and locking structure built into the chip test carrier will increase the cost of the test carrier, and the built-in crimping and locking mechanism is relatively complex to manufacture; second, there are chip turnover defects. Specifically, during the process of removing the chip after being placed by the negative pressure adsorption carrier mechanism, the suction force at the tail end of the adsorption end will cause a secondary displacement of the chip, causing the chip in the chip test carrier to bounce and shift, and the pressing down process of the crimping and locking structure is likely to cause crimping damage to the shifted chip. In addition, after the chip test is completed, the crimping and locking structure is also likely to cause the chip to bounce during the withdrawal process, making the chip unable to be picked up by the negative pressure adsorption end after tilting. Summary of the invention

[0006] The purpose of the present invention is to solve the deficiencies of the above-mentioned prior art. A chip test carrier is proposed to address the problems that the traditional test carrier has bouncing causing offset during chip placement and chip picking and the built-in crimping locking structure increases the cost of the carrier.

[0007] In order to achieve the above object, the technical solution adopted by the present invention is:

[0008] A chip test carrier comprises a test carrier body, the test carrier body is provided with a chip carrier slot for carrying the chip, the bottom wall of the chip carrier slot is provided with a conducting portion for conducting and cooperating with the chip, the bottom wall of the chip carrier slot is provided with at least one negative pressure adsorption channel, and the negative pressure adsorption channel is connected to a gas source.

[0009] Preferably, the conducting portion comprises a plurality of conducting tube shafts, and the negative pressure adsorption channel is disposed in at least one of the conducting tube shafts.

[0010] Preferably, the conducting portion comprises a plurality of conducting needle columns, and the negative pressure adsorption channel is disposed on the outer periphery of at least one of the conducting needle columns.

[0011] Preferably, the test carrier body is provided with an air source connection portion for being connected to an air source, and the air source connection portion is connected to the negative pressure adsorption channel.

[0012] Preferably, the gas source is provided with a gas detection module for detecting whether the chip is in place.

[0013] Preferably, a conical material guiding opening is provided at the top of the chip loading slot.

[0014] Preferably, a detachable test body is provided at the bottom of the test carrier body, the test body is provided with a test end surface extending to the chip carrier slot, and the conductive portion and the negative pressure adsorption channel are arranged on the test end surface.

[0015] Preferably, a detachable chip outer edge contour seat is provided in the chip carrier slot.

[0016] The beneficial effects of the present invention are mainly reflected in:

[0017] 1. By setting a negative pressure adsorption channel on the bottom wall of the chip carrier to replace the traditional crimping structure, the chip placement stability and chip picking stability can be improved, ensuring that the chip is loaded in place during testing and the chip can be adsorbed and flat when removed.

[0018] 2. Use the original conductive part structure to reasonably design the negative pressure adsorption channel, effectively reduce the carrier cost and ensure the chip test locking stability.

[0019] 3. It has a replaceable test body and chip outer edge contour seat to meet the testing requirements of chips of different specifications and improve the versatility of the chip test carrier.

[0020] 4. The overall design is simple and ingenious, easy to manufacture and promote. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0022] Figure 1 It is a structural schematic diagram of the chip test carrier of the present invention.

[0023] Figure 2 It is a schematic diagram of the top view of the chip test carrier of the present invention.

[0024] Figure 3 It is a schematic diagram of the cross-sectional structure of the chip test carrier of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only the parts related to the relevant inventions are shown in the accompanying drawings. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0027] The present invention provides a chip test carrier, such as Figures 1 to 3 As shown, the test carrier body 1 includes a chip carrier slot 2 for carrying a chip, and a conductive portion 3 for conducting with the chip is provided on the bottom wall of the chip carrier slot 2.

[0028] At least one negative pressure adsorption channel 4 is provided on the bottom wall of the chip carrier slot 2, and the negative pressure adsorption channel is connected to a gas source.

[0029] Specific implementation process and principle description:

[0030] A negative pressure adsorption channel 4 is arranged on the bottom wall of the chip carrier slot 2, through which the traditional crimping and locking structure can be replaced, thereby reducing the manufacturing cost of the chip test carrier. In addition, the negative pressure adsorption channel 4 can meet the stability of automated operation testing and improve the stability of chip loading and chip picking turnover.

[0031] Specifically, air is pumped through the air source, and the negative pressure adsorption channel 4 generates negative pressure suction. After the negative pressure picking operation mechanism carries the chip, the chip enters the chip carrier slot 2 for conduction and cooperation. At this time, the chip is adsorbed and fixed in the chip carrier slot 2 by the negative pressure adsorption channel 4. When the negative pressure picking operation mechanism displaces after releasing the chip, the negative pressure suction of the negative pressure adsorption channel 4 is greater than the tail end suction released by the negative pressure picking operation mechanism, thereby effectively preventing the chip from bouncing and displacing.

[0032] In addition, after the chip is fired or tested, the negative pressure adsorption channel 4 releases the negative pressure suction. When the negative pressure suction is released, the chip bounce will not occur during the release process of the crimping structure in the prior art, ensuring the stability of the chip position and meeting the requirement that the top surface of the chip is flat and easy to pick up.

[0033] Currently, there are two types of chips: pin-through and plug-in channel, so corresponding implementation examples are designed.

[0034] In a specific embodiment, the conducting portion 3 includes a plurality of conducting tube shafts, and at least one of the conducting tube shafts is provided with a negative pressure adsorption channel.

[0035] That is, the conductive tube shaft that is in communication with the pins is optimized in design, and the negative pressure adsorption channel is set inside the conductive tube shaft. In this way, the hollow structure of the original conductive tube shaft is utilized to achieve negative pressure adsorption of the chip pins during insertion.

[0036] In a specific embodiment, the conducting portion 3 includes a plurality of conducting needle columns, and a negative pressure adsorption channel is disposed on the periphery of at least one conducting needle column.

[0037] That is, the conductive needle column is utilized, and only the annular space between the conductive needle column and the peripheral matrix is ​​needed to form the negative pressure adsorption channel, thereby meeting the negative pressure adsorption fixation requirements for the chip.

[0038] In a specific embodiment, the test carrier body 1 is provided with an air source connection portion 5 for communicating with an air source, and the air source connection portion 5 is connected to the negative pressure adsorption channel.

[0039] That is, the gas source connection portion 5 is utilized to meet the gas supply demand that passes through the test carrier body 1 and communicates with the negative pressure adsorption channel 4 .

[0040] In a specific embodiment, the gas source is provided with a gas detection module for detecting whether the chip is in place.

[0041] Specifically, after the chip is adsorbed by the negative pressure adsorption channel 4, the bottom end surface of the chip is sealed with the bottom wall of the chip loading slot 2, and the gas detection module performs gas detection to determine whether the current chip is loaded in place. If it is not loaded in place, the gas detection module will alarm.

[0042] In a specific embodiment, a tapered material guide opening 6 is provided at the top of the chip loading slot 2 .

[0043] Specifically, there will be a slight positioning deviation in the chip placement process, and the tapered material guide opening 6 can be used to achieve alignment guidance, meet the alignment reference requirements of the negative pressure pickup mechanism, and provide a visual alignment basis.

[0044] In a specific embodiment, a detachable test body 7 is provided at the bottom of the test carrier body 1, and the test body 7 is provided with a test end surface 8 extending to the chip carrier slot, and the conductive part and the negative pressure adsorption channel are provided on the test end surface. A detachable chip outer edge contour seat 9 is provided in the chip carrier slot.

[0045] Specifically, by replacing the test body 7 and the chip outer edge contour seat 9, the matching requirements of different chip tests are met, thereby improving the versatility of the chip test carrier.

[0046] It should be noted that the air source connection part 5 of the vent portion of the negative pressure adsorption channel 4 on the extended portion of the test body 7 has a linear displacement for communicating with the vent portion, meeting the air connection and matching requirements during the model change.

[0047] From the above description, it can be found that the chip test carrier of the present invention, by providing a negative pressure adsorption channel on the bottom wall of the chip carrier slot to replace the traditional crimping structure, can improve the chip placement stability and chip picking stability, ensure the chip is loaded in place during testing and the chip can be adsorbed flat when removed. The negative pressure adsorption channel is reasonably designed using the original conductive part structure, which effectively reduces the carrier cost and ensures the chip test locking stability. It has a replaceable test body and a chip outer edge contour seat to meet the testing requirements of chips of different specifications, thereby improving the versatility of the chip test carrier. The overall design is simple and ingenious, easy to manufacture and promote application.

[0048] The term "comprise" or any other similar term is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus / device that includes a list of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article, or apparatus / device.

[0049] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A chip test carrier, comprising a test carrier body, wherein the test carrier body is provided with a chip carrying slot for carrying a chip, and the bottom wall of the chip carrying slot is provided with a conducting portion for conducting with the chip, characterized in that: At least one negative pressure adsorption channel is provided on the bottom wall of the chip carrier slot, and the negative pressure adsorption channel is connected to a gas source; The conducting part includes a plurality of conducting tube shafts, at least one of which is provided with the negative pressure adsorption channel; Alternatively, the conducting portion includes a plurality of conducting needle columns, and the negative pressure adsorption channel is disposed on the periphery of at least one of the conducting needle columns; The gas source is provided with a gas detection module for detecting whether the chip is in place; After the chip is adsorbed by the negative pressure adsorption channel, the bottom end surface of the chip is sealed and matched with the bottom wall of the chip loading slot; A detachable test body is disposed at the bottom of the test carrier body. The test body is provided with a test end surface extending to the chip carrier slot. The conductive portion and the negative pressure adsorption channel are disposed on the test end surface.

2. The chip test carrier according to claim 1, characterized in that: The test carrier body is provided with an air source connection portion for communicating with an air source, and the air source connection portion is connected with the negative pressure adsorption channel.

3. The chip test carrier according to claim 1, characterized in that: The top of the chip carrying slot is provided with a tapered material guiding opening.

4. The chip test carrier according to claim 1, characterized in that: The chip carrier slot is provided with a detachable chip outer edge contour seat.

Images